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WO2021010079A1 - Structure de montage de composant électronique, procédé de montage de composant électronique et panneau d'affichage à del - Google Patents

Structure de montage de composant électronique, procédé de montage de composant électronique et panneau d'affichage à del Download PDF

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Publication number
WO2021010079A1
WO2021010079A1 PCT/JP2020/023622 JP2020023622W WO2021010079A1 WO 2021010079 A1 WO2021010079 A1 WO 2021010079A1 JP 2020023622 W JP2020023622 W JP 2020023622W WO 2021010079 A1 WO2021010079 A1 WO 2021010079A1
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WIPO (PCT)
Prior art keywords
electronic component
wiring board
bump electrode
electrode
led chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2020/023622
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English (en)
Japanese (ja)
Inventor
英幸 西村
康一郎 深谷
良勝 柳川
直也 大倉
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V Technology Co Ltd
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V Technology Co Ltd
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Publication of WO2021010079A1 publication Critical patent/WO2021010079A1/fr
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    • H10W72/0198—
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H10W70/60—
    • H10W72/01208—
    • H10W72/072—

Definitions

  • the present invention relates to an electronic component mounting technique, and more particularly to an electronic component mounting structure, an electronic component mounting method, and an LED display panel that can improve the yield at the time of mounting the electronic component.
  • LED Light Emitting Diode
  • display panels are provided on, for example, an array of micro LED devices that emit blue or dark blue light and an array of micro LED devices that are blue or dark blue from the micro LED devices. It was provided with an array of wavelength conversion layers (fluorescent light emitting layers) that absorb the light of the above and convert the emission wavelengths of the light into the wavelengths of the red, green, and blue lights, respectively (for example,). See Patent Document 1).
  • wavelength conversion layers fluorescent light emitting layers
  • Such electrode misalignment is caused by relative slippage or rotational misalignment caused by the parallelism (for example, warpage or inclination) of the bonding surface of the wiring board and the LED chip, or the pressurizing shaft of the pressurizing mechanism. This is due to the relative slippage and rotational deviation of both bonded surfaces caused by the running accuracy.
  • the present invention addresses such a problem and provides an electronic component mounting structure, an electronic component mounting method, and an LED display panel on which an LED chip is mounted as an electronic component so as to improve the yield at the time of mounting the electronic component.
  • the purpose is to provide.
  • the first invention is an electronic component mounting structure in which a chip-type electronic component is mounted on one surface of a wiring substrate, and the electronic component is a pair having a recessed portion on the surface.
  • the wiring substrate includes a protruding bump electrode connected to a recessed portion of the electrode portion, a fixing member whose position is determined according to the arrangement of the bump electrode, and which fixes the electronic component.
  • the bump electrode is face-to-face bonded to the recessed portion of the electrode portion, and the electronic component is fixed to the wiring substrate by the fixing member.
  • the second invention is an electronic component mounting method for mounting a chip-type electronic component on one surface of a wiring board, in which a recess is formed on the surface of a pair of electrode portions provided on the electronic component.
  • the position is determined according to the arrangement of the transparent substrate on which the electronic component is formed on one surface, the protruding bump electrode connected to the recessed portion of the electrode portion, and the bump electrode, and the electronic component is placed.
  • the electronic component is added to the wiring board by the step of positioning the wiring board provided with the fixing member to be fixed on one surface for bonding and pushing from the other surface of the transparent substrate.
  • the step of peeling the electronic component from the transparent substrate is included.
  • the third invention is an LED display panel in which a plurality of LED chips are mounted on one surface of a wiring board, and the LED chips are formed in a matrix on one surface of the wiring board.
  • the wiring board is provided with a pair of electrode portions having a recessed portion on the surface, and the position of the wiring board is determined according to the arrangement of the protruding bump electrode connected to the recessed portion of the electrode portion and the bump electrode, and the LED chip.
  • the bump electrode is face-to-face bonded to the recessed portion of the electrode portion, and the LED chip is fixed to the wiring substrate by the fixing member.
  • the bump electrode is face-to-face bonded to the recessed portion of the electronic component, it is possible to prevent relative slippage and rotational deviation between the wiring board and the electronic component. Therefore, for example, it is possible to improve the yield at the time of mounting an electronic component such as an LED chip.
  • FIG. 1A is a plan view
  • FIG. 1B is an enlarged cross-sectional view of a main part focusing on one LED chip 3 in the sectional view taken along line AA of FIG. 1A.
  • FIG. 3C is a diagram showing a state before the LED chip 3 is mounted in FIG. 3B in order to facilitate understanding of the description.
  • FIG. 2 is a plan view in which the phosphor cell array 10 is further provided on the LED display panel.
  • the phosphor cell array 10 is formed by arranging the phosphor cells 10a in a matrix.
  • the phosphor cell 10a is a unit in which the red (R), green (G), and blue (B) fluorescent light emitting layers 11 are partitioned by a so-called rib structure.
  • the LED display panel has a plurality of LED chips 3 mounted on the wiring board 1, and includes a wiring board 1, a fixing member 2, and a micro LED chip (hereinafter, simply "LED chip”). It is composed of the LED array 100 provided with 3).
  • the LED display panel lights up the LED chip 3 to display an image in full color.
  • the LED chip 3 uses, for example, a single-color ultraviolet light emitting diode (UV-LED)
  • the LED display panel is further provided with the above-mentioned phosphor cell array 10 in order to display a full color.
  • the LED display panel is an example of a substrate connection structure
  • the LED chip 3 is an example of an electronic component.
  • the LED chips 3 are mounted in a matrix on one surface of the wiring board 1 by a two-dimensional arrangement of predetermined pitch intervals. Further, as shown in FIG. 1B, the LED chip 3 has a pair of electrode portions 3a and 3b having recessed portions on the surface (hereinafter, the electrode portions 3a and 3b may be collectively referred to as “electrode portion 30”). To be equipped with.
  • the pair of electrode portions 3a and 3b are, for example, electrode pads that enable the LED to be energized from an external circuit.
  • the electrode portion 3a is an n-side electrode pad (cathode electrode), and the electrode portion 3b is a p-side electrode pad (anode). Electrode).
  • the wiring board 1 is a group of projecting bump electrodes 4a and 4b (hereinafter, bump electrodes 4a and 4b) that are electrically and mechanically connected to the recesses (recesses) of the electrode portions 3a and 3b of the LED chip 3 and are "bumps". (Sometimes referred to as an electrode 4), and a fixing member 2 whose position is determined according to the arrangement of the bump electrodes 4a and 4b to which the LED chip 3 is fixed. Then, in the LED display panel, the bump electrodes 4a and 4b are face-to-face bonded to the recessed portions of the electrode portions 3a and 3b of the LED chip 3, and the LED chip 3 is fixed to the wiring board 1 by the fixing member 2. It is a feature.
  • the wiring board 1 may be, for example, a flexible board made of a polyimide film or the like.
  • a TFT (Thin Film Transistor) drive circuit for individually driving the light emission of the LED chip 3 as an on state or an off state is provided on the polyimide film substrate, and the TFT drive circuit is provided.
  • the bump electrode 4 is provided at a predetermined position.
  • the wiring board 1 is, for example, a flexible printed circuit board (FPC: Flexible Printed Circuits), which is in the form of a film composed of an insulating base film (for example, polyimide) and a wiring layer forming an electric circuit. It is a substrate of.
  • the wiring board 1 is provided with scanning wiring and data wiring (not shown) connected to an external drive device intersecting vertically and horizontally. Further, a thin film transistor is provided at the intersection of the scanning wiring and the data wiring.
  • the LED chip 3 is mounted when the LED chip 3 is mounted.
  • a fixing member 2 for guiding the LED chip 3 is provided so that the electrode portion 30 of the LED chip 3 and the bump electrode 4 provided on the wiring substrate 1 can be electrically contacted with each other.
  • the wiring 1a schematically shows the wiring of the TFT drive circuit.
  • the position of the fixing member 2 is determined according to the arrangement of the bump electrodes 4, and the LED chip 3 is fixed to the wiring board 1.
  • the fixing member 2 is a resin that supports the LED chip 3 by elastic deformation, and in a state where the LED chip 3 is fixed to the wiring substrate 1, it contracts in response to the pressure from the LED chip 3 to form the LED chip 3.
  • the recessed portion of the electrode portion 3a is guided to the bump electrode 4a to be face-to-face bonded, and the recessed portion of the electrode portion 3b of the LED chip 3 is guided to the bump electrode 4b to be face-to-face bonded. That is, the fixing member 2 has a function as a guide member.
  • the fixing member 2 is formed by patterning the resin as a photosensitive thermosetting adhesive and having photosensitivity, and is a region surrounding the bump electrodes 4a and 4b of the wiring board 1.
  • the LED chip 3 is fixed to the wiring board 1 by thermosetting.
  • thermosetting adhesive a photosensitive and thermosetting resin or the like is preferably used.
  • a resin containing an epoxy resin, an acrylic resin, a phenol resin, a polyimide resin, a silicone resin, a styrene resin or the like as a main component is desirable.
  • the adhesive can be accurately placed at a predetermined position as the fixing member 2 by exposing and developing the adhesive by photolithography after applying the adhesive.
  • a photosensitive thermosetting adhesive having a thermosetting function is adopted as a photosensitive adhesive.
  • the LED chip 3 is manufactured using, for example, gallium nitride (GaN) as a main material.
  • the LED chip 3 may be an ultraviolet light emitting diode (UV-LED) or an LED that emits blue light.
  • UV-LED ultraviolet light emitting diode
  • a wavelength of 385 nm may be selected in consideration of the conversion efficiency of the phosphor and the like.
  • the LED chip 3 has, for example, an external size of about 15 ⁇ 45 ⁇ m.
  • the thickness of the electrode portion 30 of the LED chip 3 is about 3 ⁇ m.
  • the thickness of the bump electrode 4 is about 8 ⁇ m
  • the film thickness of the fixing member 2 is about 11 to 12 ⁇ m.
  • a method of realizing full-color display by combining an LED that emits light having a short wavelength such as an ultraviolet light emitting diode (UV-LED) and an RGB phosphor is adopted.
  • a phosphor cell 10a having a fluorescence light emitting layer 11 having an RGB phosphor that converts light in the ultraviolet or blue wavelength band into a predetermined corresponding color is provided on the light emitting surface side of the LED chip 3. ..
  • the LED display panel has phosphor cells 10a including the fluorescence light emitting layer 11 arranged in a matrix on the wiring substrate 1 via the LED chip 3 and the fixing member 2.
  • the phosphor cell array 10 is provided.
  • the fluorescence light emitting layer 11 is surrounded by a light-shielding wall with a rib structure of a fluorescent material that is excited by light (excitation light) emitted from the LED chip 3 and that converts the wavelength into fluorescence of a predetermined corresponding color.
  • the area is filled.
  • the predetermined corresponding color is determined by the RGB phosphor and is a color corresponding to the three primary colors of light, red (R), green (G), and blue (B).
  • a plurality of phosphor cells 10a for realizing full-color display are arranged in a matrix.
  • a plurality of phosphor cells 10a are arranged in 4 rows and 5 columns in the phosphor cell array 10.
  • FIG. 3 is an explanatory diagram of the phosphor cell.
  • 3A is an enlarged plan view of the phosphor cell 10a shown in FIG. 2, and
  • FIG. 3B is a sectional view taken along line BB of FIG. 2A.
  • (C) is a front view of the LED chip 3 shown in (b).
  • the fluorescent light emitting layer 11 includes a fluorescent material layer 11R filled with a red fluorescent dye, a fluorescent material layer 11G filled with a green fluorescent dye, and a fluorescent material layer 11B filled with a blue fluorescent dye. doing. These fluorescent dyes are examples of RGB phosphors. Then, as shown in FIG. 3B, the fluorescent light emitting layer 11 has red (R), green (G), and blue for the red, green, and blue fluorescent dyes (an example of the fluorescent material) to realize full-color display. The wavelength is converted to the fluorescence of (B), respectively.
  • each fluorescent material when the fluorescent dyes of the fluorescent material layers 11R, 11G, and 11B transition to the excited state by the light (excitation light) emitted from the LED chip 3, and then return to the basal state, each fluorescent material is used. It emits fluorescence corresponding to the visible spectra of red (R), green (G), and blue (B), which are wavelength-converted by.
  • These fluorescent material layers 11R, 11G, and 11B are partitioned by a partition wall 14 having a metal film 13 on the surface.
  • a partition wall 14 is an example of a light-shielding wall, and separates the fluorescent material layers 11R, 11G, and 11B from each other.
  • the metal film 13 and the partition wall 14 are constituent elements of the rib structure.
  • a metal film 13 having a function as a reflective film is provided on the surface of the partition wall 14.
  • the metal film 13 is for preventing the excitation light and fluorescence emitted from the light emitting surface 32 from passing through the partition wall 14 and mixing with fluorescence of another adjacent color. Fluorescence is emitted when each fluorescent dye of each fluorescent material layer 11R, 11G, 11B is excited by excitation light.
  • the metal film 13 is formed with a thickness capable of sufficiently blocking excitation light and fluorescence. In this case, as the metal film 13, a thin film such as aluminum or an aluminum alloy that easily reflects excitation light is suitable.
  • the LED array 100 and the phosphor cell array 10 are bonded to each other to form a display panel (see FIG. 3B).
  • the LED array 100 further includes a flat plate-shaped flattening film 12 that adheres and supports the phosphor cell array 10.
  • the LED chip 3 has electrode portions 3a and 3b for emitting light at predetermined positions on the upper surface (one surface) of the compound semiconductor 31 which is an ultraviolet light emitting diode (UV-LED).
  • the electrode portion 3a has a recessed portion 30a
  • the electrode portion 3b has a recessed portion 30b (hereinafter, the recessed portions 30a and 30b may be collectively referred to as a “dented portion 33”).
  • the LED chip 3 has a light emitting surface 32 that emits light from a light source (a light emitting layer that emits specific ultraviolet light) on the lower surface (the other surface) of the compound semiconductor 31.
  • FIG. 4 is an explanatory view showing a plurality of shapes of the recessed portion of the electrode portion of the LED chip.
  • FIG. 4 illustrates a plurality of groove shapes of the electrode portions 3a and 3b (see FIGS. 4A to 4F). This groove shape forms the recessed portions 30a and 30b.
  • the shapes of the bump electrodes 4a and 4b are determined according to the shapes of the recessed portions 30a and 30b. That is, in the present embodiment, for example, the concave portions of the recessed portions 30a and 30b may be joined so as to be fitted with the convex portions of the bump electrodes 4a and 4b, respectively.
  • "fitting" does not necessarily mean fitting and joining without a gap.
  • the protruding tip surfaces of the bump electrodes 4a and 4b may be face-to-face bonded to the surfaces of the recessed portions 30a and 30b of the electrode portions 3a and 3b, respectively.
  • the recessed portion 30a and the bump electrode 4a, and the recessed portion 30b and the bump electrode 4b may be electrically and mechanically connected. This mechanical connection includes chemical bonds such as eutectic and solder.
  • the bump electrode 4 is face-to-face bonded to the recessed portion 33 of the LED chip 3 according to the above-described configuration, so that the wiring substrate 1 and the LED chip 3 are relatively slippery or rotationally displaced. Can be prevented.
  • the LED display panel can improve the yield when the LED chip 3 is mounted, and by lighting the LED chip 3 that can be normally lit, the image can be displayed in full color via the phosphor cell 10a. ..
  • FIG. 5 and 6 are explanatory views showing an electronic component mounting method and preprocessing according to the present invention.
  • FIGS. 5 and 6 three LED chips 3 are illustrated for easy explanation.
  • FIG. 7 is a flow chart showing a process of a manufacturing method of an LED display panel adopting the electronic component mounting method according to the present invention.
  • the processes of steps S4 to S5 shown in FIG. 7 correspond to the processes of the electronic component mounting method.
  • the processes of steps S1 to S3 shown in FIG. 7 correspond to the preprocessing of the electronic component mounting method.
  • step S1 the LED chips 3 are formed in a matrix on the sapphire substrate 7 according to a predetermined arrangement (n rows and m columns) at predetermined pitch intervals.
  • FIG. 1 the LED chips 3 are formed in a matrix on the sapphire substrate 7 according to a predetermined arrangement (n rows and m columns) at predetermined pitch intervals.
  • FIG. 5A shows a state in which the LED chip 3 is formed on the sapphire substrate 7. The details of the formation of the LED chip will be described later with reference to FIGS. 9 to 11.
  • FIG. 5A corresponds to the three LED chips 3 in the region R1 surrounded by the broken line shown in FIG.
  • the present invention is not limited to the sapphire substrate 7, and a synthetic quartz substrate may be adopted.
  • the protruding bump electrode 4 is formed on the wiring board 1 corresponding to the arrangement of the LED chips 3.
  • the bump electrode 4 is preferably a metal bump electrode, a solder bump electrode that can be connected by solder, or a resist bump electrode on which a metal film is laminated.
  • the bump electrode 4 can be well connected by selecting any of a metal bump electrode, a solder bump electrode, and a resist bump electrode.
  • a metal bump electrode is formed as the bump electrode 4 as an example.
  • step S2 for example, by adopting the gas deposition method, a mask having fine holes is placed only on the portion where the bump electrode 4 is formed on the wiring board 1, and fine gold particles are deposited on the mask.
  • a protruding bump electrode 4 is formed.
  • the "protruding" shape is not limited to a conical shape or a tapered shape, and includes, for example, a cylindrical shape. That is, the shape of the bump electrode 4 may be any shape that can be face-to-face bonded to the recessed portion 33.
  • the photosensitive thermosetting adhesive 6 is formed on the wiring substrate 1 on which the bump electrode 4 is formed by using a coating device such as a spray device or a spinner (spin coater). Is uniformly applied to a predetermined thickness (see FIG. 5 (c)).
  • the photosensitive thermosetting adhesive 6 can be patterned into a specific shape by photolithography.
  • FIG. 8 is a graph showing the relationship between the viscosity and elastic modulus of the photosensitive thermosetting adhesive with respect to temperature.
  • the photosensitive thermosetting adhesive 6 has viscous / elastic temperature characteristics as shown in FIG. 8 after photocuring.
  • the region I has reversibility with the temperature T1 in FIG. 8 as a boundary, and the region II has an irreversible property.
  • the photosensitive thermosetting adhesive 6 has an elastic modulus of 0.05 MPa to 0.1 MPa at the above temperature T1 (for example, 110 ° C.), and is adapted to the shape of the LED chip 3 according to an external force. It is deformed and has a function of gripping the LED chip 3 by utilizing the reaction force corresponding to the deformation.
  • step S3 the photosensitive thermosetting adhesive 6 is patterned by photolithography, and in the region where the LED chip 3 is mounted, for example, a bump of the wiring board 1 is formed.
  • a fixing member 2 having an opening 5 corresponding to the electrode 4 is formed.
  • FIG. 5D shows a case where the opening 5 has a shape corresponding to the outer shape of the LED chip 3. That is, in step S3, the liquid photosensitive thermosetting adhesive 6 is applied by a coating device such as a spinner, patterned, and then heated to form the elastic fixing member 2.
  • step S4 in the bonding of the wiring board and the sapphire board (step S4), first, a mounting area in which a plurality of LED chips 3 formed on one surface of the sapphire board 7 are mounted on the wiring board 1, respectively. Positioning to (see FIG. 5 (e)). Subsequently, in step S4, after the LED chip 3 is brought into contact with the wiring board 1 (see FIG. 6A), the LED chip 3 is pressed by the pressure P from the other surface of the sapphire board 7. The recessed portion 33 of the electrode portion 30 and the bump electrode 4 of the wiring board 1 are joined face-to-face so as to be conductive (see FIG. 6B). Further, in step S4, the LED chip 3 and the wiring board 1 are maintained in a conductive state and the LED chip 3 is fixed to the wiring board 1 by heat curing (see FIG. 6C).
  • step S4 by using a mounting device such as a flip chip bonder device, a plurality of LED chips 3 formed on one surface of the sapphire substrate 7 as shown in FIG. 5 (e). Are respectively positioned on the fixing member 2 of the mounting region to be mounted on the wiring board 1.
  • a mounting device such as a flip chip bonder device
  • LED chips 3 formed on one surface of the sapphire substrate 7 as shown in FIG. 5 (e).
  • an alignment mark provided on the wiring board 1 and an alignment mark provided on the sapphire board 7 are photographed by an alignment camera by a mounting device, and both alignment marks match or have a predetermined positional relationship. It is aligned and executed so as to form.
  • step S4 as shown in FIG. 6A, the LED chip 3 and the wiring board 1 are moved relatively close to each other to prebond the LED chip 3 to the fixing member 2, and then FIG. 6B ), The pressure P is relatively applied in the direction of the arrow in the drawing to electrically and mechanically connect the electrode portion 30 of the LED chip 3 and the bump electrode 4 of the wiring substrate 1.
  • preheating is performed from prebonding to before the next heat curing to lower the elastic modulus of the photosensitive thermosetting adhesive 6 (a state in which it is easily deformed), and the pressure P is applied. It is pressurizing.
  • the temperature of this preheating is preferably about T1 (for example, 110 ° C.) to 120 ° C. shown in FIG.
  • step S4 the photosensitive thermosetting adhesive 6 is heat-cured using heat H from the external heater 20 for a predetermined time, and the LED chip 3 is heat-cured on the wiring board 1. Stick to. Specifically, in step S4, the photosensitive thermosetting adhesive 6 is applied at 180 ° C. for 90 minutes, 200 ° C. for 60 minutes, or 230 ° C. for 30 minutes while maintaining the energized state and holding the LED chip 3. The LED chip 3 is fixed to the wiring substrate 1 by heating and curing in any of the minutes.
  • the LED chip 3 is laser-lifted off from the sapphire substrate 7 by using the laser lift-off device.
  • step S5 the sapphire is moved from the sapphire substrate 7 side in the direction (X direction) in which the line-shaped laser beam L of ultraviolet rays intersects the long axis thereof.
  • the interface between the substrate 7 and the LED chip 3 is irradiated to laser lift off the LED chip 3 from the sapphire substrate 7.
  • FIG. 6E the mounting of the LED chip 3 on the wiring board 1 is completed.
  • the flattening film 12 is further formed by applying a photosensitive thermosetting adhesive to the LED array 100 in which the LED chip 3 has been mounted on the wiring substrate 1. Laminate.
  • step S7 a plurality of phosphor cells 10a whose arrangement is determined according to the arrangement of the LED chips 3 are formed on the display panel shown in FIG. 1 to produce the phosphor cell array 10. ..
  • step S8 the display panel is formed by laminating and mounting the LED array 100 and the phosphor cell array 10 shown in FIG.
  • step S1 the processes from the formation of the LED chip (step S1) to the formation of the display panel (step S8) have been described.
  • step S1 the formation of the LED chip (step S1) and the formation of the flattening film (step S6) fluorescence. Details of the formation of the body cell (step S7) and the formation of the display panel (step S8) will be described.
  • FIG. 9 is an explanatory diagram showing a process of forming the LED chip. It is a flow chart which shows the forming process of the LED chip.
  • the blue LED and the UV-LED are mainly composed of a gallium nitride (GaN) -based semiconductor laminated structure, and various semiconductor laminated structures can be formed.
  • the present invention is characterized in that a recessed portion 33 is formed in the electrode portion 30 of the LED chip 3 so that the bump electrode 4 is face-to-face bonded to the recessed portion 33.
  • the present invention is not limited to the semiconductor laminated structure of the LED chip 3 described below.
  • a gallium nitride based light emitting diode is formed by using a metalorganic vapor phase epitaxy (MOVPE) method, which is a kind of vapor phase epitaxy (Vapour Phase. Epitaxy).
  • MOVPE metalorganic vapor phase epitaxy
  • the epi crystal layer used is grown.
  • a laminate of n-type GaN, MQW (MultiQuantum Well) layer and p-type GaN is grown as the epi crystal layer.
  • the MOVPE method in a semiconductor laminated structure such as an epi crystal layer, parameters such as growth temperature, growth pressure, material gas flow rate, material gas type, and flow velocity are obtained so that the characteristics required for the crystal layer of each semiconductor can be obtained. Crystal growth is performed while controlling the above.
  • the process of partitioning each region where the LED chip 3 is formed is performed.
  • one LED chip 3 is used for convenience of explanation. I draw with an eye on the formation of.
  • step S11 the pn-junctioned n-type gallium nitride 3c is laminated on the sapphire substrate 7.
  • step S11 an n-type gallium nitride 3c is laminated after laminating a GaN low-temperature buffer layer (not shown) on the sapphire substrate 7 by the MOVPE method (see FIG. 9A).
  • the MOVPE method is applied to laminate the quantum well (MQW) layer (light emitting layer) using InGaN or the like on the n-type gallium nitride 3c, and the upper layer thereof.
  • a p-type gallium nitride layer is laminated on the surface.
  • the quantum well layer and the p-type gallium nitride layer are collectively represented by reference numeral 3d.
  • each region where the LED chip 3 is formed is divided. Perform the processing to be performed. In this case, in order to form a through hole of the n-side electrode pad, the n-type GaN layer is etched.
  • step S13 for example, photolithography is applied to mask the area other than the region where ITO is laminated with a resist mask, and then a physical vapor deposition method (PVD: Physical Vapor Deposition) such as a sputtering vapor deposition method is applied. Then, as a transparent electrode material, an ITO (Indium Tin Oxide) layer 3e is further laminated (see FIG. 9 (c)).
  • PVD Physical Vapor Deposition
  • the insulating film (SiO 2 ) 3f is further laminated as a protective film by using, for example, a chemical vapor deposition (CVD) (see FIG. 9D). ..
  • CVD chemical vapor deposition
  • step S15 for example, photolithography is applied to mask the regions other than the regions for forming through holes for conduction of the electrode portions 3a and 3b with a resist mask, and then dry etching is performed. , A through hole is formed (see FIG. 9E).
  • the electrode materials 3a and 3b are formed by vacuum vapor deposition.
  • the electrode material may be, for example, an alloy containing gold.
  • the dents may be the dents 30a and 30b, but if necessary, FIG. It may be processed so as to form the recessed portions 30a and 30b as shown in (see FIG. 9F).
  • FIG. 11 is a diagram showing a configuration of an embodiment of a sapphire substrate on which an LED chip is formed.
  • (A) is a plan view
  • (b) is an enlarged plan view of the LED chip 3 shown in (a).
  • FIG. 11A shows, as an example, a sapphire substrate 7 in which LED chips 3 are formed in 12 rows and 5 columns.
  • the process proceeds to the formation of the bump electrode shown in FIG. 7 (step S2).
  • the formation of the LED chip (step S1) may be executed after the formation of the fixing member (step S3).
  • FIG. 12 is an explanatory view showing a step of forming a flattening film.
  • A is a plan view of the LED array 100 in which the flattening film 12 is further laminated.
  • B is a cross-sectional view taken along the line CC of the three LED chips 3 in the region R2 surrounded by the broken line in (a).
  • a microdispenser is used to apply the photosensitive thermosetting adhesive onto the LED array 100 while controlling the height direction to be constant.
  • the photosensitive thermosetting adhesive is exposed to form a flattening film 12 by photolithography. As a result, the flattening film 12 is formed. At this time, it is preferable that the photosensitive thermosetting adhesive is not formed on the light emitting surface 32 of the LED chip 3.
  • FIG. 13 is an explanatory diagram showing a process of forming a phosphor cell.
  • Step S7 comprises forming a rib structure and filling with a fluorescent material.
  • the formation of the rib structure includes the formation of the partition wall 14, the formation of the metal film 13, and the laser processing of the metal film 13.
  • a fluorescent resist is applied to the entire surface of the sapphire substrate 7a, and a pattern of the partition wall 14 is formed by photolithography.
  • step S7 in order to prevent color mixing, the inside of the partition wall 14 is metal-coated with a metal film 13, and only the bottom surface is irradiated with a pulse laser to peel off the metal film 13 by ablation. Further, in step S7, as shown in FIG. 13, the fluorescent material layer 11R, the fluorescent material layer 11G, and the fluorescent material layer 11B are filled. As a result, the phosphor cell array 10 as shown in FIG. 2, for example, is formed on the sapphire substrate 7a.
  • FIG. 14 is an explanatory diagram showing a process of forming a display panel.
  • step S8 the LED array 100 and the phosphor cell array 10 are bonded and mounted by using a mounting device such as a flip chip bonder device.
  • FIG. 14A shows a state in which the LED array 100 and the phosphor cell array 10 are bonded together.
  • the fluorescent cell 10a which is a constituent unit of the fluorescent cell array 10 is focused on.
  • step S8 the flattening film 12 is heat-cured and the phosphor cell array 10 is fixed to the LED array 100 in the same manner as in the bonding of the wiring board and the sapphire substrate (step S4).
  • step S8 the phosphor cell array 10 is laser lifted off from the sapphire substrate 7a in the same manner as in the laser lift-off (step S5) (see FIG. 14B).
  • the manufacturing method of the LED display panel adopting the electronic component mounting method of mounting the plurality of LED chips 3 on the wiring board 1, the time of mounting the electronic component such as the LED chip 3 is applied.
  • An LED display panel with improved yield can be manufactured.
  • FIG. 15 is an explanatory diagram showing an example of defects in LED chip mounting in the prior art.
  • FIG. 15A shows the LED chip 3 formed on one surface of the sapphire substrate 7 (not shown) positioned in the mounting area for mounting on the wiring board 1, and then the other of the sapphire substrate 7 (not shown).
  • the case where the LED chip 3 is pressurized by the pressure P from the surface of the above surface to bring the electrode portion 8 of the LED chip 3 into contact with the electrode 1b of the wiring board 1 is illustrated.
  • the LED chip 3 may be rotationally displaced as shown in FIG. 15B, resulting in an open defect.
  • slippage may occur, resulting in a short defect.
  • the LED chip 3 has the bump electrode 4 face-to-face bonded to the recessed portion 33 of the LED chip 3 according to the above-described configuration, so that the wiring substrate 1 and the LED chip 3 are relative to each other. It is possible to prevent slippage and rotation deviation.
  • FIG. 16 is an explanatory diagram showing elastic deformation of the fixing member when the LED chip is mounted. Further, in the present invention, as shown in FIGS. 16A to 16C, when the LED chip is mounted, the LED chip 3 is guided by the opening 5 of the fixing member 2 and inside the opening 5 of the fixing member 2. The electrode portions 3a and 3b of the LED chip 3 and the bump electrodes 4a and 4b of the wiring substrate 1 are electrically contacted with each other. That is, after the LED chip 3 is positioned with respect to the wiring board 1 (see FIG. 16A), when the LED chip 3 is pressurized with the pressure P, the pressure P1 acts on the fixing member 2 (FIG. 16). See (b)).
  • reaction force P2 of the pressure P1 acts to grip the LED chip 3 by the fixing member 2 (see FIG. 16C).
  • the structure is such that misalignment is less likely to occur.
  • the sapphire substrate 7 is not shown.
  • the wiring board 1 and the electrons of the LED chip 3 and the like are electronically bonded. It is possible to suppress misalignment such as slippage and rotational misalignment due to pressurization during bonding with the sapphire substrate 7 on which the component is formed. As a result, a reliable energized state can be obtained.
  • the display panel has been described by using a single color ultraviolet light emitting diode (UV-LED) as a micro LED in which the LED chip 3 emits light in the ultraviolet or blue wavelength band.
  • UV-LED ultraviolet light emitting diode
  • the LED chip 3 is one of three types of micro LEDs that emit light corresponding to the three primary color lights, and the micro LEDs corresponding to each color are arranged according to a predetermined arrangement.
  • the display panel may be configured as arranged above. In this case, in the display panel, the LED chips 3 that emit red (R), green (G), and blue (B) lights are arranged on the wiring board 1 so as to realize full-color display. It is not necessary to adopt the phosphor cell array 10 as shown.
  • the metal bump electrode is applied to the bump electrode 4, but when the resist bump electrode is pressurized by using the conductive resist bump electrode, the resist bump electrode is crushed and corresponds to the resist bump electrode. It may be configured so that it is connected to the electrode portion 30. As a result, in a state where the resist bump electrode is crushed, the fixing member 2 is cured and both substrates are joined, so that a good electrical connection is maintained.
  • the electronic component is the LED chip 3
  • the present invention is not limited to this, and the electronic component may be an IC chip or the like as long as it is in the form of a chip.
  • the present invention can be applied even when there is one electronic component.
  • an electronic component mounting method a case where a plurality of electronic components are mounted on a wiring board is applied, but the present invention can be applied even when there is one electronic component.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Led Device Packages (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Wire Bonding (AREA)

Abstract

La présente invention concerne une structure de montage de composant électronique permettant de monter des puces de DEL de type puce (3) sur une surface d'un substrat de câblage (1). Les puces de DEL (3) sont chacune dotées d'une paire de pièces d'électrode (30), dont chacune présente un évidement à sa surface. Le substrat de câblage (1) comprend : des électrodes à bosse saillantes (4), connectées aux évidements respectifs des pièces d'électrode (30) ; et des éléments de fixation (2), dont la position est déterminée selon l'agencement desdites électrodes à bosse (4) et qui permettent de fixer les puces de DEL (3). Les électrodes à bosse (4) sont jointes face à face avec les évidements respectifs des pièces d'électrode. Les puces de DEL (3) sont fixées au substrat de câblage (1) par l'intermédiaire des éléments de fixation (2). Cette configuration permet d'augmenter le rendement de montage des puces de DEL (3).
PCT/JP2020/023622 2019-07-18 2020-06-16 Structure de montage de composant électronique, procédé de montage de composant électronique et panneau d'affichage à del Ceased WO2021010079A1 (fr)

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JP2019-132629 2019-07-18
JP2019132629A JP2021019037A (ja) 2019-07-18 2019-07-18 電子部品実装構造、電子部品実装方法及びｌｅｄ表示パネル

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JP2022135730A (ja) * 2021-03-05 2022-09-15 株式会社ブイ・テクノロジー 転写装置及び転写方法
JP7635056B2 (ja) * 2021-04-02 2025-02-25 株式会社ジャパンディスプレイ 電子部品の実装方法、表示装置、及び、回路基板
WO2024091380A1 (fr) * 2022-10-28 2024-05-02 Applied Materials, Inc. Appareil, systèmes et procédés d'utilisation d'un dispositif de retenue pour décollement au laser à diode électroluminescente

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CN116013948A (zh) * 2021-10-22 2023-04-25 重庆康佳光电技术研究院有限公司 暂存基板、制造方法以及巨量转移方法
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