WO2020111623A1 - Mixer for rf receiver - Google Patents

Abstract

The present invention relates to a mixer and, more specifically, to a mixer for an RF receiver, which can reduce glitches resulting from the LO feedthrough effect. The mixer for an RF receiver is a single balanced mixer for an RF receiver, and comprises: an input terminal to which an RF signal is input; a plurality of switches which are connected in parallel to the input terminal; left dummy switches connected to the one ends of the switches; and right dummy switches connected to the other ends of the switches.

Description

Mixer for RF receiver

The present invention relates to a mixer, and more particularly, to a mixer for an RF receiver capable of reducing glitch due to LO feedthrough.

1 is a block diagram of a conventional single balanced RF receiver.

Referring to FIG. 1, a conventional single balanced RF receiver includes a low power amplifier (LNA) for amplifying an RF input signal received at an input terminal (RF_IN), a mixer for down converting an RF signal output from the LNA, and a LO for a mixer. Voltage-controlled oscillator (VCO) to provide a signal, I/Q generator (I/Q generator) that generates an I/Q signal based on a LO signal output from a voltage-controlled oscillator (VCO), baseband output from a mixer Baseband Amplifier (BBA) that amplifies (BB, Baseband) signals, Analog-to-Digital Converter (ADC) that converts the baseband signals output from BBA to digital signals, and DFE that processes baseband digital signals output from ADC (Digital Front End), AGC (Automatic Gain Control), and RSSI (Received signal strength indicator).

FIG. 2 is a circuit diagram of a conventional single-balanced 4-phase Tayloe Mixer.

Referring to Figure 2, a conventional conventional single balanced 4-phase taylor mixer, one input terminal, four NMOS switch (NMOS Switch) (or PMOS switch (PMOS Switch) or CMOS switch (CMOS Switch)) , 4 sampling capacitors, and 4 output terminals.

Among the four NMOS switches, the drain of the first NMOS switch is connected to the RF input terminal and the source is connected to the first output terminal. The drain of the second NMOS switch is connected to the RF input terminal, and the source is connected to the second output terminal. The drain of the third NMOS switch is connected to the RF input terminal, and the source is connected to the third output terminal. The drain of the fourth NMOS switch is connected to the RF input terminal, and the source is connected to the fourth output terminal.

A first LO (Local Oscillator) signal (LO_0°) is input to the gate of the first NMOS switch, a second LO signal (LO_180°) is input to the gate of the second NMOS switch, and a third NMOS switch is The third LO signal (LO_90°) is input to the gate, and the fourth LO signal (LO_270°) is input to the gate of the fourth NMOS switch.

Of the four sampling capacitors, two are connected in series between the first output terminal and the second output terminal, and two capacitors connected in series are connected to ground. The other two are connected in series between the third output terminal and the fourth output terminal, and between two capacitors connected in series are connected to ground.

A baseband I_0° signal is output to the first output terminal, a baseband I_180° signal is output to the second output terminal, and a baseband Q_0° signal is output to the third output terminal, and a fourth A baseband Q_180° signal is output to the output terminal.

FIG. 3 is a circuit diagram for explaining the problem of the conventional general single balanced 4-phase Taylor mixer (hereinafter referred to as “conventional mixer”) illustrated in FIG. 2.

Referring to FIG. 3, in the conventional mixer shown in FIG. 2, an overlap capacitance (Cov, Overlap Capacitance) between a gate-source and a gate-drain of an NMOS switch is formed as a parasitic capacitance, and the source of the NMOS switch- A diffusion capacitance (Cdiff, Diffusion Capacitance) is formed between the ground and the drain-ground as parasitic capacitance.

In the conventional mixer, since the overlap capacitance Cov and the diffusion capacitance Cdiff are formed as parasitic capacitances in the NMOS switch, LO feedthrough occurs.

The LO feed-through phenomenon is a phenomenon in which a glitch is generated in a signal output from the output terminal Vout. In this glitch, as shown in Equation 1 below, the voltage change of the LO applied to the gate terminal Vin of the NMOS switch is divided by the overlap capacitance Cov and the diffusion capacitance Cdiff, so that the RF input of the RF input terminal It is included in the RF input signal and the baseband output signal of the output terminal.

In Equation 1 above, W _sw is the width of the NMOS switch shown in FIGS. 2 and 3, ΔV _IN is a voltage change of the LO signal input to the gate terminal of the NMOS switch, and ΔV _OUT is the output. This is the amount of change in the voltage (V _OUT ) output from the terminal.

Since the glitch generated by the LO feedthrough phenomenon is included in the RF input signal and the baseband output signal, the linearity of the RF receiver having the mixer shown in FIG. 3 is deteriorated. . Furthermore, the selectivity of the RF receiver is reduced.

In order to solve this problem, there has been a conventional method to increase the capacitance of the sampling capacitor from several hundred pF to several nF. However, this method has a problem that the conversion gain of the mixer is reduced when the capacitance of the sampling capacitor is increased, and the sampling capacitor of hundreds of pF to several nF is difficult to be implemented in a chip, and off-chip (off) -chip).

The problem to be solved by the present invention is to provide a mixer capable of reducing glitch due to LO feedthrough.

In addition, a mixer capable of reducing the capacitance of the sampling capacitor to several pF is provided.

Also, a mixer capable of implementing a sampling capacitor in a chip is provided.

In addition, it provides a mixer that can improve the linearity and selectivity of the RF receiver.

The mixer according to the embodiment of the present invention, as a single balanced mixer, includes a plurality of switches connected in parallel to an input terminal to which an RF signal is input, and a left dummy switch and a right dummy switch respectively connected to both ends of the switches, wherein The first terminal of the switch is connected to the input terminal, the source and drain of the left dummy switch are connected to the first terminal of the switch, and the source and drain of the right dummy switch are connected to the second terminal of the switch, , A LO signal is input to the gate of the switch, and a complementary LO signal of the LO signal is input to the gate of the left dummy switch and the right dummy switch.

Here, the width of the switch is preferably larger than the width of the right dummy switch.

Here, the width of the switch is preferably twice the width of the right dummy switch.

When using the mixer according to the embodiment of the present invention, there is an advantage that it is possible to reduce the glitch caused by the LO feedthrough (LO feedthrough) phenomenon.

In addition, there is an advantage of reducing the capacitance (sampling capacitance) of the sampling capacitor included in the mixer to a few pF. Accordingly, it is possible to improve the conversion gain of the mixer (Coversion gain), there is an advantage that can implement a sampling capacitor on-chip (on-chip).

In addition, there is an advantage that it is possible to reduce glitch due to LO feedthrough phenomenon without implementing a sampling capacitor separately off-chip.

In addition, there is an advantage that can improve the linearity (linearity) and selectivity (selectivity) of the RF receiver.

1 is a block diagram of a conventional single balanced RF receiver.

FIG. 2 is a circuit diagram of a conventional single-balanced 4-phase Tayloe Mixer.

3 is a circuit diagram for explaining the problem of the conventional mixer shown in FIG.

4 is a circuit diagram of a mixer according to an embodiment of the present invention.

5 shows simulation conditions of the conventional mixer shown in FIG. 2 and the mixer according to the embodiment of the present invention shown in FIG. 4.

6 is a table showing the results of the simulation conditions according to FIG. 5.

7 and 8 are graphs of actual simulation results showing the results shown in the table of FIG. 6.

For a detailed description of the present invention, which will be described later, reference is made to the accompanying drawings that illustrate specific embodiments in which the present invention may be practiced. These embodiments are described in detail enough to enable those skilled in the art to practice the present invention. It should be understood that the various embodiments of the invention are different, but need not be mutually exclusive. For example, certain shapes, structures, and properties described herein may be implemented in other embodiments without departing from the spirit and scope of the invention in relation to one embodiment. In addition, it should be understood that the location or placement of individual components within each disclosed embodiment can be changed without departing from the spirit and scope of the invention. Therefore, the following detailed description is not intended to be taken in a limiting sense, and the scope of the present invention, if appropriately described, is limited only by the appended claims, along with all ranges equivalent to those claimed. In the drawings, similar reference numerals refer to the same or similar functions throughout several aspects.

4 is a circuit diagram of a mixer according to an embodiment of the present invention.

4, the mixer according to the embodiment of the present invention, dummy switches (Dummy switch, M2R, M2L) at both ends (source terminal and drain terminal) of each switch M1 of the conventional mixer shown in FIG. ). Therefore, the rest of the components except for the dummy switches M2R and M2L are replaced with the contents described above.

Each switch M1 and each dummy switch M2R, M2L may be an NMOS transistor, but is not limited thereto. For example, each switch M1 and each dummy switch M2R, M2L may be any one of a PMOS transistor, an NMOS transistor, and a CMOS transistor.

Each switch M1 includes a gate terminal and first and second terminals. Here, the first terminal may be any one of the drain terminal and the source terminal of each switch M1, and the second terminal may be the other one. Hereinafter, it is assumed on the assumption that the first terminal is the drain terminal and the second terminal is the source terminal. However, depending on the type of the switch, the first terminal may be the source terminal and the second terminal may be the drain terminal.

The corresponding LO signal shown in FIG. 2 is input to the gate terminal of each switch M1.

The drain terminal of each switch M1 is connected to an RF input terminal to which an RF signal is input, and the source terminal of each switch M1 is connected to an output terminal (BB output) from which a baseband signal is output.

The sampling capacitor Csamp. is connected between the output terminal BB output and ground.

Each dummy switch M2R, M2L includes a gate terminal, a drain terminal, and a source terminal.

As a gate terminal of each of the dummy switches M2R and M2L, a complementary LO signal of the LO signal input to the switch M1 connected to the corresponding dummy switches M2R and M2L is input.

The dummy switches M2R and M2L include a right dummy switch M2R connected to the source terminal of each switch M1 and a left dummy switch M2L connected to the drain terminal of each switch M1.

The source terminal and the drain terminal of the right dummy switch M2R are respectively connected to the source terminal of the corresponding switch M1.

The source terminal and the drain terminal of the left dummy switch M2L are respectively connected to the drain terminal of the corresponding switch M1.

The mixer according to the embodiment of the present invention shown in FIG. 4 can reduce glitch due to LO feedthrough. This will be described with reference to Equation 2 below.

In Equation 2 above,

ΔV _IN in the left term is the voltage change of the LO signal input to the gate terminal of each switch M1, W ₁ is the width of each switch M1, and C _ov is the gate of the MOS transistor The overlap capacitance between the source (or gate and drain), and C _diff.,total is the diffusion capacitance between the source (or drain and body) of each switch (M1) and the body (or substrate) and each dummy switch (M2L or M2R) is the sum of the diffusion capacitance between the source and body and drain and body, W2 is the width of each dummy switch (M2L or M2R),

ΔV _IN in the right term is the voltage change of the complementary LO signal input to the gate terminal of each dummy switch (M2L or M2R), W ₁ is the width of each switch (M1), C _ov is the gate of the MOS transistor And the overlap capacitance between the source (or gate and drain), and C _diff.,total is the diffusion capacitance between the source of each switch (M1) and the body (or drain) and the source of each dummy switch (M2L or M2R). The sum of the diffusion capacitance between the body and the drain and body, W2 is the width of each dummy switch (M2L or M2R).

In Equation 2 above, when W1=2*W2, the difference between the left term and the right term becomes 0. That is, ideally, if the width W2 of the dummy switches M2R and M2L is half the width W1 of the switch M1, the LO feedthrough phenomenon may disappear.

5 shows simulation conditions of a conventional mixer shown in FIG. 2 and a mixer according to an embodiment of the present invention shown in FIG. 4, and FIG. 6 is a table showing the results of simulation conditions according to FIG. , FIGS. 7 and 8 are graphs of actual simulation results according to the simulation conditions of FIG. 6.

The left table of FIG. 5 is a simulation condition for P1dB (1dB Gain Compression Point) of the conventional mixer shown in FIG. 2 and the mixer according to the embodiment of the present invention, and the right table of FIG. 5 is the conventional shown in FIG. It is a simulation condition for a mixer and a third order intercept point (IP3) of the mixer according to the embodiment of the present invention.

In the simulation conditions, the capacitance values of the sampling capacitors C _{samp . Shown} in FIGS. 2 and 4 were 1 pF, and all simulation conditions were the same.

Referring to FIG. 6, as a result of simulation, the input P1dB (Input P1dB) is 3.8dBm in the case of the conventional mixer (w/o Dum.) shown in FIG. 2, while the embodiment of the present invention shown in FIG. 4 In the case of a mixer (w/i Dum.), it was shown as 4.1 dBm, and it was confirmed that there is an improvement of 8% compared to a conventional mixer. On the other hand, the output P1dB (Output P1dB) is the case of the conventional mixer (w/o Dum.) shown in FIG. 2 and the mixer (w/i Dum.) according to the embodiment of the present invention shown in FIG. It appeared almost the same.

The input IP3 is 1.8 dBm in the case of the conventional mixer (w/o Dum.) shown in FIG. 2, while the mixer according to the embodiment of the present invention shown in FIG. 4 (w/i Dum.) In the case of 6.7dBm, it was confirmed that there is a significant improvement of 272% compared to the conventional mixer.

And, the output IP3 (Output IP3) is 6.2dBm in the case of the conventional mixer (w/o Dum.) shown in FIG. 2, while the mixer (w/i Dum) according to the embodiment of the present invention shown in FIG. In case of .), it was found to be 10.8dBm, and it was confirmed that there is an improvement of 74% compared to the conventional mixer.

7 is an experiment result showing that the input IP3 and the output IP3 of the conventional mixer (w/o Dum.) are approximately 1.8 dBm and 6.2 dBm, respectively, and FIG. 8 is an embodiment of the present invention. The experimental results show that the input IP3 and output IP3 of the mixer (w/i Dum.) according to are approximately 6.74dBm and 10.8dBm.

The mixer according to the embodiment of the present invention aims to provide a low power short-range wireless communication supporting a transmission rate of about 1 Mb/s in an ISM band of 900 MHz or 2.4 GHz for information transmission between a mobile device, a wearable device, and a sensor. It can be applied to ultra low power wireless transceiver chip design supporting IEEE 802.15.4 and IEEE 802.15.4q standards.

The mixer according to the embodiment of the present invention can also be applied to a direct-conversion (Direct-conversion) RF transceiver. The structure of the direct conversion type RF transceiver has no image problem, and the mixing spur is very small, so the design process is simple, and the cascaded stage is minimized to reduce the power consumption of the entire chip, resulting in ultra-low power consumption. It is suitable for low power wireless transceiver structure.

In the direct conversion type RF transceiver using the mixer according to the embodiment of the present invention, the structure of the receiving side is converted to a baseband signal by directly converting the RF signal received from the receiver antenna through the LNA and the mixer according to the embodiment of the present invention. It can be converted to a digital signal through, and the structure of the transmitting side converts the digital signal transmitted from the modem from the DAC to the analog signal, and uses the quadrature up-conversion to transmit the RF carrier signal at the baseband frequency. Can be converted directly to.

Features, structures, effects, etc. described in the above embodiments are included in one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, features, structures, effects, and the like exemplified in each embodiment may be combined or modified for other embodiments by a person having ordinary knowledge in the field to which the embodiments belong. Therefore, the contents related to such combinations and modifications should be interpreted as being included in the scope of the present invention.

In addition, although the embodiments have been mainly described above, these are merely examples and do not limit the present invention, and those of ordinary skill in the art to which the present invention pertains have the above-described scope without departing from the essential characteristics of the present embodiment. It will be appreciated that various modifications and applications not illustrated are possible. For example, each component specifically shown in the embodiment can be implemented by modification. And differences related to these modifications and applications should be construed as being included in the scope of the invention defined in the appended claims.

Claims (4)

An input terminal to which an RF signal is input; A plurality of switches connected in parallel to the input terminal; A left dummy switch connected to one end of the switch; And A right dummy switch connected to the other end of the switch; Including, a single balanced mixer for an RF receiver. According to claim 1, The switch includes a first terminal, a second terminal and a gate, The first terminal of the switch is connected to the input terminal, The source and drain of the left dummy switch are connected to the first terminal of the switch, The source and drain of the right dummy switch are connected to the second terminal of the switch, LO signal is input to the gate of the switch, A complementary LO signal of the LO signal is input to the gate of the left dummy switch and the right dummy switch, Single balanced mixer for RF receivers. According to claim 1, The width of the switch is larger than the width of the right dummy switch, a single balanced mixer for an RF receiver. The method of claim 3, The width of the switch is double the width of the right dummy switch, a single balanced mixer for an RF receiver.

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