WO2020001277A1 - Uplink synchronization method, apparatus, and system - Google Patents

Abstract

Disclosed are an uplink synchronization method, apparatus, and system. The uplink synchronization method comprises: determining an uplink timing advance (TA) value; and transmitting the uplink TA value to a first communication node by using downlink control information (DCI).

Description

Uplink synchronization method, device and system

Cross-reference to related applications

This application is based on a Chinese patent application with an application number of 201810671518.6 and an application date of June 26, 2018, and claims the priority of the Chinese patent application. The entire contents of this Chinese patent application are incorporated herein by reference.

Technical field

The embodiments of the present application relate to, but are not limited to, the field of wireless communications, and in particular, to an uplink synchronization method, device, and system.

Background technique

In a Long Term Evolution (LTE) communication system and an LTE-Advanced (LTE-Advanced) communication system, a base station (BS, Base Station) receives a sounding reference reported by a user equipment (UE, User Equipment) Signal (SRS, Sounding Reference Signal) and demodulation reference signal (DMRS, Demodulation Reference Signal) to obtain the time adjustment value, and determine the uplink timing advance (TA, Timing, Advance) value according to the time adjustment value, the BS maps the TA value to where The media access control unit (MAC, CE, Control, Control) of the cell sends a timing advance command (TAC, Timing Advance Command) to the UE using the MAC CE, and the UE receives the TAC to obtain uplink synchronization adjustment.

In a radio resource control (RRC, Radio Resource Control) connected (RRC_CONNECTED) state, the BS needs to maintain a TA value. Although the UE and the BS obtain uplink synchronization during the random access process, the time when the uplink signal arrives at the BS may change with time, for example, the UE is in a high-speed moving state, the transmission path is switched, and the UE's crystal oscillator is shifted. Therefore, the UE needs to continuously update the TA value.

In the LTE communication system, the BS uses MAC and CE to issue TAC. The cycle is long and needs to wait for feedback. The reason is that in the LTE system, the TA value is not adjusted frequently, and the TAC overhead is large, and frequent TAC is issued. As a result, downlink physical shared channel (PDSCH, Physical Downlink, Shared Channel) resources are wasted. In some scenarios, such as 5G high-frequency scenarios, because the frequency band is wider and the sampling frequency is higher, the relative slot length and cyclic prefix (CP, Cyclic Prefix) length are shorter. When the UE moves, the deviation of the TA value The value will be relatively large. In addition, due to the frequent switching of the beam, the TA value may jump over a wide range. Therefore, uplink synchronization needs to be performed more quickly and frequently. If the TAC is frequently sent in the MAC CE, the PDSCH resources will be wasted and the system efficiency will be reduced.

Summary of the invention

Embodiments of the present application provide an uplink synchronization method, device, and system.

An embodiment of the present application provides an uplink synchronization method, including:

Determine the uplink timing advance value;

Sending the uplink timing advance value to the first communication node using the downlink control information.

In the embodiment of the present application, after determining the uplink timing advance value, the method further includes:

Compare the uplink timing advance value determined this time with the uplink timing advance value determined last time, and when the absolute difference between the uplink timing advance value determined this time and the uplink timing advance value determined last time is absolute When the value is less than a preset threshold, use the downlink control information to send the uplink timing advance value to the first communication node.

An embodiment of the present application proposes an uplink synchronization method, including:

Receiving downlink control information sent by a second communication node;

An uplink timing advance value is determined according to the downlink control information, and an uplink synchronization adjustment is performed according to the uplink timing advance value.

In the embodiment of the present application, the determining the uplink timing advance value according to the downlink control information includes:

Mapping the uplink timing advance bit value carried in the downlink control information to the quantized uplink timing advance adjustment value according to a mapping relationship between the uplink timing advance bit value and the quantized uplink timing advance adjustment value;

Converting the quantized uplink timing advance adjustment value to the uplink timing advance value according to the adjustment step size.

An embodiment of the present application proposes an uplink synchronization device, including:

A determining module configured to determine an uplink timing advance value;

The sending module is configured to send the uplink timing advance value to the first communication node using the downlink control information.

An embodiment of the present application proposes an uplink synchronization device, including:

A receiving module configured to receive downlink control information sent by a second communication node;

The synchronization module is configured to determine an uplink timing advance value according to the downlink control information, and perform uplink synchronization adjustment according to the uplink timing advance value.

An embodiment of the present application provides an uplink synchronization device, including a processor and a computer-readable storage medium. The computer-readable storage medium stores instructions. When the instructions are executed by the processor, any one of the foregoing is implemented. An uplink synchronization method.

An embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the foregoing uplink synchronization methods are implemented.

An embodiment of the present application proposes an uplink synchronization system, including:

A second communication node configured to determine an uplink timing advance value; and using downlink control information to send an uplink timing advance value to the first communication node;

The first communication node is configured to receive downlink control information sent by the second communication node; determine an uplink timing advance value according to the downlink control information, and perform uplink synchronization adjustment according to the uplink timing advance value.

The embodiments of the present application include: determining an uplink TA value; and sending downlink control information (DCI, Downlink Control Information) to a first communication node. The embodiment of the present application uses DCI to send the uplink TA value, which does not occupy PDSCH resources, and can frequently send DCI to update the TA value, and realizes timely uplink synchronization without reducing system efficiency.

In another embodiment, when the absolute value of the difference between the currently determined uplink TA value and the last determined uplink TA value is less than a preset threshold, sending the uplink TA value to the first communication node using DCI; When the absolute value of the difference between the uplink TA value determined this time and the uplink TA value determined last time is greater than or equal to a preset threshold, a MAC is used to send a TAC to the first communication node, and the TAC carries the uplink TA value. The embodiment of the present application combines MAC CE and DCI to implement TA value update, that is, MAC value is used to coarsely adjust the TA value, and DCI is used to finely adjust the TA value, which improves the accuracy of updating the TA value.

Other features and advantages of the embodiments of the present application will be explained in the following description, and part of them will become apparent from the description, or be understood by implementing the embodiments of the present application. The objects and other advantages of the embodiments of the present application can be achieved and obtained by the structures specifically pointed out in the description, the claims, and the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The drawings are used to provide a further understanding of the technical solutions of the embodiments of the present application, and constitute a part of the description. They are used to explain the technical solutions of the embodiments of the present application together with the embodiments of the embodiments of the present application, and do not constitute the technical solutions of the embodiments of the present application. limits.

FIG. 1 is a flowchart of an uplink synchronization method according to an embodiment of the present application;

2 is a flowchart of an uplink synchronization method according to another embodiment of the present application;

3 is a schematic structural composition diagram of an uplink synchronization apparatus according to another embodiment of the present application;

4 is a schematic structural composition diagram of an uplink synchronization apparatus according to another embodiment of the present application;

5 is a schematic structural composition diagram of an uplink synchronization system according to another embodiment of the present application;

6 is a schematic flowchart of Example 1 of an uplink synchronization method according to an embodiment of the present application;

7 is a schematic structural diagram of a MAC CE according to an embodiment of the present application;

8 is a schematic flowchart of an example 2 of an uplink synchronization method according to an embodiment of the present application;

9 is a schematic flowchart of an example 3 of an uplink synchronization method according to an embodiment of the present application;

FIG. 10 is a schematic flowchart of an example 4 of an uplink synchronization method according to an embodiment of the present application.

detailed description

The embodiments of the present application will be described in detail below with reference to the drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be arbitrarily combined with each other.

The steps shown in the flowchart of the figures may be performed in a computer system such as a set of computer-executable instructions. And, although the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than here.

Referring to FIG. 1, an embodiment of the present application provides an uplink synchronization method, including:

Step 100: Determine the uplink TA value.

In the embodiment of the present application, a time adjustment value may be obtained by receiving measurement information reported by the first communication node, and performing filtering calculation according to the measurement information, and determining an uplink TA value according to the time adjustment value.

The measurement information can be obtained from the reported reference signals such as SRS and DMRS.

Measurement information such as channel state information includes modulation order (RI, Rank Indication) and signal-to-noise ratio (SINR, Signal to Interference plus Noise Ratio).

Step 101: Use DCI to send an uplink TA value to the first communication node.

This embodiment of the present application uses DCI to send the uplink timing advance value, which does not occupy PDSCH resources, and can frequently send DCI to update the TA value, and implements uplink synchronization in a timely manner without reducing system efficiency.

In the embodiment of the present application, any one of the following methods may be adopted to implement sending the uplink TA value to the first communication node by using DCI.

First, determining an uplink TA adjustment value according to the uplink TA value; mapping the uplink TA adjustment value to DCI, and sending the DCI to the first communication node;

Secondly, the uplink TA value is directly mapped into the DCI, and the DCI is sent to the first communication node.

For the first method, because there is a certain TA effective value range for the uplink TA value carried in the DCI, if the uplink TA value exceeds the TA effective value range, the uplink TA value needs to be converted into an uplink TA adjustment value first, so that the uplink TA adjustment value It falls within the TA effective value range.

It can be adjusted as follows:

When the uplink TA value is greater than or equal to the minimum value of the TA effective value range and less than or equal to the maximum value of the TA effective value range, determining that the uplink TA adjustment value is the uplink TA value;

When the uplink TA value is less than the minimum value of the TA effective value range, determine that the uplink TA adjustment value is the minimum value of the TA effective value range;

When the uplink TA value is greater than the maximum value of the TA effective value range, it is determined that the uplink TA adjustment value is the maximum value of the TA effective value range.

The mapping of the uplink TA adjustment value to the DCI includes:

Quantify the uplink TA adjustment value according to the adjustment step size, that is, round the ratio of the uplink TA adjustment value to the adjustment step size as the quantized uplink TA adjustment value;

Map the quantized uplink TA adjustment value to the uplink TA bit value; specifically, map the quantized uplink TA adjustment value to the uplink TA bit value according to a predetermined mapping relationship; for example, use L bits to represent the uplink in DCI TA bit value, a specific value of L bit corresponds to a quantized uplink TA adjustment value, thereby forming a mapping relationship;

The DCI carries the uplink TA bit value.

Among them, DCI may be sent through a physical downlink control channel (PDCCH, Physical Downlink Control Channel).

In the embodiment of the present application, the TAC field in the DCI may be used to carry the uplink TA bit value, and the TAC field may be a new field in the DCI or a reserved field in the multiplexed DCI.

When the length of the TAC field is L bits, the maximum coverage of the TAC field is 2 ^L × nTs, which is the difference between the maximum and minimum values of the TA effective value range, where Ts is the transmission interval and nTs is the adjustment step corresponding to DCI The adjustment step size may be carried in the DCI or may not be carried in the DCI, that is, agreed in advance.

The maximum and minimum values of the TA effective value range can be pre-agreed or pre-configured (such as high-level signaling configuration), and can be determined according to the sending period of the uplink TA value in DCI and the occurrence probability of the uplink TA value in the sending period, even if It is obtained that the occurrence probability of the uplink TA value within the TA effective value range in the sending period exceeds a preset probability.

For the second method, it is considered that the uplink TA value does not exceed the TA effective value range. Therefore, it is not necessary to convert the uplink TA value into an uplink TA adjustment value, and it is only necessary to directly map the uplink TA value into the DCI.

The method for mapping the uplink TA value to the DCI is the same as the method for mapping the uplink TA adjustment value to the DCI, and details are not described herein again.

In another embodiment of the present application, after determining the uplink TA value, the method further includes:

Compare the determined uplink TA value with the last determined uplink TA value. When the absolute value of the difference between the determined uplink TA value and the last determined uplink TA value is less than a preset threshold, use DCI to the The first communication node sends an uplink TA value.

The preset threshold may be a TA effective value range.

In another embodiment of the present application, when the absolute value of the difference between the uplink TA value determined this time and the uplink TA value determined last time is greater than or equal to the preset threshold, the method further includes:

The MAC is used to send a TAC to the first communication node, and the TAC carries an uplink TA value.

The embodiment of the present application combines MAC CE and DCI to implement TA value update, that is, MAC value is used to coarsely adjust the TA value, and DCI is used to finely adjust the TA value, which improves the accuracy of updating the TA value.

In the embodiment of the present application, the first number of bits and the second number of bits are the same, and the first adjustment step size and the second adjustment step size are the same;

Alternatively, the first number of bits and the second number of bits are the same, and the first adjustment step size and the second adjustment step size are different;

Or, the first number of bits is different from the second number of bits, and the first adjustment step size is the same as the second adjustment step size;

Or, the first bit number is different from the second bit number, and the first adjustment step size and the second adjustment step size are different;

The first number of bits is the number of bits occupied by the uplink TA value in the DCI, the second number of bits is the number of bits occupied by the uplink TA value in the MAC CE, and the first adjustment step is the uplink TA value in the DCI. The corresponding adjustment step size, and the second adjustment step size is the adjustment step size corresponding to the uplink TA value in the MAC CE.

Referring to FIG. 2, another embodiment of the present application provides an uplink synchronization method, including:

Step 200: Receive the DCI sent by the second communication node.

Step 201: Determine an uplink TA value according to the DCI, and perform uplink synchronization adjustment according to the uplink TA value.

In the embodiment of the present application, when the second communication node adopts the first method to implement using the DCI to send the uplink TA value to the first communication node, determining the uplink timing advance value according to the DCI includes:

Mapping the uplink TA bit value carried in the DCI to the quantized uplink TA adjustment value according to the mapping relationship between the uplink TA bit value and the quantized uplink TA adjustment value;

The quantized uplink TA adjustment value is converted into the uplink TA value according to the adjustment step size, that is, the adjustment step size is multiplied by the quantized uplink TA adjustment value to obtain an uplink TA value.

That is, if the uplink TA value exceeds the valid TA range when the second communication node sends the uplink TA value, the uplink TA value cannot be accurately obtained, and the uplink TA value obtained by the first communication node is the aforementioned uplink TA adjustment value. In this case, MAC uplink CE can be used to coarsely adjust the uplink TA value, and then DCI is used to fine-tune the uplink TA value, thereby improving the accuracy of updating the TA value.

When the second communication node adopts the second method to implement using the DCI to send the uplink TA value to the first communication node, determining the uplink timing advance value according to the DCI includes:

Mapping the uplink TA bit value carried in the DCI to the quantized uplink TA value according to the mapping relationship between the uplink TA bit value and the quantized uplink TA value;

The quantized uplink TA value is converted into the uplink TA value according to the adjustment step size, that is, the adjustment step size is multiplied by the quantized uplink TA value to obtain an uplink TA value.

In another embodiment of the present application, the method further includes:

Receive the TAC sent by the second communication node using the MAC CE, and return a feedback message to the second communication node.

In the embodiment of the present application, the first communication node and the second communication node may be any communication nodes. For example, the first communication node may be a UE and the second communication node may be a base station.

Referring to FIG. 3, another embodiment of the present application provides an uplink synchronization apparatus, including:

A determining module 301 configured to determine an uplink timing advance value;

The sending module 302 is configured to send an uplink timing advance value to the first communication node using downlink control information.

In the embodiment of the present application, the sending module 302 is configured to compare the uplink timing advance value determined this time with the uplink timing advance value determined last time, and when the uplink timing advance value determined this time and When the absolute value of the difference between the uplink timing advance values determined once is less than a preset threshold, the uplink control advance value is sent to the first communication node using the downlink control information.

In the embodiment of the present application, the sending module 302 is further configured to: when an absolute value of a difference between the uplink timing advance value determined this time and the uplink timing advance value determined last time is greater than or equal to the preset threshold Using a media access control unit to send a timing advance command to the first communication node, where the timing advance command carries the uplink timing advance value.

In the embodiment of the present application,

The first bit number is the same as the second bit number, and the first adjustment step size is the same as the second adjustment step size;

Alternatively, the first number of bits and the second number of bits are the same, and the first adjustment step size and the second adjustment step size are different;

Or, the first number of bits is different from the second number of bits, and the first adjustment step size is the same as the second adjustment step size;

Or, the first bit number is different from the second bit number, and the first adjustment step size and the second adjustment step size are different;

The first number of bits is the number of bits occupied by the uplink timing advance value in the downlink control information, and the second number of bits is the number of bits occupied by the uplink timing advance value in the media access control unit. The first adjustment step size is an adjustment step size corresponding to the uplink timing advance value in the downlink control information, and the second adjustment step size is the uplink timing advance value in the media access control unit The corresponding adjustment step size.

In the embodiment of the present application, the sending module 302 is configured to determine an uplink timing advance adjustment value according to the uplink timing advance value;

Map the uplink timing advance adjustment value to the downlink control information, and send the downlink control information to the first communication node.

In the embodiment of the present application, the sending module 302 is configured to determine the uplink timing advance adjustment value according to the uplink timing advance value in the following manner:

Determining that the uplink timing advance adjustment value is the uplink timing advance value when the uplink timing advance value is greater than or equal to the minimum value of the timing advance effective value range and less than or equal to the maximum value of the timing advance effective value range ;

When the uplink timing advance value is smaller than the minimum value of the timing advance effective value range, determining that the uplink timing advance adjustment value is the minimum value of the timing advance effective value range;

When the uplink timing advance value is greater than the maximum value of the timing advance effective value range, determine that the uplink timing advance adjustment value is the maximum value of the timing advance effective value range.

In the embodiment of the present application, the sending module 302 is configured to map the uplink timing advance adjustment value to the downlink control information in the following manner:

Quantify the uplink timing advance adjustment value according to the adjustment step size;

Mapping the quantized uplink timing advance adjustment value to an uplink timing advance bit value;

Carrying the uplink timing advance bit value in the downlink control information.

Referring to FIG. 4, another embodiment of the present application provides an uplink synchronization apparatus, including:

The receiving module 401 is configured to receive downlink control information sent by a second communication node;

The synchronization module 402 is configured to determine an uplink timing advance value according to the downlink control information, and perform uplink synchronization adjustment according to the uplink timing advance value.

In the embodiment of the present application, the synchronization module 402 is configured to map the uplink timing advance bit value carried in the downlink control information to the uplink timing advance bit value according to a mapping relationship between the uplink timing advance bit value and the quantized uplink timing advance adjustment value. A quantized uplink timing advance adjustment value; converts the quantized uplink timing advance adjustment value to the uplink timing advance value according to an adjustment step; and performs uplink synchronization adjustment according to the uplink timing advance value.

Another embodiment of the present application provides an uplink synchronization device, including a processor and a computer-readable storage medium, where the computer-readable storage medium stores instructions, and when the instructions are executed by the processor, the foregoing is implemented. Either uplink synchronization method.

Another embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any one of the foregoing uplink synchronization methods are implemented.

Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridges, magnetic tape, magnetic disk storage or other magnetic storage devices, or may Any other medium used to store desired information and which can be accessed by a computer.

Referring to FIG. 5, another embodiment of the present application provides an uplink synchronization system, including:

The second communication node 501 is configured to determine an uplink timing advance value; and send the uplink timing advance value to the first communication node using downlink control information;

The first communication node 502 is configured to receive downlink control information sent by the second communication node; determine an uplink timing advance value according to the downlink control information, and perform uplink synchronization adjustment according to the uplink timing advance value.

In the following, specific implementations of the embodiments of the present application are described in detail through specific examples. However, the serial numbers of the following examples that are worth noting are only for distinguishing different examples, and not for the order of priority of the examples.

Example 1

In this example, in a 5G high-frequency communication scenario, the BS sends an uplink TA value to the UE through DCI. As shown in FIG. 6, the method includes:

Step 600: The BS receives the measurement information reported by the UE in the local cell, obtains a time adjustment value through filtering calculation, and determines an uplink TA value according to the time adjustment value.

In this step, the measurement information includes at least one of the following: SRS, DMRS.

Step 601: The BS adjusts the uplink TA value according to a TA effective value range corresponding to the TAC field of the DCI of the cell in which the BS determines the uplink TA adjustment value.

In this step, the TAC field may be a new field in DCI or a reserved field in DCI.

In this step, when the uplink TA value is greater than or equal to the minimum value of the TA effective value range, and less than or equal to the maximum value of the TA effective value range, determine that the uplink TA adjustment value is the uplink TA value;

When the uplink TA value is less than the minimum value of the TA effective value range, determine that the uplink TA adjustment value is the minimum value of the TA effective value range;

When the uplink TA value is greater than the maximum value of the TA effective value range, it is determined that the uplink TA adjustment value is the maximum value of the TA effective value range.

最大值T1为

In this example, the length of the TAC field in DCI is L bits, and the adjustment step corresponding to DCI is nTs. The maximum coverage of the TAC field in DCI is 2 ^L × nTs, which is the minimum value of the effective value range of TA, T2. for

The maximum value T1 is

Step 602: The BS maps the determined uplink TA adjustment value to the TAC field of the DCI of the cell.

In this step, the uplink TA adjustment value is quantized according to the adjustment step size, that is, the ratio of the uplink TA adjustment value and the adjustment step size is rounded as the quantized uplink TA adjustment value;

Map the quantized uplink TA adjustment value to an uplink TA bit value; specifically, map the quantized uplink TA adjustment value to an uplink TA bit value according to a predetermined mapping relationship; for example, the TAC field in DCI uses L bits To represent the uplink TA bit value. A specific value of the L bit corresponds to a quantized uplink TA adjustment value, thereby forming a mapping relationship.

Step 603: The BS sends the DCI including the TAC field to the UE through the PDCCH.

Step 604: The UE receives the DCI, parses the TAC field in the DCI, converts the uplink TA bit value in the TAC field into an uplink TA value, and performs uplink synchronization adjustment according to the uplink TA value.

In this step, the TAC field in the DCI carries the uplink TA bit value and sends it to the first communication node. Specifically, the DCI is sent through the PDCCH.

In this step, the UE first converts the uplink TA bit value in the TAC field into a quantized uplink TA adjustment value, and uses the product of the uplink TA adjustment value and the adjustment step size corresponding to the DCI as the uplink TA value.

In the related art, the MAC CE transmission cycle is large and cannot meet the requirement for fast uplink synchronization. In addition, the TAC occupation field in the MAC CE is long. If it is frequently transmitted, PDSCH resources will be wasted and system throughput will be reduced. After the uplink TA value is measured in this embodiment of the present application, the measured uplink TA value may exceed the data range that can be represented by the TAC field in the DCI. Therefore, the obtained uplink TA adjustment value needs to be adjusted to meet the data range corresponding to the TAC field in the DCI. ; Then, the adjusted uplink TA adjustment value needs to be mapped into the TAC field of the DCI of the cell, and then sent to the UE through the PDCCH. This method uses the DCI to send the uplink TA value instead of the MAC CE, while not occupying the PDSCH resources, it satisfies the requirement for frequent sending of the uplink TA value, and improves the system throughput.

Example 2

This example can be applied to a 5G New Radio (NR, New Ratio) high frequency fixed wireless access (FWA, Fixed Wireless Access) scenario, in which the MAC, CE, and DCI are used to send an uplink TA value to the UE.

In the 5G NR high-frequency FWA scenario, the UE has fixed access. Generally, the uplink TA value fluctuates slightly. The MAC CE is used to send the uplink TA value to the UE. Due to the large step size of the MAC CE adjustment, it is difficult to perform uplink TA in a small range. The value fluctuation is adjusted. The MAC CE structure used to send the uplink TA value is shown in Figure 7, where 2 bits are used as reserved fields, and the remaining 6 bits are used to send the TAC carrying the uplink TA value, which corresponds to the uplink TA value index. The range is 0 to 63.

In the 5G NR high-frequency FWA scenario, beam switching may cause a sudden change in the uplink TA value. Only the DCI is used to send the uplink TA value. The number of bits allocated by DCI and the small step size adjustment implementation scheme are difficult to cover the sudden change in the uplink TA value caused by the beam switching. . In the example, MAC CE is used to adjust the step size of the large-scale uplink TA value caused by beam switching, and DCI is used to fine-tune the small-scale fluctuation of uplink TA value in the FWA scene to obtain more For reliable link performance.

As shown in Figure 8, the method includes:

Step 800: The BS receives the measurement information reported by the UE in the local cell, obtains a time adjustment value through filtering calculation, and determines an uplink TA value according to the time adjustment value.

In this step, the measurement information includes at least one of the following: SRS, DMRS.

Step 801: The BS judges whether the absolute value of the difference between the determined uplink TA value and the last determined uplink TA value is greater than or equal to a preset threshold. When the determined uplink TA value and the last determined uplink TA value are between When the absolute value of the difference is less than the preset threshold, perform steps 802 to 805; when the absolute value of the difference between the determined uplink TA value and the last determined uplink TA value is greater than or equal to the preset threshold, perform steps 806 to Step 807.

In this step, when the absolute value of the difference between the uplink TA value determined this time and the uplink TA value determined last time is greater than or equal to a preset threshold, the fluctuation range of the uplink TA value is considered to be large, causing the fluctuation range of the uplink Ta value The larger cause may be beam switching; or, the uplink TA value sent by the MAC CE last time does not take effect. In this case, the MAC CE needs to be coarsely adjusted once to obtain preliminary uplink synchronization.

Step 802: The BS adjusts the uplink TA value according to the TA effective value range corresponding to the TAC field of the DCI of the cell in which the BS determines the uplink TA adjustment value.

In this step, the TAC field may be a new field in DCI or a reserved field in DCI.

In this step, when the uplink TA value is greater than or equal to the minimum value of the TA effective value range, and less than or equal to the maximum value of the TA effective value range, determine that the uplink TA adjustment value is the uplink TA value;

When the uplink TA value is less than the minimum value of the TA effective value range, determine that the uplink TA adjustment value is the minimum value of the TA effective value range;

When the uplink TA value is greater than the maximum value of the TA effective value range, it is determined that the uplink TA adjustment value is the maximum value of the TA effective value range.

最大值T1为

In this example, the length of the TAC field in DCI is L bits, and the adjustment step corresponding to DCI is nTs. The maximum coverage of the TAC field in DCI is 2 ^L × nTs, which is the minimum value of the effective value range of TA, T2. for

The maximum value T1 is

Step 803: The BS maps the determined uplink TA adjustment value to the TAC field of the DCI of the cell.

In this step, the uplink TA adjustment value is quantized according to the adjustment step size, that is, the ratio of the uplink TA adjustment value and the adjustment step size is rounded as the quantized uplink TA adjustment value;

Map the quantized uplink TA adjustment value to an uplink TA bit value; specifically, map the quantized uplink TA adjustment value to an uplink TA bit value according to a predetermined mapping relationship; for example, the TAC field in DCI uses L bits To represent the uplink TA bit value. A specific value of the L bit corresponds to a quantized uplink TA adjustment value, thereby forming a mapping relationship.

Step 804: The BS sends the DCI including the TAC field to the UE through the PDCCH.

Step 805: The UE receives DCI, parses the TAC field in the DCI, converts the uplink TA bit value in the TAC field into an uplink TA value, and performs uplink synchronization adjustment according to the uplink TA value.

In this step, the TAC field in the DCI carries the uplink TA bit value and sends it to the first communication node. Specifically, the DCI is sent through the PDCCH.

In this step, the UE first converts the uplink TA bit value in the TAC field into a quantized uplink TA adjustment value, and uses the product of the uplink TA adjustment value and the adjustment step size corresponding to the DCI as the uplink TA value.

Step 806: The BS sends a TAC to the first communication node using the MAC CE, and the TAC carries an uplink TA value.

Step 807: The BS waits for the UE feedback message, and the base station makes corresponding adjustments to the historical filter value according to the UE feedback message, and starts to receive the measurement information reported by the UE, that is, it proceeds to step 800.

In this example, the TAC field in the DCI and the TAC field in the MAC CE maintain the same number of bits, and adjust the uplink synchronization of the UE by an adjustment step smaller than the adjustment step corresponding to the MAC CE to achieve fine adjustment.

Example 3

In this example, if the UE is moving fast, the motion path is direct to reflection, and there are a large number of UEs connected, only using MAC CE to send the uplink TA value to the UE, it needs to occupy too much PDSCH resources, and the overhead load is too large; Only use the DCI to send the uplink TA value to the UE. If the UE moves fast, or the uplink TA value fluctuates rapidly and is caused by other reasons, more bits need to be allocated in the DCI to send the uplink TA value to cover the uplink. The fluctuation range of the TA value.

Using the MAC CE and the DCI to send the uplink TA value to the UE can solve the above problem. Specifically, the MAC CE and the DCI use different bit numbers to send the uplink TA value to the UE with the same adjustment step. As shown in Figure 9, the method includes:

Step 900: The BS receives the measurement information reported by the UE in the local cell, obtains a time adjustment value through filtering calculation, and determines an uplink TA value according to the time adjustment value.

In this step, the measurement information includes at least one of the following: SRS, DMRS.

Step 901: The BS judges whether the absolute value of the difference between the determined uplink TA value and the last determined uplink TA value is greater than or equal to a preset threshold. When the determined uplink TA value and the last determined uplink TA value are When the absolute value of the difference is less than the preset threshold, perform steps 902 to 905; when the absolute value of the difference between the determined uplink TA value and the last determined uplink TA value is greater than or equal to the preset threshold, perform steps 906 to Step 907.

In this step, when the absolute value of the difference between the uplink TA value determined this time and the uplink TA value determined last time is greater than or equal to a preset threshold, the fluctuation range of the uplink TA value is considered to be large, causing the fluctuation range of the uplink Ta value. The larger reason may be beam switching; or, the uplink TA value sent by the MAC CE last time does not take effect. In this case, the MAC CE needs to be coarsely adjusted once to obtain preliminary uplink synchronization.

Step 902: The BS adjusts the uplink TA value according to the TA effective value range corresponding to the TAC field of the DCI of the cell in which the BS determines the uplink TA adjustment value.

In this step, the TAC field may be a new field in DCI or a reserved field in DCI.

In this step, when the uplink TA value is greater than or equal to the minimum value of the TA effective value range, and less than or equal to the maximum value of the TA effective value range, determine that the uplink TA adjustment value is the uplink TA value;

When the uplink TA value is less than the minimum value of the TA effective value range, determine that the uplink TA adjustment value is the minimum value of the TA effective value range;

When the uplink TA value is greater than the maximum value of the TA effective value range, it is determined that the uplink TA adjustment value is the maximum value of the TA effective value range.

最大值T1为

In this example, the length of the TAC field in DCI is L bits, and the adjustment step corresponding to DCI is nTs. The maximum coverage of the TAC field in DCI is 2 ^L × nTs, which is the minimum value of the effective value range of TA, T2. for

The maximum value T1 is

Step 903: The BS maps the determined uplink TA adjustment value to the TAC field of the DCI of the cell.

In this step, the uplink TA adjustment value is quantized according to the adjustment step size, that is, the ratio of the uplink TA adjustment value and the adjustment step size is rounded as the quantized uplink TA adjustment value;

Map the quantized uplink TA adjustment value to an uplink TA bit value; specifically, map the quantized uplink TA adjustment value to an uplink TA bit value according to a predetermined mapping relationship; for example, the TAC field in DCI uses L bits To represent the uplink TA bit value. A specific value of the L bit corresponds to a quantized uplink TA adjustment value, thereby forming a mapping relationship.

Step 904: The BS sends the DCI including the TAC field to the UE through the PDCCH.

Step 905: The UE receives the DCI, parses the TAC field in the DCI, converts the uplink TA bit value in the TAC field into an uplink TA value, and performs uplink synchronization adjustment according to the uplink TA value.

In this step, the TAC field in the DCI carries the uplink TA bit value and sends it to the first communication node. Specifically, the DCI is sent through the PDCCH.

In this step, the UE first converts the uplink TA bit value in the TAC field into a quantized uplink TA adjustment value, and uses the product of the uplink TA adjustment value and the adjustment step size corresponding to the DCI as the uplink TA value.

Step 906: The BS sends a TAC to the first communication node using the MAC CE, where the TAC carries an uplink TA value.

Step 907: The BS waits for the UE feedback message, and the base station makes corresponding adjustments to the historical filter value according to the UE feedback message, and starts to receive the measurement information reported by the UE, that is, it proceeds to step 800.

In this example, the TAC field in DCI and the TAC field in MAC CE use different numbers of bits to guide the uplink arrival time of the UE with the same step size.

Example 4

In this example, in a 5G high-frequency scenario, the CP is short, and the UE is susceptible to synchronization. It is too wasteful to use PDSCH to frequently send TAC using MAC CE, and TAC is sent periodically using MAC CE. Because of the short CP characteristics at high frequencies, Before the period arrives, the UE may lose synchronization. Therefore, MAC can be used to periodically send TAC, and within the period, DCI is used to send TAC. The TAC field of DCI contains the adjustment step size, and the adjustment step size is optional. It can realize the adaptive adjustment of the UE. When the uplink TA value fluctuates greatly, the BS allocates a relatively large step size to the UE, and conversely, the BS allocates a relatively small step size to the UE.

Use MAC and CE to send TAC periodically, and use DCI small steps to adjust uplink time synchronization during the period. As shown in Figure 10, the method includes:

Step 1000: The BS receives the measurement information reported by the UE in the local cell, obtains a time adjustment value through filtering calculation, and determines an uplink TA value according to the time adjustment value.

In this step, the measurement information includes at least one of the following: SRS, DMRS.

Step 1001: The BS issues a TAC using the MAC CE, and the TAC carries an uplink TA value.

In this step, the MAC CE adjusts the UE using a large step size.

Step 1002: The BS judges whether the MAC CE delivery cycle is reached. If the MAC CE delivery cycle is reached, then step 1000 is continued; if the MAC CE delivery cycle is not reached, step 1003 is continued.

Step 1003: The BS uses the DCI to deliver the uplink TA value. The number of bits used to carry the uplink TA value allocated by the TAC field in the DCI is less than the number of bits used to carry the uplink TA value in the MAC CE. The long adjustment step length corrects the uplink arrival time of the UE. In addition, two bits are reserved in the TAC field in the DCI to indicate the adjustment step size used for the uplink TA value issued by the DCI, that is, the value delivered by the DCI. The adjustment step of the uplink TA value is variable.

Although the implementation manners disclosed in the examples of the present application are as above, the contents described are only implementation manners used to facilitate understanding of the examples of the present application, and are not intended to limit the examples of the present application. Any person skilled in the art to which this embodiment of the present application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this embodiment of the present application. The scope of patent protection shall still be subject to the scope defined by the appended claims.

Claims (14)

An uplink synchronization method includes: Determine the uplink timing advance value; Sending the uplink timing advance value to the first communication node using the downlink control information. The uplink synchronization method according to claim 1, wherein after determining the uplink timing advance value, the method further comprises: Compare the uplink timing advance value determined this time with the uplink timing advance value determined last time, and when the absolute difference between the uplink timing advance value determined this time and the uplink timing advance value determined last time is absolute When the value is less than a preset threshold, use the downlink control information to send the uplink timing advance value to the first communication node. The uplink synchronization method according to claim 2, wherein when an absolute value of a difference between the uplink timing advance value determined this time and the uplink timing advance value determined last time is greater than or equal to the preset threshold, The method also includes: Sending a timing advance command to the first communication node using a media access control unit, where the timing advance command carries the uplink timing advance value. The uplink synchronization method according to claim 3, wherein: The first bit number is the same as the second bit number, and the first adjustment step size is the same as the second adjustment step size; Alternatively, the first number of bits and the second number of bits are the same, and the first adjustment step size and the second adjustment step size are different; Or, the first number of bits is different from the second number of bits, and the first adjustment step size is the same as the second adjustment step size; Or, the first bit number is different from the second bit number, and the first adjustment step size and the second adjustment step size are different; The first number of bits is the number of bits occupied by the uplink timing advance value in the downlink control information, and the second number of bits is the number of bits occupied by the uplink timing advance value in the media access control unit. The first adjustment step size is an adjustment step size corresponding to the uplink timing advance value in the downlink control information, and the second adjustment step size is the uplink timing advance value in the media access control unit The corresponding adjustment step size. The uplink synchronization method according to any one of claims 1 to 4, wherein the sending the uplink timing advance value to the first communication node using the downlink control information comprises: Determining an uplink timing advance adjustment value according to the uplink timing advance value; Map the uplink timing advance adjustment value to the downlink control information, and send the downlink control information to the first communication node. The uplink synchronization method according to claim 5, wherein the determining the uplink timing advance adjustment value according to the uplink timing advance value comprises at least one of the following: Determining that the uplink timing advance adjustment value is the uplink timing advance value when the uplink timing advance value is greater than or equal to the minimum value of the timing advance effective value range and less than or equal to the maximum value of the timing advance effective value range ; When the uplink timing advance value is smaller than the minimum value of the timing advance effective value range, determining that the uplink timing advance adjustment value is the minimum value of the timing advance effective value range; When the uplink timing advance value is greater than the maximum value of the timing advance effective value range, determine that the uplink timing advance adjustment value is the maximum value of the timing advance effective value range. The uplink synchronization method according to claim 5, wherein the mapping the uplink timing advance adjustment value to downlink control information comprises: Quantify the uplink timing advance adjustment value according to the adjustment step size; Mapping the quantized uplink timing advance adjustment value to an uplink timing advance bit value; Carrying the uplink timing advance bit value in the downlink control information. An uplink synchronization method includes: Receiving downlink control information sent by a second communication node; An uplink timing advance value is determined according to the downlink control information, and an uplink synchronization adjustment is performed according to the uplink timing advance value. The uplink synchronization method according to claim 8, wherein the determining the uplink timing advance value according to the downlink control information comprises: Mapping the uplink timing advance bit value carried in the downlink control information to the quantized uplink timing advance adjustment value according to a mapping relationship between the uplink timing advance bit value and the quantized uplink timing advance adjustment value; Converting the quantized uplink timing advance adjustment value into the uplink timing advance value according to the adjustment step size. An uplink synchronization device includes: A determining module configured to determine an uplink timing advance value; The sending module is configured to send the uplink timing advance value to the first communication node using the downlink control information. An uplink synchronization device includes: A receiving module configured to receive downlink control information sent by a second communication node; The synchronization module is configured to determine an uplink timing advance value according to the downlink control information, and perform uplink synchronization adjustment according to the uplink timing advance value. An uplink synchronization device includes a processor and a computer-readable storage medium, and the computer-readable storage medium stores instructions, wherein when the instructions are executed by the processor, any one of claims 1 to 9 is implemented. An uplink synchronization method according to one item. A computer-readable storage medium having stored thereon a computer program, wherein when the computer program is executed by a processor, the steps of the uplink synchronization method according to any one of claims 1 to 9 are implemented. An uplink synchronization system includes: The second communication node is configured to determine an uplink timing advance value; the downlink control information is used to send the uplink timing advance value to the first communication node; the first communication node is configured to receive the downlink control information sent by the second communication node; according to the downlink The control information determines an uplink timing advance value, and performs uplink synchronization adjustment according to the uplink timing advance value.

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