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WO2020095362A1 - Design assistance device, design assistance method, and machine learning device - Google Patents

Design assistance device, design assistance method, and machine learning device Download PDF

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Publication number
WO2020095362A1
WO2020095362A1 PCT/JP2018/041202 JP2018041202W WO2020095362A1 WO 2020095362 A1 WO2020095362 A1 WO 2020095362A1 JP 2018041202 W JP2018041202 W JP 2018041202W WO 2020095362 A1 WO2020095362 A1 WO 2020095362A1
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WO
WIPO (PCT)
Prior art keywords
board
data
substrate
emc
pattern
Prior art date
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Ceased
Application number
PCT/JP2018/041202
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French (fr)
Japanese (ja)
Inventor
光彦 神田
安泰 関本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
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Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to PCT/JP2018/041202 priority Critical patent/WO2020095362A1/en
Priority to CN201880099221.5A priority patent/CN113056742B/en
Priority to JP2019528777A priority patent/JP6599057B1/en
Publication of WO2020095362A1 publication Critical patent/WO2020095362A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • G06F30/27Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/10Noise analysis or noise optimisation

Definitions

  • the present invention relates to a design support device, a design support method, and a machine learning device that support the design of a board incorporated in an electronic device.
  • EMC Electro Magnetic Compatibility
  • EMI Electro Magnetic Interference
  • EMS Electro Magnetic Susceptibility
  • the measurement result of the EMC is affected when the arrangement of electronic components on the substrate, the routing and width of the pattern formed on the substrate, the distance between adjacent patterns, and the like change. Since the EMC measurement result is influenced by a plurality of factors, knowledge about EMC and board design experience are required to efficiently design a substrate whose measurement result satisfies the standard.
  • Patent Document 1 describes an invention that enables efficient countermeasures against EMI of a board on which electronic components are mounted.
  • the electromagnetic wave radiated from the substrate is measured while changing the measurement position, and the measurement data is analyzed for each measurement position to calculate one or more feature amounts. Further, the feature amount calculated for each measurement position is classified by cluster analysis, and the classification result is presented to the user together with the measurement position.
  • Patent Document 1 when a user such as a designer determines that an EMI countermeasure is necessary, a substrate for which the countermeasure is taken is actually manufactured, and an electromagnetic wave emitted from the manufactured substrate is measured again. There is a problem in that it is necessary to calculate and classify the characteristic amount, and it takes time to design the board.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain a design support apparatus capable of improving the design efficiency of a substrate by enabling measures for EMC before actually manufacturing the substrate. To aim.
  • a design support device is compatible with board data including information on a board and a board pattern formed on the board and an electromagnetic environment of an electronic device in which the board is incorporated.
  • an analysis unit that analyzes the learning data including the evaluation data indicating the evaluation result of the sex and learns the variation factor of the electromagnetic environment compatibility.
  • the design support device analyzes when new board data including information on a board pattern formed on a new board that is a board before being incorporated in an electronic device and evaluated for electromagnetic compatibility is input.
  • An evaluation unit is provided for identifying a variation factor of electromagnetic environment compatibility of an electronic device in which the new board is incorporated, based on a learning result of the variation factor by the unit.
  • the design support device has an effect that it is possible to improve the design efficiency of the board by enabling EMC countermeasures before actually manufacturing the board.
  • FIG. 1 is a first diagram for explaining an operation of an analysis unit of the design support device according to the first exemplary embodiment.
  • FIG. 3 is a third diagram for explaining the operation of the analysis unit of the design support device according to the first embodiment.
  • FIG. 5 is a diagram showing an example of a first analysis result generated by the analysis unit of the design support apparatus according to the first embodiment.
  • FIG. 3 is a diagram showing an example of a list of first analysis results generated by the analysis unit of the design support apparatus according to the first embodiment.
  • FIG. 5 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the first embodiment.
  • the flowchart which shows an example of operation
  • FIG. 1 is a diagram showing an example of a first analysis result generated by the analysis unit of the design support apparatus according to the first embodiment.
  • FIG. 3 is a diagram showing an example of a list of first analysis results generated by the analysis unit of
  • FIG. 11 is a diagram showing an example of a first analysis result generated by the analysis unit of the design support apparatus according to the second embodiment.
  • FIG. 11 is a diagram showing an example of a list of first analysis results generated by the analysis unit of the design support apparatus according to the second embodiment.
  • FIG. 11 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the second embodiment.
  • FIG. 8 is a diagram showing a configuration example of a design support device according to a third exemplary embodiment.
  • FIG. 16 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the third embodiment.
  • FIG. 6 is a diagram showing a configuration example of a design support device according to a fourth exemplary embodiment.
  • a design support device, a design support method, and a machine learning device according to an embodiment of the present invention will be described below in detail with reference to the drawings.
  • the present invention is not limited to this embodiment.
  • the learning data includes board data representing a board to be incorporated in the electronic device and EMC evaluation data showing an EMC evaluation result of the electronic device in which the board is incorporated.
  • the board represented by the board data included in the learning data is a designed board.
  • the new board data represents a newly created board.
  • the structure of the board data included in the learning data and the structure of the new board data are the same.
  • the design support device becomes the EMC change factor among the board elements included in the board represented by the input new board data based on the learning result of the EMC change factor. Generate information about the board element. This allows the board designer to obtain information on the EMC variation factor before actually manufacturing the board represented by the new board data and evaluating the EMC, and changing the design as necessary. Will be able to take measures.
  • FIG. 1 is a diagram showing a configuration example of a design support device according to the first exemplary embodiment of the present invention.
  • the design support device 1 according to the first embodiment includes a data acquisition unit 11, an analysis unit 12, a storage unit 13, and an evaluation unit 14.
  • the data acquisition unit 11, the analysis unit 12, and the storage unit 13 configure a machine learning device 20 that learns EMC variation factors.
  • the data acquisition unit 11 acquires data from outside the design support device 1.
  • the data acquired by the data acquisition unit 11 corresponds to the board data 111 and the EMC evaluation data 112 that form the learning data 110, and the new board data 121.
  • the board data 111 and the EMC evaluation data 112 are acquired by the data acquisition unit 11 in a correlated state.
  • the board data 111 is data representing the board, and is configured to include information such as the shape and layer configuration of the board and the shape of the board pattern that is a pattern formed on the board.
  • the board data 111 is, for example, CAD data obtained from a CAD (Computer Aided Design) used for designing a board, or data obtained by converting the CAD data.
  • the board data 111 may include data of parts mounted on the board in addition to the CAD data or the data obtained by converting the CAD data.
  • the component data is data indicating where each component mounted on the board is arranged.
  • the EMC evaluation data 112 is the evaluation data showing the EMC evaluation result of the electronic device in which the board represented by the associated board data 111 is incorporated, that is, the electromagnetic environment compatibility evaluation result.
  • the new board data 121 is data representing a board to be newly designed, and is similar to the board data 111.
  • the board data 111 and the new board data 121 respectively represent boards to be incorporated in the same type of electronic device. That is, each of the board data 111 and the new board data 121 represents a board that is incorporated in an electronic device of the same type and realizes a similar function.
  • the board represented by the new board data 121 corresponds to a board in which a part of the board represented by the board data 111 has been redesigned or a newly designed board.
  • the board whose design has been changed includes a board whose design has been changed as a countermeasure for EMC.
  • the board represented by the new board data 121 is a board before being incorporated in an electronic device and evaluated for EMC.
  • the analysis unit 12 receives the learning data 110 and stores the board data 111 and the EMC evaluation data 112 included in the received learning data 110 in the storage unit 13. Further, the analysis unit 12 uses the board data 111 and the EMC evaluation data 112 received from the data acquisition unit 11, performs machine learning using the board data 111 and the EMC evaluation data 112 as teacher data, and learns a pattern affecting the EMC. To do. That is, when the analysis unit 12 receives the learning data 110 from the data acquisition unit 11, the analysis unit 12 operates as a learning unit of the machine learning device 20.
  • the analysis unit 12 stores the board data 111 and the EMC evaluation data 112 received from the data acquisition unit 11 in the storage unit 13 It is compared with the board data 111 and the EMC evaluation data 112 received in the above. The analysis unit 12 then generates information on a pattern that affects the EMC based on the comparison result.
  • the data acquisition unit 11 acquires the substrate data 111 of a certain substrate and the EMC evaluation data 112 of the electronic device in which the substrate is incorporated, and then the substrate obtained by changing a part of the pattern formed on the substrate (hereinafter , The changed board) and the EMC evaluation data 112 of the electronic device in which the changed board is incorporated are acquired by the data acquisition unit 11.
  • the analysis unit 12 first compares the two acquired substrate data 111 to identify how the pattern formed on the substrate has been changed, and further compares the two EMC evaluation data 112. By doing so, it is possible to know whether or not the change contents of the board affect the EMC. By repeatedly performing such an operation, the analysis unit 12 generates information on a pattern that affects the EMC.
  • the learning operation performed by the analysis unit 12 will be described separately.
  • the storage unit 13 holds various data acquired by the data acquisition unit 11 from the outside and the learning result by the analysis unit 12, that is, information on patterns that influence the EMC generated by the analysis unit 12.
  • the evaluation unit 14 receives the new board data 121 and evaluates the received new board data 121. Specifically, the evaluation unit 14 identifies a variation factor of the EMC of the electronic device in which the board represented by the new board data 121 is incorporated. In the process of identifying the EMC variation factor, the above-described “information of the pattern affecting the EMC” stored in the storage unit 13 is used. That is, when the evaluation unit 14 receives the new board data 121, the evaluation unit 14 specifies the EMC variation factor of the electronic device in which the board represented by the new board data 121 is incorporated based on the learning result by the analysis unit 12.
  • the evaluation unit 14 After evaluating the new board data 121, the evaluation unit 14 outputs the evaluation result as the evaluation result 131 of the new board.
  • the evaluation result 131 of the new board may be output by generating data indicating the evaluation result and outputting it as a file, or by displaying the evaluation result on a display device (not shown).
  • the display format of the evaluation result may be any format that the user can understand. For example, whether the evaluation result is good or bad is displayed in text.
  • FIG. 3 is a diagram illustrating a configuration example of hardware that realizes the design support device 1.
  • the design support device 1 is realized by the processor 101, the storage device 102, the input device 103, the display device 104, and the communication interface 105.
  • the hardware shown in FIG. 3 is, for example, a personal computer.
  • the design support device 1 installs the program for operating as the design support device 1 in the storage device of the personal computer, that is, the storage device 102 shown in FIG. It is realized by the processor 101 executing the created program. That is, the data acquisition unit 11, the analysis unit 12, and the evaluation unit 14 illustrated in FIG. 1 are realized by the processor 101 executing a program installed in the storage device 102 and operating as the design support apparatus 1. ..
  • the processor 101 is a CPU (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP (Digital Signal Processor)) and the like.
  • the storage device 102 is a nonvolatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), or a flash memory, a magnetic disk, or the like.
  • the storage device 102 holds a program for the processor 101 to operate as the design support device 1.
  • the storage device 102 is also used as a work memory when the processor 101 executes various processes.
  • the storage device 102 also constitutes the storage unit 13 shown in FIG.
  • the input device 103 is a mouse, keyboard, touch panel, or the like.
  • the input device 103 includes hardware used when the user inputs the learning data 110 and the new board data 121 shown in FIG. 1, for example, a connection interface of an external memory.
  • the display device 104 is a liquid crystal monitor, a display, or the like, and is used when the evaluation unit 14 shown in FIG. 1 displays the content of the evaluation result 131 of the new board.
  • the communication interface 105 is a network interface card or the like.
  • the design support device 1 may acquire at least one of the learning data 110 and the new board data 121 from another device via the network to which the communication interface 105 is connected.
  • FIG. 4 is a flowchart showing an example of a learning operation performed by the design support device 1 according to the first exemplary embodiment.
  • the data acquisition unit 11 acquires the board data 111 and the EMC evaluation data 112 corresponding to the board data 111 (steps S11 and S12).
  • the analysis unit 12 receives the board data 111 and the EMC evaluation data 112 acquired by the data acquisition unit 11, and analyzes each received data (step S13).
  • step S13 the analysis unit 12 receives the board data 111 and the EMC evaluation data 112 received this time from the data acquisition unit 11, and the board data 111 and the EMC received in the past from the data acquisition unit 11 and stored in the storage unit 13.
  • the data is analyzed by comparing it with the evaluation data 112.
  • the board data 111 and the EMC evaluation data 112 received this time from the data acquisition unit 11 are referred to as first learning data
  • the board data 111 and the EMC evaluation received in the past stored in the storage unit 13 are referred to.
  • the data 112 may be referred to as second learning data.
  • the board data 111 received this time from the data acquisition unit 11 may be referred to as first board data, and the board data 111 received in the past stored in the storage unit 13 may be referred to as second board data.
  • the EMC evaluation data 112 received this time from the data acquisition unit 11 is referred to as first EMC evaluation data, and the previously received EMC evaluation data 112 stored in the storage unit 13 is referred to as second EMC evaluation data.
  • first EMC evaluation data the previously received EMC evaluation data 112 stored in the storage unit 13 is referred to as second EMC evaluation data.
  • the first learning data is compared with each of the second learning data. If the second learning data does not exist, that is, if the analysis unit 12 receives the first learning data from the data acquisition unit 11 for the first time, the analysis unit 12 receives the comparison data without performing the comparison process.
  • the data that is, the board data 111 and the EMC evaluation data 112 are stored in the storage unit 13. Details of the operation of the analysis unit 12 will be described later.
  • the analysis unit 12 stores the analysis result in the storage unit 13 (step S14). At this time, the analysis unit 12 also stores the first learning data received from the data acquisition unit 11 in the storage unit 13. That is, the analysis unit 12 adds the board data 111 and the EMC evaluation data 112 acquired by the data acquisition unit 11 in steps S11 and S12 to the second learning data.
  • FIG. 5 is a flowchart showing an example of the operation of the analysis unit 12 of the design support device 1 according to the first exemplary embodiment.
  • FIG. 5 shows the operation performed by the analysis unit 12 in step S13 shown in FIG.
  • the analysis unit 12 When receiving the first learning data, the analysis unit 12 receives the first learning data, the first substrate pattern that is the substrate pattern formed on the substrate represented by the first substrate data included in the first learning data, and the second substrate pattern.
  • the difference between the board patterns is extracted by comparing with the second board pattern, which is the board pattern formed on the board represented by one of the board data (step S21).
  • the analysis unit 12 When comparing the first board pattern and the second board pattern, the analysis unit 12 generates an image of each board pattern based on the first board data and the second board data, and compares the images. By doing so, the difference is extracted.
  • the width of the pattern existing at the position A of the first substrate pattern and the width of the pattern existing at the position A of the second substrate pattern are different, the width of the pattern existing at the position A is extracted as the difference. ..
  • the distance between the pattern existing at the position B of the first substrate pattern and the pattern adjacent thereto is different from the distance between the pattern existing at the position B of the second substrate pattern and the pattern adjacent thereto, The interval between the pattern existing at the position B and the pattern adjacent thereto is extracted as a difference point.
  • the analysis unit 12 extracts in step S21.
  • the analysis unit 12 detects the distance between the pattern A1 and the pattern A2 existing in the first substrate pattern and the pattern A1 and the pattern A2 existing at the corresponding positions in the second substrate pattern. Compare with the interval. In the case of the example shown in FIG. 6, the interval between the pattern A1 and the pattern A2 included in the first substrate pattern and the interval between the pattern A1 and the pattern A2 included in the second substrate pattern are different. The interval between the pattern A1 and the pattern A2 is determined to be a difference, and this difference is extracted. Further, for example, as shown in FIG. 7, the analysis unit 12 compares the pattern C1 existing in the first substrate pattern with the pattern C1 existing in the corresponding position of the second substrate pattern. In the case of the example shown in FIG.
  • the analysis unit 12 determines the width of the pattern C1 as a difference. To judge. Further, for example, when the pattern C1 existing in the first substrate pattern does not exist in the corresponding position of the second substrate pattern, as shown in FIG. 8, the analyzing unit 12 determines the presence or absence of the pattern C1 as a difference. to decide.
  • the analysis unit 12 determines, in step S21, the part data included in the first board data and the part data included in the second board data. And to extract the difference between the component mounted on the substrate represented by the first substrate data and the component mounted on the substrate represented by the second substrate data together with the above-described substrate pattern difference. You can In the following description, for simplification, the analysis unit 12 extracts the difference between the board patterns and mounts the parts mounted on the board represented by the first board data and the board represented by the second board data. Differences from parts will not be extracted.
  • each of the differences in the board patterns extracted by the analysis unit 12 may be referred to as a board element.
  • the above-mentioned “spacing between the pattern A1 and the pattern A2”, “width of the pattern C1”, “presence / absence of the pattern C1” and the like correspond to the substrate element.
  • the analysis unit 12 confirms the first EMC evaluation data corresponding to the first board pattern and the second EMC evaluation data corresponding to the second board pattern, and the board pattern extracted in step S21. It is determined whether or not the difference of 1 affects the EMC (step S22).
  • the analysis unit 12 does not affect the EMC by the difference between the board patterns extracted in step S21. To judge.
  • the EMC evaluation level indicated by the first EMC evaluation data is different from the EMC evaluation level indicated by the second EMC evaluation data, it is determined that the difference between the board patterns extracted in step S21 affects the EMC.
  • FIG. 9 is a diagram illustrating an example of a first analysis result generated by the analysis unit 12 according to the first embodiment.
  • the analysis unit 12 extracts the width of the pattern A1, the interval between the patterns A1 and A2, and the presence or absence of the pattern B5 as different points in step S21, and in step S22.
  • the analysis unit 12 confirms whether or not the first analysis result has been generated with all the second board data (step S24). If there is second substrate data for which the first analysis result has not been generated (step S24: No), the analysis unit 12 is one of the second substrate data for which the first analysis result has not been generated. Is selected, and the steps S21 to S23 described above are executed again using the selected second board data.
  • step S24 When the analysis unit 12 generates the first analysis result with all the second substrate data (step S24: Yes), the information of the substrate pattern that affects the EMC based on the first analysis result.
  • step S25 The first analysis result used in step S25 is, for example, the one shown in FIG. FIG. 10 is a diagram showing an example of a list of first analysis results generated by the analysis unit 12 according to the first embodiment. Differences corresponding to the numbers # 1 to # 7 in FIG. 10 and the numbers subsequent thereto and the presence / absence of influence on the EMC are generated and added each time step S23 described above is executed.
  • step S23 the difference corresponding to the number # 1 and the presence / absence of influence on the EMC are generated in step S23 executed for the first time, and the difference corresponding to the number # 2 and the presence / absence of influence on the EMC are generated for the second time. It is generated in the executed step S23.
  • step S25 the analysis unit 12 adds, for example, a predetermined score to each difference point having the presence / absence of influence on EMC as “present”, and determines that the presence / absence of influence on EMC is “absence”.
  • the points indicating the degree of influence on EMC are calculated for each difference point without adding the points, and this is used as the second analysis result.
  • the analysis unit 12 first adds, for example, a score of 1 to each of the three difference points of number # 1 (width of pattern A1, distance between pattern A1 and pattern A2, presence / absence of pattern B5).
  • the analysis unit 12 adds a score of 1 to each of the two difference points with the number # 2 (width of the pattern A2, width of the pattern A3). Similarly, a score of 1 is added to each of the differences between the numbers # 3, # 5, # 7, .... As a result, the second analysis result as shown in FIG. 11 is generated.
  • the “distance between the pattern A1 and the pattern A2” in the substrate element has a score of “+5” indicating the degree of influence on EMC, and Among them, the degree of influence on EMC is greatest.
  • the "distance between the pattern C5 and the pattern C6" in the substrate element has a score of "0" indicating the degree of influence on EMC, and the degree of influence on EMC is small. That is, when the “space between pattern A1 and pattern A2” changes, the EMC measurement result changes significantly, and even when the “space between pattern C5 and pattern C6” changes, the EMC measurement result does not change significantly.
  • the second analysis result includes the information of the board element that affects the EMC and the information of the board element that does not affect the EMC or that has a small effect on the EMC.
  • the board elements having a degree of influence greater than 0 are factors that change the EMC.
  • the analysis unit 12 identifies the board element that becomes the EMC variation factor by adding a predetermined number of points for each difference point with or without the influence on the EMC being “present”.
  • the first board pattern represented by the first board data and the second board pattern represented by one of the second board data are compared, and one board element is extracted as a difference point, the first board pattern
  • the first board pattern By checking the EMC evaluation data 112 corresponding to the data and the EMC evaluation data 112 corresponding to the second board data, it is possible to know whether or not the extracted board element affects the EMC.
  • the first board pattern represented by the first board data and the second board pattern represented by one of the second board data are compared and a plurality of board elements are extracted as a difference, the first board pattern is extracted.
  • each of the extracted board elements affects the EMC only by checking the EMC evaluation data 112 corresponding to the board data and the EMC evaluation data 112 corresponding to the second board data. Because, only one of the plurality of substrate elements may affect the EMC, or all substrate elements may affect the EMC. Further, it is possible that some of the plurality of substrate elements include one that improves the EMC and one that deteriorates the EMC. Therefore, the analysis unit 12 confirms whether or not there is an influence on the EMC for each substrate element included as a difference in one first analysis result, and if there is an influence, adds a score to each substrate element. Then, the degree of influence on EMC is calculated. When the number of the second substrate patterns to be compared with the first substrate pattern increases, the number of the board elements having a large influence on the EMC increases, and the board elements having a large influence on the EMC are narrowed down.
  • FIG. 12 is a flowchart showing an example of the operation of the evaluation unit 14 of the design support device 1 according to the first exemplary embodiment.
  • FIG. 12 shows an operation in which the evaluation unit 14 evaluates the pattern formed on the new board represented by the new board data 121.
  • the data acquisition unit 11 acquires the new board data 121 (step S31).
  • the evaluation unit 14 selects one of the board elements that affect the EMC and confirms whether the selected board element is included in the new board (step S32).
  • the board element that affects the EMC is one having a certain degree or more of "influence degree" among the difference points included in the second analysis result shown in FIG.
  • the evaluation unit 14 confirms whether or not the selected board element is included in the pattern formed on the new board.
  • step S33 If the selected board element is included in the new board (step S33: Yes), the evaluation unit 14 stores the selected board element as a board element that affects the EMC (step S34). After that, the evaluation unit 14 confirms whether or not the confirmation is completed for all the board elements that affect the EMC (step S35), and when the confirmation is not completed (step S35: No), returns to step S32. , EMC of other board elements are subjected to the processing of steps S32 to S34 described above.
  • step S33 If the determination in step S33 is “No”, the evaluation unit 14 executes step S35 without executing step S34.
  • the evaluation unit 14 generates and outputs the evaluation result of the new board when the confirmation is completed for all the board elements that affect the EMC (step S35: Yes) (step S36).
  • FIG. 13 shows an example of the evaluation result of the new board output by the evaluation unit 14 in step S36.
  • the evaluation unit 14 outputs, as an evaluation result, a table showing the locations and the degree of influence that may affect the EMC.
  • a place that may affect the EMC is a variation factor of the EMC and corresponds to the content of the substrate element of the second analysis result shown in FIG.
  • the degree of influence included in the evaluation result of the new substrate roughly indicates the value of the degree of influence included in the second analysis result.
  • the degree of influence included in the evaluation result of the new substrate is set to “large”, and the degree of influence included in the second analysis result is set to “large”.
  • the influence degree included in the evaluation result of the new substrate is set to “medium”.
  • the second threshold value ⁇ the first threshold value.
  • the degree of influence included in the evaluation result of the new substrate is set to “small”.
  • the designer When the evaluation result of the new board is as shown in FIG. 13, the designer, if the result of the EMC measurement of the electronic device incorporating the new board represented by the new board data 121 is non-conforming, as a countermeasure for EMC. It can be seen that it is effective to change the design of the new substrate and adjust the “space between the pattern A1 and the pattern A2”. Further, it can be seen that the adjustment of the “width of the pattern B1” and the “width of the pattern B4” is also effective. The designer can efficiently proceed with the EMC countermeasures by performing adjustment in order from the portion having the greatest influence.
  • the design support device 1 acquires the board data 111 and the EMC evaluation data 112 corresponding thereto as the learning data 110, and the acquired learning data 110 and the previously acquired learning data 110. Based on the learning data, the information of the board element that affects the EMC is generated and stored. The information on the board element that affects the EMC is the information included in the above-described second analysis result. Further, when the design support device 1 acquires new board data, the design support apparatus 1 obtains the information of the board element that influences the EMC included in the new board represented by the new board data, based on the information of the board element that affects the EMC. , Is output as the evaluation result of the new substrate. As a result, the designer of the new board can easily know the board elements that are likely to affect the EMC, and can efficiently design the board.
  • Each board represented by the board data 111 and the new board data 121 acquired by the data acquisition unit 11 of the design support device 1 may be a multilayer board.
  • the analysis unit 12 compares the pattern formed on the substrate represented by the substrate data 111 newly acquired by the data acquisition unit 11 with the pattern formed on the substrate represented by the previously acquired substrate data. The patterns formed in the intermediate layers are also compared.
  • Embodiment 2 The design support apparatus according to the second embodiment will be described.
  • the configuration of the design support device according to the second embodiment is the same as that of the design support device 1 according to the first embodiment (see FIG. 1).
  • the operation of the analysis unit 12 and the evaluation unit 14 of the setting support device according to the present embodiment is different from that of the design support device 1 according to the first embodiment. Therefore, the operations of the analysis unit 12 and the evaluation unit 14 will be described, and the description of the same parts as those in the first embodiment will be omitted.
  • FIG. 14 is a flowchart showing an example of the operation of the analysis unit 12 of the design support device 1 according to the second exemplary embodiment.
  • the flowchart shown in FIG. 14 is obtained by replacing steps S22, S23 and S25 of the flowchart shown in FIG. 5 with steps S22a, S23a and S25a. Since each processing of steps S21 and S24 shown in FIG. 14 is the same as each processing of steps S21 and S24 shown in FIG. 5, description thereof will be omitted.
  • the analysis unit 12 After executing step S21, the analysis unit 12 according to the second embodiment confirms the first EMC evaluation data corresponding to the first substrate pattern and the second EMC evaluation data corresponding to the second substrate pattern. Then, the influence of the difference between the two substrate patterns compared in step S21, that is, the difference between the first substrate pattern and the second substrate pattern on the EMC is specified (step S22a).
  • the analysis unit 12 specifically describes the difference between the board patterns extracted in step S21. To determine the content of the impact on EMC.
  • the width of the pattern B1 included in the first substrate pattern is wider than the width of the pattern B1 included in the second substrate pattern, and the interval between the patterns C1 and C2 included in the first substrate pattern is , Wider than the interval between the patterns C1 and C2 included in the second substrate pattern, and the EMC evaluation level indicated by the first EMC evaluation data is better than the EMC evaluation level indicated by the second EMC evaluation data.
  • the analysis unit 12 determines that the EMC evaluation level is improved when the width of the pattern B1 is wide and the interval between the pattern C1 and the pattern C2 is wide.
  • the analysis unit 12 affects the EMC by the difference between the two board patterns compared in step S21. Judge not to give.
  • step S22a the analysis unit 12 according to the second embodiment performs the first analysis showing the processing result of step S22a, that is, the content of the influence of the difference between the two substrate patterns compared in step S21 on the EMC.
  • a result is generated (step S23a).
  • FIG. 15 is a diagram illustrating an example of the first analysis result generated by the analysis unit 12 according to the second embodiment.
  • the "difference" shown in FIG. 15 shows how the substrate pattern changes. Further, “change of EMC” indicates how the EMC changes when the change shown in the “difference point” occurs in the substrate pattern.
  • step S24 When the analysis unit 12 according to the second embodiment generates the first analysis result with all the second substrate data (step S24: Yes), the analysis unit 12 performs steps S21, S22a, and S23a shown in FIG. A comparison process is performed using a plurality of first analysis results generated by repeated execution, and a second analysis result is generated based on the comparison results (step S25a).
  • the first analysis result used in step S25a is as shown in FIG. 16, for example.
  • FIG. 16 is a diagram showing an example of a list of first analysis results generated by the analysis unit 12 according to the second embodiment.
  • the "differences" and “EMC changes" corresponding to the numbers # 1 to # 7 and the numbers following this in FIG. 16 are generated and added each time the above-described step S23a is executed.
  • step S23a the difference corresponding to the number # 1 and the presence / absence of influence on the EMC are generated in step S23a executed for the first time, and the difference corresponding to the number # 2 and the presence / absence of influence on the EMC are generated for the second time. It is generated in the executed step S23a.
  • Each of the first analysis results included in the list of first analysis results illustrated in FIG. 16 represents how the EMC changes when one or more difference points change. ..
  • the first analysis result of the number # 1 (a) the width of the pattern A1 is expanded, (b) the interval between the pattern A1 and the pattern A2 is expanded, and (c) the pattern B5 is eliminated.
  • the EMC is improved.
  • this alone does not reveal which of the above changes (a) to (c) contributes to the improvement of EMC.
  • the first analysis result of the number # 6 shows that the EMC does not change when the interval between the pattern A1 and the pattern A2 increases and the pattern B5 disappears.
  • the first analysis result of the number # 6 shows that the EMC does not change even if the changes of the above (b) and (c) occur. Therefore, by comparing the first analysis result of number # 1 and the first analysis result of number # 6, when the change shown in (a) above occurs, that is, when the width of the pattern A1 is expanded. It can be seen that the EMC is improved. As described above, by comparing the first analysis results of the respective numbers, it is possible to specify how one difference affects EMC. Therefore, the analysis unit 12 compares the first analysis results generated by executing the above-described step S23a with each other to determine how each difference between the substrates affects the EMC. A second analysis result indicating the identified result is generated.
  • the influence of one difference on the EMC includes the case where the EMC does not change, that is, the case where the difference does not affect the EMC.
  • the case where the two first analysis results are compared to identify how one difference affects the EMC has been described, but the analysis unit 12 compares three or more first analysis results. By doing so, it may be possible to specify how one difference affects EMC.
  • the analysis unit 12 compares the result of identifying how one difference affects the EMC with one or more first analysis results so that the other difference is EMC. In some cases, the impact on
  • FIG. 17 is a diagram showing an example of the second analysis result generated by the analysis unit 12 according to the second embodiment.
  • the second analysis result shown in FIG. 17 includes the board element, the presence / absence of the influence, and the content of the influence.
  • the analysis unit 12 performs a comparison process using two or more first analysis results, and the effect of one difference on the EMC, that is, the effect of the EMC when one substrate element changes.
  • the second analysis result is updated each time it is determined whether or not the EMC is not affected.
  • the evaluation unit 14 according to the second embodiment operates according to the flowchart shown in FIG. 12, but in step S32, the processing is performed using the second analysis result having the content shown in FIG. That is, in step S32, the evaluation unit 14 selects one of the substrate elements whose “presence or absence of influence” item “present” shown in FIG. 17 is “present”, and the selected substrate element is formed into a pattern to be formed on a new substrate. Check if it is included. Further, in step S36, the evaluation unit 14 changes the "impact degree" of the evaluation result of the new board shown in FIG. 13 to "content of influence" instead of the evaluation result of the new board shown in FIG. Is output. The “content of influence” included in the evaluation result of the new board output by the evaluation unit 14 according to the second embodiment is the same as the “content of influence” included in the second analysis result shown in FIG. ..
  • the analysis unit 12 generates information indicating the content of the influence of the change of one board element on the EMC based on the learning data.
  • the information indicating the effect of the change of one board element on the EMC is the second analysis result described above.
  • the evaluation unit 14 acquires new board data
  • each of the board elements included in the new board represented by the new board data is based on the information indicating the influence of the change of one board element on the EMC.
  • Information on the influence on EMC is output as the evaluation result of the new substrate.
  • FIG. 18 is a diagram illustrating a configuration example of the design support device according to the third embodiment.
  • the design support device 1a according to the third embodiment replaces the analysis unit 12 and the evaluation unit 14 of the design support device 1 described in the first and second embodiments with an analysis unit 12a and an evaluation unit 14a, and further, a countermeasure plan generation unit.
  • the configuration has 15 added.
  • the operation of each component other than the analysis unit 12a, the evaluation unit 14a, and the countermeasure plan generation unit 15 is similar to that of the first and second embodiments, and thus the description thereof is omitted.
  • the data acquisition unit 11, the analysis unit 12a, and the storage unit 13 configure the machine learning device 20a according to the third embodiment.
  • the analysis unit 12a operates as a learning unit of the machine learning device 20a.
  • the analysis unit 12a performs the process performed by the analysis unit 12 according to the first embodiment and the process performed by the analysis unit 12 according to the second embodiment, and the second analysis result described in the first embodiment (see FIG. 11). (Refer to FIG. 17) and the second analysis result described in Embodiment 2 (see FIG. 17) are merged to generate a second analysis result. Specifically, the analysis unit 12a uses the “board element” and the “impact degree” included in the second analysis result according to the first embodiment shown in FIG. 11 and the second embodiment shown in FIG. A second analysis result having a configuration including “presence or absence of influence” and “content of influence” included in the second analysis result is generated. FIG.
  • FIG 19 is a diagram illustrating an example of the second analysis result generated by the analysis unit 12a of the design support device 1a according to the third embodiment. Since the “presence or absence of influence” can be known from the “degree of influence”, the second analysis result generated by the analysis unit 12a does not need to include “presence or absence of influence”.
  • the evaluation unit 14a performs the processes of steps S31 to S35 of the flowchart illustrated in FIG. 12, and if “Yes” is determined in step S35, the evaluation unit 14a is formed on the new substrate.
  • the information on the board element that influences the EMC included in the pattern is output to the countermeasure plan generating unit 15. It should be noted that the evaluation unit 14a does not output the information of the board element that influences the EMC when it is determined to be “Yes” in step S35, but is executed in step S34 when it is determined to be “Yes” in step S33.
  • Information about the board element that affects the EMC may be output to the countermeasure plan generating unit 15. In this case, when the evaluation unit 14a determines “Yes” in step S35, the evaluation unit 14a notifies the countermeasure plan generation unit 15 that the output of the information on the board element that affects the EMC has been completed.
  • the countermeasure plan generation unit 15 generates a countermeasure plan 132 for improving the EMC of the new substrate based on the information received from the evaluation unit 14a and the second analysis result stored in the storage unit 13. Output.
  • the evaluation unit 14a may include the top N pieces (N is 1 or more) having a large value of “influence degree” included in the second analysis result illustrated in FIG. 19 among the board elements indicated by the information received from the evaluation unit 14a. (Integer of), and the countermeasure plan 132 is generated based on the “content of influence” corresponding to the selected substrate element.
  • the countermeasure plan generation unit 15 selects “the interval between the pattern A1 and the pattern A2”, and the interval becomes narrow in this board element. Since the EMC is deteriorated, information indicating a change content that widens the interval between the pattern A1 and the pattern A2 is generated and output as the countermeasure plan 132.
  • the countermeasure plan generation unit 15 may determine the number N of board elements selected in the process of generating the countermeasure plan 132 based on the degree of influence of the board elements on the EMC. For example, in the countermeasure plan generating unit 15, there is a substrate element indicated by the information received from the evaluating unit 14a, in which the value of the “impact degree” included in the second analysis result is larger than a predetermined threshold value. If so, the value of N is determined as the first number. In addition, the countermeasure plan generating unit 15 includes, among the board elements indicated by the information received from the evaluating unit 14a, a board element whose “impact degree” included in the second analysis result is larger than a predetermined threshold value. If not, the value of N is determined to be a second number larger than the first number.
  • the EMC When there is an impact value greater than the threshold value, it is considered that the EMC is improved by taking measures at some locations in order from the greatest impact value. On the other hand, if there is no one whose influence level value is larger than the threshold value, it may be necessary to take measures to more places in order to improve the EMC. Therefore, in this example, the second number is made larger than the first number.
  • the countermeasure plan generating unit 15 is configured to generate the countermeasure plan 132, but the countermeasure plan generating unit 15 is deleted, and instead of the countermeasure plan generating unit 15, the evaluation unit 14a generates the countermeasure plan 132. It may be configured to generate.
  • the analysis unit 12a changes the EMC of one board element based on the learning data, as in the analysis unit 12 described in the second embodiment.
  • the information which shows the content of the influence on is generated.
  • the evaluation unit 14a extracts the board element included in the new board represented by the new board data, which influences the EMC, and the countermeasure plan generation unit 15 extracts the extracted board element.
  • a measure for improving the EMC of the new substrate is generated based on the information indicating the content of the influence of the change of one substrate element on the EMC.
  • a board element having a large influence on EMC is selected, and a countermeasure plan for the selected board element is generated. This allows the designer of the new board to know how to change the board element having a large influence when the EMC countermeasure is necessary, and to efficiently design the board. It will be possible.
  • FIG. 20 is a diagram illustrating a configuration example of the design support device according to the fourth embodiment.
  • the design support device 1b according to the fourth embodiment has a configuration in which the analysis unit 12 of the design support device 1 described in the first and second embodiments is replaced with an analysis unit 12a, and a design rule generation unit 16 is added.
  • the operation of each component other than the analysis unit 12a and the design rule generation unit 16 is the same as in the first and second embodiments, and thus the description thereof is omitted.
  • the analysis unit 12a of the design support device 1b according to the present embodiment is the same as the analysis unit 12a of the design support device 1a according to the third embodiment, so description thereof will be omitted.
  • the design rule generation unit 16 generates and outputs the board pattern design rule 133 based on the second analysis result held in the storage unit 13 when a predetermined condition is satisfied, for example.
  • the board pattern design rule 133 may be output by generating data indicating the design rule and outputting it as a file, or by displaying the design rule on a display device (not shown).
  • the above-mentioned predetermined condition corresponds to, for example, the case where an operation for instructing the start of design rule generation is received from a user who is a designer of a new board. Further, when the design support device 1b receives the learning data 110 and the analysis unit 12a performs the processing and the second analysis result held in the storage unit 13 is updated accordingly, the design rule generation unit 16 It may be determined that the predetermined condition is satisfied.
  • the design rule generation unit 16 selects, for example, a board element having a value of “influence degree” equal to or greater than a predetermined threshold value from “board elements” included in the second analysis result, and corresponds to the selected board element. Based on the “content of influence”, the board pattern design rule 133 is generated. If the second analysis result is shown in FIG. 19 and the threshold value is “+2”, the design rule generation unit 16 causes the “width of the pattern A1” and the “pattern A1 The “interval of the pattern A2" and the “width of the pattern A2” are selected, and the "width of the pattern A1 and the width of the pattern A2 are narrowed and the width of the pattern A1 is reduced based on the content of influence of each selected substrate element on the EMC. And the pattern A2 is widened, a design rule is generated and output as a board pattern design rule 133.
  • the configuration in which the design rule generation unit 16 is added to the design support device 1 described in the first and second embodiments and the analysis unit 12 is replaced with the analysis unit 12a has been described. Not limited. The configuration may be such that the design rule generation unit 16 is added to the design support device 1a described in the third embodiment.
  • the design support device 1b includes the design rule generation unit 16 that generates the board pattern design rule based on the second analysis result described in the third embodiment. This allows the board designer to confirm the board pattern design rule 133 when newly designing the board and proceed with the design while considering the influence on the EMC. As a result, the number of times of remodeling for EMC countermeasures is suppressed, and board design can be efficiently performed.
  • the analysis unit learns the patterns that affect the EMC
  • the patterns formed on the substrate are compared with each other.
  • the components mounted on the board may be compared with each other.
  • the analysis unit uses the component data, and when the components arranged at the same location on each board to be compared are different, the difference between the components is extracted as a difference point.
  • the change of the parts can be made an option when the EMC countermeasure is taken, and a more flexible countermeasure can be taken.
  • machine learning is performed using the board data 111 and the EMC evaluation data 112 to learn the pattern affecting the EMC, that is, the information of the pattern affecting the EMC is updated. ..
  • the data used for learning is not limited to this.
  • circuit diagram data may be used in addition to the board data 111 and the EMC evaluation data 112 described above.
  • the analysis unit (analysis units 12 and 12a) described in each embodiment first compares the circuit patterns corresponding to the respective substrates when comparing the substrate patterns formed on the two substrates. By confirming the drawing data, it is specified in which area of the substrate the pattern relating to which function is formed. Examples of the functions here include functions such as a power supply function, a communication function, and a control function. That is, the analysis unit confirms the circuit diagram data to identify in which area of the substrate the pattern that implements each function, such as the pattern of the power supply circuit, the pattern of the communication circuit, the pattern of the control circuit, is formed. .. After that, the analysis unit compares the patterns and extracts the differences for each region in which the patterns that realize the respective functions are formed.
  • the analysis unit By comparing the patterns formed in the first regions of the two substrates and extracting the differences, the patterns formed in the second regions of the two substrates are compared.
  • the process of extracting the difference point and the process of comparing the patterns formed in the respective third regions of the two substrates with each other to extract the difference point are performed and the extraction of the difference point is completed, The first analysis result obtained is generated.
  • the analysis unit described in each embodiment when using the circuit diagram data, the analysis unit described in each embodiment generates the first analysis result and the second analysis result for each area in which the pattern for realizing each function is formed. You may go. For example, when the pattern of the power supply circuit, the pattern of the communication circuit, and the pattern of the control circuit are formed on one substrate, the analysis unit determines the first analysis result and the second analysis result of the power supply circuit and the communication circuit. Of the first analysis result and the second analysis result of the control circuit, and the first analysis result and the second analysis result of the control circuit are generated.
  • the circuit classification for each function included in the circuit diagram can be utilized. Therefore, it becomes clear which function has a problem in the pattern to be realized, and it is possible to easily know the place where the countermeasure is required. Further, even if the boards are incorporated in different products, if patterns of circuits for realizing the same function are formed, the patterns are compared to obtain the first analysis result and the second analysis result. A learning operation to generate can be performed. That is, the analysis unit 12 can learn patterns that affect the EMC by using the board data 111, the EMC evaluation data 112, and the circuit diagram data for more products. As a result, it is possible to improve the evaluation accuracy when the evaluation unit described in each embodiment evaluates the new board data 121.
  • 1 design support device 11 data acquisition unit, 12, 12a analysis unit, 13 storage unit, 14, 14a evaluation unit, 15 countermeasure plan generation unit, 16 design rule generation unit, 20, 20a machine learning device, 110 learning data, 111 board data, 112 EMC evaluation data, 121 new board data, 131 new board evaluation results.

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Abstract

A design assistance device (1) is provided with: an analysis unit (12) which learns causes of variations in the electromagnetic compatibility of an electronic device in which a substrate is incorporated, by analyzing learning data (110) that includes substrate data (111) including information about the substrate and a substrate pattern formed on the substrate, and that also includes EMC evaluation data (112) representing evaluation results of the electromagnetic compatibility; and an evaluation unit (14) which, upon receiving new substrate data (121) including information about a substrate pattern formed on a new substrate, identifies causes of variations in the electromagnetic compatibility of an electronic device in which the new substrate is incorporated, on the basis of the variation cause learning results from the analysis unit (12), wherein the new substrate has not yet been incorporated in the electronic device for the purpose of evaluating the electromagnetic compatibility.

Description

設計支援装置、設計支援方法および機械学習装置Design support device, design support method, and machine learning device

 本発明は、電子機器に組み込む基板の設計を支援する設計支援装置、設計支援方法および機械学習装置に関する。 The present invention relates to a design support device, a design support method, and a machine learning device that support the design of a board incorporated in an electronic device.

 電子機器は、EMC(Electromagnetic Compatibility:電磁環境両立性)に関連する規格(以下、EMC規格と称する)を満足する必要がある。そのため、電子部品が実装されて電子機器に組み込まれる基板を設計する際には、EMC規格を満足するように考慮する必要がある。EMC規格を満足するためには、EMI(Electro Magnetic Interference)およびEMS(Electromagnetic Susceptibility)のそれぞれが規定値を満足する必要がある。また、EMCの測定結果は、基板上の電子部品の配置、基板に形成されたパターンの引き回しや幅、隣り合ったパターン同士の距離などが変化した場合に影響を受ける。EMCの測定結果は複数の要因の影響を受けるため、測定結果が規格を満足する基板を効率的に設計するには、EMCに関する知識および基板設計の経験を要する。 Electronic devices must meet the standards related to EMC (Electromagnetic Compatibility) (hereinafter referred to as EMC standards). Therefore, when designing a board on which electronic components are mounted and incorporated in an electronic device, it is necessary to consider so as to satisfy the EMC standard. In order to satisfy the EMC standard, each of EMI (Electro Magnetic Interference) and EMS (Electromagnetic Susceptibility) needs to satisfy specified values. Further, the measurement result of the EMC is affected when the arrangement of electronic components on the substrate, the routing and width of the pattern formed on the substrate, the distance between adjacent patterns, and the like change. Since the EMC measurement result is influenced by a plurality of factors, knowledge about EMC and board design experience are required to efficiently design a substrate whose measurement result satisfies the standard.

 特許文献1には、電子部品が実装された基板のEMI対策を効率的に行えるようにする発明が記載されている。特許文献1に記載の発明では、基板から放射される電磁波を、測定位置を変化させながら測定し、測定データを測定位置ごとに分析して1以上の特徴量を算出する。また、測定位置ごとに算出した特徴量をクラスター分析により分類し、分類結果を測定位置とともにユーザに提示する。 Patent Document 1 describes an invention that enables efficient countermeasures against EMI of a board on which electronic components are mounted. In the invention described in Patent Document 1, the electromagnetic wave radiated from the substrate is measured while changing the measurement position, and the measurement data is analyzed for each measurement position to calculate one or more feature amounts. Further, the feature amount calculated for each measurement position is classified by cluster analysis, and the classification result is presented to the user together with the measurement position.

国際公開第2014/065032号International Publication No. 2014/065032

 しかしながら、特許文献1に記載の発明では、設計者等のユーザがEMI対策が必要と判断した場合、対策を行った基板を実際に作製し、作製した基板から放射される電磁波を再度測定して特徴量の算出および分類を行う必要があり、基板の設計に手間がかかるという問題があった。 However, in the invention described in Patent Document 1, when a user such as a designer determines that an EMI countermeasure is necessary, a substrate for which the countermeasure is taken is actually manufactured, and an electromagnetic wave emitted from the manufactured substrate is measured again. There is a problem in that it is necessary to calculate and classify the characteristic amount, and it takes time to design the board.

 本発明は、上記に鑑みてなされたものであって、基板を実際に作製する前にEMCの対策を可能にすることで基板の設計効率を向上させることが可能な設計支援装置を得ることを目的とする。 The present invention has been made in view of the above, and an object of the present invention is to obtain a design support apparatus capable of improving the design efficiency of a substrate by enabling measures for EMC before actually manufacturing the substrate. To aim.

 上述した課題を解決し、目的を達成するために、本発明にかかる設計支援装置は、基板および基板に形成される基板パターンの情報を含む基板データと、基板が組み込まれる電子機器の電磁環境両立性の評価結果を示す評価データとを含んだ学習用データを分析して電磁環境両立性の変動要因を学習する分析部を備える。また、設計支援装置は、電子機器に組み込まれて電磁環境両立性の評価が行われる前の基板である新規基板に形成される基板パターンの情報を含む新規基板データが入力された場合に、分析部による変動要因の学習結果に基づいて、新規基板が組み込まれる電子機器の電磁環境両立性の変動要因を特定する評価部を備える。 In order to solve the above-mentioned problems and to achieve the object, a design support device according to the present invention is compatible with board data including information on a board and a board pattern formed on the board and an electromagnetic environment of an electronic device in which the board is incorporated. And an analysis unit that analyzes the learning data including the evaluation data indicating the evaluation result of the sex and learns the variation factor of the electromagnetic environment compatibility. In addition, the design support device analyzes when new board data including information on a board pattern formed on a new board that is a board before being incorporated in an electronic device and evaluated for electromagnetic compatibility is input. An evaluation unit is provided for identifying a variation factor of electromagnetic environment compatibility of an electronic device in which the new board is incorporated, based on a learning result of the variation factor by the unit.

 本発明にかかる設計支援装置は、基板を実際に作製する前にEMCの対策を可能にして基板の設計効率を向上させることができる、という効果を奏する。 The design support device according to the present invention has an effect that it is possible to improve the design efficiency of the board by enabling EMC countermeasures before actually manufacturing the board.

実施の形態1にかかる設計支援装置の構成例を示す図The figure which shows the structural example of the design support apparatus concerning Embodiment 1. EMC評価データを説明するための図Diagram for explaining the EMC evaluation data 本発明にかかる設計支援装置を実現するハードウェアの構成例を示す図The figure which shows the structural example of the hardware which implement | achieves the design support apparatus concerning this invention. 実施の形態1にかかる設計支援装置が行う学習動作の一例を示すフローチャートFlowchart showing an example of a learning operation performed by the design support apparatus according to the first exemplary embodiment 実施の形態1にかかる設計支援装置の分析部の動作の一例を示すフローチャートThe flowchart which shows an example of operation | movement of the analysis part of the design support apparatus concerning Embodiment 1. 実施の形態1にかかる設計支援装置の分析部の動作を説明するための第1の図FIG. 1 is a first diagram for explaining an operation of an analysis unit of the design support device according to the first exemplary embodiment. 実施の形態1にかかる設計支援装置の分析部の動作を説明するための第2の図2nd figure for demonstrating operation | movement of the analysis part of the design support apparatus concerning Embodiment 1. 実施の形態1にかかる設計支援装置の分析部の動作を説明するための第3の図FIG. 3 is a third diagram for explaining the operation of the analysis unit of the design support device according to the first embodiment. 実施の形態1にかかる設計支援装置の分析部が生成する第1の分析結果の一例を示す図FIG. 5 is a diagram showing an example of a first analysis result generated by the analysis unit of the design support apparatus according to the first embodiment. 実施の形態1にかかる設計支援装置の分析部が生成する第1の分析結果の一覧の例を示す図FIG. 3 is a diagram showing an example of a list of first analysis results generated by the analysis unit of the design support apparatus according to the first embodiment. 実施の形態1にかかる設計支援装置の分析部が生成する第2の分析結果の一例を示す図FIG. 5 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the first embodiment. 実施の形態1にかかる設計支援装置の評価部の動作の一例を示すフローチャートThe flowchart which shows an example of operation | movement of the evaluation part of the design support apparatus concerning Embodiment 1. 実施の形態1にかかる設計支援装置の評価部が出力する新規基板の評価結果の一例を示す図The figure which shows an example of the evaluation result of the new board | substrate which the evaluation part of the design support apparatus concerning Embodiment 1 outputs. 実施の形態2にかかる設計支援装置の分析部の動作の一例を示すフローチャートThe flowchart which shows an example of operation | movement of the analysis part of the design support apparatus concerning Embodiment 2. 実施の形態2にかかる設計支援装置の分析部が生成する第1の分析結果の一例を示す図FIG. 11 is a diagram showing an example of a first analysis result generated by the analysis unit of the design support apparatus according to the second embodiment. 実施の形態2にかかる設計支援装置の分析部が生成する第1の分析結果の一覧の例を示す図FIG. 11 is a diagram showing an example of a list of first analysis results generated by the analysis unit of the design support apparatus according to the second embodiment. 実施の形態2にかかる設計支援装置の分析部が生成する第2の分析結果の一例を示す図FIG. 11 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the second embodiment. 実施の形態3にかかる設計支援装置の構成例を示す図FIG. 8 is a diagram showing a configuration example of a design support device according to a third exemplary embodiment. 実施の形態3にかかる設計支援装置の分析部が生成する第2の分析結果の一例を示す図FIG. 16 is a diagram showing an example of a second analysis result generated by the analysis unit of the design support apparatus according to the third embodiment. 実施の形態4にかかる設計支援装置の構成例を示す図FIG. 6 is a diagram showing a configuration example of a design support device according to a fourth exemplary embodiment.

 以下に、本発明の実施の形態にかかる設計支援装置、設計支援方法および機械学習装置を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。 A design support device, a design support method, and a machine learning device according to an embodiment of the present invention will be described below in detail with reference to the drawings. The present invention is not limited to this embodiment.

 まず、各実施の形態の詳細について説明する前に、本発明にかかる設計支援装置の概要について説明する。本発明にかかる設計支援装置には、学習用データおよび新規基板データが入力される。学習用データには、電子機器に組み込まれる基板を表す基板データと、この基板が組み込まれた電子機器のEMCの評価結果を示すEMC評価データとが含まれる。学習用データに含まれる基板データが表す基板は、設計済みの基板である。新規基板データは、新たに作製される基板を表す。学習用データに含まれる基板データの構成と新規基板データの構成は同一である。設計支援装置は、学習用データが入力された場合、入力された学習用データ(第1の学習用データとする)と、過去に入力され、保持しておいた学習用データ(第2の学習用データとする)とを使用して、EMCに影響を与える基板要素であるEMCの変動要因を学習する。基板要素の詳細については別途説明する。また、設計支援装置は、新規基板データが入力された場合、EMCの変動要因の学習結果に基づいて、入力された新規基板データが表す基板に含まれる基板要素のうち、EMCの変動要因となる基板要素の情報を生成する。これにより、基板の設計者は、新規基板データが表す基板を実際に作製してEMCの評価を行う前に、EMCの変動要因の情報を得ることができ、必要に応じて設計を変更するなどの対策を行うことができるようになる。 First, before describing the details of each embodiment, an outline of the design support apparatus according to the present invention will be described. Learning data and new board data are input to the design support apparatus according to the present invention. The learning data includes board data representing a board to be incorporated in the electronic device and EMC evaluation data showing an EMC evaluation result of the electronic device in which the board is incorporated. The board represented by the board data included in the learning data is a designed board. The new board data represents a newly created board. The structure of the board data included in the learning data and the structure of the new board data are the same. When the learning data is input, the design support device inputs the input learning data (referred to as first learning data) and the previously input and held learning data (second learning data). , And the fluctuation factors of the EMC, which is the substrate element that affects the EMC, are learned. Details of the substrate element will be described separately. Further, when new board data is input, the design support device becomes the EMC change factor among the board elements included in the board represented by the input new board data based on the learning result of the EMC change factor. Generate information about the board element. This allows the board designer to obtain information on the EMC variation factor before actually manufacturing the board represented by the new board data and evaluating the EMC, and changing the design as necessary. Will be able to take measures.

実施の形態1.
 図1は、本発明の実施の形態1にかかる設計支援装置の構成例を示す図である。実施の形態1にかかる設計支援装置1は、データ取得部11、分析部12、記憶部13および評価部14を備える。データ取得部11、分析部12および記憶部13は、EMCの変動要因を学習する機械学習装置20を構成する。
Embodiment 1.
FIG. 1 is a diagram showing a configuration example of a design support device according to the first exemplary embodiment of the present invention. The design support device 1 according to the first embodiment includes a data acquisition unit 11, an analysis unit 12, a storage unit 13, and an evaluation unit 14. The data acquisition unit 11, the analysis unit 12, and the storage unit 13 configure a machine learning device 20 that learns EMC variation factors.

 データ取得部11は、設計支援装置1の外部からデータを取得する。データ取得部11が取得するデータとしては、学習用データ110を構成する基板データ111およびEMC評価データ112と、新規基板データ121とが該当する。基板データ111とEMC評価データ112とは、対応付けられた状態でデータ取得部11により取得される。 The data acquisition unit 11 acquires data from outside the design support device 1. The data acquired by the data acquisition unit 11 corresponds to the board data 111 and the EMC evaluation data 112 that form the learning data 110, and the new board data 121. The board data 111 and the EMC evaluation data 112 are acquired by the data acquisition unit 11 in a correlated state.

 基板データ111は、基板を表すデータであり、基板の形状や層構成、基板に形成されるパターンである基板パターンの形状などの情報を含んで構成される。基板データ111は、例えば、基板の設計に用いられるCAD(Computer Aided Design)から得られるCADデータ、または、CADデータを変換して得られるデータである。基板データ111は、CADデータ、または、CADデータを変換して得られるデータに加えて、基板に実装される部品のデータを含んでいてもよい。部品のデータは、基板に実装される各部品が基板の何処に配置されるかを示すデータである。EMC評価データ112は、対応付けられている基板データ111で表される基板が組み込まれた電子機器のEMCの評価結果、すなわち電磁環境両立性の評価結果を示す評価データである。本実施の形態では、EMCの測定結果が、図2に示した4段階の評価レベルのどれに該当するのかを示すデータを、EMC評価データ112とする。よって、EMC評価データ112は、0~3のいずれかとなり、数値が大きいほどEMCの評価結果が悪くなる。新規基板データ121は、新たに設計する基板を表すデータであり、基板データ111と同様のデータである。 The board data 111 is data representing the board, and is configured to include information such as the shape and layer configuration of the board and the shape of the board pattern that is a pattern formed on the board. The board data 111 is, for example, CAD data obtained from a CAD (Computer Aided Design) used for designing a board, or data obtained by converting the CAD data. The board data 111 may include data of parts mounted on the board in addition to the CAD data or the data obtained by converting the CAD data. The component data is data indicating where each component mounted on the board is arranged. The EMC evaluation data 112 is the evaluation data showing the EMC evaluation result of the electronic device in which the board represented by the associated board data 111 is incorporated, that is, the electromagnetic environment compatibility evaluation result. In the present embodiment, data indicating which of the four evaluation levels shown in FIG. 2 the EMC measurement result corresponds to is EMC evaluation data 112. Therefore, the EMC evaluation data 112 is any one of 0 to 3, and the larger the numerical value, the worse the EMC evaluation result. The new board data 121 is data representing a board to be newly designed, and is similar to the board data 111.

 基板データ111および新規基板データ121は、それぞれ、同じ種類の電子機器に組み込まれる基板を表す。すなわち、基板データ111および新規基板データ121のそれぞれは、同じ種類の電子機器に組み込まれ、同様の機能を実現するための基板を表す。新規基板データ121が表す基板としては、基板データ111が表す基板の一部を設計変更した基板、または、新たに設計された基板が該当する。設計変更した基板には、EMCの対策のための設計変更が加えられた基板も含まれる。また、新規基板データ121が表す基板は、電子機器に組み込まれてEMCの評価が行われる前の基板である。 The board data 111 and the new board data 121 respectively represent boards to be incorporated in the same type of electronic device. That is, each of the board data 111 and the new board data 121 represents a board that is incorporated in an electronic device of the same type and realizes a similar function. The board represented by the new board data 121 corresponds to a board in which a part of the board represented by the board data 111 has been redesigned or a newly designed board. The board whose design has been changed includes a board whose design has been changed as a countermeasure for EMC. The board represented by the new board data 121 is a board before being incorporated in an electronic device and evaluated for EMC.

 分析部12は、データ取得部11が学習用データ110を取得するとこれを受け取り、受け取った学習用データ110に含まれる基板データ111およびEMC評価データ112を記憶部13に格納する。また、分析部12は、データ取得部11から受け取った基板データ111およびEMC評価データ112を用い、基板データ111およびEMC評価データ112を教師データとして機械学習を行い、EMCに影響を与えるパターンを学習する。すなわち、分析部12は、データ取得部11から学習用データ110を受け取ると、機械学習装置20の学習部として動作する。データ取得部11から基板データ111およびEMC評価データ112を受け取った場合、分析部12は、データ取得部11から受け取った基板データ111およびEMC評価データ112を、記憶部13に格納されている、過去に受け取った基板データ111およびEMC評価データ112と比較する。分析部12は、次に、比較結果に基づいて、EMCに影響を与えるパターンの情報を生成する。例えば、ある基板の基板データ111と、この基板を組み込んだ電子機器のEMC評価データ112とをデータ取得部11が取得し、その後、この基板に形成されるパターンの一部を変更した基板(以下、変更後基板とする)の基板データ111と、変更後基板を組み込んだ電子機器のEMC評価データ112とをデータ取得部11が取得した場合について考える。この場合、分析部12は、まず、取得された2つの基板データ111を比較して、基板に形成されるパターンがどのように変更されたかを特定し、さらに、2つのEMC評価データ112を比較することで、基板の変更内容がEMCに影響を与えるのか否かが分かる。このような動作を繰り返し行うことにより、分析部12は、EMCに影響を与えるパターンの情報を生成する。分析部12が行う学習動作については別途説明する。 When the data acquisition unit 11 acquires the learning data 110, the analysis unit 12 receives the learning data 110 and stores the board data 111 and the EMC evaluation data 112 included in the received learning data 110 in the storage unit 13. Further, the analysis unit 12 uses the board data 111 and the EMC evaluation data 112 received from the data acquisition unit 11, performs machine learning using the board data 111 and the EMC evaluation data 112 as teacher data, and learns a pattern affecting the EMC. To do. That is, when the analysis unit 12 receives the learning data 110 from the data acquisition unit 11, the analysis unit 12 operates as a learning unit of the machine learning device 20. When the board data 111 and the EMC evaluation data 112 are received from the data acquisition unit 11, the analysis unit 12 stores the board data 111 and the EMC evaluation data 112 received from the data acquisition unit 11 in the storage unit 13 It is compared with the board data 111 and the EMC evaluation data 112 received in the above. The analysis unit 12 then generates information on a pattern that affects the EMC based on the comparison result. For example, the data acquisition unit 11 acquires the substrate data 111 of a certain substrate and the EMC evaluation data 112 of the electronic device in which the substrate is incorporated, and then the substrate obtained by changing a part of the pattern formed on the substrate (hereinafter , The changed board) and the EMC evaluation data 112 of the electronic device in which the changed board is incorporated are acquired by the data acquisition unit 11. In this case, the analysis unit 12 first compares the two acquired substrate data 111 to identify how the pattern formed on the substrate has been changed, and further compares the two EMC evaluation data 112. By doing so, it is possible to know whether or not the change contents of the board affect the EMC. By repeatedly performing such an operation, the analysis unit 12 generates information on a pattern that affects the EMC. The learning operation performed by the analysis unit 12 will be described separately.

 記憶部13は、データ取得部11が外部から取得した各種データと、分析部12による学習結果、すなわち、分析部12が生成する、EMCに影響を与えるパターンの情報と、を保持する。 The storage unit 13 holds various data acquired by the data acquisition unit 11 from the outside and the learning result by the analysis unit 12, that is, information on patterns that influence the EMC generated by the analysis unit 12.

 評価部14は、データ取得部11が新規基板データ121を取得するとこれを受け取り、受け取った新規基板データ121を評価する。具体的には、評価部14は、新規基板データ121が表す基板が組み込まれる電子機器のEMCの変動要因を特定する。このEMCの変動要因を特定する処理では、記憶部13が保持している、上述した「EMCに影響を与えるパターンの情報」が用いられる。すなわち、評価部14は、新規基板データ121を受け取ると、分析部12による学習結果に基づいて、新規基板データ121が表す基板が組み込まれる電子機器のEMCの変動要因を特定する。評価部14は、新規基板データ121の評価を行うと、評価結果を新規基板の評価結果131として出力する。新規基板の評価結果131の出力は、評価結果を示すデータを生成してファイルとして出力する形で行ってもよいし、図示を省略した表示装置に評価結果を表示させる形で行ってもよい。評価結果の表示形式は、ユーザが理解できる形式であればどのような形式であってもよい。例えば、評価結果が良好か不良かをテキストで表示する。 When the data acquisition unit 11 acquires the new board data 121, the evaluation unit 14 receives the new board data 121 and evaluates the received new board data 121. Specifically, the evaluation unit 14 identifies a variation factor of the EMC of the electronic device in which the board represented by the new board data 121 is incorporated. In the process of identifying the EMC variation factor, the above-described “information of the pattern affecting the EMC” stored in the storage unit 13 is used. That is, when the evaluation unit 14 receives the new board data 121, the evaluation unit 14 specifies the EMC variation factor of the electronic device in which the board represented by the new board data 121 is incorporated based on the learning result by the analysis unit 12. After evaluating the new board data 121, the evaluation unit 14 outputs the evaluation result as the evaluation result 131 of the new board. The evaluation result 131 of the new board may be output by generating data indicating the evaluation result and outputting it as a file, or by displaying the evaluation result on a display device (not shown). The display format of the evaluation result may be any format that the user can understand. For example, whether the evaluation result is good or bad is displayed in text.

 ここで、本発明にかかる設計支援装置1を実現するハードウェアについて説明する。図3は、設計支援装置1を実現するハードウェアの構成例を示す図である。設計支援装置1は、プロセッサ101、記憶装置102、入力装置103、表示装置104および通信インタフェース105により実現される。図3に示したハードウェアは、例えばパーソナルコンピュータである。図3に示したハードウェアがパーソナルコンピュータである場合、設計支援装置1は、設計支援装置1として動作するためのプログラムをパーソナルコンピュータの記憶装置すなわち図3に示した記憶装置102にインストールし、インストールされたプログラムをプロセッサ101が実行することにより実現される。すなわち、図1に示したデータ取得部11、分析部12および評価部14は、記憶装置102にインストールされた、設計支援装置1として動作するためのプログラムをプロセッサ101が実行することにより実現される。 Here, the hardware that realizes the design support device 1 according to the present invention will be described. FIG. 3 is a diagram illustrating a configuration example of hardware that realizes the design support device 1. The design support device 1 is realized by the processor 101, the storage device 102, the input device 103, the display device 104, and the communication interface 105. The hardware shown in FIG. 3 is, for example, a personal computer. When the hardware shown in FIG. 3 is a personal computer, the design support device 1 installs the program for operating as the design support device 1 in the storage device of the personal computer, that is, the storage device 102 shown in FIG. It is realized by the processor 101 executing the created program. That is, the data acquisition unit 11, the analysis unit 12, and the evaluation unit 14 illustrated in FIG. 1 are realized by the processor 101 executing a program installed in the storage device 102 and operating as the design support apparatus 1. ..

 プロセッサ101は、CPU(Central Processing Unit、中央処理装置、処理装置、演算装置、マイクロプロセッサ、マイクロコンピュータ、プロセッサ、DSP(Digital Signal Processor)ともいう)等である。記憶装置102は、RAM(Random Access Memory)、ROM(Read Only Memory)、フラッシュメモリー、等の、不揮発性または揮発性の半導体メモリ、磁気ディスク等である。記憶装置102は、プロセッサ101が設計支援装置1として動作するためのプログラムを保持する。記憶装置102は、プロセッサ101が各種処理を実行する際のワーク用メモリとしても使用される。また、記憶装置102は、図1に示す記憶部13を構成する。 The processor 101 is a CPU (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP (Digital Signal Processor)) and the like. The storage device 102 is a nonvolatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), or a flash memory, a magnetic disk, or the like. The storage device 102 holds a program for the processor 101 to operate as the design support device 1. The storage device 102 is also used as a work memory when the processor 101 executes various processes. The storage device 102 also constitutes the storage unit 13 shown in FIG.

 入力装置103は、マウス、キーボード、タッチパネルなどである。また、入力装置103には、図1に示した学習用データ110および新規基板データ121をユーザが入力する際に用いられるハードウェア、例えば外部メモリの接続インタフェースが含まれる。表示装置104は、液晶モニタ、ディスプレイなどであり、図1に示した評価部14が新規基板の評価結果131の内容を表示する場合に使用される。通信インタフェース105は、ネットワークインタフェースカードなどである。設計支援装置1は、学習用データ110および新規基板データ121の少なくとも一方を、通信インタフェース105が接続されたネットワークを介して他の装置から取得してもよい。 The input device 103 is a mouse, keyboard, touch panel, or the like. The input device 103 includes hardware used when the user inputs the learning data 110 and the new board data 121 shown in FIG. 1, for example, a connection interface of an external memory. The display device 104 is a liquid crystal monitor, a display, or the like, and is used when the evaluation unit 14 shown in FIG. 1 displays the content of the evaluation result 131 of the new board. The communication interface 105 is a network interface card or the like. The design support device 1 may acquire at least one of the learning data 110 and the new board data 121 from another device via the network to which the communication interface 105 is connected.

 つづいて、設計支援装置1が学習用データ110を取得した場合の動作について説明する。図4は、実施の形態1にかかる設計支援装置1が行う学習動作の一例を示すフローチャートである。 Next, the operation when the design support device 1 acquires the learning data 110 will be described. FIG. 4 is a flowchart showing an example of a learning operation performed by the design support device 1 according to the first exemplary embodiment.

 設計支援装置1による学習動作では、まず、データ取得部11が、基板データ111と、基板データ111に対応するEMC評価データ112とを取得する(ステップS11,S12)。 In the learning operation by the design support apparatus 1, first, the data acquisition unit 11 acquires the board data 111 and the EMC evaluation data 112 corresponding to the board data 111 (steps S11 and S12).

 次に、分析部12が、データ取得部11で取得された基板データ111およびEMC評価データ112を受け取り、受け取った各データを分析する(ステップS13)。ステップS13において、分析部12は、データ取得部11から今回受け取った基板データ111およびEMC評価データ112と、データ取得部11から過去に受け取り、記憶部13に格納しておいた基板データ111およびEMC評価データ112とを比較することでデータの分析を行う。以下の説明では、データ取得部11から今回受け取った基板データ111およびEMC評価データ112を第1の学習用データと称し、記憶部13に格納されている、過去に受け取った基板データ111およびEMC評価データ112を第2の学習用データと称する場合がある。また、データ取得部11から今回受け取った基板データ111を第1の基板データと称し、記憶部13に格納されている、過去に受け取った基板データ111を第2の基板データと称する場合がある。同様に、データ取得部11から今回受け取ったEMC評価データ112を第1のEMC評価データと称し、記憶部13に格納されている、過去に受け取ったEMC評価データ112を第2のEMC評価データと称する場合がある。 Next, the analysis unit 12 receives the board data 111 and the EMC evaluation data 112 acquired by the data acquisition unit 11, and analyzes each received data (step S13). In step S13, the analysis unit 12 receives the board data 111 and the EMC evaluation data 112 received this time from the data acquisition unit 11, and the board data 111 and the EMC received in the past from the data acquisition unit 11 and stored in the storage unit 13. The data is analyzed by comparing it with the evaluation data 112. In the following description, the board data 111 and the EMC evaluation data 112 received this time from the data acquisition unit 11 are referred to as first learning data, and the board data 111 and the EMC evaluation received in the past stored in the storage unit 13 are referred to. The data 112 may be referred to as second learning data. The board data 111 received this time from the data acquisition unit 11 may be referred to as first board data, and the board data 111 received in the past stored in the storage unit 13 may be referred to as second board data. Similarly, the EMC evaluation data 112 received this time from the data acquisition unit 11 is referred to as first EMC evaluation data, and the previously received EMC evaluation data 112 stored in the storage unit 13 is referred to as second EMC evaluation data. Sometimes referred to.

 ステップS13で分析部12が行う第1の学習用データと第2の学習用データとの比較処理では、第1の学習用データを、第2の学習用データのそれぞれと比較する。なお、第2の学習用データが存在しない場合、すなわち、分析部12がデータ取得部11から初めて第1の学習用データを受け取った場合、分析部12は、比較処理は行わずに、受け取ったデータすなわち基板データ111およびEMC評価データ112を記憶部13に格納する。分析部12の動作の詳細については後述する。 In the comparison process of the first learning data and the second learning data performed by the analysis unit 12 in step S13, the first learning data is compared with each of the second learning data. If the second learning data does not exist, that is, if the analysis unit 12 receives the first learning data from the data acquisition unit 11 for the first time, the analysis unit 12 receives the comparison data without performing the comparison process. The data, that is, the board data 111 and the EMC evaluation data 112 are stored in the storage unit 13. Details of the operation of the analysis unit 12 will be described later.

 分析部12は、学習用データの分析が終了すると、分析結果を記憶部13に格納する(ステップS14)。このとき、分析部12は、データ取得部11から受け取った第1の学習用データも記憶部13に格納する。すなわち、分析部12は、ステップS11およびS12においてデータ取得部11で取得された基板データ111およびEMC評価データ112を、第2の学習用データに追加する。 When the analysis of the learning data is completed, the analysis unit 12 stores the analysis result in the storage unit 13 (step S14). At this time, the analysis unit 12 also stores the first learning data received from the data acquisition unit 11 in the storage unit 13. That is, the analysis unit 12 adds the board data 111 and the EMC evaluation data 112 acquired by the data acquisition unit 11 in steps S11 and S12 to the second learning data.

 つづいて、分析部12の動作の詳細について説明する。図5は、実施の形態1にかかる設計支援装置1の分析部12の動作の一例を示すフローチャートである。図5は、図4に示したステップS13で分析部12が行う動作を示している。 Next, details of the operation of the analysis unit 12 will be described. FIG. 5 is a flowchart showing an example of the operation of the analysis unit 12 of the design support device 1 according to the first exemplary embodiment. FIG. 5 shows the operation performed by the analysis unit 12 in step S13 shown in FIG.

 分析部12は、第1の学習用データを受け取ると、第1の学習用データに含まれる第1の基板データが表す基板に形成される基板パターンである第1の基板パターンと、第2の基板データの1つが表す基板に形成される基板パターンである第2の基板パターンとを比較し、基板パターンの差異点を抽出する(ステップS21)。分析部12は、第1の基板パターンと第2の基板パターンとを比較する際、それぞれの基板パターンの画像を第1の基板データおよび第2の基板データに基づいて生成し、画像同士を比較することで差異点を抽出する。例えば、第1の基板パターンの位置Aに存在するパターンの幅と、第2の基板パターンの位置Aに存在するパターンの幅が異なる場合、位置Aに存在するパターンの幅を差異点として抽出する。また、第1の基板パターンの位置Bに存在するパターンとこれに隣接するパターンとの間隔が、第2の基板パターンの位置Bに存在するパターンとこれに隣接するパターンとの間隔と異なる場合、位置Bに存在するパターンとこれに隣接するパターンとの間隔を差異点として抽出する。分析部12がステップS21で抽出する差異点は複数の場合もある。 When receiving the first learning data, the analysis unit 12 receives the first learning data, the first substrate pattern that is the substrate pattern formed on the substrate represented by the first substrate data included in the first learning data, and the second substrate pattern. The difference between the board patterns is extracted by comparing with the second board pattern, which is the board pattern formed on the board represented by one of the board data (step S21). When comparing the first board pattern and the second board pattern, the analysis unit 12 generates an image of each board pattern based on the first board data and the second board data, and compares the images. By doing so, the difference is extracted. For example, when the width of the pattern existing at the position A of the first substrate pattern and the width of the pattern existing at the position A of the second substrate pattern are different, the width of the pattern existing at the position A is extracted as the difference. .. When the distance between the pattern existing at the position B of the first substrate pattern and the pattern adjacent thereto is different from the distance between the pattern existing at the position B of the second substrate pattern and the pattern adjacent thereto, The interval between the pattern existing at the position B and the pattern adjacent thereto is extracted as a difference point. There may be a plurality of differences that the analysis unit 12 extracts in step S21.

 分析部12は、例えば、図6に示したように、第1の基板パターンに存在するパターンA1とパターンA2の間隔と、第2の基板パターンの対応する位置に存在するパターンA1とパターンA2の間隔とを比較する。図6に示した例の場合、第1の基板パターンに含まれるパターンA1とパターンA2の間隔と、第2の基板パターンに含まれるパターンA1とパターンA2の間隔が異なるため、分析部12は、パターンA1とパターンA2の間隔を差異点と判断し、これを抽出する。また、分析部12は、例えば、図7に示したように、第1の基板パターンに存在するパターンC1と、第2の基板パターンの対応する位置に存在するパターンC1とを比較する。図7に示した例の場合、第1の基板パターンに含まれるパターンC1の幅と第2の基板パターンに含まれるパターンC1の幅が異なるため、分析部12は、パターンC1の幅を差異点と判断する。また、分析部12は、例えば、図8に示したように、第1の基板パターンに存在するパターンC1が第2の基板パターンの対応する位置に存在しない場合、パターンC1の有無を差異点と判断する。 For example, as shown in FIG. 6, the analysis unit 12 detects the distance between the pattern A1 and the pattern A2 existing in the first substrate pattern and the pattern A1 and the pattern A2 existing at the corresponding positions in the second substrate pattern. Compare with the interval. In the case of the example shown in FIG. 6, the interval between the pattern A1 and the pattern A2 included in the first substrate pattern and the interval between the pattern A1 and the pattern A2 included in the second substrate pattern are different. The interval between the pattern A1 and the pattern A2 is determined to be a difference, and this difference is extracted. Further, for example, as shown in FIG. 7, the analysis unit 12 compares the pattern C1 existing in the first substrate pattern with the pattern C1 existing in the corresponding position of the second substrate pattern. In the case of the example shown in FIG. 7, since the width of the pattern C1 included in the first substrate pattern and the width of the pattern C1 included in the second substrate pattern are different, the analysis unit 12 determines the width of the pattern C1 as a difference. To judge. Further, for example, when the pattern C1 existing in the first substrate pattern does not exist in the corresponding position of the second substrate pattern, as shown in FIG. 8, the analyzing unit 12 determines the presence or absence of the pattern C1 as a difference. to decide.

 基板データ111が部品のデータ(以下、部品データと称する)を含む場合、分析部12は、ステップS21において、第1の基板データに含まれる部品データと第2の基板データに含まれる部品データとを比較し、第1の基板データが表す基板に実装される部品と第2の基板データが表す基板に実装される部品との差異点を、上述した基板パターンの差異点と併せて抽出するようにしてもよい。以下の説明では、簡単化のため、分析部12は、基板パターンの差異点を抽出し、第1の基板データが表す基板に実装される部品と第2の基板データが表す基板に実装される部品との差異点の抽出は行わないこととする。 When the board data 111 includes data of parts (hereinafter referred to as “part data”), the analysis unit 12 determines, in step S21, the part data included in the first board data and the part data included in the second board data. And to extract the difference between the component mounted on the substrate represented by the first substrate data and the component mounted on the substrate represented by the second substrate data together with the above-described substrate pattern difference. You can In the following description, for simplification, the analysis unit 12 extracts the difference between the board patterns and mounts the parts mounted on the board represented by the first board data and the board represented by the second board data. Differences from parts will not be extracted.

 なお、これ以降の説明では、分析部12が抽出する基板パターンの差異点のそれぞれを基板要素と称する場合がある。例えば、上述した「パターンA1とパターンA2の間隔」、「パターンC1の幅」、「パターンC1の有無」などが基板要素に該当する。 Note that in the following description, each of the differences in the board patterns extracted by the analysis unit 12 may be referred to as a board element. For example, the above-mentioned “spacing between the pattern A1 and the pattern A2”, “width of the pattern C1”, “presence / absence of the pattern C1” and the like correspond to the substrate element.

 分析部12は、次に、第1の基板パターンに対応する第1のEMC評価データと、第2の基板パターンに対応する第2のEMC評価データとを確認し、ステップS21で抽出した基板パターンの差異点がEMCに影響を与えるか否かを判別する(ステップS22)。分析部12は、第1のEMC評価データが示すEMC評価レベルが、第2のEMC評価データが示すEMC評価レベルと同じ場合、ステップS21で抽出した基板パターンの差異点がEMCに影響を与えないと判断する。一方、第1のEMC評価データが示すEMC評価レベルが、第2のEMC評価データが示すEMC評価レベルと異なる場合、ステップS21で抽出した基板パターンの差異点がEMCに影響を与えると判断する。 Next, the analysis unit 12 confirms the first EMC evaluation data corresponding to the first board pattern and the second EMC evaluation data corresponding to the second board pattern, and the board pattern extracted in step S21. It is determined whether or not the difference of 1 affects the EMC (step S22). When the EMC evaluation level indicated by the first EMC evaluation data is the same as the EMC evaluation level indicated by the second EMC evaluation data, the analysis unit 12 does not affect the EMC by the difference between the board patterns extracted in step S21. To judge. On the other hand, when the EMC evaluation level indicated by the first EMC evaluation data is different from the EMC evaluation level indicated by the second EMC evaluation data, it is determined that the difference between the board patterns extracted in step S21 affects the EMC.

 分析部12は、次に、ステップS22での判別結果に基づいて第1の分析結果を生成する(ステップS23)。図9は、実施の形態1にかかる分析部12が生成する第1の分析結果の一例を示す図である。図9に示した第1の分析結果は、分析部12が、ステップS21において、パターンA1の幅、パターンA1とパターンA2の間隔、および、パターンB5の有無を差異点として抽出し、ステップS22において、差異点がEMCに影響を与えると判断した場合の第1の分析結果の例である。 Next, the analysis unit 12 generates the first analysis result based on the determination result of step S22 (step S23). FIG. 9 is a diagram illustrating an example of a first analysis result generated by the analysis unit 12 according to the first embodiment. In the first analysis result shown in FIG. 9, the analysis unit 12 extracts the width of the pattern A1, the interval between the patterns A1 and A2, and the presence or absence of the pattern B5 as different points in step S21, and in step S22. , Is an example of the first analysis result when it is determined that the difference affects the EMC.

 分析部12は、次に、全ての第2の基板データとの間で第1の分析結果を生成したか否かを確認する(ステップS24)。分析部12は、第1の分析結果を生成していない第2の基板データが存在する場合(ステップS24:No)、第1の分析結果の生成が済んでいない第2の基板データの1つを選択し、選択した第2の基板データを使用して、上述したステップS21~S23を再度実行する。 Next, the analysis unit 12 confirms whether or not the first analysis result has been generated with all the second board data (step S24). If there is second substrate data for which the first analysis result has not been generated (step S24: No), the analysis unit 12 is one of the second substrate data for which the first analysis result has not been generated. Is selected, and the steps S21 to S23 described above are executed again using the selected second board data.

 分析部12は、全ての第2の基板データとの間で第1の分析結果を生成した場合(ステップS24:Yes)、第1の分析結果に基づいて、EMCに影響を与える基板パターンの情報である第2の分析結果を生成する(ステップS25)。ステップS25で使用する第1の分析結果は、例えば図10に示したものとなる。図10は、実施の形態1にかかる分析部12が生成する第1の分析結果の一覧の例を示す図である。図10の番号#1~#7およびこれに続く番号のそれぞれに対応する差異点およびEMCへの影響の有無は、上述したステップS23が実行されるごとに生成され、追加されていく。すなわち、番号#1に対応する差異点およびEMCへの影響の有無は、1回目に実行したステップS23において生成され、番号#2に対応する差異点およびEMCへの影響の有無は、2回目に実行したステップS23において生成される。番号#3以下に対応する差異点およびEMCへの影響の有無についても同様である。 When the analysis unit 12 generates the first analysis result with all the second substrate data (step S24: Yes), the information of the substrate pattern that affects the EMC based on the first analysis result. To generate the second analysis result (step S25). The first analysis result used in step S25 is, for example, the one shown in FIG. FIG. 10 is a diagram showing an example of a list of first analysis results generated by the analysis unit 12 according to the first embodiment. Differences corresponding to the numbers # 1 to # 7 in FIG. 10 and the numbers subsequent thereto and the presence / absence of influence on the EMC are generated and added each time step S23 described above is executed. That is, the difference corresponding to the number # 1 and the presence / absence of influence on the EMC are generated in step S23 executed for the first time, and the difference corresponding to the number # 2 and the presence / absence of influence on the EMC are generated for the second time. It is generated in the executed step S23. The same applies to the differences corresponding to numbers # 3 and below and the presence / absence of influence on EMC.

 ステップS25において、分析部12は、例えば、EMCへの影響の有無が「有り」となっている各差異点については予め定められた点数を加算し、EMCへの影響の有無が「無し」となっている各差異点については点数を加算しないようにして、差異点ごとに、EMCへの影響度を示す点数を算出し、これを第2の分析結果とする。第1の分析結果が図10に示したものである場合、番号が#1,#2,#3,#5,#7,…のそれぞれに対応する差異点がEMCに影響を与えるものとなる。そのため、分析部12は、まず、番号#1の3つの差異点(パターンA1の幅,パターンA1とパターンA2の間隔,パターンB5の有無)のそれぞれについて、例えば、点数1を加算する。分析部12は、次に、番号#2の2つの差異点(パターンA2の幅,パターンA3の幅)のそれぞれについて、点数1を加算する。同様に、番号#3,#5,#7,…の差異点のそれぞれについて、点数1を加算する。この結果、図11に示したような第2の分析結果が生成される。図11に示した第2の分析結果の例では、基板要素の中の「パターンA1とパターンA2の間隔」は、EMCへの影響度を示す点数が「+5」であり、図示した基板要素の中ではEMCへの影響度が最も大きい。また、基板要素の中の「パターンC5とパターンC6の間隔」は、EMCへの影響度を示す点数が「0」であり、EMCへの影響度が小さい。すなわち、「パターンA1とパターンA2の間隔」が変化するとEMCの測定結果が大きく変化し、「パターンC5とパターンC6の間隔」が変化してもEMCの測定結果には大きな変化が見られない。このように、第2の分析結果は、EMCに影響を与える基板要素の情報と、EMCに影響を与えない、または、EMCに与える影響が小さい基板要素の情報とを含む。第2の分析結果に含まれる基板要素のうち、影響度が0よりも大きいものは、EMCの変動要因となる。このように、分析部12は、EMCへの影響の有無が「有り」となっている各差異点について予め定められた点数を加算することにより、EMCの変動要因となる基板要素を特定する。 In step S25, the analysis unit 12 adds, for example, a predetermined score to each difference point having the presence / absence of influence on EMC as “present”, and determines that the presence / absence of influence on EMC is “absence”. For each difference point, the points indicating the degree of influence on EMC are calculated for each difference point without adding the points, and this is used as the second analysis result. When the first analysis result is as shown in FIG. 10, the difference points corresponding to the numbers # 1, # 2, # 3, # 5, # 7, ... Affect the EMC. .. Therefore, the analysis unit 12 first adds, for example, a score of 1 to each of the three difference points of number # 1 (width of pattern A1, distance between pattern A1 and pattern A2, presence / absence of pattern B5). Next, the analysis unit 12 adds a score of 1 to each of the two difference points with the number # 2 (width of the pattern A2, width of the pattern A3). Similarly, a score of 1 is added to each of the differences between the numbers # 3, # 5, # 7, .... As a result, the second analysis result as shown in FIG. 11 is generated. In the example of the second analysis result shown in FIG. 11, the “distance between the pattern A1 and the pattern A2” in the substrate element has a score of “+5” indicating the degree of influence on EMC, and Among them, the degree of influence on EMC is greatest. Further, the "distance between the pattern C5 and the pattern C6" in the substrate element has a score of "0" indicating the degree of influence on EMC, and the degree of influence on EMC is small. That is, when the “space between pattern A1 and pattern A2” changes, the EMC measurement result changes significantly, and even when the “space between pattern C5 and pattern C6” changes, the EMC measurement result does not change significantly. As described above, the second analysis result includes the information of the board element that affects the EMC and the information of the board element that does not affect the EMC or that has a small effect on the EMC. Among the board elements included in the second analysis result, the board elements having a degree of influence greater than 0 are factors that change the EMC. In this way, the analysis unit 12 identifies the board element that becomes the EMC variation factor by adding a predetermined number of points for each difference point with or without the influence on the EMC being “present”.

 第1の基板データが表す第1の基板パターンと第2の基板データの1つが表す第2の基板パターンとを比較したときに差異点として抽出される基板要素が1つの場合、第1の基板データに対応するEMC評価データ112と第2の基板データに対応するEMC評価データ112とを確認することで、抽出された基板要素がEMCに影響を与えるか否かが分かる。しかし、第1の基板データが表す第1の基板パターンと第2の基板データの1つが表す第2の基板パターンとを比較したときに差異点として抽出される基板要素が複数の場合、第1の基板データに対応するEMC評価データ112と第2の基板データに対応するEMC評価データ112とを確認するだけでは、抽出された基板要素のそれぞれがEMCに影響を与えるか否かを判別できない。なぜなら、複数の基板要素の1つだけがEMCに影響を与える可能性もあるし、全ての基板要素がEMCに影響を与える可能性もある。また、複数の基板要素の中に、EMCを良化させるものと、EMCを悪化させるものとが混在している可能性もある。そのため、分析部12は、1つの第1の分析結果に差異点として含まれる基板要素ごとに、EMCへの影響の有無を確認し、影響がある場合は各基板要素について、点数を加算するようにして、EMCへの影響度を算出する。第1の基板パターンと比較する第2の基板パターンの数が増加すると、EMCへの影響度が大きい基板要素についての点数が大きくなり、EMCへの影響度が大きい基板要素が絞り込まれる。 When the first board pattern represented by the first board data and the second board pattern represented by one of the second board data are compared, and one board element is extracted as a difference point, the first board pattern By checking the EMC evaluation data 112 corresponding to the data and the EMC evaluation data 112 corresponding to the second board data, it is possible to know whether or not the extracted board element affects the EMC. However, when the first board pattern represented by the first board data and the second board pattern represented by one of the second board data are compared and a plurality of board elements are extracted as a difference, the first board pattern is extracted. It is not possible to determine whether or not each of the extracted board elements affects the EMC only by checking the EMC evaluation data 112 corresponding to the board data and the EMC evaluation data 112 corresponding to the second board data. Because, only one of the plurality of substrate elements may affect the EMC, or all substrate elements may affect the EMC. Further, it is possible that some of the plurality of substrate elements include one that improves the EMC and one that deteriorates the EMC. Therefore, the analysis unit 12 confirms whether or not there is an influence on the EMC for each substrate element included as a difference in one first analysis result, and if there is an influence, adds a score to each substrate element. Then, the degree of influence on EMC is calculated. When the number of the second substrate patterns to be compared with the first substrate pattern increases, the number of the board elements having a large influence on the EMC increases, and the board elements having a large influence on the EMC are narrowed down.

 つづいて、評価部14の動作の詳細について説明する。図12は、実施の形態1にかかる設計支援装置1の評価部14の動作の一例を示すフローチャートである。図12は、評価部14が新規基板データ121で表される新規基板に形成されるパターンを評価する動作を示している。 Next, details of the operation of the evaluation unit 14 will be described. FIG. 12 is a flowchart showing an example of the operation of the evaluation unit 14 of the design support device 1 according to the first exemplary embodiment. FIG. 12 shows an operation in which the evaluation unit 14 evaluates the pattern formed on the new board represented by the new board data 121.

 新規基板データ121で表される新規基板に形成されるパターンを評価する動作では、まず、データ取得部11が、新規基板データ121を取得する(ステップS31)。 In the operation of evaluating the pattern formed on the new board represented by the new board data 121, first, the data acquisition unit 11 acquires the new board data 121 (step S31).

 次に、評価部14が、EMCに影響を与える基板要素の1つを選択し、選択した基板要素が新規基板に含まれるか否かを確認する(ステップS32)。EMCに影響を与える基板要素は、図11に示した第2の分析結果に含まれる差異点のうち、「影響度」がある一定の値以上のものとする。ステップS32において、評価部14は、新規基板に形成されるパターンに、選択した基板要素が含まれるか否かを確認する。 Next, the evaluation unit 14 selects one of the board elements that affect the EMC and confirms whether the selected board element is included in the new board (step S32). The board element that affects the EMC is one having a certain degree or more of "influence degree" among the difference points included in the second analysis result shown in FIG. In step S32, the evaluation unit 14 confirms whether or not the selected board element is included in the pattern formed on the new board.

 評価部14は、選択した基板要素が新規基板に含まれる場合(ステップS33:Yes)、選択した基板要素がEMCに影響を与える基板要素として記憶する(ステップS34)。その後、評価部14は、EMCに影響を与える全ての基板要素について確認が終了したか否かを確認し(ステップS35)、確認が終了していない場合(ステップS35:No)、ステップS32に戻り、EMCに影響を与える他の基板要素について、上述したステップS32~S34の処理を実行する。 If the selected board element is included in the new board (step S33: Yes), the evaluation unit 14 stores the selected board element as a board element that affects the EMC (step S34). After that, the evaluation unit 14 confirms whether or not the confirmation is completed for all the board elements that affect the EMC (step S35), and when the confirmation is not completed (step S35: No), returns to step S32. , EMC of other board elements are subjected to the processing of steps S32 to S34 described above.

 評価部14は、ステップS33での判定が「No」の場合、ステップS34は実行せずに、ステップS35を実行する。 If the determination in step S33 is “No”, the evaluation unit 14 executes step S35 without executing step S34.

 評価部14は、EMCに影響を与える全ての基板要素について確認が終了した場合(ステップS35:Yes)、新規基板の評価結果を生成して出力する(ステップS36)。ステップS36において、評価部14が出力する新規基板の評価結果の一例を図13に示す。図13に示したように、評価部14は、例えば、EMCに影響を与える可能性がある箇所と影響度とを表にしたものを評価結果として出力する。EMCに影響を与える可能性がある箇所は、EMCの変動要因であり、図11に示した第2の分析結果の基板要素の内容に対応する。新規基板の評価結果に含まれる影響度は、第2の分析結果に含まれる影響度の値を大まかに示す。例えば、第2の分析結果に含まれる影響度の値が第1閾値よりも大きい場合、新規基板の評価結果に含まれる影響度を「大」とし、第2の分析結果に含まれる影響度の値が第2閾値よりも大きく、かつ第1閾値以下の場合、新規基板の評価結果に含まれる影響度を「中」とする。ただし、第2閾値<第1閾値とする。また、第2の分析結果に含まれる影響度の値が0よりも大きく、かつ第2閾値以下の場合、新規基板の評価結果に含まれる影響度を「小」とする。 The evaluation unit 14 generates and outputs the evaluation result of the new board when the confirmation is completed for all the board elements that affect the EMC (step S35: Yes) (step S36). FIG. 13 shows an example of the evaluation result of the new board output by the evaluation unit 14 in step S36. As shown in FIG. 13, for example, the evaluation unit 14 outputs, as an evaluation result, a table showing the locations and the degree of influence that may affect the EMC. A place that may affect the EMC is a variation factor of the EMC and corresponds to the content of the substrate element of the second analysis result shown in FIG. The degree of influence included in the evaluation result of the new substrate roughly indicates the value of the degree of influence included in the second analysis result. For example, when the value of the degree of influence included in the second analysis result is larger than the first threshold value, the degree of influence included in the evaluation result of the new substrate is set to “large”, and the degree of influence included in the second analysis result is set to “large”. When the value is larger than the second threshold and equal to or smaller than the first threshold, the influence degree included in the evaluation result of the new substrate is set to “medium”. However, the second threshold value <the first threshold value. Further, when the value of the degree of influence included in the second analysis result is larger than 0 and is equal to or less than the second threshold value, the degree of influence included in the evaluation result of the new substrate is set to “small”.

 新規基板の評価結果が図13に示したものである場合、設計者は、新規基板データ121で表される新規基板を組み込んだ電子機器のEMC測定の結果が不適合であれば、EMCの対策として、新規基板の設計を変更して「パターンA1とパターンA2の間隔」を調整するのが有効であることが分かる。また、「パターンB1の幅」および「パターンB4の幅」の調整も有効であることが分かる。設計者は、影響度が大きい箇所から順番に調整していくことで、EMCの対策を効率的に進めることが可能となる。 When the evaluation result of the new board is as shown in FIG. 13, the designer, if the result of the EMC measurement of the electronic device incorporating the new board represented by the new board data 121 is non-conforming, as a countermeasure for EMC. It can be seen that it is effective to change the design of the new substrate and adjust the “space between the pattern A1 and the pattern A2”. Further, it can be seen that the adjustment of the “width of the pattern B1” and the “width of the pattern B4” is also effective. The designer can efficiently proceed with the EMC countermeasures by performing adjustment in order from the portion having the greatest influence.

 このように、本実施の形態にかかる設計支援装置1は、基板データ111とこれに対応するEMC評価データ112とを学習用データ110として取得し、取得した学習用データ110と過去に取得済みの学習用データとに基づいて、EMCに影響を与える基板要素の情報を生成して記憶する。EMCに影響を与える基板要素の情報は上述した第2の分析結果に含まれる情報である。また、設計支援装置1は、新規基板データを取得した場合、EMCに影響を与える基板要素の情報に基づいて、新規基板データが表す新規基板に含まれる、EMCに影響を与える基板要素の情報を、新規基板の評価結果として出力する。これにより、新規基板の設計者は、EMCに影響がありそうな基板要素を容易に知ることができ、基板の設計を効率的に行うことが可能となる。 As described above, the design support device 1 according to the present exemplary embodiment acquires the board data 111 and the EMC evaluation data 112 corresponding thereto as the learning data 110, and the acquired learning data 110 and the previously acquired learning data 110. Based on the learning data, the information of the board element that affects the EMC is generated and stored. The information on the board element that affects the EMC is the information included in the above-described second analysis result. Further, when the design support device 1 acquires new board data, the design support apparatus 1 obtains the information of the board element that influences the EMC included in the new board represented by the new board data, based on the information of the board element that affects the EMC. , Is output as the evaluation result of the new substrate. As a result, the designer of the new board can easily know the board elements that are likely to affect the EMC, and can efficiently design the board.

 なお、設計支援装置1のデータ取得部11が取得する基板データ111および新規基板データ121が表す各基板は、多層基板の場合もある。この場合、分析部12は、データ取得部11が新たに取得した基板データ111が表す基板に形成されるパターンと、過去に取得済みの基板データが表す基板に形成されるパターンとを比較する際、中間の層に形成されるパターンについても比較を行う。 Each board represented by the board data 111 and the new board data 121 acquired by the data acquisition unit 11 of the design support device 1 may be a multilayer board. In this case, when the analysis unit 12 compares the pattern formed on the substrate represented by the substrate data 111 newly acquired by the data acquisition unit 11 with the pattern formed on the substrate represented by the previously acquired substrate data. The patterns formed in the intermediate layers are also compared.

実施の形態2.
 実施の形態2にかかる設計支援装置について説明する。実施の形態2にかかる設計支援装置の構成は、実施の形態1にかかる設計支援装置1と同様である(図1参照)。
Embodiment 2.
The design support apparatus according to the second embodiment will be described. The configuration of the design support device according to the second embodiment is the same as that of the design support device 1 according to the first embodiment (see FIG. 1).

 本実施の形態にかかる設定支援装置は、分析部12および評価部14の動作が実施の形態1にかかる設計支援装置1と異なる。そのため、分析部12および評価部14の動作について説明を行い、実施の形態1と同様の箇所については説明を省略する。 The operation of the analysis unit 12 and the evaluation unit 14 of the setting support device according to the present embodiment is different from that of the design support device 1 according to the first embodiment. Therefore, the operations of the analysis unit 12 and the evaluation unit 14 will be described, and the description of the same parts as those in the first embodiment will be omitted.

 図14は、実施の形態2にかかる設計支援装置1の分析部12の動作の一例を示すフローチャートである。図14に示したフローチャートは、図5に示したフローチャートのステップS22、S23およびS25をステップS22a、S23aおよびS25aに置き換えたものである。図14に示したステップS21およびS24の各処理は、図5に示したステップS21およびS24の各処理と同様であるため、説明を省略する。 FIG. 14 is a flowchart showing an example of the operation of the analysis unit 12 of the design support device 1 according to the second exemplary embodiment. The flowchart shown in FIG. 14 is obtained by replacing steps S22, S23 and S25 of the flowchart shown in FIG. 5 with steps S22a, S23a and S25a. Since each processing of steps S21 and S24 shown in FIG. 14 is the same as each processing of steps S21 and S24 shown in FIG. 5, description thereof will be omitted.

 ステップS21を実行後、実施の形態2にかかる分析部12は、第1の基板パターンに対応する第1のEMC評価データと、第2の基板パターンに対応する第2のEMC評価データとを確認し、ステップS21で比較した2つの基板パターンの違い、すなわち、第1の基板パターンと第2の基板パターンとの違いがEMCに与える影響を特定する(ステップS22a)。分析部12は、第1のEMC評価データが示すEMC評価レベルが、第2のEMC評価データが示すEMC評価レベルと異なる場合、ステップS21で抽出した基板パターンの差異点が、具体的にどのように異なるのかを確認し、EMCに与える影響の内容を特定する。例えば、第1の基板パターンに含まれるパターンB1の幅が、第2の基板パターンに含まれるパターンB1の幅よりも広く、かつ、第1の基板パターンに含まれるパターンC1とパターンC2の間隔が、第2の基板パターンに含まれるパターンC1とパターンC2の間隔よりも広く、かつ、第1のEMC評価データが示すEMC評価レベルが、第2のEMC評価データが示すEMC評価レベルよりも良好な場合、分析部12は、パターンB1の幅が広くなり、かつ、パターンC1とパターンC2の間隔が広くなるとEMC評価レベルが良化すると判断する。第1の基板パターンと第2の基板パターンとの差異点が2つの場合について説明したが、差異点が1つまたは3つ以上の場合も同様である。また、分析部12は、第1のEMC評価データが示すEMC評価レベルと、第2のEMC評価データが示すEMC評価レベルが同じ場合、ステップS21で比較した2つの基板パターンの違いがEMCに影響を与えないと判断する。 After executing step S21, the analysis unit 12 according to the second embodiment confirms the first EMC evaluation data corresponding to the first substrate pattern and the second EMC evaluation data corresponding to the second substrate pattern. Then, the influence of the difference between the two substrate patterns compared in step S21, that is, the difference between the first substrate pattern and the second substrate pattern on the EMC is specified (step S22a). When the EMC evaluation level indicated by the first EMC evaluation data is different from the EMC evaluation level indicated by the second EMC evaluation data, the analysis unit 12 specifically describes the difference between the board patterns extracted in step S21. To determine the content of the impact on EMC. For example, the width of the pattern B1 included in the first substrate pattern is wider than the width of the pattern B1 included in the second substrate pattern, and the interval between the patterns C1 and C2 included in the first substrate pattern is , Wider than the interval between the patterns C1 and C2 included in the second substrate pattern, and the EMC evaluation level indicated by the first EMC evaluation data is better than the EMC evaluation level indicated by the second EMC evaluation data. In this case, the analysis unit 12 determines that the EMC evaluation level is improved when the width of the pattern B1 is wide and the interval between the pattern C1 and the pattern C2 is wide. The case where there are two differences between the first substrate pattern and the second substrate pattern has been described, but the same applies to the case where there are one or three or more differences. Further, when the EMC evaluation level indicated by the first EMC evaluation data and the EMC evaluation level indicated by the second EMC evaluation data are the same, the analysis unit 12 affects the EMC by the difference between the two board patterns compared in step S21. Judge not to give.

 ステップS22aを実行後、実施の形態2にかかる分析部12は、ステップS22aでの処理結果、すなわち、ステップS21で比較した2つの基板パターンの違いがEMCに与える影響の内容を示す第1の分析結果を生成する(ステップS23a)。ステップS23aにおいて、分析部12は、図15に例示した内容の第1の分析結果を生成する。図15は、実施の形態2にかかる分析部12が生成する第1の分析結果の一例を示す図である。図15に示した「差異点」は、基板パターンがどのように変化するのか示す。また「EMCの変化」は、「差異点」に示した変化が基板パターンに生じたときにEMCがどのように変化するのかを示す。 After executing step S22a, the analysis unit 12 according to the second embodiment performs the first analysis showing the processing result of step S22a, that is, the content of the influence of the difference between the two substrate patterns compared in step S21 on the EMC. A result is generated (step S23a). In step S23a, the analysis part 12 produces | generates the 1st analysis result of the content illustrated in FIG. FIG. 15 is a diagram illustrating an example of the first analysis result generated by the analysis unit 12 according to the second embodiment. The "difference" shown in FIG. 15 shows how the substrate pattern changes. Further, “change of EMC” indicates how the EMC changes when the change shown in the “difference point” occurs in the substrate pattern.

 実施の形態2にかかる分析部12は、全ての第2の基板データとの間で第1の分析結果を生成した場合(ステップS24:Yes)、図14に示したステップS21、S22aおよびS23aを繰り返し実行して生成した複数の第1の分析結果を用いた比較処理を行い、比較結果に基づいて第2の分析結果を生成する(ステップS25a)。ステップS25aで使用する第1の分析結果は、例えば図16に示したものとなる。図16は、実施の形態2にかかる分析部12が生成する第1の分析結果の一覧の例を示す図である。図16の番号#1~#7およびこれに続く番号のそれぞれに対応する「差異点」および「EMCの変化」は、上述したステップS23aが実行されるごとに生成され、追加されていく。すなわち、番号#1に対応する差異点およびEMCへの影響の有無は、1回目に実行したステップS23aにおいて生成され、番号#2に対応する差異点およびEMCへの影響の有無は、2回目に実行したステップS23aにおいて生成される。番号#3以下に対応する差異点およびEMCへの影響の有無についても同様である。 When the analysis unit 12 according to the second embodiment generates the first analysis result with all the second substrate data (step S24: Yes), the analysis unit 12 performs steps S21, S22a, and S23a shown in FIG. A comparison process is performed using a plurality of first analysis results generated by repeated execution, and a second analysis result is generated based on the comparison results (step S25a). The first analysis result used in step S25a is as shown in FIG. 16, for example. FIG. 16 is a diagram showing an example of a list of first analysis results generated by the analysis unit 12 according to the second embodiment. The "differences" and "EMC changes" corresponding to the numbers # 1 to # 7 and the numbers following this in FIG. 16 are generated and added each time the above-described step S23a is executed. That is, the difference corresponding to the number # 1 and the presence / absence of influence on the EMC are generated in step S23a executed for the first time, and the difference corresponding to the number # 2 and the presence / absence of influence on the EMC are generated for the second time. It is generated in the executed step S23a. The same applies to the differences corresponding to numbers # 3 and below and the presence / absence of influence on EMC.

 図16に例示した第1の分析結果の一覧に含まれる第1の分析結果の各々は、1つ以上の差異点がどのように変化した場合にEMCがどのように変化するのかを表している。例えば、番号#1の第1の分析結果は、(a)パターンA1の幅が拡大し、かつ、(b)パターンA1とパターンA2の間隔が拡大し、かつ、(c)パターンB5が無くなった場合に、EMCが良化することを示している。しかし、これだけでは、上記(a)~(c)の中のどの変化がEMCの良化に寄与するのかが分からない。これに対して、番号#6の第1の分析結果は、パターンA1とパターンA2の間隔が拡大し、かつ、パターンB5が無くなった場合はEMCが変化しないことを示している。すなわち、番号#6の第1の分析結果は、上記(b)および(c)の変化が生じてもEMCは変化しないことを示している。そのため、番号#1の第1の分析結果と番号#6の第1の分析結果とを比較することにより、上記(a)に示す変化が生じた場合、すなわち、パターンA1の幅が拡大した場合にEMCが良化することが分かる。このように、各番号の第1の分析結果同士を比較していくことにより、1つの差異点がEMCにどのような影響を与えるのかを特定できる。そのため、分析部12は、上記のステップS23aを実行して生成した第1の分析結果同士を比較することにより、基板の差異点のそれぞれについて、差異点がEMCにどのような影響を与えるのかを特定し、特定した結果を示す第2の分析結果を生成する。なお、1つの差異点がEMCに与える影響には、EMCが変化しない場合、すなわち、差異点がEMCに影響を与えない場合も含まれる。2つの第1の分析結果を比較して1つの差異点がEMCにどのような影響を与えるのかを特定する場合について説明したが、分析部12は、3つ以上の第1の分析結果を比較することで1つの差異点がEMCにどのような影響を与えるのかを特定する場合もある。また、分析部12は、1つの差異点がEMCにどのような影響を与えるのかを特定した結果を、1つ以上の第1の分析結果と比較することにより、他の1つの差異点がEMCにどのような影響を与えるのかを特定する場合もある。 Each of the first analysis results included in the list of first analysis results illustrated in FIG. 16 represents how the EMC changes when one or more difference points change. .. For example, in the first analysis result of the number # 1, (a) the width of the pattern A1 is expanded, (b) the interval between the pattern A1 and the pattern A2 is expanded, and (c) the pattern B5 is eliminated. In some cases, the EMC is improved. However, this alone does not reveal which of the above changes (a) to (c) contributes to the improvement of EMC. On the other hand, the first analysis result of the number # 6 shows that the EMC does not change when the interval between the pattern A1 and the pattern A2 increases and the pattern B5 disappears. That is, the first analysis result of the number # 6 shows that the EMC does not change even if the changes of the above (b) and (c) occur. Therefore, by comparing the first analysis result of number # 1 and the first analysis result of number # 6, when the change shown in (a) above occurs, that is, when the width of the pattern A1 is expanded. It can be seen that the EMC is improved. As described above, by comparing the first analysis results of the respective numbers, it is possible to specify how one difference affects EMC. Therefore, the analysis unit 12 compares the first analysis results generated by executing the above-described step S23a with each other to determine how each difference between the substrates affects the EMC. A second analysis result indicating the identified result is generated. Note that the influence of one difference on the EMC includes the case where the EMC does not change, that is, the case where the difference does not affect the EMC. The case where the two first analysis results are compared to identify how one difference affects the EMC has been described, but the analysis unit 12 compares three or more first analysis results. By doing so, it may be possible to specify how one difference affects EMC. In addition, the analysis unit 12 compares the result of identifying how one difference affects the EMC with one or more first analysis results so that the other difference is EMC. In some cases, the impact on

 図17は、実施の形態2にかかる分析部12が生成する第2の分析結果の一例を示す図である。図17に示した第2の分析結果は、基板要素と、影響の有無と、影響の内容とを含む。分析部12は、2つ以上の第1の分析結果を用いた比較処理を行い、1つの差異点がEMCに与える影響、すなわち、1つの基板要素が変化した場合にEMCがどのような影響を受けるのか、または、EMCが影響を受けないのかを特定するごとに、第2の分析結果を更新する。 FIG. 17 is a diagram showing an example of the second analysis result generated by the analysis unit 12 according to the second embodiment. The second analysis result shown in FIG. 17 includes the board element, the presence / absence of the influence, and the content of the influence. The analysis unit 12 performs a comparison process using two or more first analysis results, and the effect of one difference on the EMC, that is, the effect of the EMC when one substrate element changes. The second analysis result is updated each time it is determined whether or not the EMC is not affected.

 実施の形態2にかかる評価部14は、図12に示したフローチャートに従い動作を行うが、ステップS32では、図17に示した内容の第2の分析結果を使用して処理を行う。すなわち、評価部14は、ステップS32において、図17に示した「影響の有無」の項目が「有り」の基板要素の1つを選択し、選択した基板要素が新規基板に形成されるパターンに含まれるか否かを確認する。また、評価部14は、ステップS36において、図13に示した新規基板の評価結果の代わりに、図13に示した新規基板の評価結果の「影響度」を「影響の内容」に変更したものを出力する。実施の形態2にかかる評価部14が出力する新規基板の評価結果に含まれる「影響の内容」は、図17に示した第2の分析結果に含まれる「影響の内容」と同じものとする。 The evaluation unit 14 according to the second embodiment operates according to the flowchart shown in FIG. 12, but in step S32, the processing is performed using the second analysis result having the content shown in FIG. That is, in step S32, the evaluation unit 14 selects one of the substrate elements whose “presence or absence of influence” item “present” shown in FIG. 17 is “present”, and the selected substrate element is formed into a pattern to be formed on a new substrate. Check if it is included. Further, in step S36, the evaluation unit 14 changes the "impact degree" of the evaluation result of the new board shown in FIG. 13 to "content of influence" instead of the evaluation result of the new board shown in FIG. Is output. The “content of influence” included in the evaluation result of the new board output by the evaluation unit 14 according to the second embodiment is the same as the “content of influence” included in the second analysis result shown in FIG. ..

 このように、本実施の形態にかかる設計支援装置1において、分析部12は、学習用データに基づいて、1つの基板要素の変化がEMCに与える影響の内容を示す情報を生成する。1つの基板要素の変化がEMCに与える影響の内容を示す情報は上述した第2の分析結果である。また、評価部14は、新規基板データを取得した場合、1つの基板要素の変化がEMCに与える影響の内容を示す情報に基づいて、新規基板データが表す新規基板に含まれる基板要素のそれぞれがEMCに与える影響の情報を、新規基板の評価結果として出力する。これにより、新規基板の設計者は、EMCの対策が必要な場合にどの基板要素をどのように変更すればよいかを知ることができ、基板の設計を効率的に行うことが可能となる。 As described above, in the design support device 1 according to the present embodiment, the analysis unit 12 generates information indicating the content of the influence of the change of one board element on the EMC based on the learning data. The information indicating the effect of the change of one board element on the EMC is the second analysis result described above. In addition, when the evaluation unit 14 acquires new board data, each of the board elements included in the new board represented by the new board data is based on the information indicating the influence of the change of one board element on the EMC. Information on the influence on EMC is output as the evaluation result of the new substrate. As a result, the designer of the new board can know which board element should be changed and how when the EMC countermeasure is required, and the board can be efficiently designed.

実施の形態3.
 図18は、実施の形態3にかかる設計支援装置の構成例を示す図である。実施の形態3にかかる設計支援装置1aは、実施の形態1および2で説明した設計支援装置1の分析部12および評価部14を分析部12aおよび評価部14aに置き換え、さらに、対策案生成部15を追加した構成となる。分析部12a、評価部14aおよび対策案生成部15以外の各構成要素の動作は実施の形態1および2と同様であるため、説明を省略する。なお、データ取得部11、分析部12aおよび記憶部13は、実施の形態3にかかる機械学習装置20aを構成する。分析部12aは、機械学習装置20aの学習部として動作する。
Embodiment 3.
FIG. 18 is a diagram illustrating a configuration example of the design support device according to the third embodiment. The design support device 1a according to the third embodiment replaces the analysis unit 12 and the evaluation unit 14 of the design support device 1 described in the first and second embodiments with an analysis unit 12a and an evaluation unit 14a, and further, a countermeasure plan generation unit. The configuration has 15 added. The operation of each component other than the analysis unit 12a, the evaluation unit 14a, and the countermeasure plan generation unit 15 is similar to that of the first and second embodiments, and thus the description thereof is omitted. The data acquisition unit 11, the analysis unit 12a, and the storage unit 13 configure the machine learning device 20a according to the third embodiment. The analysis unit 12a operates as a learning unit of the machine learning device 20a.

 分析部12aは、実施の形態1にかかる分析部12が行う処理と、実施の形態2にかかる分析部12が行う処理とを行い、実施の形態1で説明した第2の分析結果(図11参照)と、実施の形態2で説明した第2の分析結果(図17参照)とをマージした構成の第2の分析結果を生成する。具体的には、分析部12aは、図11に示した実施の形態1にかかる第2の分析結果に含まれる「基板要素」および「影響度」と、図17に示した実施の形態2にかかる第2の分析結果に含まれる「影響の有無」および「影響の内容」とを含む構成の第2の分析結果を生成する。図19は、実施の形態3にかかる設計支援装置1aの分析部12aが生成する第2の分析結果の一例を示す図である。なお、「影響の有無」は「影響度」から知ることができるため、分析部12aが生成する第2の分析結果は「影響の有無」を含まなくても構わない。 The analysis unit 12a performs the process performed by the analysis unit 12 according to the first embodiment and the process performed by the analysis unit 12 according to the second embodiment, and the second analysis result described in the first embodiment (see FIG. 11). (Refer to FIG. 17) and the second analysis result described in Embodiment 2 (see FIG. 17) are merged to generate a second analysis result. Specifically, the analysis unit 12a uses the “board element” and the “impact degree” included in the second analysis result according to the first embodiment shown in FIG. 11 and the second embodiment shown in FIG. A second analysis result having a configuration including “presence or absence of influence” and “content of influence” included in the second analysis result is generated. FIG. 19 is a diagram illustrating an example of the second analysis result generated by the analysis unit 12a of the design support device 1a according to the third embodiment. Since the “presence or absence of influence” can be known from the “degree of influence”, the second analysis result generated by the analysis unit 12a does not need to include “presence or absence of influence”.

 評価部14aは、実施の形態1にかかる評価部14と同様に、図12に示したフローチャートのステップS31~S35の処理を行い、ステップS35で「Yes」と判定した場合、新規基板に形成されるパターンに含まれる、EMCに影響を与える基板要素の情報を対策案生成部15に出力する。なお、評価部14aは、ステップS35で「Yes」と判定した場合にEMCに影響を与える基板要素の情報を出力するのではなく、ステップS33で「Yes」と判定した場合に実行するステップS34において、EMCに影響を与える基板要素の情報を対策案生成部15に出力するようにしてもよい。この場合、評価部14aは、ステップS35で「Yes」と判定すると、EMCに影響を与える基板要素の情報の出力が完了したことを対策案生成部15に通知する。 Similar to the evaluation unit 14 according to the first exemplary embodiment, the evaluation unit 14a performs the processes of steps S31 to S35 of the flowchart illustrated in FIG. 12, and if “Yes” is determined in step S35, the evaluation unit 14a is formed on the new substrate. The information on the board element that influences the EMC included in the pattern is output to the countermeasure plan generating unit 15. It should be noted that the evaluation unit 14a does not output the information of the board element that influences the EMC when it is determined to be “Yes” in step S35, but is executed in step S34 when it is determined to be “Yes” in step S33. , Information about the board element that affects the EMC may be output to the countermeasure plan generating unit 15. In this case, when the evaluation unit 14a determines “Yes” in step S35, the evaluation unit 14a notifies the countermeasure plan generation unit 15 that the output of the information on the board element that affects the EMC has been completed.

 対策案生成部15は、評価部14aから受け取った情報と、記憶部13が保持している第2の分析結果とに基づいて、新規基板のEMCを改善するための対策案132を生成して出力する。例えば、評価部14aは、評価部14aから受け取った情報が示す基板要素のうち、図19に示した第2の分析結果に含まれる「影響度」の値が大きい上位N個(Nは1以上の整数)の基板要素を選択し、選択した基板要素に対応する「影響の内容」に基づいて対策案132を生成する。一例として、「影響度」の値が大きい上位1個の基板要素を選択する場合、対策案生成部15は、「パターンA1とパターンA2の間隔」を選択し、この基板要素では間隔が狭くなるとEMCが悪化することから、パターンA1とパターンA2の間隔を広げる変更内容を示す情報を生成し、対策案132として出力する。 The countermeasure plan generation unit 15 generates a countermeasure plan 132 for improving the EMC of the new substrate based on the information received from the evaluation unit 14a and the second analysis result stored in the storage unit 13. Output. For example, the evaluation unit 14a may include the top N pieces (N is 1 or more) having a large value of “influence degree” included in the second analysis result illustrated in FIG. 19 among the board elements indicated by the information received from the evaluation unit 14a. (Integer of), and the countermeasure plan 132 is generated based on the “content of influence” corresponding to the selected substrate element. As an example, when selecting the upper one board element having a large value of the “impact degree”, the countermeasure plan generation unit 15 selects “the interval between the pattern A1 and the pattern A2”, and the interval becomes narrow in this board element. Since the EMC is deteriorated, information indicating a change content that widens the interval between the pattern A1 and the pattern A2 is generated and output as the countermeasure plan 132.

 対策案生成部15は、上記の対策案132を生成する処理で選択する基板要素の数Nを、基板要素のEMCへの影響度に基づいて決定してもよい。例えば、対策案生成部15は、評価部14aから受け取った情報が示す基板要素の中に、第2の分析結果に含まれる「影響度」の値が予め定められた閾値よりも大きなものが存在する場合、上記Nの値を第1の数に決定する。また、対策案生成部15は、評価部14aから受け取った情報が示す基板要素の中に、第2の分析結果に含まれる「影響度」の値が予め定められた閾値よりも大きなものが存在しない場合、上記Nの値を上記第1の数よりも大きい第2の数に決定する。影響度の値が閾値よりも大きいものが存在する場合、影響度が最も大きいものから順番に、いくつかの箇所について対策を行えばEMCが改善すると考えられる。一方、影響度の値が閾値よりも大きいものが存在しない場合、EMCを改善するためにはより多くの箇所への対策が必要となる可能性がある。そのため、この例では、第1の数よりも第2の数を大きくしている。 The countermeasure plan generation unit 15 may determine the number N of board elements selected in the process of generating the countermeasure plan 132 based on the degree of influence of the board elements on the EMC. For example, in the countermeasure plan generating unit 15, there is a substrate element indicated by the information received from the evaluating unit 14a, in which the value of the “impact degree” included in the second analysis result is larger than a predetermined threshold value. If so, the value of N is determined as the first number. In addition, the countermeasure plan generating unit 15 includes, among the board elements indicated by the information received from the evaluating unit 14a, a board element whose “impact degree” included in the second analysis result is larger than a predetermined threshold value. If not, the value of N is determined to be a second number larger than the first number. When there is an impact value greater than the threshold value, it is considered that the EMC is improved by taking measures at some locations in order from the greatest impact value. On the other hand, if there is no one whose influence level value is larger than the threshold value, it may be necessary to take measures to more places in order to improve the EMC. Therefore, in this example, the second number is made larger than the first number.

 なお、本実施の形態では、対策案生成部15が対策案132を生成する構成としたが、対策案生成部15を削除し、対策案生成部15の代わりに評価部14aが対策案132を生成する構成としてもよい。 In the present embodiment, the countermeasure plan generating unit 15 is configured to generate the countermeasure plan 132, but the countermeasure plan generating unit 15 is deleted, and instead of the countermeasure plan generating unit 15, the evaluation unit 14a generates the countermeasure plan 132. It may be configured to generate.

 このように、本実施の形態にかかる設計支援装置1aにおいて、分析部12aは、実施の形態2で説明した分析部12と同様に、学習用データに基づいて、1つの基板要素の変化がEMCに与える影響の内容を示す情報を生成する。また、評価部14aは、新規基板データを取得した場合、新規基板データが表す新規基板に含まれる、EMCに影響を与える基板要素を抽出し、対策案生成部15は、抽出された基板要素と、1つの基板要素の変化がEMCに与える影響の内容を示す情報とに基づいて、新規基板のEMCを改善するための対策案を生成する。また、EMCに対する影響度が大きい基板要素を選択し、選択した基板要素についての対策案を生成する。これにより、新規基板の設計者は、EMCの対策が必要な場合に、影響度の大きい基板要素をどのように変更すればよいかを知ることができ、基板の設計を効率的に行うことが可能となる。 As described above, in the design support device 1a according to the present embodiment, the analysis unit 12a changes the EMC of one board element based on the learning data, as in the analysis unit 12 described in the second embodiment. The information which shows the content of the influence on is generated. Further, when acquiring the new board data, the evaluation unit 14a extracts the board element included in the new board represented by the new board data, which influences the EMC, and the countermeasure plan generation unit 15 extracts the extracted board element. A measure for improving the EMC of the new substrate is generated based on the information indicating the content of the influence of the change of one substrate element on the EMC. Also, a board element having a large influence on EMC is selected, and a countermeasure plan for the selected board element is generated. This allows the designer of the new board to know how to change the board element having a large influence when the EMC countermeasure is necessary, and to efficiently design the board. It will be possible.

実施の形態4.
 図20は、実施の形態4にかかる設計支援装置の構成例を示す図である。実施の形態4にかかる設計支援装置1bは、実施の形態1および2で説明した設計支援装置1の分析部12を分析部12aに置き換え、さらに、設計ルール生成部16を追加した構成となる。分析部12aおよび設計ルール生成部16以外の各構成要素の動作は実施の形態1および2と同様であるため、説明を省略する。また、本実施の形態にかかる設計支援装置1bの分析部12aは、実施の形態3にかかる設計支援装置1aの分析部12aと同様であるため、説明を省略する。
Fourth Embodiment
FIG. 20 is a diagram illustrating a configuration example of the design support device according to the fourth embodiment. The design support device 1b according to the fourth embodiment has a configuration in which the analysis unit 12 of the design support device 1 described in the first and second embodiments is replaced with an analysis unit 12a, and a design rule generation unit 16 is added. The operation of each component other than the analysis unit 12a and the design rule generation unit 16 is the same as in the first and second embodiments, and thus the description thereof is omitted. Further, the analysis unit 12a of the design support device 1b according to the present embodiment is the same as the analysis unit 12a of the design support device 1a according to the third embodiment, so description thereof will be omitted.

 設計ルール生成部16は、例えば、予め定められた条件を満たした場合、記憶部13で保持されている第2の分析結果に基づいて、基板パターンの設計ルール133を生成し、出力する。基板パターンの設計ルール133の出力は、設計ルールを示すデータを生成してファイルとして出力する形で行ってもよいし、図示を省略した表示装置に設計ルールを表示させる形で行ってもよい。上記の予め定められた条件としては、例えば、新規基板の設計者などであるユーザから、設計ルールの生成開始を指示する操作を受け付けた場合が該当する。また、設計支援装置1bが学習用データ110を受け取り、これに伴い分析部12aが処理を行い記憶部13で保持している第2の分析結果が更新された場合、設計ルール生成部16は、予め定められた条件を満たしたと判断してもよい。 The design rule generation unit 16 generates and outputs the board pattern design rule 133 based on the second analysis result held in the storage unit 13 when a predetermined condition is satisfied, for example. The board pattern design rule 133 may be output by generating data indicating the design rule and outputting it as a file, or by displaying the design rule on a display device (not shown). The above-mentioned predetermined condition corresponds to, for example, the case where an operation for instructing the start of design rule generation is received from a user who is a designer of a new board. Further, when the design support device 1b receives the learning data 110 and the analysis unit 12a performs the processing and the second analysis result held in the storage unit 13 is updated accordingly, the design rule generation unit 16 It may be determined that the predetermined condition is satisfied.

 設計ルール生成部16は、例えば、第2の分析結果に含まれる「基板要素」のうち、「影響度」の値が予め定められた閾値以上の基板要素を選択し、選択した基板要素に対応する「影響の内容」に基づいて、基板パターンの設計ルール133を生成する。第2の分析結果が図19に示したものであり、上記の閾値が「+2」である場合、設計ルール生成部16は、基板要素の中の「パターンA1の幅」と、「パターンA1とパターンA2の間隔」と、「パターンA2の幅」とを選択し、選択した各基板要素がEMCに与える影響の内容に基づいて、「パターンA1の幅およびパターンA2の幅を狭くし、パターンA1とパターンA2の間隔を広くする」という内容を表す設計ルールを生成し、基板パターンの設計ルール133として出力する。 The design rule generation unit 16 selects, for example, a board element having a value of “influence degree” equal to or greater than a predetermined threshold value from “board elements” included in the second analysis result, and corresponds to the selected board element. Based on the “content of influence”, the board pattern design rule 133 is generated. If the second analysis result is shown in FIG. 19 and the threshold value is “+2”, the design rule generation unit 16 causes the “width of the pattern A1” and the “pattern A1 The "interval of the pattern A2" and the "width of the pattern A2" are selected, and the "width of the pattern A1 and the width of the pattern A2 are narrowed and the width of the pattern A1 is reduced based on the content of influence of each selected substrate element on the EMC. And the pattern A2 is widened, a design rule is generated and output as a board pattern design rule 133.

 なお、本実施の形態では、実施の形態1および2で説明した設計支援装置1に対して設計ルール生成部16を追加し、分析部12を分析部12aに置き換えた構成について説明したがこれに限定されない。実施の形態3で説明した設計支援装置1aに対して設計ルール生成部16を追加した構成としてもよい。 In addition, in the present embodiment, the configuration in which the design rule generation unit 16 is added to the design support device 1 described in the first and second embodiments and the analysis unit 12 is replaced with the analysis unit 12a has been described. Not limited. The configuration may be such that the design rule generation unit 16 is added to the design support device 1a described in the third embodiment.

 このように、本実施の形態にかかる設計支援装置1bは、実施の形態3で説明した第2の分析結果に基づいて基板パターンの設計ルールを生成する設計ルール生成部16を備える。これにより、基板の設計者は、基板を新たに設計する際に、基板パターンの設計ルール133を確認し、EMCへの影響を考慮しながら設計を進めることができるようになる。その結果、EMCの対策のために改造を行う回数が抑制され、基板設計を効率的に行うことが可能となる。 As described above, the design support device 1b according to the present embodiment includes the design rule generation unit 16 that generates the board pattern design rule based on the second analysis result described in the third embodiment. This allows the board designer to confirm the board pattern design rule 133 when newly designing the board and proceed with the design while considering the influence on the EMC. As a result, the number of times of remodeling for EMC countermeasures is suppressed, and board design can be efficiently performed.

 上記の各実施の形態では、分析部(分析部12および12a)が、EMCに影響を与えるパターンを学習する際に、基板に形成されるパターン同士を比較することとしたが、パターン同士の比較に加えて、基板に実装される部品同士の比較を行うようにしてもよい。部品同士を比較する場合、分析部は、部品データを使用し、比較する各基板の同じ場所に配置されている部品が異なる場合、部品の違いを差異点として抽出する。パターンの違いに加えて部品の違いについても差異点として抽出することにより、EMCの対策を行う際に、部品の変更も選択肢とすることができ、より柔軟な対策を採ることが可能となる。 In each of the above-described embodiments, when the analysis unit (analysis units 12 and 12a) learns the patterns that affect the EMC, the patterns formed on the substrate are compared with each other. In addition, the components mounted on the board may be compared with each other. When comparing components, the analysis unit uses the component data, and when the components arranged at the same location on each board to be compared are different, the difference between the components is extracted as a difference point. By extracting not only the difference in the pattern but also the difference in the parts as the difference point, the change of the parts can be made an option when the EMC countermeasure is taken, and a more flexible countermeasure can be taken.

 上述した各実施の形態では、基板データ111およびEMC評価データ112を用いて機械学習を行い、EMCに影響を与えるパターンを学習する、すなわち、EMCに影響を与えるパターンの情報を更新することとした。しかし、学習に用いるデータはこれに限定されない。例えば、上述した基板データ111およびEMC評価データ112に加えて、回路図データを用いるようにしてもよい。 In each of the above-described embodiments, machine learning is performed using the board data 111 and the EMC evaluation data 112 to learn the pattern affecting the EMC, that is, the information of the pattern affecting the EMC is updated. .. However, the data used for learning is not limited to this. For example, circuit diagram data may be used in addition to the board data 111 and the EMC evaluation data 112 described above.

 回路図データを用いる場合、各実施の形態で説明した分析部(分析部12および12a)は、2つの基板のそれぞれに形成される基板パターンを比較する際に、まず、各基板に対応する回路図データを確認し、基板のどの領域に、どの機能に関わるパターンが形成されているかを特定する。ここでの機能の例は、電源機能、通信機能、制御機能といった機能が該当する。すなわち、分析部は、電源回路のパターン、通信回路のパターン、制御回路のパターンなど、各機能を実現するパターンが基板のどの領域に形成されているのかを、回路図データを確認して特定する。その後、分析部は、各機能を実現するパターンが形成されている領域ごとに、パターンを比較して差異点を抽出する。例えば、基板の第1の領域に電源回路のパターンが形成され、基板の第2の領域に通信回路が形成され、基板の第3の領域に制御回路が形成されている場合、分析部は、2つの基板のそれぞれの第1の領域に形成されているパターン同士を比較して差異点を抽出する処理と、2つの基板のそれぞれの第2の領域に形成されているパターン同士を比較して差異点を抽出する処理と、2つの基板のそれぞれの第3の領域に形成されているパターン同士を比較して差異点を抽出する処理と、を実行し、差異点の抽出が完了すると、上述した第1の分析結果を生成する。 When using the circuit diagram data, the analysis unit (analysis units 12 and 12a) described in each embodiment first compares the circuit patterns corresponding to the respective substrates when comparing the substrate patterns formed on the two substrates. By confirming the drawing data, it is specified in which area of the substrate the pattern relating to which function is formed. Examples of the functions here include functions such as a power supply function, a communication function, and a control function. That is, the analysis unit confirms the circuit diagram data to identify in which area of the substrate the pattern that implements each function, such as the pattern of the power supply circuit, the pattern of the communication circuit, the pattern of the control circuit, is formed. .. After that, the analysis unit compares the patterns and extracts the differences for each region in which the patterns that realize the respective functions are formed. For example, when the pattern of the power supply circuit is formed in the first region of the substrate, the communication circuit is formed in the second region of the substrate, and the control circuit is formed in the third region of the substrate, the analysis unit By comparing the patterns formed in the first regions of the two substrates and extracting the differences, the patterns formed in the second regions of the two substrates are compared. When the process of extracting the difference point and the process of comparing the patterns formed in the respective third regions of the two substrates with each other to extract the difference point are performed and the extraction of the difference point is completed, The first analysis result obtained is generated.

 また、回路図データを用いる場合、各実施の形態で説明した分析部は、各機能を実現するパターンが形成されている領域ごとに、第1の分析結果の生成および第2の分析結果の生成を行ってもよい。例えば、1つの基板に電源回路のパターン、通信回路のパターンおよび制御回路のパターンが形成される場合、分析部は、電源回路についての第1の分析結果および第2の分析結果と、通信回路についての第1の分析結果および第2の分析結果と、制御回路についての第1の分析結果および第2の分析結果と、を生成する。 Further, when using the circuit diagram data, the analysis unit described in each embodiment generates the first analysis result and the second analysis result for each area in which the pattern for realizing each function is formed. You may go. For example, when the pattern of the power supply circuit, the pattern of the communication circuit, and the pattern of the control circuit are formed on one substrate, the analysis unit determines the first analysis result and the second analysis result of the power supply circuit and the communication circuit. Of the first analysis result and the second analysis result of the control circuit, and the first analysis result and the second analysis result of the control circuit are generated.

 EMCに影響を与えるパターンを学習する際に、基板データ111およびEMC評価データ112に加えて回路図データを用いる構成とすることにより、回路図に含まれている機能毎の回路の分類が活用できるので、どの機能を実現するパターンに問題があるのかが明確となり、対策が必要な箇所を容易に知ることができる。また、異なる製品に組み込まれる基板同士であっても、同じ機能を実現するための回路のパターンが形成されていれば、そのパターン同士を比較して第1の分析結果および第2の分析結果を生成する学習動作を行うことができる。すなわち、分析部12は、より多くの製品についての基板データ111、EMC評価データ112および回路図データを使用して、EMCに影響を与えるパターンを学習することが可能となる。その結果、各実施の形態で説明した評価部が新規基板データ121を評価する際の評価精度の向上が図れる。 By using the circuit diagram data in addition to the board data 111 and the EMC evaluation data 112 when learning the pattern affecting the EMC, the circuit classification for each function included in the circuit diagram can be utilized. Therefore, it becomes clear which function has a problem in the pattern to be realized, and it is possible to easily know the place where the countermeasure is required. Further, even if the boards are incorporated in different products, if patterns of circuits for realizing the same function are formed, the patterns are compared to obtain the first analysis result and the second analysis result. A learning operation to generate can be performed. That is, the analysis unit 12 can learn patterns that affect the EMC by using the board data 111, the EMC evaluation data 112, and the circuit diagram data for more products. As a result, it is possible to improve the evaluation accuracy when the evaluation unit described in each embodiment evaluates the new board data 121.

 以上の実施の形態に示した構成は、本発明の内容の一例を示すものであり、別の公知の技術と組み合わせることも可能であるし、本発明の要旨を逸脱しない範囲で、構成の一部を省略、変更することも可能である。 The configurations described in the above embodiments are examples of the content of the present invention, and can be combined with another known technique, and the configurations of the configurations are not departing from the scope of the present invention. It is also possible to omit or change parts.

 1 設計支援装置、11 データ取得部、12,12a 分析部、13 記憶部、14,14a 評価部、15 対策案生成部、16 設計ルール生成部、20,20a 機械学習装置、110 学習用データ、111 基板データ、112 EMC評価データ、121 新規基板データ、131 新規基板の評価結果。 1 design support device, 11 data acquisition unit, 12, 12a analysis unit, 13 storage unit, 14, 14a evaluation unit, 15 countermeasure plan generation unit, 16 design rule generation unit, 20, 20a machine learning device, 110 learning data, 111 board data, 112 EMC evaluation data, 121 new board data, 131 new board evaluation results.

Claims (10)

 基板および前記基板に形成される基板パターンの情報を含む基板データと、前記基板が組み込まれる電子機器の電磁環境両立性の評価結果を示す評価データとを含んだ学習用データを分析して前記電磁環境両立性の変動要因を学習する分析部と、
 電子機器に組み込まれて前記電磁環境両立性の評価が行われる前の基板である新規基板に形成される基板パターンの情報を含む新規基板データが入力された場合に、前記分析部による前記変動要因の学習結果に基づいて、前記新規基板が組み込まれる電子機器の電磁環境両立性の変動要因を特定する評価部と、
 を備えることを特徴とする設計支援装置。
Substrate data including information about a substrate and a substrate pattern formed on the substrate, and learning data including evaluation data indicating an evaluation result of electromagnetic environment compatibility of an electronic device in which the substrate is incorporated are analyzed to analyze the electromagnetic field. An analysis unit that learns the factors that affect environmental compatibility,
When the new board data including the information of the board pattern formed on the new board which is the board before being incorporated into an electronic device and evaluated for compatibility with the electromagnetic environment is input, the variation factor by the analysis unit Based on the learning result of, the evaluation unit that identifies the variation factors of the electromagnetic environment compatibility of the electronic device in which the new substrate is incorporated,
A design support device comprising:
 過去に入力された1つ以上の学習用データを保持する記憶部、
 を備え、
 前記分析部は、
 学習用データが新たに入力されると、新たに入力された前記学習用データに含まれる基板データが表す第1の基板パターンを、前記記憶部で保持されている学習用データのそれぞれに含まれる基板データが表す第2の基板パターンのそれぞれと比較し、前記比較の結果と、前記第1の基板パターンに対応する評価データおよび前記第2の基板パターンに対応する評価データとに基づいて、前記変動要因を学習する、
 ことを特徴とする請求項1に記載の設計支援装置。
A storage unit that holds one or more pieces of learning data input in the past,
Equipped with
The analysis unit is
When learning data is newly input, the first board pattern represented by the board data included in the newly input learning data is included in each of the learning data held in the storage unit. Comparing with each of the second substrate patterns represented by the substrate data, based on the result of the comparison and the evaluation data corresponding to the first substrate pattern and the evaluation data corresponding to the second substrate pattern, Learn the factors of variation,
The design support apparatus according to claim 1, wherein:
 前記分析部は、前記変動要因の学習において、前記第1の基板パターンと前記第2の基板パターンとを比較して前記第1の基板パターンと前記第2の基板パターンの差異点を抽出し、抽出した差異点のそれぞれが前記電磁環境両立性に影響を与えるか否かを判定し、前記電磁環境両立性に影響を与える差異点を前記変動要因とする、
 ことを特徴とする請求項2に記載の設計支援装置。
In the learning of the variation factor, the analysis unit compares the first substrate pattern and the second substrate pattern to extract a difference between the first substrate pattern and the second substrate pattern, It is determined whether or not each of the extracted differences affects the electromagnetic environment compatibility, and the difference that affects the electromagnetic environment compatibility is the variation factor,
The design support apparatus according to claim 2, wherein:
 前記分析部は、同じ内容の変動要因を抽出した数に基づいて、各変動要因が前記電磁環境両立性に与える影響度を変動要因ごとに算出する、
 ことを特徴とする請求項3に記載の設計支援装置。
The analysis unit calculates the degree of influence of each variation factor on the electromagnetic environment compatibility for each variation factor based on the number of extracted variation factors having the same content,
The design support device according to claim 3, wherein
 前記評価部は、前記分析部が学習した変動要因のそれぞれについて、前記新規基板に含まれるか否かを確認し、前記新規基板に含まれる変動要因のそれぞれを、前記分析部が算出した影響度と対応付けて評価結果を生成する、
 ことを特徴とする請求項4に記載の設計支援装置。
The evaluation unit confirms, for each of the variation factors learned by the analysis unit, whether or not the variation factor is included in the new substrate, and evaluates each of the variation factors included in the new substrate by the degree of influence calculated by the analysis unit. Generate an evaluation result in association with
The design support device according to claim 4, wherein
 前記分析部は、前記変動要因の学習において、前記変動要因が前記電磁環境両立性に与える影響の内容を特定する、
 ことを特徴とする請求項1または2に記載の設計支援装置。
The analysis unit, in learning of the variable factors, identifies the content of the influence of the variable factors on the electromagnetic environment compatibility,
The design support apparatus according to claim 1 or 2, characterized in that.
 前記分析部による前記変動要因の学習結果に基づいて、前記新規基板が組み込まれる電子機器の電磁環境両立性を改善するための対策案を生成する対策案生成部、
 を備えることを特徴とする請求項1から6のいずれか一つに記載の設計支援装置。
Based on the learning result of the variation factor by the analysis unit, a countermeasure plan generating unit that generates a countermeasure plan for improving the electromagnetic environment compatibility of the electronic device in which the new board is incorporated,
The design support apparatus according to claim 1, further comprising:
 前記分析部による前記変動要因の学習結果に基づいて、前記電子機器に組み込まれる基板に形成される基板パターンの設計ルールを生成する設計ルール生成部、
 を備えることを特徴とする請求項1から7のいずれか一つに記載の設計支援装置。
A design rule generation unit that generates a design rule of a board pattern formed on a board incorporated in the electronic device based on a learning result of the variation factor by the analysis unit;
The design support apparatus according to claim 1, further comprising:
 基板の設計支援を行う設計支援装置が実行する設計支援方法であって、
 基板および前記基板に形成される基板パターンの情報を含む基板データと、前記基板が組み込まれる電子機器の電磁環境両立性の評価結果を示す評価データとを含んだ学習用データを取得する第1のステップと、
 前記学習用データを分析して前記電磁環境両立性の変動要因を学習する第2のステップと、
 電子機器に組み込まれて前記電磁環境両立性の評価が行われる前の基板である新規基板に形成される基板パターンの情報を含む新規基板データが入力された場合に、前記第2のステップにおける前記変動要因の学習結果に基づいて、前記新規基板が組み込まれる電子機器の電磁環境両立性の変動要因を特定する第3のステップと、
 前記第3のステップで特定した前記変動要因の情報を出力する第4のステップと、
 を含むことを特徴とする設計支援方法。
A design support method executed by a design support device for supporting board design, comprising:
A first data acquisition method that acquires learning data including board data including information on a board and a board pattern formed on the board, and evaluation data indicating an evaluation result of electromagnetic environment compatibility of an electronic device in which the board is incorporated. Steps,
A second step of analyzing the learning data and learning a variation factor of the electromagnetic environment compatibility;
When new board data including information on a board pattern to be formed on a new board which is a board before being incorporated into an electronic device and evaluated for compatibility with the electromagnetic environment is input, the step in the second step is performed. A third step of identifying a variation factor of electromagnetic environment compatibility of an electronic device in which the new board is incorporated, based on a variation factor learning result;
A fourth step of outputting information on the variation factor identified in the third step;
A design support method comprising:
 基板の設計支援を行う設計支援装置において、基板が組み込まれる電子機器の電磁環境両立性の変動要因を学習する機械学習装置であって、
 前記電子機器に組み込まれる基板および前記基板に形成される基板パターンの情報を含む基板データと、前記基板データに対応する基板が組み込まれる電子機器の電磁環境両立性の評価結果を示す評価データとを含んだ学習用データを取得するデータ取得部と、
 前記データ取得部が取得した学習用データを保持する記憶部と、
 前記データ取得部が新たに学習用データを取得すると、新たに取得された学習用データと、前記記憶部で保持されている学習用データとに基づいて、前記電磁環境両立性の変動要因を学習する学習部と、
 を備えることを特徴とする機械学習装置。
In a design support device for supporting the design of a board, a machine learning device for learning a variation factor of electromagnetic environment compatibility of an electronic device in which the board is incorporated,
Substrate data including information about a substrate to be incorporated in the electronic device and a substrate pattern formed on the substrate, and evaluation data indicating an evaluation result of electromagnetic compatibility of the electronic device in which the substrate corresponding to the substrate data is incorporated. A data acquisition unit that acquires the included learning data,
A storage unit that holds the learning data acquired by the data acquisition unit;
When the data acquisition unit newly acquires the learning data, the variable factors of the electromagnetic environment compatibility are learned based on the newly acquired learning data and the learning data held in the storage unit. And a learning department
A machine learning device comprising:
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