WO2020090205A1 - Semiconductor device and method for producing same - Google Patents

Abstract

A production method according to the present disclosure is for the production of a semiconductor device that comprises: a first member which has a first connection part and a side that extends linearly; a second member which has a second connection part; and an adhesive layer which is arranged between the first and second members. The production method according to the present disclosure comprises: a stacking step for preparing a multilayer body in which the first member, the adhesive layer and the second member are sequentially stacked in this order; and a compression bonding step wherein the multilayer body is irradiated with laser for the purpose of heating, while being applied with a pressing force in the thickness direction. In the compression bonding step, the multilayer body is irradiated with laser so that a laser irradiated part, a laser non-irradiated part and a laser irradiated part are sequentially formed in this order from the periphery of one end of the side of the first member toward the periphery of the other end.

Description

Semiconductor device and manufacturing method thereof

The present disclosure relates to a semiconductor device and a manufacturing method thereof.

Conventionally, wire bonding has been widely applied to connect semiconductor chips and substrates. Wire bonding is a method of connecting a semiconductor chip and a substrate by using a metal thin wire such as a gold wire. A method called flip-chip connection (FC connection) is becoming widespread in order to meet the demand for higher functionality, higher integration, higher speed, etc. of semiconductor devices. The FC connection is a method in which conductive protrusions called bumps are formed on a semiconductor chip or a substrate to directly connect the semiconductor chip and the substrate.

Examples of modes of FC connection include a method of metal bonding using solder, tin, gold, silver, copper, etc., a method of metal bonding by applying ultrasonic vibration, a method of maintaining mechanical contact by the contracting force of resin, and the like. Are known. Among these methods, from the viewpoint of the reliability of the connection portion, a method of metal bonding using solder, tin, gold, silver, copper or the like is common.

A COB (Chip On Board) type connection method is known as a method for connecting a semiconductor chip and a substrate. COB is a type of FC connection. Further, CoC (Chip On Chip) that connects semiconductor chips to each other and CoW (Chip On Wefer) that connects a semiconductor chip to a semiconductor wafer having bumps or wiring are also classified as FC connections. Patent Document 1 discloses a method for bonding semiconductor wafers.

JP, 2008-294382, A

As described above, semiconductor devices (hereinafter, sometimes referred to as “packages”) are highly required to have high functionality, and specifically, thinning, downsizing, increase in the number of pins (bumps and / or wirings), There is a demand for narrowing the pitch or gap. As technologies for manufacturing packages that require further miniaturization, thinning, and high functionality, chip stack type packages that have multiple connection methods described above, such as POP (Package On Package), TSV (Through Silicon Via), etc. Technology is also becoming widespread. These technologies can reduce the size of the package because the members are arranged in a three-dimensional shape instead of a planar shape, and are also effective in improving the performance of semiconductor devices, reducing noise, reducing the mounting area, and saving power. Is attracting attention as a wiring technology.

From the viewpoint of cost reduction and high productivity, the semiconductor chip spacing tends to become narrower during package assembly. By narrowing the interval between the adjacent semiconductor chips, many semiconductor chips can be mounted on the substrate or the wafer, and the cost can be reduced. Further, by narrowing the interval between the adjacent semiconductor chips, it is possible to assemble different kinds of semiconductor chips in a small area, and it is possible to perform high-density mounting.

By the way, when a semiconductor chip is pressure-bonded to a substrate or a semiconductor wafer via an adhesive layer to secure the connection, the shape of the adhesive layer is often the same square or rectangle as the semiconductor chip. A portion where the resin material forming the adhesive layer protrudes from the semiconductor chip after the pressure bonding step is called a fillet. Since the resin material flows in a circular shape at the time of pressure bonding, the fillet at the corner of the semiconductor chip becomes smaller than the fillet at the side of the semiconductor chip. The fillet at the corner of the semiconductor chip (end of the side of the semiconductor chip) is called coverage.

If there is no fillet (adhesive) in the corner of the semiconductor chip, the reliability of the semiconductor device tends to decrease. In order to secure the coverage, it is conceivable to increase the fluidity of the adhesive or increase the load at the time of pressure bonding or increase the temperature. However, even if the coverage can be secured by these means, on the other hand, the fillet on the side of the semiconductor chip becomes large, which makes it difficult to reduce the cost and mount the device at high density. That is, it is difficult to make both the fillet on the side of the semiconductor chip small and the coverage secured.

The present disclosure aims to provide a semiconductor device having a small fillet on the side of a semiconductor chip and ensuring coverage, and a manufacturing method thereof.

The manufacturing method according to the present disclosure includes a first member having a first connecting portion and a linearly extending side, a second member having a second connecting portion, a first member and a second member. And an adhesive layer disposed between the first connection portion and the second connection portion, the semiconductor device having the adhesive layer disposed between the first connection portion and the second connection portion.

A manufacturing method according to a first embodiment of the present disclosure includes a laminating step of preparing a laminated body in which a first member, an adhesive layer, and a second member are laminated in this order, and a thickness direction with respect to the laminated body. And a pressing step of irradiating a laser beam for heating the laminated body in a state where a pressing force is applied to the laminated body, in the pressing step, from the peripheral portion of one side of the first member to the peripheral portion of the other end. A laser is irradiated to the laminated body so that the laser irradiation portion, the laser non-irradiation portion, and the laser irradiation portion are formed in this order.

According to the manufacturing method of the first aspect, the corners of the first member (for example, a square or rectangular semiconductor chip) having the linearly extending sides are the laser irradiation parts, and the spaces between them are the laser non-irradiation parts. Thus, the corner can be locally heated by the laser, the coverage at the corner of the first member can be secured, and the fillet on the side of the first member can be suppressed.

A manufacturing method according to a second embodiment of the present disclosure includes a laminating step of preparing a laminated body in which a first member, an adhesive layer and a second member are laminated in this order, and a thickness direction with respect to the laminated body. A semiconductor chip having a square or rectangular shape in which the first member has a square shape or a rectangular shape, and the following condition 1 is satisfied in the pressure bonding step. So that heat is applied to the laminate.
<Condition 1>
The side of the semiconductor chip is divided into three equal parts and divided into nine areas, and the area including one corner of the semiconductor chip is defined as area 1 among the nine areas, and the area 1 extends along the peripheral edge of the semiconductor chip. When the areas arranged side by side are areas 2 to 8, the average temperature Tc of the outer surface of the semiconductor chip in the central portions of the areas 1, 3, 5, and 7, and the semiconductor in the central portions of the areas 2, 4, 6, and 8 The difference (Tc−Ts) from the average temperature Ts of the outer surface of the chip is 15 ° C. or more.

According to the manufacturing method according to the second embodiment, by locally increasing the temperature of the corners (areas 1, 3, 5, 7) of the semiconductor chip, it is possible to secure the coverage in the corners of the first member. In addition, fillets on the sides of the first member are suppressed. In the manufacturing method according to the second embodiment, when the laminate is heated by laser irradiation, the areas 2, 4, 6, 8 may or may not be the laser non-irradiated portion. For example, the areas 2, 4, 6, and 8 may be irradiated with laser irradiation having an energy amount smaller than that of the areas 1, 3, 5, and 7.

From the viewpoint of securing coverage to a higher degree and suppressing fillets, it is preferable to apply heat to the laminate so as to further satisfy the following Condition 2 in the pressure bonding step of the manufacturing method according to the second embodiment. ..
<Condition 2>
If the area including the center of the semiconductor chip among the nine areas is referred to as area 9, the average temperature Ts of the outer surface of the semiconductor chip at the central portions of areas 2, 4, 6, and 8 and the central portion of area 9 The difference (Ts-T9) from the temperature T9 of the outer surface of the semiconductor chip is 5 ° C. or more.

In the present disclosure, specific examples of the second member include a wiring board, a semiconductor chip, and a semiconductor wafer.

From the viewpoint of suppressing the generation of voids, the adhesive layer contains, for example, a thermosetting resin having a weight average molecular weight of less than 10,000 and a curing agent, and may further contain a polymer component having a weight average molecular weight of 10,000 or more. .. The adhesive layer is preferably a film adhesive from the viewpoint of improving the efficiency of the pressure bonding step.

The present disclosure provides a semiconductor device manufactured by the above manufacturing method. In the semiconductor device according to the present disclosure, the fillet on the side of the semiconductor chip is short and the coverage is secured. Due to these characteristics, high-density mounting is possible and excellent reliability is achieved.

According to the present disclosure, there is provided a semiconductor device in which the fillet on the side of the semiconductor chip is small and coverage is secured, and a manufacturing method thereof.

FIG. 1 is a sectional view schematically showing an embodiment of a semiconductor device according to the present disclosure. FIG. 2A is a cross-sectional view schematically showing a state in which preparation for carrying out the pressure bonding step is completed, and FIG. 2B schematically shows a laminated body in which a semiconductor chip, an adhesive layer and a substrate are laminated in this order. FIG. 2C is a cross-sectional view schematically showing a state in which the pressure-bonding step is performed on the laminated body. FIG. 3 is a top view schematically showing an example of a region for irradiating the laminated body with laser in the pressure bonding step. FIG. 4 is a top view schematically showing an example of a state in which the adhesive layer protrudes from the semiconductor chip after the pressure bonding step. FIG. 5 is a sectional view schematically showing an example of a semiconductor device manufactured by the TSV technique. FIG. 6A is a top view schematically showing laser irradiation patterns in Example 1 and Comparative Example 1, and FIG. 6B schematically shows laser irradiation patterns in Example 2 and Comparative Example 2. It is a top view shown. FIG. 7 is a top view schematically showing laser irradiation patterns in Examples 3 and 4.

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings as appropriate. The present invention is not limited to the embodiments below.

<Semiconductor Device and Manufacturing Method Thereof>
A semiconductor device 50 shown in FIG. 1 includes a semiconductor chip 10 (first member) having a copper pillar 10a and a solder bump 10b (first connecting portion), and a substrate 20 (having a wiring 20a (second connecting portion)). The second member) and the adhesive layer 30 arranged between the semiconductor chip 10 and the substrate 20, and the solder bumps 10b and the wirings 20a are electrically connected. The solder bump 10b contains, for example, a tin-silver alloy. The surface of the wiring 20a is plated with gold, for example. By heating to a temperature higher than the melting point of the solder, the solder bump 10b and the wiring 20a can be connected.

A method of manufacturing the semiconductor device 50 will be described with reference to FIGS. 2A to 2C. The semiconductor device 50 is manufactured, for example, through the following steps.
An adhesive-attached chip manufacturing step of preparing a chip having an adhesive layer 30 formed on the surface of the semiconductor chip 10 on which the copper pillars 10a and the solder bumps 10b are formed (see FIG. 2A).
A laminating step of preparing a laminated body 40 in which the semiconductor chip 10, the adhesive layer 30, and the substrate 20 are laminated in this order (see FIG. 2B).
A pressure bonding step of irradiating the laminated body 40 with a laser L for heating while applying a pressing force F to the laminated body 40 in the thickness direction (see FIG. 2C).
A curing process of heating the laminated body 40 after the pressure bonding process.

(Chip making process with adhesive)
The step of producing a chip with an adhesive is a step of producing a chip (chip with an adhesive) having the semiconductor chip 10 and the adhesive layer 30 formed so as to cover the copper pillars 10a and the like of the semiconductor chip 10. From the standpoint of workability, it is preferable to prepare a film-like adhesive in advance and to produce the chip with the adhesive through a step of laminating the film-like adhesive on an object. Lamination can be performed by hot pressing, roll laminating, vacuum laminating and the like. The size and thickness of the adhesive layer 30 may be appropriately set according to the size of the semiconductor chip 10, the bump height, and the like. Note that a chip with an adhesive may be produced by pasting a film adhesive cut to the size of the semiconductor chip 10 onto the semiconductor chip, or a film adhesive may be applied to a semiconductor wafer on which wirings and the like are formed. After adhering, the chips with adhesive may be produced by dicing into individual pieces. When a chip with an adhesive is produced by dicing, the semiconductor chip 10 and the adhesive layer 30 have the same shape and size.

(Lamination process)
The laminating step is a step of preparing a laminated body 40 in which the semiconductor chip 10, the adhesive layer 30, and the substrate 20 are laminated in this order. After the chip with the adhesive and the substrate 20 are aligned with each other, the chip with the adhesive and the substrate 20 are temporarily pressure-bonded to each other to produce the laminated body 40. A normal crimping device can be used for the temporary crimping.

(Crimping process)
FIG. 3 is a top view schematically showing a region where a laser is applied to the laminated body in the pressure bonding step. In the present embodiment, a laser bonder that can independently irradiate heating lasers on a total of 36 regions is used. An example of a laser bonder having such performance is FDB250 manufactured by Shibuya Industry Co., Ltd. In FIG. 3, out of a total of 36 areas, the area irradiated with the laser is represented by a hatched circle, and the area not irradiated with the laser is represented by a white circle.

As shown in FIG. 3, in the pressure-bonding step, laser irradiation is performed from the peripheral portion (one corner C) of one end Sa of the side S of the semiconductor chip 10 to the peripheral portion (the other corner C) of the other end Sb. The layer 40 is irradiated with a laser so that the portion A1, the laser non-irradiation portion A2, and the laser irradiation portion A1 are formed in this order. The remaining three sides S of the semiconductor chip 10 are also irradiated with laser so that the laser irradiation part A1, the laser non-irradiation part A2, and the laser irradiation part A1 are formed in this order from one end to the other end. As shown in FIG. 3, the side of the semiconductor chip 10 is divided into three equal parts and divided into nine areas, and an area including one corner of the semiconductor chip 10 is defined as an area 1 among the nine areas. Areas arranged from 1 to along the peripheral edge of the semiconductor chip 10 are referred to as areas 2 to 8. In this embodiment, the areas 1, 3, 5, 7 are selectively irradiated with the laser L, and the areas 2, 4, 6, 8 and the area 9 including the center of the semiconductor chip 10 are not irradiated with the laser. That is, areas 1, 3, 5, and 7 are laser irradiation portions A1, and areas 2, 4, 6, 8, and 9 are laser non-irradiation portions A2. As long as the adhesive layer 30 can be heated by irradiating the laser L toward the stacked body 40, the outer surface of the semiconductor chip 10 may be directly irradiated with the laser, or the semiconductor chip 10 may be irradiated with the laser L. A plate (not shown) for applying the pressing force F may be irradiated with a laser.

In the present embodiment, the average temperature Tc of the outer surface of the semiconductor chip 10 in each central portion of the areas 1, 3, 5, and 7 and the average temperature Tc of the outer surface of the semiconductor chip 10 in each central portion of the areas 2, 4, 6, 8. The difference (Tc−Ts) from the average temperature Ts is preferably 15 ° C. or more. The fact that Tc-Ts is 15 ° C. or higher means that the area including the corner of the semiconductor chip 10 is locally heated to a temperature higher than the other areas. By performing such heating in the pressure bonding step, the fillet on the side S of the semiconductor chip 10 can be shortened and the coverage can be secured. Tc-Ts may be 15-30 ° C.

In the present embodiment, the temperature difference between the average temperature Ts of the outer surface of the semiconductor chip 10 in the central portions of the areas 2, 4, 6, and 8 and the temperature T9 of the outer surface of the semiconductor chip 10 in the central portion of the area 9 ( Ts-T9) may be 5 ° C or higher. The fact that Ts-T9 is 5 ° C. or higher means that the areas 2, 4, 6, 8 of the semiconductor chip 10 are heated so as to have a higher temperature than the area 9. That is, in the pressure bonding step of this embodiment, heating is performed so that the condition of Tc> Ts> T9 is satisfied, the temperature difference (Tc-Ts) is 15 ° C. or more, and the temperature difference (Ts-T9) is 5 ° C. or more. You may. The temperature difference (Ts-T9) may be in the range of 5-40 ° C.

When the crimping process is performed by using a general crimping device having a crimping tool surface capable of raising the temperature, the crimping tool surface is brought into contact with the surface of the laminated body 40, and a pressing force F is applied to the laminated body 40. In this state, the surface of the crimping tool is heated. The crimping tool surface is usually designed so that its surface temperature is as uniform as possible. For example, when the size of the semiconductor chip is about 30 mm × 30 mm, the temperature variation on the surface of the semiconductor chip during pressure bonding is usually less than 15 ° C. If the laminated body 40 is uniformly heated and the pressure bonding step is performed, the fillet width in the central portion of the side of the semiconductor chip tends to be large and the coverage tends to be insufficient. It should be noted that if the heating temperature is increased or the pressing force is increased in order to secure the coverage, the fillet width on the side of the semiconductor chip is further increased.

On the other hand, according to the present embodiment, it is possible to suppress the fillet width and ensure the coverage by intentionally providing the temperature distribution on the surface of the crimping tool. As described above, by locally heating the areas 1, 3, 5, 7 of the semiconductor chip to a high temperature, it is possible to enhance the flow of the adhesive layers 30 respectively located at the corners C of the semiconductor chip 10, and to improve the coverage. Can be secured. On the other hand, by relatively lowering the heating temperature of the areas 2, 4, 6, 8 of the semiconductor chip 10, the flow of the adhesive layer 30 near the center of the side S of the semiconductor chip 10 can be relatively suppressed. Therefore, the fillet on the side S can be reduced. By setting the difference (Ts-T9) between the average temperature Ts of the areas 2, 4, 6, and 8 and the temperature T9 of the area 9 to be 5 ° C. or more, the temperature rising rate of the entire semiconductor chip tends to increase. By increasing the temperature rising rate, it becomes easier to locally heat a specific area of the semiconductor chip, and it becomes easier to secure coverage while suppressing fillets. Further, since the temperature rising rate is increased, the time for melting the solder is lengthened, which facilitates connection. This makes it possible to manufacture a highly reliable semiconductor device in a short time.

FIG. 4 is a top view schematically showing a state where the adhesive layer 30 protrudes from the semiconductor chip 10. The width W _F shown in FIG. 4 is the maximum width of the fillet on the side S of the semiconductor chip 10. The maximum width of the fillet is measured on the four sides S of the semiconductor chip 10, and the average value is defined as the fillet width on the side of the semiconductor chip 10. The widths w1 and w2 shown in FIG. 4 are the width (μm) of the fillet at a position 200 μm from the corner C of the semiconductor chip 10. The widths w1 and w2 of the four corners C of the semiconductor chip 10 are measured, and the average of the eight values is defined as the coverage (μm) of the semiconductor chip 10.

The fillet width depends on the size and thickness of the semiconductor chip 10 and the amount of underfill (including liquid and film) supplied. The fillet width is preferably as small as possible so long as there is no problem in reliability. For example, when the semiconductor chip is pressure-bonded on the wafer and when the semiconductor chip is pressure-bonded on the substrate, the fillet is preferably half or less of the distance between the semiconductor chips. The fillet width is preferably 50 to 200 μm, more preferably 50 to 150 μm. The coverage of the semiconductor chip 10 is preferably 5 to 100 μm, more preferably 10 to 100 μm. If the coverage is 10 μm or more, the reliability of the semiconductor device 50 tends to be further improved. The coverage index (dimensionless) is calculated by dividing the coverage by the fillet width. The coverage index is, for example, 0.1 to 1, and may be 0.2 to 0.5. If the coverage index is 0.1 or more, the reliability of the semiconductor device 50 tends to be sufficiently high.

(Cure process)
The curing process is a process of heating the laminated body 40 after the pressure bonding process. From the viewpoint of reducing voids, this step is preferably performed in a pressurized atmosphere using a pressure oven or pressure reflow device. The heating temperature is, for example, 130 to 200 ° C. The pressure is, for example, 0.1 to 1 MPa.

In this embodiment, a laser bonder is used in the pressure bonding step and heating is performed so that Tc-Ts is 15 ° C. or higher. However, as long as Tc-Ts can be set to 15 ° C. or higher, a temperature other than the laser bonder is used. A crimping device may be used. For example, a pressure bonding tool having a convex portion at a position corresponding to the corner C may be used so that the temperature is easily transmitted only to the corner C of the semiconductor chip 10. Alternatively, a crimping tool in which a region corresponding to the corner C of the semiconductor chip 10 is locally made of a material having high thermal conductivity may be used, or a portion other than the region may be made of a material having low thermal conductivity. You may use the crimping tool comprised by.

In the present embodiment, the case where the areas 2, 4, 6, and 8 are not irradiated with the laser is exemplified, but the areas 2, 4, 6, and 8 are irradiated with the laser as long as Tc-Ts can be set to 15 ° C. or higher. Alternatively (see Examples 3 and 4).

In the present embodiment, the semiconductor device 50 having the connecting portion between the semiconductor chip 10 and the substrate 20 is exemplified, but a mode in which the semiconductor chip and another semiconductor chip are connected may be used, and the semiconductor chip and the semiconductor wafer may be connected. It may be a modified mode. Further, the connection portion is not limited to the metal connection by the bump and the wiring, but may be the metal connection by the bump and the bump.

The crimping step according to the present embodiment may be applied to, for example, a semiconductor device manufactured by the TSV (Through-Silicon Via) technology. FIG. 5 is a sectional view schematically showing an example of a semiconductor device manufactured by the TSV technique. A semiconductor device 70 shown in this figure has three semiconductor chips 11, 12 and 13 which are flip-chip connected and laminated via an adhesive layer 30, and an interface which is connected to the semiconductor chip 13 via the adhesive layer 30. And a poser 60. The semiconductor chips 11, 12, 13 have penetrating electrode portions 11a, 12a, 13a. According to the semiconductor device 70 having such a configuration, signals can be exchanged from the back surface of the semiconductor chip. Since the wiring can be vertically passed in the semiconductor chip, the semiconductor chips or the chip and the interposer can be flexibly connected to each other in the shortest distance. The crimping step according to the present embodiment may be applied to the manufacture of a laminated chip including the semiconductor chips 11, 12, and 13, or may be applied to the laminated chip, the interposer 60, and the pressure bonding.

Hereinafter, a semiconductor chip, a substrate, an adhesive layer, and the like used in the method for manufacturing a semiconductor device according to this embodiment will be described.

The semiconductor chip has sides that extend linearly, and has, for example, a square or rectangular shape. The length of one side of the semiconductor chip is, for example, 0.1 to 300 mm, and may be 5 to 150 mm. The semiconductor constituting the semiconductor chip is not particularly limited, and elemental semiconductors such as silicon and germanium and compound semiconductors such as gallium arsenide and indium phosphide can be cited.

The semiconductor chip can have conductive protrusions called bumps. The bump contains gold, silver, copper, solder, tin, nickel, etc. as main components. These metals may be used alone or in combination of two or more. Further, it may be formed to have a structure in which these metals are laminated. The main component of solder is, for example, an alloy of tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, or the like. The bumps may be formed on a wiring board or the like connected to the semiconductor chip. As the metal forming the bumps, copper and solder are preferable from the viewpoint of low cost, and solder is more preferable from the viewpoint of connection reliability and suppression of warpage.

The semiconductor chip and wiring board can have a conductive surface called a pad. The pad contains gold, silver, copper, solder, tin, nickel, etc. as a main component. These metals may be used alone or in combination of two or more. Further, it may be formed to have a structure in which these metals are laminated. The main component of solder is, for example, an alloy of tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, or the like. Further, as the metal forming the pad, gold and solder are preferable from the viewpoint of connection reliability.

The wiring board is not particularly limited as long as it is a normal circuit board, and one having a wiring pattern formed on the insulating substrate by etching, one having a wiring pattern formed by printing a conductive substance on the surface of the insulating substrate, etc. Can be mentioned. The insulating substrate is made of a resin material such as glass epoxy, polyester, ceramic, epoxy, bismaleimide triazine, and polyimide.

-A metal layer may be formed on the surface of the wiring pattern. The metal layer contains gold, silver, copper, solder, tin, nickel, etc. as a main component. These metals may be used alone or in combination of two or more. Further, it may be formed to have a structure in which these metals are laminated. As the metal constituting the metal layer, copper and solder are preferable from the viewpoint of low cost, and solder is more preferable from the viewpoint of connection reliability and suppression of warpage.

The semiconductor device may have the above-mentioned bump-bump connecting portion, bump-pad connecting portion, or bump-wiring connecting portion.

The adhesive layer preferably has excellent heat resistance so that it can be subjected to pressure bonding at a temperature of 200 ° C. or higher. A metal such as solder can be melted by performing a pressure bonding process under a temperature condition of 200 ° C. or higher. The adhesive layer contains a resin component having a weight average molecular weight of less than 10,000 from the viewpoint of suppressing the generation of voids. The adhesive layer may further contain a polymer component having a weight average molecular weight of 10,000 or more. The adhesive layer is preferably a film adhesive from the viewpoint of improving the efficiency of the pressure bonding step. The "weight average molecular weight" used herein means a value measured in terms of polystyrene by using high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation).

(A) Resin component having a weight average molecular weight of less than 10,000 The resin component having a weight average molecular weight of less than 10,000 (hereinafter, component (a)) includes an epoxy resin and an acrylic resin. The component (a) is preferably a thermosetting resin, and in this case, the adhesive layer preferably contains the curing agent (b). Since a resin component having a relatively small molecular weight decomposes upon heating and causes voids, it is preferable to react with a curing agent from the viewpoint of heat resistance.

The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule, and examples thereof include bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolak type, phenol aralkyl type, biphenyl. Type, triphenylmethane type, dicyclopentadiene type, and various polyfunctional epoxy resins can be used. These can be used alone or in combination of two or more.

The content of the epoxy resin is, for example, 10 to 50 parts by mass with respect to 100 parts by mass of the total mass of the adhesive layer. When the content of the epoxy resin is 10 parts by mass or more, it is easy to control the flow of the resin after curing, and when it is 50 parts by mass or less, the warpage of the package can be suppressed.

The acrylic resin is not particularly limited as long as it has at least one acryloyl group in the molecule, and examples thereof include bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolac type, phenol aralkyl type, biphenyl type. , Triphenylmethane type, dicyclopentadiene type, fluorene type, adamantane type, and various polyfunctional acrylics can be used. These can be used alone or in combination of two or more.

The content of the acrylic resin is preferably 10 to 50 parts by mass, more preferably 15 to 40 parts by mass with respect to 100 parts by mass of the total mass of the adhesive layer. When the content of the acrylic resin is 10 parts by mass or more, it is easy to control the flow of the resin after curing, and when it is 50 parts by mass or less, the warpage of the package can be suppressed.

The acrylic resin is preferably solid at room temperature (25 ° C). Voids are less likely to occur in the solid form than in the liquid form, and the viscosity (tack) of the adhesive layer before curing (B stage) is small and the handling is excellent. The number of functional groups of the acryloyl group is preferably 3 or less. When the number of functional groups of the acryloyl group is 3 or less, curing sufficiently progresses in a short time and a sufficiently high curing reaction rate can be achieved.

(B) Curing agent Examples of the curing agent include a phenol resin curing agent, an acid anhydride curing agent, an amine curing agent, an imidazole curing agent, a phosphine curing agent, an azo compound and an organic peroxide. ..

(Phenolic resin hardener)
The phenol resin-based curing agent is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule, for example, phenol novolac, cresol novolac, phenol aralkyl resin, cresol naphthol formaldehyde polycondensate, triphenyl. Methane-type polyfunctional phenols and various polyfunctional phenol resins can be used. These can be used alone or as a mixture of two or more kinds.

The equivalent ratio of the phenol resin type curing agent to the epoxy resin (phenolic hydroxyl group / epoxy group, molar ratio) is preferably 0.3 to 1.5, from the viewpoint of good curability, adhesiveness and storage stability, and 0 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is further preferable. When the equivalent ratio is 0.3 or more, the curability and the adhesive strength tend to be improved, and when it is 1.5 or less, the unreacted phenolic hydroxyl group does not remain excessively and the water absorption is It tends to be kept low and the insulation reliability tends to be improved.

(Acid anhydride curing agent)
As the acid anhydride-based curing agent, for example, use methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic dianhydride, benzophenonetetracarboxylic dianhydride and ethylene glycol bisanhydrotrimellitate. You can These can be used alone or as a mixture of two or more kinds.

The equivalent ratio of the acid anhydride type curing agent to the epoxy resin (acid anhydride group / epoxy group, molar ratio) is preferably 0.3 to 1.5 from the viewpoint of good curability, adhesiveness and storage stability. , 0.4 to 1.0 are more preferable, and 0.5 to 1.0 are still more preferable. If the equivalent ratio is 0.3 or more, the curability and the adhesive strength tend to be improved, and if it is 1.5 or less, the unreacted acid anhydride does not remain excessively and the water absorption is It tends to be kept low and the insulation reliability tends to be improved.

(Amine curing agent)
As the amine-based curing agent, for example, dicyandiamide can be used. The equivalent ratio (amine / epoxy group, molar ratio) of the amine-based curing agent to the epoxy resin is preferably 0.3 to 1.5, and 0.4 to 1 from the viewpoint of good curability, adhesiveness and storage stability. 0.0 is more preferable, and 0.5 to 1.0 is still more preferable. When the equivalent ratio is 0.3 or more, the curability and the adhesive strength tend to be improved, and when it is 1.5 or less, unreacted amine does not remain excessively and the insulation reliability is improved. Tend to do.

(Imidazole type curing agent)
Examples of the imidazole-based curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole. , 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl -(1 ')]-Ethyl-s-triazine, 2,4-diamino-6- [2'-undecylimidazolyl- (1')]-ethyl-s-triazine, 2,4-diamino-6- [ 2'-Ethyl-4'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino -6- [2'-Methylimidazolyl- (1 ')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl -4-Methyl-5-hydroxymethylimidazole, and an adduct of an epoxy resin and an imidazole may be mentioned. Among these, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitic acid, from the viewpoint of excellent curability, storage stability and connection reliability. Tate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2′-Ethyl-4′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine Isocyanuric acid adduct, 2-phenylimidazole Isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl -4-Methyl-5-hydroxymethylimidazole is preferred. These can be used alone or in combination of two or more. Further, these may be microencapsulated latent curing agents.

The content of the imidazole-based curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, based on 100 parts by mass of the epoxy resin. When the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and when it is 20 parts by mass or less, the adhesive composition may be cured before the metal bond is formed. No connection failure tends to occur.

(Phosphine curing agent)
Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate and tetraphenylphosphonium (4-fluorophenyl) borate.

The content of the phosphine-based curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass with respect to 100 parts by mass of the epoxy resin. When the content of the phosphine-based curing agent is 0.1 part by mass or more, the curability tends to be improved, and when it is 10 parts by mass or less, the adhesive composition may be cured before the metal bond is formed. No connection failure tends to occur.

Each of the phenolic resin-based curing agent, the acid anhydride-based curing agent and the amine-based curing agent may be used alone or in combination of two or more kinds. The imidazole-based curing agent and the phosphine-based curing agent may be used alone, or may be used together with a phenol resin-based curing agent, an acid anhydride-based curing agent or an amine-based curing agent.

(Organic peroxide)
Examples of organic peroxides include ketone peroxides, peroxyketals, hydroperoxides, dialkyl peroxides, diacyl peroxides, peroxydicarbonates, and peroxyesters. From the viewpoint of storage stability, hydroperoxide, dialkyl peroxide and peroxy ester are preferable. Further, from the viewpoint of heat resistance, hydroperoxide and dialkyl peroxide are preferable. These may be used alone or in combination of two or more.

The content of the peroxide is preferably 0.5 to 10% by mass, more preferably 1 to 5% by mass based on the mass of the acrylic resin. When the content of peroxide is 0.5% by mass or more, the curing reaction easily proceeds sufficiently, while when it is 10% by mass or less, the molecular chain is shortened or unreacted groups remain. However, it is possible to sufficiently suppress the decrease in reliability.

The combination of the epoxy resin, the acrylic resin and the curing agent is not particularly limited as long as the curing proceeds, but from the viewpoint of handleability, storage stability and curability, phenol and imidazole are used as the curing agent together with the epoxy resin. It is preferable to use acid anhydride and imidazole, amine and imidazole, or imidazole alone. It is more preferable to use imidazole, which is excellent in quick-curing property, alone because the productivity is improved when connecting in a short time. Curing in a short time can suppress volatile components such as low-molecular components, so that the generation of voids is further suppressed. From the viewpoint of handleability and storage stability, it is preferable to use an organic peroxide as a curing agent used together with the acrylic resin.

(C) Polymer component having a weight average molecular weight of 10,000 or more As the polymer component having a weight average molecular weight of 10,000 or more (hereinafter referred to as "(c) component"), epoxy resin, phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin , Cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, polyvinyl acetal resin, urethane resin, acrylic rubber, bismaleimide resin, and the like. Of these, epoxy resins, phenoxy resins, polyimide resins, acrylic resins, acrylic rubbers, and bismaleimide resins, which have excellent heat resistance and film forming properties, are more preferable. These may be used alone or in combination of two or more, and may be used as a copolymer of two or more.

The mass ratio of the component (c) and the epoxy resin is not particularly limited, but when the amount of the component (c) in the adhesive layer is 100 parts by mass, the mass of the epoxy resin may be 1 to 500 parts by mass. It is preferably 5 to 400 parts by mass, more preferably 10 to 300 parts by mass. When the amount of the epoxy resin is 1 part by mass or more, it is easy to secure sufficient adhesive force, and when it is 500 parts by mass or less, it is easy to secure sufficient film formability and film formability. The epoxy resin mentioned here is a curing component having a glycidyl group and a molecular weight of less than 10,000.

The mass ratio of the component (c) and the acrylic resin is not particularly limited, but when the amount of the component (c) in the adhesive layer is 100 parts by mass, the mass of the acrylic resin is 1 to 1000 parts by mass. The amount is preferably 5 to 500 parts by mass, more preferably 10 to 500 parts by mass. When the amount of the acrylic resin is 1 part by mass or more, it is easy to secure sufficient adhesive force, and when it is 1000 parts by mass or less, it is easy to secure sufficient film formability.

The glass transition temperature (Tg) of the component (c) is preferably 50 to 200 ° C. from the viewpoint of excellent adhesion of the adhesive layer to the substrate and semiconductor chip. When the Tg of the component (c) is 50 ° C. or higher, the tack (viscosity) force of the adhesive layer can be sufficiently increased and the handleability is excellent. On the other hand, when the Tg of the component (c) is 200 ° C. or less, bumps formed on the semiconductor chip or irregularities such as electrodes or wiring patterns formed on the substrate are easily embedded in the adhesive layer, and voids are generated. Can be suppressed. The Tg of the adhesive layer means a value measured using a DSC (DSC-7 type manufactured by Perkin Elmer Co., Ltd.) under the conditions of a sample amount of 10 mg, a heating rate of 10 ° C./minute, and a measurement atmosphere of air. ..

As described above, the weight average molecular weight of the component (c) is 10,000 or more in terms of polystyrene, but it is preferably 30,000 or more from the standpoint of achieving good film-forming property by itself. When the weight average molecular weight of the component (c) is 10,000 or more, it is easy to achieve sufficient film forming property.

The adhesive layer may further contain a flux agent. The flux agent is a compound exhibiting flux activity (activity for removing oxides or impurities). Examples of the fluxing agent include nitrogen-containing compounds having a non-covalent electron pair such as imidazoles and amines, carboxylic acids, phenols and alcohols. It should be noted that the organic acid more strongly develops the flux activity than the alcohol or the like, and the connectivity is improved. Among organic acids, it is preferable to use carboxylic acid. Since the carboxylic acid reacts with the epoxy resin, there is an advantage that the amount remaining in the adhesive layer is sufficiently small. From the viewpoint of heat resistance, the carboxylic acid as the flux agent is preferably solid. From the viewpoint of stability and handleability, the melting point of the flux agent is preferably 70 to 150 ° C.

The adhesive layer may further contain a filler having an insulating property. By adding a filler to the adhesive layer, it is possible to control the viscosity and the physical properties of the cured product, and it is possible to suppress the occurrence of voids when connecting the semiconductor chips to each other or to the semiconductor chip and the substrate and suppress the moisture absorption rate. it can. Examples of the filler having an insulating property include inorganic fillers, whiskers and resin fillers. From the viewpoint of insulation reliability, it is preferable that the adhesive layer does not contain a conductive metal filler (for example, silver particles and solder particles).

Examples of inorganic fillers include glass, silica, alumina, titanium oxide, carbon black, mica and boron nitride. Of these, silica, alumina, titanium oxide and boron nitride are preferable, and silica, alumina and boron nitride are more preferable. Examples of the whiskers include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. Examples of the resin filler include polyurethane, polyimide, methyl methacrylate resin, and methyl methacrylate-butadiene-styrene copolymer resin (MBS). These fillers may be used alone or in combination of two or more. Since the resin filler can give flexibility to the adhesive layer under a high temperature environment (for example, 260 ° C.) as compared with the inorganic filler, it can contribute to the improvement of reflow resistance. By improving the flexibility, the film forming property can also be improved.

From the viewpoint of improving dispersibility or adhesive strength, a surface-treated filler may be used. By subjecting the filler to a surface treatment, the physical properties of the filler can be adjusted appropriately. Examples of the surface treatment include glycidyl (epoxy), amine, phenyl, phenylamino, acryl (methacryl) or vinyl treatment. From the viewpoint of dispersibility, fluidity and adhesive strength, glycidyl type, phenylamino type and acryl (methacryl) type are preferable. From the viewpoint of storage stability, phenyl type and acrylic (methacrylic) type are more preferable. From the viewpoint of ease of surface treatment, silane treatment such as epoxysilane-based, aminosilane-based, and acrylsilane-based is preferable.

The average particle size of the filler is preferably 1.5 μm or less from the viewpoint of preventing biting during flip chip connection, and more preferably 1.0 μm or less from the viewpoint of visibility (transparency). The "average particle size" as used herein means a value obtained by analyzing with a laser diffraction particle size distribution analyzer using MEK (methyl ethyl ketone) as a solvent.

The content of the filler is preferably 30 to 90% by mass, and more preferably 40 to 80% by mass, based on the mass of the solid content of the adhesive layer. When the content of the filler is 30% by mass or more, sufficient heat dissipation can be easily achieved, and voids can be formed and the moisture absorption rate can be reduced. On the other hand, when the content of the filler is 90% by mass or less, it is possible to suppress the viscosity from becoming excessively high, to ensure sufficiently high fluidity, and to sufficiently trap (fill) the filler into the connection portion. Can be suppressed to.

The adhesive layer may further contain additives such as an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent and a leveling agent. These may be used alone or in combination of two or more. The content of these additives may be appropriately adjusted so that the effect of each additive is exhibited.

As mentioned above, from the viewpoint of workability, it is preferable to prepare a film adhesive in advance before manufacturing the chip with the adhesive. The film adhesive can be produced as follows. That is, the above components are added to an organic solvent, and the mixed solution is stirred or kneaded to prepare a varnish. After the varnish is applied on the base material film that has been subjected to the mold release treatment, the organic solvent is reduced by heating to form the film adhesive on the base material film. The varnish can be applied using, for example, a knife coater, a roll coater, an applicator, a die coater or a comma coater.

The substrate film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when volatilizing the organic solvent, polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, poly Examples include an ether naphthalate film and a methylpentene film. The base film is not limited to a single layer made of these films, but may be a multilayer film made of two or more kinds of materials.

Specifically, the conditions for volatilizing the organic solvent from the varnish are preferably heating at 50 to 200 ° C. for 0.1 to 90 minutes. The content of the organic solvent is preferably reduced to 1.5% by mass or less if there is no influence on generation of voids after mounting or adjustment of viscosity.

When a chip with an adhesive is produced by dicing a semiconductor wafer having an adhesive layer formed on the surface, for example, a varnish film is formed on the surface of the semiconductor wafer by spin coating, and then a solvent is added by heating. You can reduce it.

Below, the present disclosure will be described based on examples. The present invention is not limited to the examples below.

<Example 1>
(Preparation of varnish for forming adhesive layer)
A varnish was prepared by mixing the following compounds in the proportions shown in Table 1 and degassing in vacuum. MEK was used as the solvent.
(1) Thermosetting resin (epoxy resin) having a weight average molecular weight of less than 10,000
-Trifunctional methane skeleton-containing polyfunctional solid epoxy (Mitsubishi Chemical Corporation, EP1032H60 (hereinafter referred to as "EP1032"), weight average molecular weight: 800 to 2000)
-Bisphenol F type liquid epoxy (manufactured by Mitsubishi Chemical Corporation, YL983U (hereinafter referred to as "YL983"), molecular weight: about 336)
-Flexible semi-solid epoxy (manufactured by Mitsubishi Chemical Corporation, YL7175-1000 (hereinafter referred to as "YL7175"), weight average molecular weight: 1000 to 5000)
(2) Curing agent, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Chemicals Co., Ltd., 2MAOK-PW (hereinafter referred to as " 2MAOK ".))
(3) Polymer component / phenoxy resin having a weight average molecular weight of 10,000 or more (Toto Kasei Co., Ltd., ZX1356-2 (hereinafter referred to as “ZX1356”), Tg: about 71 ° C., weight average molecular weight: about 63000)
(4) Flux agent (carboxylic acid)
-Glutaric acid (Made by Aldrich, melting point: about 98 ° C)
(5) Resin filler / organic filler (Rohm and Haas Japan Co., Ltd., EXL-2655: core-shell type organic fine particles)
(6) Inorganic filler / silica filler (Admatex Co., SE2050, average particle size: 0.5 μm)
-Methacrylic surface-treated nano silica filler (Admatex Co., Ltd., YA050C-SM (hereinafter referred to as "SM nano silica"), average particle size: about 50 nm)

(Preparation of film adhesive)
A varnish was applied on a surface release-treated polyethylene terephthalate film (manufactured by Teijin Film Solutions Co., Ltd., trade name: Teijin Tetron Film A-63) having a thickness of 50 μm. After the drying step, a film adhesive having a thickness of 45 μm was obtained.

(Manufacturing of semiconductor devices)
A semiconductor chip with a solder bump (WALTS-TEG CC80 (product name), manufactured by Waltz Co., Ltd.) was prepared as a first member. The structure of this semiconductor chip was as follows.
-Chip size: 7.3 mm x 7.3 mm x 0.05 mmt
・ Bump height: approx. 45 μm (total height of copper pillar and solder)
・ Number of bumps: 1048 pins ・ Bump pitch: 80 μm

An adhesive piece was obtained by cutting the produced film-like adhesive into the same size as the semiconductor chip (7.3 mm × 7.3 mm). This adhesive piece was laminated on the surface of the semiconductor chip (the surface on which the solder was formed). The lamination was performed using a vacuum laminator V130 (Nikko Materials Co., Ltd.) under the conditions of 80 ° C./0.5 MPa / 60 s.

A semiconductor chip (WALTS-TEG IP80, manufactured by Waltz Co., Ltd.) was prepared as a second member. The structure of this semiconductor chip was as follows.
・ Chip size: 10mm × 10mm × 0.1mmt
-Metal forming the connecting portion: Ni / Au

The semiconductor chip with solder bumps was placed on the surface of the semiconductor chip (second member) on the side where the connection portion was formed such that the adhesive piece was in contact with this surface. Then, after performing a temporary pressure bonding step using a pressure bonding device (FCB3, manufactured by Panasonic Corporation), a pressure bonding step was performed using a laser bonder (FDB250, manufactured by Shibuya Industry Co., Ltd.). The temporary pressure bonding step was carried out under the condition of 80 ° C./25 N / 1 s. The crimping process was performed under the following conditions.
・ Crimping pressure: 30N
-Pressing time: 1 second-Laser irradiation pattern: Fig. 6 (a) (areas 1, 3, 5, 7 were irradiated with laser)
・ Laser irradiation time: 1 second ・ Average temperature of bonding tool surface (outer surface of semiconductor chip with solder bumps) Tc: 235 ° C. at each center of areas 1, 3, 5, 7
-Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) Ts: 205 ° C at the center of each of the areas 2, 4, 6, 8
-Temperature of bonding tool surface (outer surface of semiconductor chip with solder bumps) T9: 204 ° C in the center of area 9
・ Temperature difference (Tc-Ts): 30 ℃
・ Temperature difference (Ts-T9): 1 ° C

After the crimping process, a pressure oven device (VSU28, manufactured by Shin Apex Co., Ltd.) was used to perform the curing process under the conditions of 175 ° C./10 min / 0.4 MPa and a heating rate of 20 ° C./min. A semiconductor device according to this example was obtained through this curing process.

<Example 2>
A semiconductor device was manufactured in the same manner as in Example 1 except that the pressure bonding step was performed under the following conditions.
・ Crimping pressure: 30N
-Crimping time: 3 seconds-Laser irradiation pattern: Fig. 6 (a) (irradiated with a laser having a weaker intensity than in Example 1).
-Laser irradiation time: 3 seconds-Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at each center of areas 1, 3, 5, and 7: 225 ° C
-Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of the areas 2, 4, 6 and 8: 200 ° C
-Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of area 9: 200 ° C
・ Temperature difference (Tc-Ts): 25 ° C
・ Temperature difference (Ts-T9): 0 ° C

<Comparative Example 1>
A semiconductor device was manufactured in the same manner as in Example 1 except that the pressure bonding step was performed under the following conditions.
・ Crimping pressure: 30N
・ Crimping time: 1 second ・ Laser irradiation pattern: Fig. 6 (b) (Areas 1, 3, 5, 7 are irradiated with a laser, and a laser having a weaker intensity than this laser is irradiated in areas 2, 4, 6, 8) It was irradiated.)
-Laser irradiation time: 1 second-Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of areas 1, 3, 5, and 7: 225 ° C
-Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of the areas 2, 4, 6 and 8: 215 ° C
・ Temperature difference (Tc-Ts): 10 ℃

<Comparative example 2>
A semiconductor device was manufactured in the same manner as in Example 2 except that the pressure bonding step was performed under the following conditions.
・ Crimping pressure: 30N
-Pressing time: 3 seconds-Laser irradiation pattern: Fig. 6 (b) (irradiated with a laser having a weaker intensity than in Comparative Example 1).
-Laser irradiation time: 3 seconds-Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of areas 1, 3, 5, 7: 210 ° C
-Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) Ts: 205 ° C at the center of each of the areas 2, 4, 6, 8
・ Temperature difference (Tc-Ts): 5 ℃

<Example 3>
A semiconductor device was manufactured in the same manner as in Example 1 except that the pressure bonding step was performed under the following conditions. After the pressure-bonding step, a curing oven was used under the same conditions as in Example 1 using a pressure oven device (PCOA-01, manufactured by NTT Advance Technology Co., Ltd.).
・ Crimping pressure: 30N
・ Crimping time: 1 second ・ Laser irradiation pattern: Fig. 7 (Areas 1, 3, 5, 7 are irradiated with a laser output of 100% and areas 2, 4, 6, 8 are irradiated with a laser of 10%. It was irradiated.)
-Laser irradiation time: 1 second-Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at each center of areas 1, 3, 5, 7: 240 ° C
・ Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of the areas 2, 4, 6 and 8: 211 ° C.
・ Temperature of bonding tool surface (outer surface of semiconductor chip with solder bumps) T9: 205 ° C in the center of area 9
・ Temperature difference (Tc-Ts): 29 ℃
・ Temperature difference (Ts-T9): 6 ℃

<Example 4>
A semiconductor device was manufactured in the same manner as in Example 3 except that the pressure bonding step was performed under the following conditions.
・ Crimping pressure: 30N
-Pressing time: 3 seconds-Laser irradiation pattern: Fig. 7 (irradiated with a laser having a weaker intensity than in Example 3)
-Laser irradiation time: 3 seconds-Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of each of areas 1, 3, 5 and 7: 230 ° C
-Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) Ts: 205 ° C at the center of each of the areas 2, 4, 6, 8
-Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) at the center of area 9: 200 ° C
・ Temperature difference (Tc-Ts): 20 ℃
・ Temperature difference (Ts-T9): 5 ℃

<Evaluation of semiconductor device>
The following evaluations were performed on the semiconductor devices according to the examples and comparative examples.

(1) Evaluation of Initial Conductivity Using a multimeter (R6871E, manufactured by Advantest Co., Ltd.), the initial connection resistance values of the semiconductor devices according to the examples and comparative examples were measured, and the initial conductivity was evaluated. The evaluation criteria are as follows. The results are shown in Tables 2 and 3.
A: The initial connection resistance value of the peripheral part is 30 to 35Ω.
B: The initial connection resistance value of the peripheral portion exceeds 35Ω.

(2) Evaluation of void occurrence rate The void occurrence rates of the semiconductor devices according to the examples and comparative examples were evaluated by the following method. First, an ultrasonic image diagnostic apparatus (Insight-300, manufactured by Insight Co., Ltd.) was used to take external images of the semiconductor devices according to the examples and comparative examples. An image of the adhesive layer on the semiconductor chip was captured with a scanner (GT-9300UF, manufactured by EPSON Corporation). This image was subjected to color tone correction and two-gradation conversion by image processing software (Adobe Photoshop (registered trademark), Adobe Systems Incorporated) to identify the void portion, and the ratio of the void portion to the histogram was calculated. The evaluation criteria are as follows. The results are shown in Tables 2 and 3.
A: The ratio of the void portion is 5% or less based on the area of the adhesive portion on the semiconductor chip.
B: Based on the area of the adhesive portion on the semiconductor chip, the proportion of the void portion is more than 5%.

(3) Evaluation of Fillet Width The semiconductor devices according to the examples and the comparative examples were observed from above using a digital microscope (VHX-5000, manufactured by Keyence Corporation). Then, the maximum value of the portion (fillet) protruding from the square semiconductor chip was measured. The maximum value of the fillet width was measured for each of the four sides of the semiconductor chip, and the average value was used as the fillet width. The results are shown in Tables 2 and 3.

(4) Evaluation of Coverage The semiconductor devices according to the examples and comparative examples were observed from above using a digital microscope (VHX-5000, manufactured by Keyence Corporation). Then, the width (coverage) of a portion (fillet) protruding from the square semiconductor chip at two points at a position of 200 μm from the corner of the semiconductor chip was measured (see FIG. 4). Eight points of coverage were measured for the four corners of the semiconductor chip, and the average value was calculated. The results are shown in Tables 2 and 3. The "coverage index" shown in Tables 2 and 3 is a value calculated by dividing the coverage (average value) by the fillet width (average value). "-" In the table means not measured.

According to the present disclosure, there is provided a semiconductor device in which the fillet on the side of the semiconductor chip is small and coverage is secured, and a manufacturing method thereof.

1 to 9 ... Area, 10 ... Semiconductor chip (first member), 10a ... Copper pillar (first connection part), 10b ... Solder bump (first connection part), 11 to 13 ... Semiconductor chip, 20 ... Substrate (second member), 20a ... Wiring (second connecting portion), 30 ... Adhesive layer, 40 ... Laminated body, 50, 70 ... Semiconductor device, 60 ... Interposer (second member), A1 ... Laser irradiation part, A2 ... Laser non-irradiation part, C ... Corner part, F ... Pressing force, L ... Laser, S ... Side, Sa ... One end, Sb ... Other end

Claims (9)

A first member having a first connecting portion and having a linearly extending side;
A second member having a second connecting portion,
An adhesive layer disposed between the first member and the second member,
A method of manufacturing a semiconductor device, wherein the first connecting portion and the second connecting portion are electrically connected,
A laminating step of preparing a laminated body in which the first member, the adhesive layer and the second member are laminated in this order;
A pressing step of irradiating the laminated body with a laser for heating while pressing force is applied to the laminated body in the thickness direction,
Including,
In the crimping step, the laser irradiation portion, the laser non-irradiation portion, and the laser irradiation portion are formed in this order from the peripheral edge portion of the one end of the first member toward the peripheral edge portion of the other end, A method of manufacturing a semiconductor device, which comprises irradiating a laser beam onto the stacked body. The method for manufacturing a semiconductor device according to claim 1, wherein the first member is a semiconductor chip having a square or rectangular shape. A first member having a first connecting portion and having a linearly extending side;
A second member having a second connecting portion,
An adhesive layer disposed between the first member and the second member,
A method of manufacturing a semiconductor device, wherein the first connecting portion and the second connecting portion are electrically connected,
A laminating step of preparing a laminated body in which the first member, the adhesive layer and the second member are laminated in this order;
A pressure-bonding step of applying heat to the laminated body in a state in which a pressing force is applied to the laminated body in the thickness direction,
Including,
The first member is a semiconductor chip having a square or rectangular shape,
A method of manufacturing a semiconductor device, wherein heat is applied to the stacked body so as to satisfy the following Condition 1 in the pressure bonding step.
<Condition 1>
The side of the semiconductor chip is divided into three equal parts and divided into nine areas in total, and an area including one corner of the semiconductor chip is defined as an area 1 among the nine areas. If the areas lined up along the periphery are areas 2-8,
An average temperature Tc of the outer surface of the semiconductor chip at the center of each of the areas 1, 3, 5, 7;
The difference (Tc-Ts) from the average temperature Ts of the outer surface of the semiconductor chip at the central portions of the areas 2, 4, 6, and 8 is 15 ° C. or more. The method for manufacturing a semiconductor device according to claim 3, wherein in the pressure-bonding step, heat is applied to the stacked body so as to further satisfy the following Condition 2.
<Condition 2>
Of the nine areas, an area including the center of the semiconductor chip is an area 9,
An average temperature Ts of the outer surface of the semiconductor chip at the central portions of the areas 2, 4, 6, and 8,
The difference (Ts-T9) from the temperature T9 of the outer surface of the semiconductor chip in the central portion of the area 9 is 5 ° C. or more. The method for manufacturing a semiconductor device according to claim 1, wherein the second member is a member selected from the group consisting of a wiring board, a semiconductor chip and a semiconductor wafer. 6. The method for manufacturing a semiconductor device according to claim 1, wherein the adhesive layer contains a thermosetting resin having a weight average molecular weight of less than 10,000 and a curing agent. The method for manufacturing a semiconductor device according to claim 6, wherein the adhesive layer further contains a polymer component having a weight average molecular weight of 10,000 or more. The method for manufacturing a semiconductor device according to claim 1, wherein the adhesive layer is a film adhesive. A semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 to 8.

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