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WO2019119415A1 - 阵列基板和显示装置 - Google Patents

阵列基板和显示装置 Download PDF

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Publication number
WO2019119415A1
WO2019119415A1 PCT/CN2017/117996 CN2017117996W WO2019119415A1 WO 2019119415 A1 WO2019119415 A1 WO 2019119415A1 CN 2017117996 W CN2017117996 W CN 2017117996W WO 2019119415 A1 WO2019119415 A1 WO 2019119415A1
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WIPO (PCT)
Prior art keywords
light
array substrate
thin film
layer
film transistor
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Ceased
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PCT/CN2017/117996
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English (en)
French (fr)
Inventor
蔡武卫
林致远
陈国峰
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Shenzhen Royole Technologies Co Ltd
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Shenzhen Royole Technologies Co Ltd
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Priority to PCT/CN2017/117996 priority Critical patent/WO2019119415A1/zh
Priority to CN201780095826.2A priority patent/CN111213252A/zh
Publication of WO2019119415A1 publication Critical patent/WO2019119415A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate and a display device.
  • TFT thin film transistor
  • the active layer Due to the material itself, when ambient light or ultraviolet light is applied to the thin film transistor (TFT), especially the active layer, additional electron/hole pairs are generated on the surface of the TFT, and additional carriers are generated in the channel. In turn, the threshold voltage drifts, which affects the stability of the device, and ultimately leads to a decrease in the quality of the display panel or the display device, which affects the user experience.
  • TFT thin film transistor
  • the present invention aims to solve at least one of the technical problems in the related art to some extent. Accordingly, it is an object of the present invention to provide an array substrate which can prevent ambient light or ultraviolet light from being irradiated to a thin film transistor, improve stability of thin film transistor characteristics, and has low cost or does not affect the thickness of the TFT.
  • the invention provides an array substrate.
  • the array substrate includes: a substrate, an upper surface of the substrate is divided into a pixel region and a non-pixel region; a thin film transistor, the thin film transistor is disposed in the non-pixel region; an insulating layer, The insulating layer is disposed on a side of the thin film transistor away from the substrate, and at least a portion is formed of a light absorbing material.
  • the light absorbing material absorbs the light, prevents the light from being irradiated to the TFT, affects the characteristics of the TFT, thereby improving the stability of the TFT and the array substrate, and preventing the light from being irradiated.
  • the generation of reflected light reflected after the metal trace to the array substrate to increase the environmental contrast ratio (the ambient contrast ratio is the bright light source (the brightest picture after the panel using the array substrate is lit) and the dark state light source (using the The ratio of the darkest picture after the panel of the array substrate is turned on) further improves the quality of the display panel using the array substrate.
  • the insulating layer is at least one of a flat layer and a pixel defining layer.
  • the flat layer is disposed in the non-pixel region and is formed of the light absorbing material.
  • the flat layer is disposed in the pixel region and the non-pixel region, and the flat layer corresponding to the non-pixel region is formed of the light absorbing material, corresponding to the pixel region
  • the flat layer is formed of a light transmissive material.
  • the flat layer is disposed in the pixel region and the non-pixel region, and is formed of the light absorbing material.
  • the light absorbing material is an organic material having an absorbance greater than two.
  • the invention provides a display device.
  • the display device comprises the array substrate described above. Therefore, when the TFT is displayed in ambient light or ultraviolet light, the light absorbing material absorbs the light to prevent the light from being irradiated to the TFT, affecting the characteristics of the TFT, thereby improving the stability of the TFT and the array substrate, and further improving the stability of the TFT and the array substrate.
  • the quality of the display panel of the array substrate further improves the display quality, performance, and market competitiveness of the display device.
  • 1 is a schematic view showing the structure of an array substrate in one embodiment of the present invention.
  • FIG. 2 is a schematic view showing the structure of an OLED array substrate in another embodiment of the present invention.
  • Fig. 3 is a view showing the structure of an array substrate in still another embodiment of the present invention.
  • Fig. 4 is a view showing the structure of an LCD display panel in still another embodiment of the present invention.
  • Fig. 5 is a view showing the structure of an LCD display panel in still another embodiment of the present invention.
  • FIG. 6 is a schematic structural view of an array substrate in an OLED display panel according to still another embodiment of the present invention.
  • the invention provides an array substrate.
  • the array substrate includes a substrate 10 having an upper surface divided into a pixel area A and a non-pixel area B, and a thin film transistor 20 disposed in the non-pixel area B.
  • the insulating layer 30 is disposed on a side of the thin film transistor 20 away from the substrate 10, and at least a portion is formed of a light absorbing material.
  • the light absorbing material absorbs the light, prevents the light from being irradiated to the TFT, affects the characteristics of the TFT, thereby improving the stability of the TFT and the array substrate, and preventing the light from being irradiated.
  • the generation of reflected light reflected by the metal traces of the array substrate to increase the environmental contrast ratio (the ratio of the ambient contrast ratio to the bright state light source and the dark state light source) further improves the quality of the display panel using the array substrate.
  • the specific kind of the substrate has no limitation, and those skilled in the art can flexibly select according to actual conditions.
  • the specific type of substrate includes, but is not limited to, a glass substrate, a polymer substrate, or a metal substrate. Thereby, the selectivity is wide and the use performance is good.
  • the specific type of the thin film transistor is not limited, and may be a thin film transistor of any structure in the art, for example, a thin film transistor of a top gate structure, a thin film transistor of a bottom gate structure, a back channel etch type.
  • a thin film transistor or an etch barrier type thin film transistor or the like can be flexibly selected by those skilled in the art according to actual needs.
  • the array substrate has a wide range of applications.
  • the specific kind of the light absorbing material is not limited as long as the ambient light or the ultraviolet light can be absorbed, and the TFT is protected from the above light.
  • the light absorbing material is an organic material having an absorbance greater than two. Thereby, the OD value (absorbance) of the light absorbing material is high, and the absorption of ambient light or ultraviolet light can be efficiently absorbed, the TFT is protected from the above light, and the TFT characteristics and stability are improved.
  • the insulating layer is at least one of a flat layer and a pixel defining layer.
  • the flat layer and the pixel defining layer are conventional arrangement structures in the array substrate, which are disposed at the same position as in the prior art, wherein the flat layer is disposed on a side of the thin film transistor away from the substrate, Providing a flat surface for facilitating the operation of the subsequent steps, a flat layer is disposed in the array substrate for the LCD display panel and the OLED display panel; the pixel defining layer is generally disposed on a side of the flat layer away from the substrate for defining In each pixel area, generally only the pixel defining layer needs to be disposed on the array substrate for the OLED display panel.
  • the insulating layer may be only a pixel defining layer, or may be only a flat layer, or may be a pixel defining layer and a flat layer at the same time; for an array substrate for an LCD display panel, The above insulating layer refers only to a flat layer of a non-pixel region.
  • the array substrate when the array substrate is used for an OLED display panel: referring to FIG. 2 and FIG. 3, the array substrate includes: a substrate 10 having an upper surface provided with a thin film transistor 20 disposed on the thin film transistor a flat layer 2 of the upper surface, OLED devices 4, 5, and 6 disposed on the upper surface of the flat layer 2 and corresponding to the pixel regions (which can be used to emit light of the same or different colors), and disposed on the upper surface of the flat layer 2, And the pixel set corresponding to the non-pixel area defines the layer 3.
  • the insulating layer may be composed of a flat layer alone, a single pixel defining layer, or a flat layer and a pixel defining layer.
  • the flat layer and the pixel defining layer are One may be formed only partially by the light absorbing material, or may be formed entirely of the light absorbing material; and when the array substrate is used for the bottom emission OLED display panel, since the light is emitted from the OLED device and then emitted downward, it is disposed corresponding to the pixel region.
  • the (pixel defining layer and the flat layer) are provided as an insulating layer having a light absorbing function, and can still function as a flat layer and a pixel defining layer, and the opening ratio of the display panel is not affected, and the display panel is not affected. Affecting the thickness of the display panel, which in turn does not lead to a reduction in flexibility, and further improves the reliability of the display panel and improves the competitive advantage in the market.
  • FIG. 3 is a cross-sectional view of the corresponding position of the OLED device 6 of FIG. 2, wherein a copper film 17 (not shown in FIG. 2) and a black module are sequentially disposed on the surface of the substrate 10 away from the thin film transistor. 7 (not shown in FIG. 2), the copper film 17 and the black module 7 are used to absorb ambient light to block ambient light from being irradiated to the TFT from the bottom; and a thin film transistor is disposed on the surface of the substrate 10 away from the black module.
  • the TFT comprises: a gate electrode 9 disposed on a surface of the substrate, a gate insulating layer 11 disposed on a surface of the substrate and covering the gate, an active layer 15 disposed on a surface of the gate insulating layer, and being lining
  • the projection on the bottom is covered by the projection of the gate 9 on the substrate, the first insulating layer 12 and the second insulating layer 13, and the source 141 and the drain 142 electrically connected to the active layer through the via holes, respectively;
  • the layer 2 is disposed on a side of the thin film transistor away from the substrate 10, the pixel electrode 16 is electrically connected to the drain through the via hole, 6 is an OLED device, and 3 is a pixel defining layer disposed on two sides of the OLED device, wherein At least one of the flat layer 2 and the pixel defining layer 3 is formed of a light absorbing material.
  • one pixel corresponds to two thin film transistors, one is a driving thin film transistor, and the other is a switching thin film transistor.
  • OLED top emission referring to FIG.
  • the thin film transistor corresponding to the pixel defining layer 3 is a switching thin film transistor corresponding to the reflective layer 25 of the pixel region (while being the anode of the OLED device)
  • the thin film transistor is a driving thin film transistor, and the two thin film transistors are disposed in the same layer, and the structure thereof is specifically: a flexible substrate 23 is disposed on the surface of the substrate 10, and a barrier layer 24 is disposed on the surface of the flexible substrate 23; A TFT is disposed on the surface of the layer, wherein the gate electrode 9 is disposed on the surface of the barrier layer, a gate insulating layer 11 is disposed on the surface of the barrier layer, and the gate electrode 9 is covered, and the surface of the gate insulating layer 11 is disposed on the surface of the gate insulating layer 11.
  • the active layer 15 and its projection on the substrate are covered by the projection of the gate 9 on the substrate, and an etch stop layer 26 is formed on the side of the active layer away from the substrate, away from the etch barrier 26
  • One side of the substrate forms a source electrode 141 and a drain electrode 142, and is electrically connected to the active layer through a via hole, and then a second insulating layer 13 is formed; a flat layer 2 is formed on the surface of the insulating layer 13, in the flat layer 2
  • the corresponding non-pixel area on the surface forms a pixel definition Layer 3, the corresponding pixel region forms a reflective layer 25 and is electrically connected to the source of the driving thin film transistor, wherein at least one of the pixel defining layer 3 and the flat layer 2 is formed of a light absorbing material.
  • the structure of the display panel is described with reference to FIGS. 4 and 5.
  • the display panel includes a substrate 10, and the substrate 10 may further include a carrier 19 (In FIG. 4 and FIG. 5, only the carrier 19 is exemplarily shown, but the carrier 19 is only a part of the substrate 10), and the substrate 10 is provided with a thin film transistor 20, which is disposed on the flat surface of the upper surface of the thin film transistor. 2.
  • the insulating layer 30 formed of the light absorbing material may be the flat layer 2 and disposed in the non-pixel region, that is, the orthographic projection of the flat layer on the substrate and the positive non-pixel region on the substrate
  • the projection of the regions on the substrate overlaps, and the flat layer 2 corresponding to the pixel region A is formed of a light transmissive material, that is, the projection of the flat layer formed of the light transmissive material on the substrate overlaps with the projection of the pixel region on the substrate.
  • the (flat layer) is provided as an insulating layer having a light absorbing function, and can still function as a flat layer, and the opening ratio of the display panel is not affected, and the thickness of the display panel is not affected, and thus the thickness of the display panel is also not affected.
  • the result is that the flexibility of the display panel is not lowered, and the reliability of the display panel can be further improved, and the competitive advantage in the market can be further improved.
  • the flat layer formed of the light absorbing material can be widely used in related products of liquid crystal display, and has a wide range of uses.
  • FIG. 5 is a cross-sectional view corresponding to one of the sub-pixel regions of FIG. 4, including: a back plate 19, a substrate 10 disposed on the surface of the back plate, and a thin film transistor 20 disposed on the substrate 10,
  • the transistor includes: a gate electrode 9 disposed on a surface of the substrate, a gate insulating layer 11 disposed on a surface of the substrate and covering the gate, an active layer 15 disposed on a surface of the gate insulating layer, and a substrate thereon
  • the upper projection is covered by the projection of the gate 9 on the substrate, the first insulating layer 12 and the second insulating layer 13, and the source 141 and the drain 142 electrically connected to the active layer through via holes, respectively; a flat layer on the surface of the thin film transistor, wherein the flat layer 2 corresponding to the non-pixel region is formed of a light absorbing material, and the flat layer 2 ′ corresponding to the pixel region is formed of a light transmissive material, which is disposed on the flat layer 2
  • FIG. 4 and FIG. 5 are only examples of pixels arranged in RGB.
  • the pixels in the display panel are not limited to RGB, and may be RGBY or RGBYW, and the like. This program does not impose any restrictions on this.
  • Both methods and methods are conventional materials and technical means, and those skilled in the art can flexibly select according to actual conditions, and then do not impose restrictions on them.
  • the invention provides a display device.
  • the display device comprises a front array substrate. Therefore, when the ambient light or the ultraviolet light is irradiated to the TFT, the light absorbing material absorbs the light, prevents the light from being irradiated to the TFT, affects the characteristics of the TFT, thereby improving the stability of the TFT and the array substrate, and preventing the light from being irradiated.
  • the quality of the display panel thereby improving the display quality, performance, and market competitiveness of the display device.
  • the display device also has all the features and advantages of the array substrate described above, and details are not described herein again.
  • the specific type of the display device has no limitation, and those skilled in the art can flexibly select according to actual conditions.
  • the display device can be a cell phone, a tablet, a television, a gaming machine or any wearable device and device.
  • the display device further includes other structures and components necessary for the conventional display device.
  • the mobile phone in addition to the above array substrate, the mobile phone further includes a color filter substrate. Necessary structures or components such as touch modules, camera modules, and audio processing modules.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
  • features defining “first” and “second” may include one or more of the features either explicitly or implicitly.
  • the meaning of "a plurality” is two or more unless specifically and specifically defined otherwise.
  • the first feature "on” or “under” the second feature may be a direct contact of the first and second features, or the first and second features may be indirectly through an intermediate medium, unless otherwise explicitly stated and defined. contact.
  • the first feature "above”, “above” and “above” the second feature may be that the first feature is directly above or above the second feature, or merely that the first feature level is higher than the second feature.
  • the first feature “below”, “below” and “below” the second feature may be that the first feature is directly below or obliquely below the second feature, or merely that the first feature level is less than the second feature.

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Abstract

一种阵列基板和显示装置。阵列基板包括：衬底(10)，衬底(10)的上表面划分为像素区域(A)和非像素区域(B)；薄膜晶体管(20)，薄膜晶体管(20)设置在非像素区域(B)；绝缘层(30)，绝缘层(30)设置在薄膜晶体管(20)远离衬底(10)的一侧，且至少一部分由吸光材料形成。由此，当有环境光或紫外光照射薄膜晶体管(20)时，吸光材料就会将光线吸收，防止光线照射到薄膜晶体管(20)，影响薄膜晶体管(20)特性，进而提高薄膜晶体管(20)和阵列基板的稳定性，还可以防止光照射到阵列基板的金属走线后被反射的反射光线的产生以提高环境对比率，环境对比率为亮态光源与暗态光源的比值，进一步的提高使用阵列基板的显示面板的品质。

Description

阵列基板和显示装置 技术领域
本发明涉及显示技术领域，具体的，涉及阵列基板和显示装置。
技术背景
由于材料本身的缘故，当有环境光或紫外光照射到薄膜晶体管(TFT)时，尤其是有源层，TFT表面会产生额外的电子/电洞对，通道内就会产生额外的载流子,进而导致临界电压飘移，影响器件的稳定性，最终导致显示面板或显示装置的品质降低，影响用户的体验效果。
因此，有关薄膜晶体管的研究有待深入。
发明内容
本发明旨在至少在一定程度上解决相关技术中的技术问题之一。为此，本发明的一个目的在于提出一种可以避免环境光或紫外光照射到薄膜晶体管、提高薄膜晶体管特性的稳定性、成本低或者不影响TFT厚度的阵列基板。
在本发明的一方面，本发明提供了一种阵列基板。根据本发明的实施例，该阵列基板包括：衬底，所述衬底的上表面划分为像素区域和非像素区域；薄膜晶体管，所述薄膜晶体管设置在所述非像素区域；绝缘层，所述绝缘层设置在所述薄膜晶体管远离所述衬底的一侧，且至少一部分由吸光材料形成。由此，当有环境光或紫外光照射TFT时，该吸光材料就会将上述光线吸收，防止上述光线照射到TFT，影响TFT特性，进而提高TFT和阵列基板的稳定性，还可以防止光照射到阵列基板的金属走线后被反射的反射光线的产生以提高环 境对比率(环境对比率为亮态光源(使用该阵列基板的面板点亮后的最亮画面)与暗态光源(使用该阵列基板的面板点亮后的最暗画面)的比值)，进一步的提高使用该阵列基板的显示面板的品质。
根据本发明的实施例，所述绝缘层为平坦层和像素界定层中的至少之一。
根据本发明的实施例，所述平坦层设置在所述非像素区域，且由所述吸光材料形成。
根据本发明的实施例，所述平坦层设置在所述像素区域和所述非像素区域，与所述非像素区域对应的所述平坦层由所述吸光材料形成，与所述像素区域对应的所述平坦层由透光材料形成。
根据本发明的实施例，所述平坦层设置在所述像素区域和所述非像素区域，且由所述吸光材料形成。
根据本发明的实施例，所述吸光材料为吸光度大于2的有机材料。
在本发明的又一方面，本发明提供了一种显示装置。根据本发明的实施例，该显示装置包括前面所述的阵列基板。由此，当有环境光或紫外光照该显示装的TFT时，该吸光材料就会将上述光线吸收，防止上述光线照射到TFT，影响TFT特性，进而提高TFT和阵列基板的稳定性，还可以防止光照射到阵列基板的金属走线后被反射的反射光线的产生以提高环境对比率与暗态光源(使用该阵列基板的面板点亮后的最暗画面)的比值)，进一步的提高使用该阵列基板的显示面板的品质，进而提高该显示装置的显示品位、使用性能，以及市场竞争力。
附图说明
图1显示了本发明一个实施例中阵列基板的结构示意图。
图2显示了本发明另一个实施例中OLED阵列基板的结构示意图。
图3显示了本发明又一个实施例中阵列基板的结构示意图。
图4显示了本发明又一个实施例中LCD显示面板的结构示意图。
图5显示了本发明又一个实施例中LCD显示面板的结构示意图。
图6显示了本发明又一个实施例中OLED显示面板中阵列基板的结构示意图。
具体实施例方式
下面详细描述本发明的实施例。下面描述的实施例是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。实施例中未注明具体技术或条件的，按照本领域内的文献所描述的技术或条件或者按照产品说明书进行。所用试剂或仪器未注明生产厂商者，均为可以通过市购获得的常规产品。
在本发明的一方面，本发明提供了一种阵列基板。根据本发明的实施例，参照图1，该阵列基板包括：衬底10，衬底10的上表面划分为像素区域A和非像素区域B；薄膜晶体管20，薄膜晶体管20设置在非像素区域B；绝缘层30，绝缘层30设置在薄膜晶体管20远离衬底10的一侧，且至少一部分由吸光材料形成。由此，当有环境光或紫外光照射TFT时，该吸光材料就会将上述光线吸收，防止上述光线照射到TFT，影响TFT特性，进而提高TFT和阵列基板的稳定性，还可以防止光照射到阵列基板的金属走线后被反射的反射光线的产生以提高环境对比率(环境对比率为亮态光源与暗态光源的比值)，进一步的提高使用该阵列基板的显示面板的品质。
根据本发明的实施例，衬底的具体种类没有限制要求，本领域技术人员可以根据实际情况灵活选择。在本发明的实施例中，衬底的具体种类包括但不限 于玻璃衬底、聚合物衬底或金属衬底。由此，选择性广，使用性能好。
根据本发明的实施例，薄膜晶体管的具体种类也没有限制要求，可以为本领域中任何结构的薄膜晶体管，比如，顶栅结构的薄膜晶体管、底栅结构的薄膜晶体管、背沟道刻蚀型薄膜晶体管或刻蚀阻挡型薄膜晶体管等等，本领域技术人员可以根据实际需求灵活选择。由此，该阵列基板应用范围广泛。
根据本发明的实施例，吸光材料的具体种类没有限制要求，只要可以将环境光或紫外光吸收，保护TFT不受上述光线的干扰即可。在本发明的实施例中，吸光材料为吸光度大于2的有机材料。由此，吸光材料的OD值(吸光度)较高，可以高效吸收环境光或紫外光吸收，保护TFT不受上述光线的干扰，提高TFT特性和稳定性。
根据本发明的实施例，为了较好的吸收环境光或紫外光，绝缘层为平坦层和像素界定层中的至少之一。由此，可以较好的吸收环境光或紫外光，保护薄膜晶体管特性不受影响，进而提高其使用稳定性。
根据本发明的实施例，平坦层和像素界定层是阵列基板中的常规设置结构，其设置的位置与现有技术中的相同，其中，平坦层设置于薄膜晶体管远离衬底的一侧，用于提供平坦的表面，利于后续步骤的操作，用于LCD显示面板和OLED显示面板的阵列基板中均设置有平坦层；像素界定层一般设置在平坦层远离衬底的一侧，用于限定出各个像素区域，通常只有用于OLED显示面板的阵列基板上需要设置像素界定层。所以，对于用于OLED显示面板的阵列基板，上述绝缘层可以仅为像素界定层，也可以仅为平坦层，也可以同时为像素界定层和平坦层；对于用于LCD显示面板的阵列基板，上述绝缘层仅仅是指非像素区域的平坦层。
下面根据一些具体实施例，详细说明绝缘层的设置位置和要求：
根据本发明的实施例，当该阵列基板用于OLED显示面板时：参照图2和图3，该阵列基板包括：衬底10，衬底10的上表面设置有薄膜晶体管20，设置在薄膜晶体管上表面的平坦层2，设置在平坦层2上表面、且与像素区域对应设置的OLED器件4、5和6(可用于发出相同或不同颜色的光)，以及设置在平坦层2上表面、且与非像素区域对应设置的像素界定层3。针对上述结构的阵列基板，绝缘层可以单独由平坦层构成、单独由像素界定层构成或由平坦层和像素界定层共同构成。具体的，当该阵列基板用于顶发射OLED显示面板时，由于光线由OLED器件发出后向上射出，并不会穿过平坦层和像素界定层，因此，平坦层和像素界定层中的至少之一可以仅部分由吸光材料形成，也可以全部由吸光材料形成；而当该阵列基板用于底发射OLED显示面板时，由于光线由OLED器件发出后向下射出，会经过与像素区对应设置的平坦层，为了保证正常的显示功能，与像素区对应设置的平坦层(即在基板上的正投影与像素区域在衬底上的正投影(或OLED器件在衬底上的正投影)重叠的平坦层)须由透光材料形成，而与非像素区域对应设置的平坦层和像素界定层可以部分或全部的由吸光材料形成。由此，可以达到吸收环境光或紫外光的效果，避免上述光线照射到TFT，影响其特性，即，上述设置方案可以提高TFT特性及其使用稳定性，而且由于直接将阵列基板本身固有的结构(像素界定层和平坦层)设置为具有吸光功能的绝缘层，依然可以起到平坦层和像素界定层的作用，且无需额外衍生费用，显示面板的开口率也不会受到影响，也不会影响显示面板的厚度，进而也就不会导致挠曲性降低的后果，而且还可以进一步提高显示面板的信赖性，提高市场竞争优势。
需要说明的是，图3是图2中OLED器件6对应位置的截面图，其中，在衬底10远离薄膜晶体管的表面上依次设有铜膜17(图2中未示出)与黑色模 组7(图2中未示出)，铜膜17与黑色模组7用于吸收环境光，以阻挡环境光从底部照射到TFT；在衬底10远离黑色模组的表面上设有薄膜晶体管，其中TFT包括：设置在衬底表面上的栅极9，设置于衬底的表面上并覆盖栅极的栅绝缘层11，设置于栅绝缘层的表面上的有源层15，且其在衬底上的投影被栅极9在衬底上的投影所覆盖，第一绝缘层12和第二绝缘层13，以及分别通过过孔与有源层电连接的源极141和漏极142；平坦层2，设置于薄膜晶体管远离衬底10的一侧，像素电极16，并通过过孔与漏极电连接的，6为OLED器件，3为像素界定层，设置于OLED器件的两侧，其中，平坦层2和像素界定层3中的至少一种是由吸光材料形成的。
本领域技术人员熟知，在OLED显示面板中，一个像素对应两个薄膜晶体管，一个是驱动薄膜晶体管，另一个是开关薄膜晶体管。根据本发明的一个具体实施例(OLED顶发射)，参照图6，与像素界定层3相对应的薄膜晶体管为开关薄膜晶体管，与像素区域的反射层25(同时为OLED器件的阳极)相对应的薄膜晶体管为驱动薄膜晶体管，且两个薄膜晶体管同层设置，其结构具体为：在衬底10的表面上设有柔性基板23，在柔性基板23的表面上设有阻隔层24；在阻隔层的表面上设置有TFT，其中，栅极9设置于阻隔层的表面上，在阻隔层的表面上设有栅绝缘层11，并覆盖栅极9，在栅绝缘层11的表面上设有有源层15，且其在衬底上的投影被栅极9在衬底上的投影所覆盖，在有源层远离衬底的一侧形成刻蚀阻挡层26，在刻蚀阻挡层26远离衬底的一侧形成源极141和漏极142，并通过过孔与有源层电连接，之后在形成第二绝缘层13；在绝缘层13的表面上形成平坦层2，在平坦层2的表面上对应的非像素区域形成像素界定层3，对应的像素区域形成反射层25，并与驱动薄膜晶体管的源极电连接，其中，像素界定层3和平坦层2中的至少之一是由吸光材 料形成。
根据本发明的实施例，当该阵列基板用于LCD显示面板时，该显示面板的结构示意图参照图4和图5，该显示面板包括：衬底10，衬底10中可进一步包含载具19(图4和图5中只是示例性的画出了载具19，但载具19只是衬底10中的一部分)，衬底10上设有薄膜晶体管20，设置在薄膜晶体管上表面的平坦层2，设置在平坦层2上表面的液晶层21，设置在液晶层上表面的彩色滤光层，该彩色滤光层包括与非像素区域对应设置的黑矩阵23和与像素区域对应设置的彩色滤光片，其中，24、25和26分别代表不同颜色的彩色滤光片。针对上述结构的显示面板，其中，由吸光材料形成的绝缘层30可以为平坦层2，且设置在非像素区域，即平坦层在衬底上的正投影与非像素区域在衬底上的正投影重叠，或者平坦层2设置在像素区域A和非像素区域B，与非像素区域B对应的平坦层2由吸光材料形成，即由吸光材料形成的平坦层在衬底上的投影与非像素区域在衬底上的投影重叠，与像素区域A对应的平坦层2由透光材料形成，即由透光材料形成的平坦层在衬底上的投影与像素区域在衬底上的投影重叠。由此，可以达到吸收环境光或紫外光的效果，避免上述光线照射到TFT，影响其特性，即，上述设置方案可以提高TFT特性及其使用稳定性，而且由于直接将阵列基板本身固有的结构(平坦层)设置为具有吸光功能的绝缘层，依然可以起到平坦层的作用，且无需额外衍生费用，显示面板的开口率也不会受到影响，也不会影响显示面板的厚度，进而也就不会导致挠曲性降低的后果，而且还可以进一步提高显示面板的信赖性，提高市场竞争优势，此外，由吸光材料形成的平坦层可广泛应用于液晶显示的相关产品中，用途广泛。
需要说明的是，图5是图4对应其中一个子像素区域的截面图，其中，包 括：背板19，设置于背板表面上的衬底10，衬底10上设有薄膜晶体管20，薄膜晶体管包括：设置在衬底表面上的栅极9，设置于衬底的表面上并覆盖栅极的栅绝缘层11，设置于栅绝缘层的表面上的有源层15，且其在衬底上的投影被栅极9在衬底上的投影所覆盖，第一绝缘层12和第二绝缘层13，以及分别通过过孔与有源层电连接的源极141和漏极142；设置在薄膜晶体管的表面上的平坦层，其中，与非像素区域对应的平坦层2是由吸光材料形成的，与像素区域对应的平坦层2’是由透光材料形成的，设置在平坦层2上表面的液晶层21，设置在液晶层上表面的彩色滤光层，该彩色滤光层包括与非像素区域对应设置的黑矩阵23和与像素区域对应设置的子像素。由此，在保证像素区域的光正常透过的同时，又不会有光线影响到TFT特性，进而提高TFT的使用稳定性。
当然，本领域技术人员可以理解，图4和图5只是以RGB排列的像素为例，上述显示面板中的像素不仅限于RGB，还可以为RGBY或者RGBYW等本领域中可适用的像素设置方式，本方案对此并不作限制要求。
根据本发明的实施例，上述的阻隔层、柔性基板、栅极、栅绝缘层、源漏极、刻蚀阻挡层、第一绝缘层、第二绝缘层、电极、像素等结构或部件形成材料和方法均是常规材料和技术手段，本领域技术人员可以根据实际情况灵活选择，再在此不做限制要求。
在本发明的又一方面，本发明提供了一种显示装置。根据本发明的实施例，该显示装置包括前面的阵列基板。由此，当有环境光或紫外光照射TFT时，该吸光材料就会将上述光线吸收，防止上述光线照射到TFT，影响TFT特性，进而提高TFT和阵列基板的稳定性，还可以防止光照射到阵列基板的金属走线后被反射的反射光线的产生以提高环境对比率与暗态光源(使用该阵列基板 的面板点亮后的最暗画面)的比值)，进一步的提高使用该阵列基板的显示面板的品质，进而提高该显示装置的显示品位、使用性能，以及市场竞争力强。当然，本领域技术人员可以理解，该显示装置还具有前面所述的阵列基板的所有特征和优点，在此不再一一赘述。
根据本发明的实施例，该显示装置的具体种类没有限制要求，本领域技术人员可以根据实际情况灵活选择。在本发明的实施例中，该显示装置可以为手机、平板电脑、电视、游戏机或任何可穿戴设备和装置。
当然，本领域技术人员可以理解，除了前面所述的阵列基板，该显示装置还包括常规显示装置所必需的其他结构和部件，以手机为例，除了上述的阵列基板，手机还包括彩膜基板、触控模组、照相模组、音频处理模组等必要的结构或部件。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征“上”或“下”可以是第一和第二特征直接接触，或第一和第二特征通过中间媒介间接接触。而且，第一特征在第二特征“之上”、“上方”和“上面”可是第一特征在第二特征正上方或斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”可以是第一特征在第二特征正下方或斜下方，或仅仅表示第一特征水平高度小于第二特征。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、 “具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本发明的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本发明的限制，本领域的普通技术人员在本发明的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (7)

  1. 一种阵列基板，其特征在于，包括：
    衬底，所述衬底的上表面划分为像素区域和非像素区域；
    薄膜晶体管，所述薄膜晶体管设置在所述非像素区域；
    绝缘层，所述绝缘层设置在所述薄膜晶体管远离所述衬底的一侧，且至少一部分由吸光材料形成。
  2. 根据权利要求1所述的阵列基板，其特征在于，所述绝缘层为平坦层和像素界定层中的至少之一。
  3. 根据权利要求2所述的阵列基板，其特征在于，所述平坦层设置在所述非像素区域，且所述平坦层由所述吸光材料形成。
  4. 根据权利要求2所述的阵列基板，其特征在于，所述平坦层设置在所述像素区域和所述非像素区域，与所述非像素区域对应的所述平坦层由所述吸光材料形成，与所述像素区域对应的所述平坦层由透光材料形成。
  5. 根据权利要求2所述的阵列基板，其特征在于，所述平坦层设置在所述像素区域和所述非像素区域，且所述平坦层由所述吸光材料形成。
  6. 根据权利要求1所述的阵列基板，其特征在于，所述吸光材料为吸光度大于2的有机材料。
  7. 一种显示装置，其特征在于，包括权利要求1-6中任一项所述的阵列基板。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060246360A1 (en) * 2005-03-18 2006-11-02 Eui-Hoon Hwang Flat panel display device with thin film transistors and method of making thereof
CN101232029A (zh) * 2008-02-25 2008-07-30 友达光电股份有限公司 液晶显示面板及其半导体阵列基板
CN100502608C (zh) * 2003-08-07 2009-06-17 三星移动显示器株式会社 平板显示器以及其制造方法
CN105070847A (zh) * 2015-09-10 2015-11-18 京东方科技集团股份有限公司 一种复合层、其制备方法及oled器件
CN106932956A (zh) * 2017-05-22 2017-07-07 厦门天马微电子有限公司 阵列基板、显示面板及显示装置

Family Cites Families (1)

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WO2017007004A1 (ja) * 2015-07-09 2017-01-12 シャープ株式会社 アクティブマトリクス基板、表示装置、及び表示装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100502608C (zh) * 2003-08-07 2009-06-17 三星移动显示器株式会社 平板显示器以及其制造方法
US20060246360A1 (en) * 2005-03-18 2006-11-02 Eui-Hoon Hwang Flat panel display device with thin film transistors and method of making thereof
CN101232029A (zh) * 2008-02-25 2008-07-30 友达光电股份有限公司 液晶显示面板及其半导体阵列基板
CN105070847A (zh) * 2015-09-10 2015-11-18 京东方科技集团股份有限公司 一种复合层、其制备方法及oled器件
CN106932956A (zh) * 2017-05-22 2017-07-07 厦门天马微电子有限公司 阵列基板、显示面板及显示装置

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