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WO2019019939A1 - 蚀刻方法和蚀刻系统 - Google Patents

蚀刻方法和蚀刻系统 Download PDF

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Publication number
WO2019019939A1
WO2019019939A1 PCT/CN2018/095998 CN2018095998W WO2019019939A1 WO 2019019939 A1 WO2019019939 A1 WO 2019019939A1 CN 2018095998 W CN2018095998 W CN 2018095998W WO 2019019939 A1 WO2019019939 A1 WO 2019019939A1
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Prior art keywords
gas
oxide
etching
reaction chamber
vapor phase
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English (en)
French (fr)
Inventor
吴鑫
郑波
马振国
王晓娟
王春
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Beijing Naura Microelectronics Equipment Co Ltd
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Beijing Naura Microelectronics Equipment Co Ltd
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    • H10P50/283—
    • H10P72/0421—

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  • the present invention relates to an etching method and an etching system in semiconductor fabrication, in particular for etching an oxide on a semiconductor substrate.
  • a preparation process-fin oxide removal process is required, that is, a part of the oxide filled between the fins is etched away to expose the fin structure to a certain height, and the fin 102 is ensured. The relevant features will not be destroyed.
  • the amount of etching inside and outside the fin may not be uniform, and there may be an etching difference, that is, there may be a height difference in the height of the remaining oxide inside and outside the fin.
  • the oxide etch process there may be residual oxide on the sidewalls of the fins, ie, the upper surface of the remaining oxide inside and outside the fins may not be flat.
  • an object of the present disclosure is, at least in part, to provide a method of etching an oxide on a semiconductor substrate that reduces or eliminates a difference in height of residual oxides inside and outside the fin and improves flatness of an upper surface of the remaining oxide. And system.
  • the present invention provides a method for etching an oxide on a semiconductor substrate, the oxide comprising a first oxide filled inside the target pattern and a second oxide filling the outside of the target pattern, the method comprising :
  • Step S1 performing a first vapor phase etching of the first oxide and the second oxide with a first catalytic gas and an HF gas for a predetermined time;
  • Step S2 performing a second vapor phase etching on the first vapor-deposited first oxide and the second oxide with the second catalytic gas and the HF gas to compensate for the etching difference between the first oxide and the second oxide, so that The surface on which the first oxide and the second oxide are located is flush.
  • the first catalytic gas comprises an alcohol gas
  • the second catalytic gas comprises ammonia gas
  • the alcohol gas comprises at least one of methanol gas, ethanol gas or isopropanol gas.
  • the first vapor phase etching and the second vapor phase etching are continuously performed in the same reaction chamber.
  • step S1 the method further includes:
  • Step S01 performing degassing treatment on the semiconductor substrate
  • step S02 the degassed semiconductor substrate is subjected to a cooling process.
  • step S2 the method further includes:
  • step S1 the step S2, step S3, and step S4 are repeatedly performed in a loop.
  • the etching amount of the first vapor phase etching is not higher than the total etching amount of the second vapor phase etching repeatedly performed by the cycle.
  • the ratio of the etching amount of the first vapor phase etching to the total etching amount of the second vapor phase etching repeatedly performed in a cycle ranges from 1:3 to 1:1.
  • the present invention also discloses a system for etching an oxide, the oxide comprising a first oxide filled inside the target pattern and a second oxide filling the outside of the target pattern, the system comprising:
  • a reaction chamber for performing a first vapor phase etching of the first oxide and the second oxide with a first catalytic gas and an HF gas for a predetermined time; and for utilizing a second catalytic gas and an HF gas pair a second vapor phase etching performed by the first vapor-etched first oxide and the second oxide to compensate for an etching difference between the first oxide and the second oxide such that the first oxide and the second The surface on which the oxide is located is flush;
  • An air intake unit configured to introduce a mixed gas of a first catalytic gas and an HF gas into the reaction chamber and to separately introduce a second catalytic gas and an HF gas into the reaction chamber;
  • control unit for dynamically controlling the pressure in the reaction chamber and the intake sequence of gas introduced into the reaction chamber.
  • control unit maintains a predetermined high pressure in the reaction chamber when introducing a mixed gas of the first catalytic gas and the HF gas, and separately introduces the second catalytic gas and the HF gas into the reaction chamber.
  • the reaction chamber is maintained at a predetermined low pressure.
  • the preset high pressure ranges from 50 to 150 Torr, and the predetermined low pressure ranges from 1 to 5 Torr.
  • the intake sequence is: first introducing a mixed gas of a first catalytic gas and an HF gas into the reaction chamber to perform the first vapor phase etching; and then separately introducing a second catalyst into the reaction chamber.
  • the gas and the HF gas are subjected to the second vapor phase etching.
  • the air intake unit is further configured to introduce an inert gas into the reaction chamber.
  • the air intake unit is for introducing the inert gas into the reaction chamber throughout the etching process.
  • the first catalytic gas comprises an alcohol gas
  • the second catalytic gas comprises ammonia gas
  • the alcohol gas comprises at least one of methanol gas, ethanol gas or isopropanol gas.
  • FIG. 1 illustrates an example FinFET in accordance with the prior art
  • FIGS. 2(a) to 2(c) show cross-sectional views of a FinFET having a plurality of fins according to the prior art
  • FIG. 3 shows a flow chart of a method for etching an oxide on a semiconductor substrate in accordance with an embodiment of the present invention
  • FIG. 4 shows a detailed flow chart of a method for etching an oxide on a semiconductor substrate in accordance with an embodiment of the present invention
  • Figure 5 shows a schematic diagram of a system for etching oxides in accordance with an embodiment of the present invention
  • Figure 6 is a schematic view showing the sequence of gas passing into the reaction chamber during etching of the oxide
  • Figure 7 shows the complete process flow using one methanol gas catalytic etch plus five ammonia catalyzed etches.
  • FIG. 1 A perspective view of a prior art example FinFET is shown in FIG.
  • the FinFET includes: a substrate 101; a fin 102 formed on the substrate 101; and a gate 103 intersecting the fin 102 on both sides of the fin 102 (shown in FIG. Oxides 104 on the left and right sides.
  • FIG. 2a shows The height of the residual oxide 104-1 inside the fin is higher than the height of the residual oxide 104-2 outside the fin, that is, there is a positive height difference
  • FIG. 2b shows that the height of the residual oxide 104-1 inside the fin is lower than The height of the remaining oxide 104-2 outside the fin, that is, there is a negative height difference.
  • the present invention provides a method for etching an oxide on a semiconductor substrate, the oxide including a first oxide filled inside the target pattern and filled outside the target pattern
  • the second oxide as described above, may be a fin or a fin-like pattern or the like. As shown in FIG. 3, the method includes:
  • the first catalytic gas may include an alcohol gas, for example, a methanol gas, an ethanol gas, or an isopropanol gas.
  • an alcohol gas for example, a methanol gas, an ethanol gas, or an isopropanol gas.
  • the height is lower than the height of the remaining oxide 104-2 outside the fin, that is, the etching difference appears to have a negative height difference between the two.
  • the surface of the remaining oxide is not flat, and there is a problem of curvature.
  • the second catalytic gas may include ammonia gas.
  • the difference in etching existing between the first oxide and the second oxide in step S1 can be compensated, that is, the positive height difference as shown in FIG. 2a can be eliminated, or the negative height difference as shown in FIG. 2b can be eliminated.
  • the problem of surface unevenness as shown in Fig. 2c can be eliminated. Thereby, the surface on which the first oxide and the second oxide are located after the first vapor phase etching and the second vapor phase etching can be made flush.
  • the first oxide and the second oxide are subjected to a first vapor phase etching for a predetermined time by using the first catalytic gas and the HF gas, and then, using the second The catalytic gas and the HF gas perform a second vapor phase etching on the first oxide and the second oxide, so that the surface of the first oxide and the second oxide after etching can be flush, thereby improving the semiconductor substrate.
  • the yield is produced to improve the performance of the formed semiconductor device.
  • methanol and ammonia gas are selected as examples of the first catalytic gas and the second catalytic gas, respectively.
  • the semiconductor substrate to be etched is placed in the same reaction chamber.
  • the first vapor phase etching and the second vapor phase etching may be continuously performed in the same reaction chamber.
  • the method further includes:
  • step S2 the method further includes:
  • step S1, step S2, step S3 and step S4 may be repeatedly performed in a cycle, such that the finally formed first oxide may be formed.
  • the surface of the second oxide is more flush, which can further improve the fabrication yield of the semiconductor substrate and improve product performance.
  • the etching amount of the first vapor phase etching is not higher than the etching amount of the second vapor phase etching.
  • the etching amount of the first vapor phase etching is not higher than the total etching amount of the second vapor phase etching which is repeated in the cycle.
  • the ratio of the etching amount of the first vapor phase etching to the etching amount of the second vapor phase etching is in the range of 1:3 to 1:1.
  • a process flow for etching an oxide on a semiconductor substrate is described in detail. 4 shows a detailed flow diagram of a method for etching an oxide on a semiconductor substrate in accordance with an embodiment of the present invention.
  • the semiconductor substrate to be etched is transferred to the degassing chamber by a robot to perform degassing, so that the moisture and the like adsorbed on the surface of the semiconductor substrate are removed by heating, and the temperature generally ranges from 200 to ⁇ . 350 ° C, time 1-3 min.
  • the cooled semiconductor substrate is transferred to the reaction chamber, and the first vapor phase etching is performed in the reaction chamber, that is, the reaction is performed by using methanol gas and HF gas, and a part of the oxide is etched away.
  • the process parameters used at this time are: the process pressure can range from 50 Torr to 150 Torr, the flow rate of HF gas can range from 100 sccm to 500 sccm, the flow rate of methanol gas can range from 500 sccm to 1000 sccm, and the flow rate of nitrogen can range from 1000 sccm to 3000 sccm.
  • the temperature of the substrate may range from 50 ° C to 80 ° C, and the predetermined time may range from 120 s to 400 s. Among them, nitrogen can be replaced by a process gas having a higher purity, or argon gas or the like.
  • the methanol gas may also be a other alcohol gas such as an ethanol gas or an isopropanol gas.
  • the process pressure can range from 1 Torr to 5 Torr
  • the flow rate of HF gas can range from 50 sccm to 200 sccm
  • the flow rate of ammonia gas can range from 50 sccm to 200 sccm
  • the flow rate of nitrogen can range from 1000 sccm to 3000 sccm.
  • the temperature of the substrate may range from 50 ° C to 80 ° C
  • the process time may range from 50 s to 150 s.
  • the semiconductor substrate that completes the second vapor phase etching is transferred to an annealing chamber for annealing to process the complex, and is usually annealed at a temperature of 100 ° C to 200 ° C.
  • the annealed semiconductor substrate is transferred to a cooling chamber for cooling to cool to room temperature. At this point, the entire etching process is over.
  • FIG. 5 shows a schematic diagram of a system for etching oxides in accordance with an embodiment of the present invention.
  • the system includes a reaction chamber 501, an air intake unit 502, and a control unit 503.
  • reaction chamber 501 is configured to perform a first vapor phase etching of the first oxide and the second oxide with the first catalytic gas and the HF gas for a predetermined time; and to perform the first vapor phase etching using the second catalytic gas and the HF gas pair
  • the first oxide and the second oxide are subjected to a second vapor phase etching to compensate for an etching difference between the first oxide and the second oxide such that a surface on which the first oxide and the second oxide are located is flat Qi.
  • the air intake unit 502 is configured to introduce a mixed gas of the first catalytic gas and the HF gas into the reaction chamber 501 and to separately introduce the second catalytic gas and the HF gas into the reaction chamber 501.
  • the control unit 503 is configured to dynamically control the pressure in the reaction chamber 501 and the intake sequence of the gas introduced into the reaction chamber 501.
  • the system has a reaction chamber 501 which is a vacuum chamber having a substantially circular cross section.
  • a cylindrical stage 2 as a mounting portion of the wafer W is provided inside the reaction chamber 501 for supporting the wafer W.
  • An exhaust port 14 communicating with the vacuum exhaust portion is provided at the bottom of the reaction chamber 501.
  • a gas supply portion 3 that communicates with the gas source A of the intake unit 502, the gas source B, and the gas source C is provided at the top of the reaction chamber 501.
  • the gas supply portion 3 has two sets of gas passages that are isolated from each other.
  • the gas source B of the second catalytic gas for example, NH 3
  • the first catalytic gas for example, methanol
  • the gas source A and the gas source C of the HF gas are such that the first catalytic gas (for example, methanol) and the HF gas are mixed before entering the inside of the reaction chamber 501, and then enter the inside of the reaction chamber 501 through the gas supply portion 3.
  • the first catalytic gas (for example, methanol) gas source A is turned off, and the gas source C of the HF gas is turned on, so that the HF gas is caused.
  • a gas passage of the gas supply portion 3 enters the inside of the reaction chamber 501, and a gas source B of the second catalytic gas (for example, NH3) is opened, so that the second catalytic gas (for example, NH3) and its diluent gas (N2 or Ar) enters the inside of the reaction chamber 501 through another gas passage of the gas supply portion 3.
  • the HF gas and the second catalytic gas enter the inside of the reaction chamber 501 through the two sets of gas passages which are separated from each other by the gas supply portion 3, and then mix again inside the reaction chamber 501 to avoid particulate matter.
  • the system may also include a gas source D (not shown) that dilutes the gas (N2 or Ar).
  • the etching apparatus is further provided with a control unit 503.
  • the control unit 503 includes, for example, a computer, and is provided with a program, a memory, and a CPU (Central Processing Unit).
  • a program for performing a series of operations in the operation description described later is incorporated, and the switching of each valve, the adjustment of the flow rate of each gas, and the adjustment of the pressure in the reaction chamber 501 are performed in accordance with the program.
  • the program is stored in a computer storage medium such as a floppy disk, an optical disk, a hard disk, a magneto-optical disk, or the like, and is mounted to the control unit 503.
  • the air intake unit 502 needs to simultaneously adapt to introduce a mixed gas of a first catalytic gas (for example, methanol) and HF into the reaction chamber 501 and separately introduce a second catalytic gas (for example, ammonia gas) and HF into the reaction chamber 501.
  • a first catalytic gas for example, methanol
  • a second catalytic gas for example, ammonia gas
  • the second catalytic gas such as ammonia gas
  • HF gas since ammonia gas and HF gas easily form solid particulate matter NH4F, it will adhere to the inner wall of the pipeline, and the valve may be blocked or the particle problem may exceed the standard for a long time. Therefore, in order to avoid this problem, the second catalytic gas (for example, ammonia gas) and the HF gas are separated into the reaction chamber 501, and after entering the reaction chamber 501, mixing is performed.
  • a two-layer showerhead structure or the like can be employed to achieve separate introduction of the second catalytic gas (for example, ammonia gas) and HF gas.
  • control unit 503 can dynamically control the pressure in the reaction chamber 501, and maintain a preset high pressure in the reaction chamber 501 when introducing the mixed gas of the first catalytic gas and the HF gas, for example, maintaining the temperature from 50 Torr to 150 Torr. Further preferably, for example, kept at 100 Torr; maintaining a predetermined low pressure in the reaction chamber while introducing the second catalytic gas and the HF gas separately into the reaction chamber 501, for example, maintaining from 1 Torr to 5 Torr, further preferably, for example, Keep it at 3 Torr.
  • the vacuum gauge pressure for controlling the process pressure ranges from 0 to 200 Torr.
  • the vacuum gauge is used to directly control the pressure at a low pressure (for example, 3 Torr), the stability and controllability are deteriorated, and it is out of the proper control range.
  • a vacuum gauge having a range of 0 to 10 Torr is newly added in the reaction chamber 501.
  • the pressure control is selected by the range of 200 Torr when the first vapor phase etching is performed, and the 10 Torr gauge is selected during the second vapor phase etching, thereby achieving different pairs by freely switching between the two process rules. Precise control of different pressures during the etching process.
  • control unit 503 can control the order of intake of the gas introduced into the reaction chamber 501 by first introducing a first catalytic gas (for example, methanol) and HF gas into the reaction chamber 501.
  • the gas is mixed to perform the first vapor phase etching; after the first vapor phase etching is completed, then a second catalytic gas (for example, ammonia gas) and HF gas are separately introduced into the reaction chamber 501 to perform the second vapor phase etching.
  • the presence of gas in the same reaction chamber can be divided into seven stages 1-7 depending on the time sequence in which the gas is introduced.
  • Stage 1 the steady-state heat transfer stage: a certain amount of nitrogen is first introduced into the reaction chamber to allow the reaction chamber to reach a preset pressure value (at this time, the system automatically selects a high-range vacuum gauge), and the semiconductor substrate is passed through the susceptor. The heat transfer is raised to the process temperature required for the process.
  • Stage 2 methanol pre-adsorption stage: At this time, methanol gas is introduced into the reaction chamber to allow the catalyst substrate to sufficiently adsorb the catalyst while stabilizing the methanol flow rate, which facilitates the stable progress of the etching reaction.
  • Stage 3 methanol catalytic etching stage (first vapor phase etching stage): after the methanol gas pre-adsorption is sufficient, a mixed gas of the first catalytic gas (for example, methanol) and the main etchant HF gas is started in the reaction chamber, and catalyzed by methanol gas.
  • the HF gas chemically reacts with the oxide to form gaseous by-products which are withdrawn from the reaction chamber.
  • the etching continues, and by controlling the length of the etching time, different amounts of oxide etching can be achieved.
  • Stage 4 reaction chamber purge stage: after the methanol gas catalytic etching phase is finished, the mixed gas of methanol gas and HF gas is closed, but there is still a mixture of methanol gas and HF gas remaining in the reaction chamber.
  • the main purpose of this stage The mixed residual gas of methanol gas and HF gas is discharged by continuously introducing nitrogen gas.
  • the reaction chamber is purged to control the exhaust effect by the flow rate of nitrogen gas and the length of time.
  • the system automatically prepares for subsequent low-pressure nitrogen-catalyzed etching and begins to switch to a low-voltage control system.
  • Stage 5 Ammonia pre-adsorption stage: At this time, ammonia gas is introduced into the reaction chamber to sufficiently adsorb the catalyst on the surface of the semiconductor substrate while stabilizing the flow rate of the ammonia gas, which facilitates the stable progress of the etching reaction.
  • Stage 6 Ammonia catalytic etching stage (second vapor phase etching stage): After the ammonia gas pre-adsorption is sufficient, a second catalytic gas (for example, ammonia gas) and a main etchant HF gas are separately introduced into the chamber, and catalyzed by ammonia gas.
  • the HF gas chemically reacts with the oxide to form a solid complex.
  • the solid complex adheres to the surface of the semiconductor substrate and cannot be discharged outside the reaction chamber, requiring subsequent annealing treatment. By controlling the length of the etching time, different amounts of oxide etching can be achieved. After the etching is completed, the nitrogen gas and the HF gas are simultaneously turned off.
  • Stage 7 Chamber Purge Stage: The chamber is continuously purged with nitrogen to evacuate HF gas and ammonia residual gas.
  • Figure 6 is only a schematic diagram of the ventilation sequence, and does not represent the actual flow rate.
  • the HF and nitrogen sizes in the methanol gas catalytic etching phase and the ammonia catalytic etching phase may be different, which may be different according to the actual situation. Make adjustments.
  • the present invention utilizes a combination of methanol gas catalytic etching (first vapor phase etching) and ammonia gas catalytic etching (second vapor phase etching) to collectively etch oxides inside and outside the fin.
  • first vapor phase etching methanol gas catalytic etching
  • second vapor phase etching ammonia gas catalytic etching
  • the ratio of the etching amount of the methanol gas catalytic etching to the etching amount of the ammonia catalytic etching is in the range of 1:3 to 1:1.
  • an etching amount of a 400 angstrom oxide which is commonly completed is exemplified, wherein the etching amount of the methanol gas catalytic etching is between 100 and 200 angstroms, and the etching amount of the ammonia gas catalytic etching is between 200 and 300 angstroms.
  • the process parameters that can be used in the two etch stages can be:
  • Methanol gas catalytic etching process pressure 50 Torr to 150 Torr, HF gas flow rate 100 sccm to 500 sccm, methanol gas flow rate 500 sccm to 1000 sccm, nitrogen flow rate 1000 sccm to 3000 sccm, semiconductor substrate temperature 50 ° C to 80 ° C, process time 120 s to 400 s;
  • Ammonia catalytic etching process pressure 1 Torr to 5 Torr, HF flow rate 50 sccm to 200 sccm, ammonia gas flow rate 50 sccm to 200 sccm, nitrogen flow rate 1000 sccm to 3000 sccm, semiconductor substrate temperature 50 ° C to 80 ° C, process time 50 s to 150 s.
  • Methanol gas catalytic etching process pressure 95 Torr, HF gas flow rate 200 sccm, methanol gas flow rate 900 sccm, nitrogen flow rate: 1320 sccm, semiconductor substrate temperature 75 ° C, process time 300 s;
  • Ammonia catalytic etching process pressure 3 Torr, HF flow rate 87 sccm, ammonia gas flow rate 80 sccm, nitrogen flow rate: 1887 sccm, semiconductor substrate temperature 75 ° C, process time 80 s.
  • both the first vapor phase etching eg, methanol gas catalytic etching
  • the second vapor phase etching eg, ammonia gas catalytic etching
  • a multiple cycle etching scheme may be employed, that is, the first vapor phase etching cycle is repeated a plurality of times, and then the second vapor phase etching cycle is repeated a plurality of times.
  • the total amount of etching of the first vapor phase etching which is repeated a plurality of times is not higher than the total etching amount of the second vapor phase etching which is repeated a plurality of times.
  • the ratio of the total amount of etching of the first vapor phase etching which is repeated a plurality of times and the total etching amount of the second vapor phase etching which is repeated a plurality of times is in the range of 1:3 to 1:1.
  • a first vapor phase etch eg, methanol gas catalytic etch
  • multiple second vapor etch eg, ammonia catalyzed etch
  • the etching amount of the first vapor phase etching is not higher than the total etching amount of the second vapor phase etching which is repeated in the cycle.
  • the ratio of the etching amount of the first vapor phase etching to the total etching amount of the second vapor phase etching repeated in the cycle is in the range of 1:3 to 1:1.
  • Figure 7 shows the complete process flow for a primary methanol gas catalytic etch plus five ammonia catalyzed etches.
  • the methanol gas catalytic etching and the ammonia gas catalytic etching are completed in the same reaction chamber, and after an ammonia catalytic etching is completed, annealing, cooling, and then the next ammonia gas catalytic etching is performed.
  • an inert gas such as nitrogen or argon is introduced into the reaction chamber throughout the etching process.

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Abstract

本发明提供了一种用于蚀刻半导体衬底上的氧化物的方法及系统，包括：用第一催化气体和HF气体对第一氧化物和第二氧化物进行预定时间的第一气相蚀刻；用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐，可以提高半导体衬底的制作良率，提高所制作形成的半导体器件的性能。

Description

蚀刻方法和蚀刻系统 技术领域
本发明涉及一种半导体制造中的蚀刻方法和蚀刻系统，具体地用于蚀刻半导体衬底上的氧化物。
背景技术
近年来，半导体集成电路产业获得迅猛发展。主流半导体技术开始普遍采用鳍式场效应晶体管(FinFET，Fin Field-Effect Transistor)结构，这种结构可以大幅改善电路控制并减少漏电流(leakage)，也可以大幅缩短晶体管的闸长。具体的FinFET结构可以参见图1。在FinFET结构的鳍102周围具有一层氧化物104。
为了形成该氧化物层，在FinFET的制备工艺中，需要有一道制备工序-鳍氧化物去除工序，即将鳍之间填充的氧化物蚀刻掉一部分以使鳍结构露出一定高度，同时要保证鳍102的相关特征不会被破坏。
在该氧化物蚀刻过程中，鳍内外的蚀刻量可能不太一致，可能存在蚀刻差异，即，鳍内外的剩余氧化物的高度可能存在高度差。
同样地，在氧化物蚀刻过程中，鳍侧壁可能存在残留的氧化物，即，鳍内外的剩余氧化物的上表面可能不是平坦的。
发明内容
有鉴于此，本公开的目的至少部分地在于提供一种减小或消除鳍内外的剩余氧化物的高度差并提高剩余氧化物的上表面的平坦度的蚀刻半导体衬底上的氧化物的方法和系统。
本发明提供了一种用于蚀刻半导体衬底上的氧化物的方法，所述氧化物包括填充在目标图形内部的第一氧化物以及填充在所述目标图形外部的第二氧化物，方法包括：
步骤S1、用第一催化气体和HF气体对所述第一氧化物和所述第二氧化物进行预定时间的第一气相蚀刻；
步骤S2、用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐。
可选地，所述第一催化气体包括醇类气体，所述第二催化气体包括氨气。
可选地，所述醇类气体包括甲醇气体、乙醇气体或异丙醇气体中的至少一者。
可选地，所述第一气相蚀刻和所述第二气相蚀刻在同一个反应腔室内连续进行。
可选地，在步骤S1之前还包括：
步骤S01、对所述半导体衬底进行去气处理；
步骤S02、对经过去气处理的半导体衬底进行冷却处理。
可选地，在步骤S2之后还包括：
S3、对所述半导体衬底进行退火处理；
S4、对经过退火处理的半导体衬底进行冷却处理。
可选地，在步骤S1之后，循环重复进行所述步骤S2、步骤S3和步骤S4。
可选地，所述第一气相蚀刻的蚀刻量不高于循环重复进行的第二气相蚀刻的总蚀刻量。
可选地，所述第一气相蚀刻的蚀刻量与循环重复进行的第二气相蚀刻的总蚀刻量之比的范围为1：3至1：1。
本发明还公开了一种用于蚀刻氧化物的系统，所述氧化物包括填充在目标图形内部的第一氧化物以及填充在所述目标图形外部的第二氧化物，系统包括：
反应腔室，用于利用第一催化气体和HF气体对所述第一氧化物和所述第二氧化物进行预定时间的第一气相蚀刻；以及，用于利用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行的第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐；
进气单元，用于向所述反应腔室内引入第一催化气体和HF气体的混合气体以及用于分开向所述反应腔室内引入第二催化气体和HF气体；
控制单元，用于动态控制所述反应腔室内的压力以及引入所述反应腔室内的气体的进气顺序。
可选地，所述控制单元在引入第一催化气体和HF气体的混合气体时使所述反应腔室内保持预设的高压力，在分开向所述反应腔室内引入第二催化气体和HF气体时使所述反应腔室内保持预设的低压力。
可选地，所述预设的高压力的范围为50～150Torr，所述预设的低压力的范围为1～5Torr。
可选地，所述进气顺序为：首先向所述反应腔室内引入第一催化气体和HF气体的混合气体以进行所述第一气相蚀刻；然后分开向所述反应腔室内引入第二催化气体和HF气体以进行所述第二气相蚀刻。
可选地，所述进气单元还用于向所述反应腔室内引入惰性气体。
可选地，在整个蚀刻过程中，所述进气单元用于向所述反应腔室内引入所述惰性气体。
可选地，所述第一催化气体包括醇类气体，所述第二催化气体包括氨气。
可选地，所述醇类气体包括甲醇气体、乙醇气体或异丙醇气体中的至少 一者。
附图说明
通过以下参照附图对本公开实施例的描述，本公开的上述以及其他目的、特征和优点将更为清楚，在附图中：
图1示出了根据现有技术的示例FinFET；
图2(a)至2(c)示出了根据现有技术的具有多个鳍的FinFET的横截面图；
图3示出了根据本发明的实施例的用于蚀刻半导体衬底上的氧化物的方法的流程图；
图4示出了根据本发明的实施例的用于蚀刻半导体衬底上的氧化物的方法的详细流程图；
图5示出了根据本发明的实施例的用于蚀刻氧化物的系统的示意图；
图6示出了蚀刻氧化物的过程中气体通入反应腔室的顺序示意图；
图7示出了采用一次甲醇气体催化蚀刻加上五次氨气催化蚀刻的完整工艺流程。
贯穿附图，相同的附图标记表示相同的部件。
具体实施方式
以下将参照附图来描述本公开的实施例。但是应该理解，这些描述只是示例性的，而并非要限制本公开的范围。此外，在以下说明中，省略了对公知结构和技术的描述，以避免不必要地混淆本公开的概念。
图1中示出了现有技术的示例FinFET的透视图。如图1所示，该FinFET包括：衬底101；在衬底101上形成的鳍102；与鳍102相交的栅极103，在鳍102的两侧(如图1所示的，鳍102的左右两侧)的氧化物104。
为了形成在鳍102的两侧的氧化物104，则在FinFET的制备中存在工序 -鳍氧化物去除(Fin Oxide Recess)工序，该工序的目标是将鳍102两侧填充的氧化物(有多种制备方式，通常是采用化学气相沉积(CVD，Chemical Vapor Deposition)方式生长)通过蚀刻的方法蚀刻掉一部分，使鳍102裸露出一定的深度，同时要保证鳍102的相关特征不会被破坏。在形成具有多个鳍的FinFET的蚀刻工艺中，存在鳍的外部和内部的氧化物的蚀刻量不一致，即剩余氧化物高度不一致的问题，具体可参见图2a至2b，其中，图2a示出了鳍内部的剩余氧化物104-1的高度高于鳍外部的剩余氧化物104-2的高度，即存在正高度差，图2b示出了鳍内部的剩余氧化物104-1的高度低于鳍外部的剩余氧化物104-2的高度，即存在负高度差。此外，还有可能存在剩余氧化物的表面不平坦，存在弧度的问题，具体参见图2c。
为了在蚀刻工艺中避免高度差和不平坦的问题，本发明提供了用于蚀刻半导体衬底上的氧化物的方法，氧化物包括填充在目标图形内部的第一氧化物以及填充在目标图形外部的第二氧化物，如前文记载，该目标图形可以是鳍或者是类似鳍的图形等。如图3所示，该方法包括：
S1、用第一催化气体和HF气体对第一氧化物和第二氧化物进行预定时间的第一气相蚀刻。
具体地，在本步骤中，所述第一催化气体可以包括醇类气体，例如，甲醇气体、乙醇气体或异丙醇气体等。在经过预定时间的第一气相蚀刻后，会在第一氧化物和第二氧化物之间存在蚀刻差异，也就是说，如图2所示，其中，图2a示出了鳍内部的剩余氧化物104-1的高度高于鳍外部的剩余氧化物104-2的高度，即该蚀刻差异表现为两者之间存在正高度差，图2b示出了鳍内部的剩余氧化物104-1的高度低于鳍外部的剩余氧化物104-2的高度，即该蚀刻差异表现为两者之间存在负高度差。或者，如图2c所示，存在剩余氧化物的表面不平坦，存在弧度的问题。
S2、用第二催化气体和HF气体对经过第一气相蚀刻和第一氧化物和第 二氧化物进行第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐。
具体地，在本步骤中，第二催化气体可以包括氨气。这样，可以对步骤S1中的第一氧化物和第二氧化物存在的蚀刻差异进行补偿，也就是说，消除如图2a所示的正高度差，或者消除如图2b所示的负高度差，此外，还可以消除如图2c所示的表面不平坦的问题。从而可以使得在经过第一气相蚀刻和第二气相蚀刻后的第一氧化物和第二氧化物所在的表面平齐。
本实施例中的蚀刻半导体衬底上的氧化物的方法，首先，利用第一催化气体和HF气体对第一氧化物和第二氧化物进行预定时间的第一气相蚀刻，之后，利用第二催化气体和HF气体对第一氧化物和第二氧化物进行第二气相蚀刻，这样，可以使得蚀刻后的第一氧化物和第二氧化物所在的表面平齐，进而可以提高半导体衬底的制作良率，提高所制作形成的半导体器件的性能。
下文中，为了方便描述，选择甲醇和氨气分别作为第一催化气体和第二催化气体的示例。
在第一气相蚀刻和第二气相蚀刻过程期间，要被蚀刻的半导体衬底被放置于同一个反应腔室中。第一气相蚀刻和第二气相蚀刻可以在同一个反应腔室内连续进行。
为了完成整个气相蚀刻过程，还需要在气相蚀刻之前和气相蚀刻之后完成其它操作。
具体地，如图3所示，在步骤S1之前，还包括：
S01、对所述半导体衬底进行去气处理；
S02、对经过去气处理的半导体衬底进行冷却处理。
在步骤S2之后，还包括：
S3、对所述半导体衬底进行退火处理；
S4、对经过退火处理的半导体衬底进行冷却处理。
此外，为了进一步有效消除补偿第一氧化物和第二氧化物所存在的蚀刻差异，在步骤S1之后，可以循环重复进行步骤S2、步骤S3和步骤S4，这样可以使得最终形成的第一氧化物和第二氧化物的表面更加平齐，可以进一步提高半导体衬底的制作良率，提升产品性能。
值得注意的是，第一气相蚀刻的蚀刻量不高于第二气相蚀刻的蚀刻量。当上述步骤存在循环重复进行步骤S2、步骤S3和步骤S4时，则应当是第一气相蚀刻的蚀刻量不高于循环重复进行的第二气相蚀刻的蚀刻总量。具体地，例如，第一气相蚀刻的蚀刻量与第二气相蚀刻的蚀刻量(或者循环重复进行的第二气相蚀刻的蚀刻总量)之比的范围为1：3至1：1。
为了详细描述用于蚀刻半导体衬底上的氧化物的工艺流程。图4示出了根据本发明的实施例的用于蚀刻半导体衬底上的氧化物的方法的详细流程图。
具体地，S401、将需要进行蚀刻的半导体衬底通过机械手传输至去气腔室进行去气，以便将半导体衬底表面所吸附的水汽等杂物通过加热方式去除掉，通常温度范围为200～350℃，时间1～3min。
S402、将去气后的半导体衬底传输至冷却腔室进行冷却，以便将半导体衬底表面温度降低到室温。
S403、将冷却后的半导体衬底传输至反应腔室，在反应腔室内进行第一气相蚀刻，即，采用甲醇气体和HF气体参与反应，将氧化物蚀刻掉一部分。此时采用的工艺参数为：工艺压力范围可以为50Torr至150Torr，HF气体的流量范围可以为100sccm至500sccm，甲醇气体的流量范围可以为500sccm至1000sccm，氮气的流量范围可以为1000sccm至3000sccm，半导体衬底的温度范围可以为50℃至80℃，预定时间的范围可以为120s至400s。其中，氮气可以采用纯度较高的工艺氮气，也可以用氩气等来代替。甲醇气体也可以用其它醇类气体，例如乙醇气体或异丙醇气体等。
S404、将完成第一气相蚀刻的半导体衬底保持在反应腔室内，更换腔室内的气体和工艺参数进行第二气相蚀刻，即，采用氨气和HF气体参与反应，继续进行氧化物蚀刻，直至蚀刻量达标。此时采用的工艺参数为：工艺压力范围可以为1Torr至5Torr，HF气体的流量范围可以为50sccm至200sccm，氨气的流量范围可以为50sccm至200sccm，氮气的流量范围可以为1000sccm至3000sccm，半导体衬底的温度范围可以为50℃至80℃，工艺时间的范围可以为50s至150s。
S405、将完成第二气相蚀刻的半导体衬底传输到退火腔室进行退火以处理络合物，通常采用100℃至200℃的温度进行退火。在操作406，将退火后的半导体衬底传输到冷却腔室进行冷却，以降温至室温。至此，整个蚀刻流程结束。
为了实现上述工艺流程，可以设计适于执行本发明的蚀刻氧化物的方法的系统。图5示出了根据本发明的实施例的用于蚀刻氧化物的系统的示意图。如图5所示，该系统包括反应腔室501、进气单元502和控制单元503。
其中，反应腔室501用于利用第一催化气体和HF气体对第一氧化物和第二氧化物进行预定时间的第一气相蚀刻；以及利用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐。
进气单元502，用于向反应腔室501内引入第一催化气体和HF气体的混合气体以及用于分开向反应腔室501内引入第二催化气体和HF气体。
控制单元503，用于动态控制反应腔室501内的压力以及引入反应腔室501内的气体的进气顺序。
如图5所示，该系统具备横截面形状为大致圆形的真空室即反应腔室501。在反应腔室501的内部设有作为晶片W的载置部的圆柱形状的载物台 2，用于对晶片W进行支撑。在反应腔室501的底部设有与真空排气部连通的排气口14。反应腔室501的顶部设有与进气单元502的气源A、气源B和气源C连通的气体供给部3。气体供给部3具有彼此隔绝开的两套气体通道。
在进行第一气相蚀刻时，也即进行第一催化气体(例如，甲醇)催化反应工艺时，关闭第二催化气体(例如，NH3)的气源B，打开第一催化气体(例如，甲醇)的气源A和HF气体的气源C，使得第一催化气体(例如，甲醇)和HF气体在进入反应腔室501内部之前混合，再通过气体供给部3进入反应腔室501内部。
在进行第二气相蚀刻时，也即进行第二催化气体(例如，NH3)催化反应工艺时，关闭第一催化气体(例如，甲醇)气源A，打开HF气体的气源C，使得HF气体通过气体供给部3的一套气体通道进入反应腔室501内部，并且打开第二催化气体(例如，NH3)的气源B，使得第二催化气体(例如，NH3)及其稀释气体(N2或Ar)通过气体供给部3的另一套气体通道进入反应腔室501内部。实现了HF气体和第二催化气体(例如，NH3)分别通过气体供给部3的彼此隔绝开的两套气体通道进入反应腔室501内部，之后在反应腔室501内部再进行混合，避免了颗粒物(例如，HF和NH3反应生成的固态颗粒物)堵塞气体供给部3的问题。当然，系统还可以包括稀释气体(N2或Ar)的气源D(图中未示出)。
蚀刻装置还具备控制单元503。该控制单元503包括例如计算机，并具备程序、存储器、CPU(中央处理器)。程序中编入有用于实施后述的作用说明中的一系列动作的步骤组，并按照程序进行各阀门的开关、各气体的流量的调整、反应腔室501内的压力的调整等。该程序被收纳于计算机存储介质例如软盘、光盘、硬盘、磁光盘等，而被安装到控制单元503。
其中，进气单元502需要同时适应向反应腔室501内引入第一催化气体(例如甲醇)和HF的混合气体以及分开向反应腔室501内引入第二催化气 体(例如氨气)和HF的特点。一般地，HF气体和甲醇气体等醇类气体在常温下并不会存在化学反应，因此，在第一催化气体(例如甲醇)和HF气体进入反应腔室501之前，可以提前混合。实验证明，该两种气体提前混合越充分，蚀刻均匀性越好。而对于第二催化气体(例如氨气)和HF气体，由于氨气和HF气体容易生成固态颗粒物NH4F，会粘附在管路内壁，时间长了会堵塞阀门或造成颗粒问题超标。因此，为了避免该问题，使第二催化气体(例如氨气)和HF气体分开进入反应腔室501，在进入反应腔室501后进行混合。具体地，可以采用双层簇射头(showerhead)结构等来实现第二催化气体(例如氨气)和HF气体的分开引入。
其中，控制单元503可以对反应腔室501内的压力进行动态控制，在引入第一催化气体和HF气体的混合气体时使反应腔室501内保持预设的高压力，例如保持为50Torr至150Torr，进一步优选地，例如保持为100Torr；在分开向反应腔室501内引入第二催化气体和HF气体时使反应腔室内保持预设的低压力，例如保持为1Torr至5Torr，进一步优选地，例如保持为3Torr。通常情况下，控制工艺压力的真空规压力范围为0～200Torr。若直接用该真空规控制低压力(例如3Torr)的压力，则稳定性和可控性均变差，不在规的合适控制范围内。为了更精确地实现上述压力控制，在反应腔室501中新增加量程为0～10Torr的真空规。通过电气和软件系统信号调度改进，实现在第一气相蚀刻时选用量程200Torr规进行压力控制，而在第二气相蚀刻时选用量程10Torr规控制，从而通过两种工艺规的自由切换来实现对不同蚀刻过程中的不同压力的精确控制。
并且，控制单元503可以对引入反应腔室501内的气体的进气顺序进行控制，所述进气顺序为：首先向反应腔室501内通入第一催化气体(例如甲醇)和HF气体的混合气体以进行第一气相蚀刻；在完成所述第一气相蚀刻之后，然后分开向所述反应腔室501内通入第二催化气体(例如氨气)和HF 气体以进行第二气相蚀刻。
值得注意的是，由于第一气相蚀刻(甲醇催化的蚀刻)和第二气相蚀刻(氨气催化的蚀刻)是在同一反应腔室内完成的，为了避免两种催化反应的交叉影响带来的蚀刻工艺稳定性问题，该两种催化反应是一先一后进行的，因此，各气体的通入顺序是需要严格控制的。具体的通气顺序示意图如图6所示。
根据图6可知，按照通入气体的时间顺序不同，可以将在同一反应腔室内的气体存在分成7个阶段1-7。
阶段1，稳压传热阶段：反应腔室内先通入一定量的氮气让反应腔室达到预设的压力值(此时系统会自动选用高量程真空规)，同时半导体衬底通过基座进行传热升温至工艺需要的工艺温度。
阶段2，甲醇预吸附阶段：此时开始向反应腔室内通入甲醇气体，以便让半导体衬底表面充分吸附该催化剂，同时稳定甲醇流量，该操作有助于蚀刻反应的稳定进行。
阶段3，甲醇催化蚀刻阶段(第一气相蚀刻阶段)：甲醇气体预吸附充分后，反应腔室内开始通入第一催化气体(例如甲醇)和主蚀刻剂HF气体的混合气体，在甲醇气体催化下，HF气体与氧化物进行化学反应，生成气态副产物，被抽出反应腔室。蚀刻持续进行，通过控制蚀刻时间长短，可以实现不同的氧化物蚀刻量。
阶段4，反应腔室吹扫阶段：甲醇气体催化蚀刻阶段结束后，甲醇气体和HF气体的混合气体关闭，但反应腔室内仍会有甲醇气体和HF气体的混合气体残留，此阶段的主要目的是通过持续通入氮气排走甲醇气体和HF气体的混合残气。反应腔室吹扫通过氮气流量高低及时间长短了控制排气效果。该操作结束后，系统会自动为后续的低压氮气催化的蚀刻做准备，开始转为低压控制系统。
阶段5：氨气预吸附阶段：此时开始向反应腔室内通入氨气气体，以便让半导体衬底表面充分吸附该催化剂，同时稳定氨气流量，该操作有助于蚀刻反应的稳定进行。
阶段6：氨气催化蚀刻阶段(第二气相蚀刻阶段)：氨气预吸附充分后，分开向腔室内通入第二催化气体(例如氨气)和主蚀刻剂HF气体，在氨气催化下，HF气体与氧化物进行化学反应，生成固态络合物。与甲醇气体催化反应不同，该固态络合物粘附在半导体衬底表面，不能被排出反应腔室外，需要后续的退火处理。通过控制蚀刻时间长短，可以实现不同的氧化物蚀刻量。蚀刻结束后，氮气和HF气体同时关闭。
阶段7：腔室吹扫阶段：腔室持续通入氮气，排空HF气体和氨气残气。
值得注意的是，图6仅为通气顺序的示意图，并不代表实际流量大小，实际情况下，甲醇气体催化蚀刻阶段和氨气催化蚀刻阶段中的HF及氮气大小可以是不同的，可以根据实际进行调整。
同样可以清楚的是，本发明利用甲醇气体催化蚀刻(第一气相蚀刻)和氨气催化蚀刻(第二气相蚀刻)的结合，共同完成对鳍内部和外部的氧化物的蚀刻。本领域技术人员可以根据具体需要来调整这两个蚀刻阶段蚀刻掉的蚀刻量。但为了达到最佳工艺性能表现，两个蚀刻阶段的蚀刻量存在一定关系。即，甲醇气体催化蚀刻的蚀刻量一般不高于氨气催化蚀刻的蚀刻量。通过实验验证发现，甲醇气体催化蚀刻的蚀刻量和氨气催化蚀刻的蚀刻量之比的范围为1:3～1:1之间。例如，以共同完成的400埃的氧化物的蚀刻量为例，其中，甲醇气体催化蚀刻的蚀刻量在100～200埃之间，氨气催化蚀刻的蚀刻量在200～300埃之间。
为了获得较好的最终蚀刻性能并且提升产能，两个蚀刻阶段可以采用的工艺参数可以分别是：
甲醇气体催化蚀刻：工艺压力50Torr至150Torr，HF气体流量100sccm 至500sccm，甲醇气体流量500sccm至1000sccm，氮气流量1000sccm至3000sccm，半导体衬底温度50℃至80℃，工艺时间120s至400s；
氨气催化蚀刻：工艺压力1Torr至5Torr，HF流量50sccm至200sccm，氨气流量50sccm至200sccm，氮气流量1000sccm至3000sccm，半导体衬底温度50℃至80℃，工艺时间50s至150s。
更优选地，可以选择以下的工艺参数：
甲醇气体催化蚀刻：工艺压力95Torr，HF气体流量200sccm，甲醇气体流量900sccm，氮气流量：1320sccm，半导体衬底温度75℃，工艺时间300s；
氨气催化蚀刻：工艺压力3Torr，HF流量87sccm，氨气流量80sccm，氮气流量：1887sccm，半导体衬底温度75℃，工艺时间80s。
在前述的实施例中，第一气相蚀刻(例如，甲醇气体催化蚀刻)和第二气相蚀刻(例如，氨气催化蚀刻)均进行了一次蚀刻。可以设想的是，第一气相蚀刻和第二气相蚀刻的蚀刻次数根据需要和实际情况来进行设定。
例如，可以采用多次循环蚀刻的方案，即第一气相蚀刻循环重复进行多次，然后第二气相蚀刻循环重复进行多次。显然，循环重复进行多次的第一气相蚀刻的蚀刻总量不高于循环重复进行多次的第二气相蚀刻的总蚀刻量。具体地，例如，循环重复进行多次的第一气相蚀刻的蚀刻总量与循环重复进行多次的第二气相蚀刻的总蚀刻量之比的范围为1：3至1：1。
例如，可以采用一次第一气相蚀刻(例如，甲醇气体催化蚀刻)加上多次第二气相蚀刻(例如，氨气催化蚀刻)的方案。同样，显然，第一气相蚀刻的蚀刻量不高于循环重复进行的第二气相蚀刻的总蚀刻量。具体地，例如，第一气相蚀刻的蚀刻量与循环重复进行的第二气相蚀刻的总蚀刻量之比的范围为1：3至1：1。图7示出了一次甲醇气体催化蚀刻加上五次氨气催化蚀刻的完整工艺流程。可以注意到，甲醇气体催化蚀刻和氨气催化蚀刻在同一反应腔室内完成，且在完成一次氨气催化蚀刻之后进行退火、冷却，然后再 进行下一次氨气催化蚀刻。但在两次氨气催化蚀刻之间，无需进行去气处理。显然，在整个蚀刻过程期间，一直向反应腔室内引入惰性气体，例如氮气或氩气。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (17)

  1. 一种用于蚀刻半导体衬底上的氧化物的方法，所述氧化物包括填充在目标图形内部的第一氧化物以及填充在所述目标图形外部的第二氧化物，所述方法包括：
    步骤S1、用第一催化气体和HF气体对所述第一氧化物和所述第二氧化物进行预定时间的第一气相蚀刻；
    步骤S2、用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐。
  2. 根据权利要求1所述的方法，其中，所述第一催化气体包括醇类气体，所述第二催化气体包括氨气。
  3. 根据权利要求2所述的方法，其中，所述醇类气体包括甲醇气体、乙醇气体和异丙醇气体中的至少一者。
  4. 根据权利要求1-3中任意一项所述的方法，其中，
    所述第一气相蚀刻和所述第二气相蚀刻在同一个反应腔室内连续进行。
  5. 根据权利要求4所述的方法，其中，在步骤S1之前还包括：
    步骤S01、对所述半导体衬底进行去气处理；
    步骤S02、对经过去气处理的半导体衬底进行冷却处理。
  6. 根据权利要求4所述的方法，其中，在步骤S2之后还包括：
    步骤S3、对所述半导体衬底进行退火处理；
    步骤S4、对经过退火处理的半导体衬底进行冷却处理。
  7. 根据权利要求6所述的方法，其中，在步骤S1之后，循环重复进行所述步骤S2、步骤S3和步骤S4。
  8. 根据权利要求7所述的方法，其中，所述第一气相蚀刻的蚀刻量不高于循环重复进行的第二气相蚀刻的总蚀刻量。
  9. 根据权利要求8所述的方法，其中，所述第一气相蚀刻的蚀刻量与循环重复进行的第二气相蚀刻的总蚀刻量之比的范围为1：3至1：1。
  10. 一种用于蚀刻半导体衬底上的氧化物的系统，所述氧化物包括填充在目标图形内部的第一氧化物以及填充在所述目标图形外部的第二氧化物，系统包括：
    反应腔室，用于利用第一催化气体和HF气体对所述第一氧化物和第二氧化物进行预定时间的第一气相蚀刻；以及，用于利用第二催化气体和HF气体对经过第一气相蚀刻的第一氧化物和第二氧化物进行的第二气相蚀刻，以补偿第一氧化物和第二氧化物存在的蚀刻差异，使得所述第一氧化物和所述第二氧化物所在的表面平齐；
    进气单元，用于向所述反应腔室内引入第一催化气体和HF气体的混合气体，以及用于分开向所述反应腔室内引入第二催化气体和HF气体；
    控制单元，用于动态控制所述反应腔室内的压力以及引入所述反应腔室内的气体的进气顺序。
  11. 根据权利要求10所述的系统，其中，所述控制单元在引入第一催化气体和HF气体的混合气体时使所述反应腔室内保持预设的高压力，在分开向所述反应腔室内引入第二催化气体和HF气体时使所述反应腔室内保持预设的低压力。
  12. 根据权利要求11所述的系统，其中，所述预设的高压力的范围为50～150Torr，所述预设的低压力的范围为1～5Torr。
  13. 根据权利要求10所述的系统，其中，
    所述进气顺序为：首先向所述反应腔室内引入第一催化气体和HF气体的混合气体以进行所述第一气相蚀刻；然后分开向所述反应腔室内引入第二催化气体和HF气体以进行所述第二气相蚀刻。
  14. 根据权利要求10所述的系统，其中，
    所述进气单元还用于向所述反应腔室内引入惰性气体。
  15. 根据权利要求14所述的系统，其中，
    在整个蚀刻过程中，所述进气单元还用于向所述反应腔室内引入所述惰性气体。
  16. 根据权利要求10-15中的任意一项所述的系统，其中，所述第一催化气体包括醇类气体，所述第二催化气体包括氨气。
  17. 根据权利要求16所述的系统，其中，所述醇类气体包括甲醇气体、乙醇气体和异丙醇气体中的至少一者。
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