WO2019005997A1 - Methods and apparatus for securing sounding symbols - Google Patents

Abstract

The present invention provides methods, apparatus, and articles of manufacture for securing survey symbols. An exemplary apparatus includes a transformer for transforming probing symbols received from a frequency domain to a time domain to generate time domain samples; and a signal generator for generating a secure sounding signal by adding zero power guard samples to the time domain samples.

Description

METHODS AND APPARATUS FOR SECURING SOUNDING SYMBOLS

RELATED APPLICATION

This patent arises from an application claiming the benefit of U.S. Provisional Patent Application Serial No. 62/525,712, which was filed on June 27, 2017. U.S. Provisional Patent Application Serial No. 62/525,712 is hereby incorporated herein by reference in its entirety. Priority to U.S. Provisional Patent Application Serial No. 62/525,712 is hereby claimed.

FIELD OF THE DISCLOSURE

This disclosure relates generally to wireless fidelity connectivity (Wi-Fi) and, more particularly, to methods and apparatus for securing sounding symbols. BACKGROUND

Many locations provide Wi-Fi to connect Wi-Fi enabled devices to networks such as the Internet. Wi-Fi enabled devices include personal computers, video-game consoles, mobile phones and devices, digital cameras, tablets, smart televisions, digital audio players, etc. Wi-Fi allows the Wi-Fi enabled devices to wirelessly access the Internet via a wireless local area network (WLAN). To provide Wi-Fi connectivity to a device, a Wi-Fi access point transmits a radio frequency Wi-Fi signal to the Wi-Fi enabled device within the access point (e.g., a hotspot) signal range. Wi-Fi is implemented using a set of media access control (MAC) and physical layer (PHY) specifications (e.g., such as the Institute of Electrical and Electronics Engineers (IEEE) 802.11 protocol).

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an illustration of the transmission of secure sounding symbols using wireless local area network Wi-Fi protocols between example access point and an example station.

FIG. 2 is a block diagram of an example secure signal converter and an example received signal converter of FIG. 1.

FIG. 3 is a flowchart representative of example machine readable instructions that may be executed to implement the example secure signal converter of FIGS. 1 and 2.

FIG. 4 is a flowchart representative of example machine readable instructions that may be executed to implement the example secure signal converter of FIGS. 1 and 2.

FIG. 5 is a flowchart representative of example machine readable instructions that may be executed to implement the example received signal converter of FIGS. 1 and 2.

FIG. 6A illustrates a transmission of conventional sounding symbols.

FIG. 6B illustrates an example of a conventional sounding symbol sequence.

FIG. 7 illustrates an example of a secure sounding symbol sequence that has been windowed.

FIG. 8 illustrates an alternative example of a secure sounding symbol sequence that has been windowed

FIG. 9 illustrates an example window used by a receiver of a station and/or an access point to sample a received sounding signal.

FIG. 10 illustrates a timing diagram including a comparison of a conventional sounding symbol and an example secure sounding symbol.

FIG. 11 illustrates an example generation of a secure sounding symbol.

FIG. 12 illustrates an example generation of a secure sounding symbol including additional guard tones to reduce the effect of leakage.

FIG. 13 is an example timing diagram illustrating time domain independent pulses to implement a secure sounding signal.

FIG. 14 is a block diagram of a radio architecture in accordance with some examples.

FIG. 15 illustrates an example front-end module circuitry for use in the radio architecture of FIG. 14 in accordance with some examples. FIG. 16 illustrates an example radio IC circuitry for use in the radio architecture of FIG. 14 in accordance with some examples.

FIG. 17 illustrates an example baseband processing circuitry for use in the radio architecture of FIG. 14 in accordance with some examples.

FIG. 18 is a block diagram of a processor platform structured to execute the example machine readable instructions of FIGS. 3 and 4 to implement the example secure signal converter of FIGS. 1 and 2.

FIG. 19 is a block diagram of a processor platform structured to execute the example machine readable instructions of FIG. 5 to implement the example received signal converter of FIGS. 1 and 2.

The figures are not to scale. Wherever possible, the same reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts.

DETAILED DESCRIPTION

Various locations (e.g., homes, offices, coffee shops, restaurants, parks, airports, etc.) may provide Wi-Fi to the Wi-Fi enabled devices (e.g., stations (STA)) to connect the Wi-Fi enabled devices to the Internet, or any other network, with minimal hassle. The locations may provide one or more Wi-Fi access points (APs) to output Wi-Fi signals to the Wi-Fi enabled device within a range of the Wi-Fi signals (e.g., a hotspot). A Wi-Fi AP is structured to wirelessly connect a Wi-Fi enabled device to the Internet through a wireless local area network (WLAN) using Wi-Fi protocols (e.g., such as IEEE 802.11). The Wi-Fi protocol is the protocol for how the AP communicates with the devices to provide access to the Internet by transmitting uplink (UL) transmissions and receiving downlink (DL) transmissions to/from the Internet.

In some examples, a Wi-Fi AP and connected station(s) communicate using sounding signals. For example, if the Wi-Fi AP is structured to communicate using 802.1 lax or 802.1 lmc protocols, the sounding signal is an orthogonal frequency-division multiple access (OFDM) symbol structure. The OFDM frame includes one or more tones to be communicated over a frequency channel. The OFDM frame may be a downlink or an uplink frame and includes data and/or null tones (e.g., including guard tones and/or DC tones). A guard tone is a null tone (e.g., zero energy) that prevents overlapping of OFDM symbols and reduces inter-symbol interference (ISI).

Conventional Wi-Fi protocols mandate that sounding signals (e.g., OFDM signals) end a transmission of signals by replaying the non-zero cyclic prefix (CP) signals. The CP is one or more of the first signals of the sounding signal that is repeated at the end of the sounding signal. In this manner, when a STA receives a sounding signal and determines that the signal transmission has ended when the last signal(s) match the initial signal(s). For example, if a communication protocol corresponds to a CP that is the first two signals (e.g., symbol) of a sounding signal, then the receiver will monitor a received signal until the last two signals match the first two received signals. In some examples, the receiving device transmits a response once the CP (e.g., the last signals that match the first signals) has been received. For example, Wi-Fi APs can perform ranging to identify the distance between the AP and a connected station (STA) by transmitting a sounding signal to the STA. When the STA receives the sounding signal and processes the received signal including part of the CP at the end, the STA responds to the Wi-Fi AP. In this manner, the Wi-Fi AP can determine the distance to the STA based on a duration of time it took for the STA to respond to the sounding signal.

A malice device (e.g., an attacker) may attempt to interrupt or otherwise confuse the communications between an AP and a STA. For example, an attacker may monitor the communications with the AP and the STA to identify the initial signals of a sounding signal corresponding to the CP and artificially create a fake tap by transmitting the initial signals corresponding to the CP to the STA prior to the intended transmission of the CP. In this manner, the STA will assume that the attacker's CP is part of a complete sounding signal propagating over a channel tap earlier than the actual channel taps. In ranging examples, the STA receiving a fake tap (e.g., a premature artificial CP) results in the STA reporting a time stamp earlier than the actual first channel arrival to the AP, thereby causing an inaccurate distance estimation.

Examples disclosed herein prevent attackers from using intercepted CPs to interfere with communications between an AP and a STA via sounding signals by eliminating or otherwise altering the CP. Some examples disclosed herein include filtering the sounding signal using a window to adjust the characteristics of the AP and/or otherwise eliminate the CP altogether. In this manner, an attacker cannot prematurely transmit a CP by intercepting a sounding signal. In some examples, an attacker relies on a prediction of a sounding symbol. In such examples, an attacker intercepts a first portion of the sounding symbol and calculates all possible combinations of a second portion of the sounding symbol to predict the full sounding symbol. The attacker then transmits the predicted second portion at a time instance earlier than the actual first channel arrival. Examples disclosed herein prevent such an attack by substantially increasing the number of sounding sequences that may be generated by an AP such that it is impossible for an attacker to identify which sequence is being used in real-time. Additionally, examples disclosed herein include transmitting independent time domain pulses similar to single carrier frequency division multiplexing (SC-FDM) such that the previous sounding signal do not provide information about the subsequent information.

FIG. 1 illustrates the transmission of secure sounding symbols in using wireless local area network Wi-Fi protocols between an example access point 100 and an example STA 102. The example of FIG. 1 includes the example AP 100, an example secure signal converter 101, the example STA 102, an example received signal converter 103, an example attacking device 104, and an example network 106.

The example AP 100 of FIG. 1 is a device that allows the example STA 102 to wirelessly access the example network 106. The example AP 100 may be a router, a modem-router, and/or any other device that provides a wireless connection to a network. A router provides a wireless communication link to a STA. The router accesses the network through a wire connection via a modem. A modem-router combines the functionalities of the modem and the router. The example AP 100 may include the example secure signal converter 101, additional processors (e.g., the example application processor 1410 of FIG. 14), and/or the example radio architecture 105 A. The example radio architecture 105 A wireless transmits and receives data based on instructions from the example signal converter 101. The example radio architecture 105 A is further described below in conjunction with FIG. 14.

The example secure signal converter 101 of FIG. 1 receives sounding signals (e.g., OFDM signals used for sounding from the application processor 1410 of FIG. 14) and converts them into secure sounding signals by adjusting the CP so that the example attacking device 104 is unable to attack the communications between the example AP 100 and the example STA 102. Alternatively, the secure signal converter 101 may receive instructions to generate a sounding signal. In some examples, the secure signal converter 101 filters (e.g., windows) the sounding signal to adjust or otherwise remove the CP from the sounding signal. The window may be a raised cosine window, a window without a flat top (e.g., a Hann or Hamming window), or a rectangular window. Additionally, the example secure signal converter 101 may increase the number of possible sounding sequences to decrease the possibility of the attacking device 104 from estimating a sounding sequence. In some examples, the secure signal converter 101 instruct the radio architecture 105 A to transmit independent time domain pulses that vary phase, magnitude, and/or polarity based on a predetermined negotiation between the example AP 100 and the example ST A 102 such that previous received signals do not provide information about subsequent signals. The example secure signal converter 101 is further described below in conjunction with FIG. 2.

The example ST A 102 of FIG. 1 is a Wi-Fi enabled computing device. The example ST A 102 may be, for example, a computing device, a portable device, a mobile device, a mobile telephone, a smart phone, a tablet, a gaming system, a digital camera, a digital video recorder, a television, a set top box, an e-book reader, and/or any other Wi-Fi enabled device. The example ST A 102 includes the example received signal converter 103 to receive and analyze sounding signals from the example AP 100. The STA 102 may further include the example radio architecture 105B and/or other processors (e.g., the example application processor 1410 of FIG. 14).

The example received signal converter 103 of FIG. 1 receives (e.g., via the example radio architecture 105B) and analyzes sounding signals from the example AP 100. In some examples, when the sounding signal is a secure signal corresponding to a windowed sounding signal, the CP is reversed scaled (e.g., as shown in FIG. 7). In such an example, the attacker 104 may attempt to scale the signals to compensate the windowing effect and then replayed the scaled signals. However, since the first signal has a small magnitude and is received with noise at the attacker 104, the replayed first signal with amplified magnitudes include amplified noises.

Accordingly, the replayed CP is noisy and the fake channel tap generated by the example attacker 104 is not stable across adjacent sounding measurements. In such an example, the received signal converter 103 determines that a received signal is faulty based on the amount of noise in the received signal. In some examples, the AP 100 additional includes the example received signal converter 103 for receiving responses or other data in a secure signal format from the example STA 102. The example received signal converter 103 is further described below in conjunction with FIG. 2.

The example attacker 104 of FIG. 1 intercepts sounding signals between the example AP 100 and the example STA 102. The example attacker 104 attempts to (A) receive the initial sounding signals to generate a fake tap (e.g., a fake premature CP) and/or (B) attempt to determine the entire sounding signal based on an interception of first sounding symbols. The example attacker 104 may transmit data to the example AP 100 and/or the example STA 102 prematurely so that a receiver of the AP 100 and/or the STA 102 believes that transmission has ceased. In this manner, data is lost and certain protocols are attacked. For example, such attacks may correspond with premature responses from the example STA 102 during a ranging protocol, thereby leading to inaccurate distance estimations by the example AP 100.

The example network 106 of FIG. 1 is a system of interconnected systems exchanging data. The example network 106 may be implemented using any type of public or private network such as, but not limited to, the Internet, a telephone network, a local area network (LAN), a cable network, and/or a wireless network. To enable communication via the network 106, the example Wi-Fi AP 100 includes a communication interface that enables a connection to an Ethernet, a digital subscriber line (DSL), a telephone line, a coaxial cable, or any wireless connection, etc.

FIG. 2 is a block diagram of an example secure signal converter 101 and the example received signal converter 103 of FIG. 1, disclosed herein, to secure sounding symbols. The example secure signal converter 101 includes an example sounding signal generator 200 and the example component interface 202 and the example received signal converter 103 includes an example component interface 210 and an example sounding signal analyzer 212.

The example sounding signal generator 200 of FIG. 2 generates a secure sounding signal by adjusting a received sounding signal (e.g., from the example application processor 1410 of FIG. 14) to alter and/or otherwise remove (e.g., zero-out) the CP. In some examples, the example sounding signal generator 200 may introduce a zero power guard interval (e.g., a zero energy gap and/or zero padding) to prevent ISI. For example, the sounding signal generator 200 may introduce zero energy at the beginning, end, and/or a combination of the beginning and/or end, thereby corresponding to different possible positions (e.g., multipaths) of the data (e.g., where the sounding signal path be within a window with zero energies on either or both sides). In some examples, the sounding signal generator 200 may shorten the duration of sounding signal to accommodate the zero power guard and/or zero padding. To reduce the effect of out- of-band emissions and/or leakages to a DC tone, the example sounding signal generator 200 may add additional guard bands to the frequency spectrum corresponding to a sounding system. In some examples, the sounding signal generator 200 to randomly select each symbol for each active tone in a sounding signal using a finite constellation to increase the total combination of possible sounding signals generated by the example AP 100.

The example component interface 202 of FIG. 2 receives and/or transmits data to the example radio architecture 105A and/or the example application processor 1410 of FIG. 14. The example component interface 202 instructs the radio architecture 105 A to transmit the generated secure sounding signals to the example STA 102. In some examples, the component interface 202 instructs the radio architecture 105 A to transmit the sounding signal using pulses that vary in phase, magnitude, and/or polarity to prevent the example attacker 104 from determining subsequent data from the previously transmitted data.

The example filter 204 of FIG. 2 filters received sounding signals to generate secure sounding signals. The example filter 204 attenuates the received sounding signal with a filter signal (e.g., a signal that adjusts the magnitude of the CP). For example, the filter 204 may attenuate the sounding signal with a raised cosine filter signal to adjust the magnitudes of the CPs, as further described below in conjunction with FIG. 7. In some examples, the filter 204 may attenuate the sounding signal with a rectangular window to zero out the energies of the final CP, as further described below in conjunction with FIG. 8.

The example transformer 206 of FIG. 6 transforms a frequency-based signal into the time domain to generate time domain symbols. For example, the transformer 206 may transform sounding symbols in the frequency domain to the time domain symbols to complete a secure sounding signal, as described below in conjunction with FIGS. 11 and 12.

The example component interface 210 of FIG. 2 receives the secure sounding signal from the example AP 100 via the example radio architecture 105B. The example sounding symbol analyzer 212 of FIG. 2 processes the sounding signal received by the example component interface 210 to determine how to respond. The example sounding symbol analyzer 212 may determine how the sounding symbol was secured based on initial communications with the example AP 100. In some examples, the sounding symbol analyzer 212 of FIG. 2 instructs the radio architecture 105B to perform a channel estimation. The sounding symbol analyzer 212 may treat the secure sounding signal as an OFDM symbol with zeros as the CP (e.g., a zero power guard interval). The zeros from the pervious and the next sounding symbols are also utilized in the channel equalization for combating ISI. The zero power guard interval prevents the CP reply attack from the example attacker 104. In some examples, the sounding symbol analyzer 212 determines the magnitudes of received CPs of the sounding signal to determine if the CP is legitimate or a fake.

The example noise calculator 214 of FIG. 2 determines if there is more than a threshold amount of noise in a received CP. For example, and as further explained below in conjunction with Fig. 7, if the sounding signal is windowed using a cosine edge rectangle, the magnitude of the CP is adjusted and reversed. Accordingly, the example attacker 104 of FIG. 4 may receive the initial signal(s) and generate a fake tap (e.g., a fake premature CP) by scaling the received initial signal(s). However, because the initial signal(s) are subject to noise, the example attacker 104 will scale the noise as well. Accordingly, the example noise calculator 214 may determine if a received CP includes more than a threshold amount of noise corresponding to a fake tap. If the example noise calculator 214 determines that there is more than a threshold amount of noise, the example sounding symbol analyzer 212 may dismiss or otherwise ignore the received CP.

The example transformer 216 of FIG. 2 first finds the boundaries for a transform (e.g., a fast Fourier transform (FFT)). The example transformer 216 transforms the time domain samples within the FFT symbol boundaries to the frequency domain. The frequency domain samples are the products of the windowed sounding spectrum and the channel response tone by tone. Thus, the example transformer 216 computes and removes (e.g., by dividing out) the frequency spectrum from the obtained frequency domain samples. After removing the sounding symbol spectrum, the remaining signals in the frequency domain are the channel responses in the frequency domain.

While an example manner of implementing the example secure signal converter 101 and the received signal converter 103 of FIG. 1 is illustrated in FIG. 2, one or more of the elements, processes and/or devices illustrated in FIG. 2 may be combined, divided, re-arranged, omitted, eliminated and/or implemented in any other way. Further, the example sounding signal generator 200, the example component interface 202, the example filter 204, the example transformer 206, and/or, more generally, the secure signal converter 101 of FIG. 2 and the example component interface 210, the example sounding signal analyzer 212, the example noise calculator 214, the example transformer 216, and/or more generally the received signal converter 103 of FIG. 2 may be implemented by hardware, software, firmware and/or any combination of hardware, software and/or firmware. Thus, for example, any of the example sounding signal generator 200, the example component interface 202, the example filter 204, the example transformer 206, and/or, more generally, the secure signal converter 101 of FIG. 2 and the example component interface 210, the example sounding signal analyzer 212, the example noise calculator 214, the example transformer 216, and/or more generally the received signal converter 103 of FIG. 2 could be implemented by one or more analog or digital circuit(s), logic circuits, programmable processor(s), application specific integrated circuit(s) (ASIC(s)), programmable logic device(s) (PLD(s)) and/or field programmable logic device(s) (FPLD(s)). When reading any of the apparatus or system claims of this patent to cover a purely software and/or firmware implementation, at least one of the example sounding signal generator 200, the example component interface 202, the example filter 204, the example transformer 206, and/or, more generally, the secure signal converter 101 of FIG. 2 and the example component interface 210, the example sounding signal analyzer 212, the example noise calculator 214, the example transformer 216, and/or more generally the received signal converter 103 of FIG. 2 is/are hereby expressly defined to include a non-transitory computer readable storage device or storage disk such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. including the software and/or firmware. Further still, the received signal converter 103 of FIG. 2 and/or the example secure signal converter 101 of FIG. 2 may include one or more elements, processes and/or devices in addition to, or instead of, those illustrated in FIG. 2, and/or may include more than one of any or all of the illustrated elements, processes and devices.

Flowcharts representative of example machine readable instructions for implementing the example secure signal converter 101 of FIG. 2 is shown in FIGS. 3-4 and a flowchart representative of example machine readable instructions for implementing the example received signal converter 103 of FIG. 2 is shown in FIG. 5. In this example, the machine readable instructions comprise a program for execution by a processor such as the processor 1412, 1512 shown in the example processor platform 1400, 1500 discussed below in connection with FIGS. 14 and 15. The program may be embodied in software stored on a non-transitory computer readable storage medium such as a CD-ROM, a floppy disk, a hard drive, a digital versatile disk (DVD), a Blu-ray disk, or a memory associated with the processor 1412, 1512, but the entire program and/or parts thereof could alternatively be executed by a device other than the processor 1412, 1512 and/or embodied in firmware or dedicated hardware. Further, although the example program is described with reference to the flowchart illustrated in FIGS. 4-6, many other methods of implementing the example secure signal converter 101 and/or the example received signal converter 103 may alternatively be used. For example, the order of execution of the blocks may be changed, and/or some of the blocks described may be changed, eliminated, or combined. Additionally or alternatively, any or all of the blocks may be implemented by one or more hardware circuits (e.g., discrete and/or integrated analog and/or digital circuitry, a Field Programmable Gate Array (FPGA), an Application Specific Integrated circuit (ASIC), a comparator, an operational-amplifier (op-amp), a logic circuit, etc.) structured to perform the corresponding operation without executing software or firmware.

As mentioned above, the example processes of FIGS 3-5 may be implemented using executable instructions (e.g., computer and/or machine readable instructions) stored on a non- transitory computer and/or machine readable medium such as a hard disk drive, a flash memory, a read-only memory, a compact disk, a digital versatile disk, a cache, a random-access memory and/or any other storage device or storage disk in which information is stored for any duration (e.g., for extended time periods, permanently, for brief instances, for temporarily buffering, and/or for caching of the information). As used herein, the term non-transitory computer readable medium is expressly defined to include any type of computer readable storage device and/or storage disk and to exclude propagating signals and to exclude transmission media.

"Including" and "comprising" (and all forms and tenses thereof) are used herein to be open ended terms. Thus, whenever a claim employs any form of "include" or "comprise" (e.g., comprises, includes, comprising, including, having, etc.) as a preamble or within a claim recitation of any kind, it is to be understood that additional elements, terms, etc. may be present without falling outside the scope of the corresponding claim or recitation. As used herein, when the phrase "at least" is used as the transition term in, for example, a preamble of a claim, it is open-ended in the same manner as the term "comprising" and "including" are open ended. The term "and/or" when used, for example, in a form such as A, B, and/or C refers to any

combination or subset of A, B, C such as (1) A alone, (2) B alone, (3) C alone, (4) A with B, (5) A with C, (6) B with C, and (7) A with B and with C. FIG. 3 is an example flowchart 300 representative of example machine readable instructions that may be executed by the example secure signal converter 101 of FIG. 2 to generate a secure signal by converting a sounding signal (e.g., an OFDM signal) to a secure sounding signal (e.g., a secure OFDM signal). Although the flowchart 300 of FIG. 3 is described in conjunction with the example secure signal converter 101 of FIG. 2, the instructions may be executed by any secure signal converter in any type of AP.

At block 301, the example component interface 202 determines if a sounding signal and/or instruction to generate a sounding signal have been received (e.g., from the example application processor 1410). If the example component interface 202 determines that the sounding signal and/or instructions have not been received (block 301 : NO), the process returns to block 301 until a signal/instructions have been received. If the example component interface 202 determines that the sounding signal and/or instruction have been received (block 301 : YES), the example sound signal generator 200 reserves additional guard tones in the secure sounding signal (block 302). The example sounding signal generator 200 adds additional guard tones around DC and/or tone edges limits emissions and leakages to the DC tone. The additional guard tones are further described in conjunction with FIG. 12. At block 304, the example transformer 206 transforms the sounding symbol in the frequency domain to the time domain to generate the secure sounding signal.

At block 306, the example filter 204 generates a secure sounding signal with the CP removed, or otherwise adjusted, by filtering a sounding signal using a window (block 302). Example filtering techniques that may be executed by the example filter 204 are further described below in conjunction with FIG. 7 and 8. At block 308, the example sound signal generator 200 determines if ISI prevention is desired and/or enabled. The determination of whether ISI prevention is desired and/or enable may be based on user preferences, manufacturer preferences, and/or instructions from the application processor 1410 of FIG. 14.

If the example sound signal generator 200 determines that ISI prevention is not desired (block 308: NO), the process continues to block 314. If the example sound signal generator 200 determines that ISI is desired (block 308: YES), the example sound signal generator 200 generates a zero power guard interval by introducing a zero energy gap by inserting zero energy at the beginning and/or end of the secure sounding signal (block 310). As described above, the zero energy gap provides tolerance to multipath delay. For example, the zero gap energy prevents the non-zero energy portion of the previous symbol from overlapping with the non-zero energy portion of the current symbol. At block 312, the example sound signal generator 200 reduces a non-zero sounding duration of the secure sounding signal to maximize the reuse at the expense of efficiency, because the additional introduced zero energy gap consumes usable air time.

At block 314, the example component interface 202 instructs the radio architecture 105A to transmit the secure sounding signal to the example STA 102. In some examples, the component interface 202 instructs the radio architecture 105 A to transmit the secure sounding signal according to a predefined pulse pattern (e.g., known to both the AP 100 and the STA 102) that varies polarity, phase, and/or magnitude, as further described below in conjunction with FIG. 4. In this manner, the STA 102 can discard CP that do not correspond to the predefined pulse pattern.

FIG. 4 is an example flowchart 400 representative of example machine readable instructions that may be executed by the example secure signal converter 101 of FIG. 2 to generate a secure signal by converting a sounding signal (e.g., an OFDM signal) to a secure sounding signal (e.g., a secure OFDM signal) by increasing the total combination sounding symbols using random constellations. Although the flowchart 400 of FIG. 4 is described in conjunction with the example secure signal converter 101 of FIG. 2, the instructions may be executed by any secure signal converter in any type of AP.

At block 402, the example sounding signal generator 200 selects each symbol for each active tone from a finite constellation (e.g., binary phase-shift keying (BPSK), quadrature phase- shift keying (QPSK), 16 quadrature amplitude modulation (QAM), etc.). At block 404, the example transformer 206 transforms the selected symbols from the frequency domain to the time domain to generate a secure sounding signal. In the time domain, each time sample is determined by all the symbols in the frequency domain. Using BPSK constellation, the number of active tones is more than 50 for a 20 MHz channel and more than 240 for an 80 MHz channel. Thus, the number of sounding symbols for such a constellation are more than 10¹⁵ and 10⁷² for 20 MHz and 80 MHz, respectively. Such a large number of sounding symbols would take an attacker days to detect a sounding symbol. Accordingly, using a finite constellation to generate a secure sounding signal significantly decreases the chances of the example attacker 104 from determining the second sounding signal. At block 406, the example component interface 202 instructs the radio architecture 105 A to transmit the second sounding signal as pulses varied in polarity, phase, and/or magnitude so that the previously received signals do not provide information about subsequent signals. The characteristics of the varying is predetermined and exchanged between the AP 100 and the ST A 102 during a prior negotiation.

FIG. 5 is an example flowchart 500 representative of example machine readable instructions that may be executed by the example received signal converter 103 of FIG. 2 to process a received a sounding signal (e.g., an OFDM signal), thereby avoiding an attack from the example attacker 104 of FIG. 1. Although the flowchart 500 of FIG. 5 is described in

conjunction with the example received signal converter 103 of FIG. 2, the instructions may be executed by any received signal converter in any type of STA.

At block 502, the example component interface 210 receives a sounding signal from the AP 100 via the example radio architecture 105B. At block 504, the example sounding symbol analyzer 212 determines if ISI prevention been added to the sounding signal. The sounding symbol analyzer 212 may determine if ISI prevention has or has not been added based on initial negotiations with the example AP 100. If the example sounding symbol analyzer 212 determines that ISI prevention has not been added (block 504: NO), the example transformer 216 transforms the received signal sounding signal from the time domain into the frequency domain to determine the sounding symbols (block 507). If the example sounding symbol analyzer 212 determines that the ISI prevention has been added (block 504: YES), the example transformer 216 applies a transform window to process the sounding signal for multipaths (block 506). For example, the transformer 206 may use a fast Fourier transform window to capture the whole sounding portion for all multi-paths to ensure that all of the sounding signal is received regardless of the position of the zeros.

At block 508, the example sounding symbol analyzer 212 determines if the final CP has been adjusted and/or removed/zeroed (e.g., by filtering out the final CP to replace the final CP with zero energies). The example sounding symbol analyzer 212 determines how the CP has been adjusted/zeroed (e.g., and the characteristics related to the adjusting and/or zeroing) based on the initial negotiations with the example AP 100. If the example sounding symbol analyzer 212 determines that the final CP was adjusted (e.g., based on a raised cosine edged filter 702, as further described below in conjunction with FIG. 7) (block 508: ADJUSTED), the example sounding symbol analyzer 212 determines if the magnitude of each component of the final CP matches the filter (block 510). For example, if the filter corresponds to a raised edge cosine filter (e.g., the example filter 702 of FIG. 7), the first component of the final CP should correspond to a first magnitude and the second component of the final CP should correspond to a second magnitude. Accordingly, if the example sounding symbol analyzer 212 compares the magnitude of the received final CP to determine if the magnitudes match the filtering technique.

If the example sounding symbol analyzer 212 determines that the final CP does not correspond to the filter (block 510: NO), the sounding symbol analyzer 212 discards the final CP (block 514). If the example sounding symbol analyzer 212 determines that the final CP corresponds to the filter (block 510: YES), the example noise calculator 214 determines if the CP includes more than a threshold amount of noise (block 512). More than a threshold amount of noise corresponds to a fake tap that has amplified an intercepted sounding signal with amplified noise, as explained above in conjunction with FIG. 2. If the example noise calculator 214 determines that the CP does not include more than a threshold amount of noise (block 512: NO), the process continues to block 518. If the example noise calculator 214 determines that the CP does include more than a threshold amount of noise (block 512: YES), the example sounding symbol analyzer 212 discards the CP and returns to receiving the sounding signal (block 510).

If the example sounding symbol analyzer 212 determines that the final CP was zeroed/removed (e.g., based on the rectangular filter 802, as further described below in conjunction with FIG. 8) (block 508: ZEROED), the example component interface 210 determines if a zeroed CP (e.g., timeslots with zero energy) is sensed by the example radio architecture 105B (block 516). If the example component interface 210 determines that zeroed CP has not been sensed (block 516: NO), the process returns to block 516 to continue to process the received sounding signal until the zeroed CP is sensed. If the example component interface 210 determines that zeroed CP has been sensed (block 516: YES), the example sounding symbol analyzer 212 determines that the sounding signal has ended (block 518).

FIG. 6A illustrates a transmission of conventional sounding symbol packet 600. The conventional sounding symbol pack 600 includes an example preamble 601 and an example sounding signal frame 602. The example sounding signal frame 602 includes an example initial CP 604a and an example final CP 604b. Alternatively, any type of sounding signal may be used. The example preamble 601 includes a legacy preamble, a repeated legacy signal field (RL-SIG), a (HE-SIG-A), and a high efficiency-short training field (HE-STF). In some examples, the preamble 601 may include additional, fewer and/or different fields.

The example sounding signal frame 602 of FIG. 6 includes multiple signals based on tones in the frequency domain. As illustrated in the example of FIG. 6 A, the example sounding signal frame 602 includes the initial CP 604a that is repeated at the end of the sounding signal frame 602 (e.g., the example final CP 604b). The CPs 604a-b are one or more signals that are repeated at the end of transmission. In such conventional sounding signals, the adversary attacker (e.g., the example attacker 104 of FIG. 1) intercepts the initial CP 604a and transmits an example fake final CP 604c at an earlier time to corrupt the signal sounding transmission between the example AP 100 and the example STA 102. In this manner, the target receiver may obtain a fake first channel arrival (e.g., the shifted CP) earlier than the intended CP, thereby disturbing the functionality of the receiving device.

FIG. 6B illustrates an example of a conventional sounding sample (e.g., signal) sequence of the conventional sounding signal 602. The example conventional sounding signal 602 includes the example CPs 604a-b of FIG. 6A and an example sounding sample sequence 606.

As shown in the conventional sounding signal 602, the first two samples (e.g., sample 1 and sample 2) correspond to the example initial CP 604a. Accordingly, once all the sounding sample sequence 606 has been transmitted (e.g., including samples 3-9), a conventional AP would transmit sample 1 and sample 2 (e.g., the final CP 604b) to complete the transmission of the sounding signal. The example attacker 104 of FIG. 1 intercepts such a conventional sounding sample sequence and determines that sample 1 and sample 2 correspond to the initial CP 640a and prematurely transmits the fake CP 604c such that the example the example STA 102 believes (e.g., determines) that a complete sounding sample sequence arrives whose end portion is the fake CP 604c. As described above, when the sounding sample sequence is used for ranging, such an attack leads to inaccurate distance estimations.

FIG. 7 illustrates an example secure sounding symbol sequence 700 that has been windowed (e.g., filtered) by the example secure signal converter 101 of FIGS. 1 and 2. FIG. 7 includes an example filter signal 702, example secure CPs 704a-b, and the example sounding signal frame 602 of FIG. 6B.

In the illustrated example of FIG. 7, the conventional sounding sample sequence 602 is windowed using the example filter signal 702 (e.g., a rectangular window with smooth edges (raised cosine edges)). In this manner, the sounding sample sequence 602 are attenuated by the filter signal 702 to generate a first CP sequence 704a (e.g., the power of the first sample is reduced to a first value and the power of the second sample is reduced to a second value) and a second CP sequence 704b (e.g., the power of the first sample is reduced to the second value and the power of the second sample is reduced to the first value).

Although the example attacker 104 of FIG. 1 may attempt to scale the intercept the CP 704a corresponding to the second CP 704b to compensate for the windowing effect and then replay the scaled signals, the example ST A 102 can detect the attack. The ST A 102 can detect the attack because the attacker 104 receives the signals with noise. Because the first sample has a small magnitude, the example attacker 104 will replay the first sample with amplified magnitudes that include amplified noises. Likewise, the attacker 104 will replay the second sample with attenuated magnitudes including amplified noises. The amplified noises make the fake tap inconsistent in time, magnitude, and phase across measurements within channel coherence time. Accordingly, the ST A 102 can detect the attack based on the amplified noise of the attacker's fake tap. In such examples, the STA 102 may dismiss or otherwise ignore such fake taps.

FIG. 8 illustrates an alternative example of a secure sounding symbol sequence 800 that has been windowed (e.g., filtered) by the example secure signal converter 101 of FIGS. 1 and 2. FIG. 8 includes an example filter signal 802 and the example sounding signal frame 602 of FIG. 6B.

In the illustrated example of FIG. 8, the conventional sounding sample sequence 602 is windowed using the rectangular filter 802. For example, the example secure signal converter 101 generates the secure sample sequence 800 by multiplying the filter signal 802 with the sounding signal sample sequence 602 to remove (e.g., zero out) the final CP. In this manner, the last two samples (e.g., corresponding to the CP) are removed and/or otherwise replace with zeros (e.g., zero energy or a zero power guard). The example AP 100 may completely drop the CP when prevention of ISI is desired. To prevent ISI, a zero power guard (e.g., a zero energy gap or zero padding) is created between the windowed sounding (e.g., OFDM) samples so that ISI can be easily removed at the receiver. The zero power guard is a special case of CP (e.g., the starting portion of the symbol is zero and the ending portion of the symbol is also zero). In general, zeros can be placed at the end, the beginning, or a combination of the end and the beginning. In some examples, the example non-rectangular filter 802 may be used to reduce out-of-band emissions.

FIG. 9 illustrates an example transform window 900 used by the example component interface 210 to sample a received a secure sounding signal. Because a HE-STF precedes the first sounding symbol (e.g., as described above in conjunction with FIG. 6A), the example AP 100 may include part or all of the zero power guard interval at the beginning of the symbol, as illustrated in FIG. 9. For removing the ISI, the receiving device (e.g., the example STA 102) processes the received sounding signal using a transform window (e.g., a fast Fourier transform (FFT) window). The transform window captures the whole sounding portion of a sounding symbol illustrated by samples 1-9 for all multipaths (e.g., multiple paths used for the reception of one or more sounding signals). To keep transform window size unchanged from legacy Wi-Fi, non-zero sounding duration may be reduced to accommodate the zero prefix or padding. An example of such a reduction is illustrated below in conjunction with FIG. 10.

FIG. 10 illustrates a timing diagram 1000 corresponding to example secure sounding symbols with zero prefix 1001, 1002 including (e.g., the lx long training field (LTF)) and example secure sounding symbols with zero prefixes 1003, 1005 (e.g., including 2x LTFs) that may be generated by the example secure signal converter 101 of FIG. 1. A conventional sounding symbol (e.g., used in IEEE 802.1 lax protocol) with a lx symbol duration includes a 0.8 microsecond (us) CP and a 3.2 us sounding symbol (e.g., corresponding to 2° number of time domain samples). The 3.2 microsecond sounding symbol corresponds to the lx symbol duration of IEEE 802.1 lax. Alternatively, the sounding symbol of the secure sounding symbols 1001, 1002 may correspond to a 2x duration symbol duration. For 2x duration symbol duration (e.g., the example secure sounding symbols 1003, 1004), the 3.2 microseconds of the secure sounding symbol may increase to 6.4 microseconds (e.g., corresponding to 2ⁿ⁺¹ number of time domain samples) and the 2.4 microseconds of the secure sounding symbol may increase to 4.8 microsecond. The 3.2 or 6.4 microsecond sounding symbol is generated by same the fast Fourier transform (FFT) or inverse (IFFT) used for the conventional sounding symbol. For the conventional sounding symbol, the last 0.8 microsecond of the 3.2 or 6.4 microsecond sounding signal is added to the beginning as the cyclic prefix. For the secure sounding symbol 1001, a zero power guard interval of 0.8 microsecond is added. In some examples, the 0.8 microseconds can increase to 1.6 microseconds. The generation of the example secure sounding signals 1001, 1002 maximizes the reuse of the hardware that generates the conventional sounding symbol. The sounding symbol 1002 uses the zero power guard (e.g., zero power guard samples) as cyclic prefix. In addition, the zero power guard interval is shared by two adjacent sounding symbols. Namely, the gap is not only the last portion of the previous symbol but also the beginning portion of the current symbol. Because the total sounding symbol duration of 1002 is the same the convention symbol duration without the cyclic prefix portion, the FFT size for the generation and/or reception of 1004 can be the same as a conventional sounding symbol (e.g., 128 point FFT for 20 MHz, 256 point FFT for 40 MHz, etc.). For the same multipath tolerance (e.g., a 0.8 us CP and the same transform window size), the example secure sounding symbol 1000 only needs 3.2 us in total (e.g., 0.8 us shorter than the sounding symbol of 1001). To maximize the reuse of legacy Wi-Fi hardware, some examples may add 0.8 us of padding or prefix to make the duration of the secure sounding symbol and the conventional sounding symbol the same.

FIG. 11 illustrates an example generation of a secure sounding symbol (e.g., an OFDM). The example secure signal converter 101 of FIGS. 1 and 2 performs the generation of FIG. 11. A sequence of symbols (e.g., BPSK symbols) are first applied in the frequency domain on active tones (e.g., 250 tones), as shown in an example frequency diagram 1100. The sequence may be randomly generated and known between the example AP 100 and the example STA 102 (e.g., during communication negotiations). The symbol sequence is then transformed to the time domain, as shown an example timing diagram 1102. In the time domain, instead of adding or keeping a CP, windowing is applied to get the zero power guard interval (e.g., and/or zero padding), as shown in an example timing diagram 1104. As described above, the windowing function can be a rectangle, or a window with smooth edge(s) (e.g., a raised cosine window, a Hann window, or a Hamming window).

FIG. 12 illustrates an example generation of a secure sounding symbol including additional guard tone(s) to reduce the effect of leakage. The example secure signal converter 101 of FIGS. 1 and 2 performs the generation of FIG. 12. The windowing of the sounding symbol (e.g., the OFDM symbol) may cause out-of-band emissions and leakages to the DC tone. To avoid such emissions and/or leakages, the AP 100 may reserve the additional guard tones 1202a-d around the DC and/or the edges as illustrated in an example frequency diagram 1200. For example, the AP 100 may add two tones 1202b-c for protecting the DC such that there are three guard tones instead of one around DC. In another example, the AP 100 may add one edge tone 1202a, 1202d for each side, such that there are four edge tones instead of three on each side. The number of additional guard tones may be based on user and/or manufacturer preferences. For example, a user may desire additional guard tones depending on the tampering edge of the window and the width of the window. A slower tampering edge corresponds to less

emissions/leakage and would correspond with less guard tones and a steeper tampering edge corresponds to more emissions/leakage and would correspond with more guard tones. For example, if the AP 100 reduces the number of zeros in FIG. 12 at the cost of multipath tolerance, a user/AP can reduce the number of guard tones. In another example, if a user/AP may use 4X LTF with 12.8 us signal duration and keep the same 0.8 us multipath tolerance, the window is relatively wider and additional guard tones may be desired. The symbol sequence is then transformed to the time domain, as shown an example timing diagram 1204. In the time domain, instead of adding or keeping a CP, windowing is applied to get the zero power guard interval (e.g., zero energy and/or zero padding), as shown in an example timing diagram 1106. As described above, the windowing function can be a rectangle, or a window with smooth edge(s) (e.g., a raised cosine window, a Hann window, or a Hamming window).

FIG. 13 is an example timing diagram 1300 illustrating time domain independent pulses to implement a secure sounding signal (e.g., a PPM signal). The example timing diagram 1300 includes an example first varying sounding signal 1302 and an example second varying sound signal 1304. In some examples, the first varying signal 1302 and the second varying signal 1304 are different multipath signals. In some examples, the attacker 104 of FIG. 1 may detect the sounding signal after receiving a part of the signal in an ideal scenario. This gives the attacker 104 a chance to attempt to determine the rest of the sounding signal. To prevent such detection, the sounding signal (e.g., as a whole or as individual symbols of the sounding signal) may be transmitted as a sequence of pulses in the time domain, as shown in FIG. 13. The polarity, phase, timing, and/or magnitude of each pulse can be independent from the previous pulse. In this manner, the previously received signals do not provide information about the subsequent signals, thereby preventing the attacker 104 from determining a sounding signal based on receiving the initial part of the sounding signal. The characteristics of the pulses may be exchanged by the AP 100 and the ST A 102 during prior negotiations.

FIG. 14 is a block diagram of a radio architecture 105 A, 105B in accordance with some embodiments that may be implemented in any one of the example AP 100 and/or the example STA 102 of FIG. 1. Radio architecture 105A, 105B may include radio front-end module (FEM) circuitry 1404a-b, radio IC circuitry 1406a-b and baseband processing circuitry 1408a-b. Radio architecture 105 A, 105B as shown includes both Wireless Local Area Network (WLAN) functionality and Bluetooth (BT) functionality although embodiments are not so limited. In this disclosure, "WLAN" and "Wi-Fi" are used interchangeably.

FEM circuitry 1404a-b may include a WLAN or Wi-Fi FEM circuitry 1404a and a Bluetooth (BT) FEM circuitry 1404b. The WLAN FEM circuitry 1404a may include a receive signal path comprising circuitry configured to operate on WLAN RF signals received from one or more antennas 1401, to amplify the received signals and to provide the amplified versions of the received signals to the WLAN radio IC circuitry 1406a for further processing. The BT FEM circuitry 1404b may include a receive signal path which may include circuitry configured to operate on BT RF signals received from one or more antennas 1401, to amplify the received signals and to provide the amplified versions of the received signals to the BT radio IC circuitry 1406b for further processing. FEM circuitry 1404a may also include a transmit signal path which may include circuitry configured to amplify WLAN signals provided by the radio IC circuitry 1406a for wireless transmission by one or more of the antennas 1401. In addition, FEM circuitry 1404b may also include a transmit signal path which may include circuitry configured to amplify BT signals provided by the radio IC circuitry 1406b for wireless transmission by the one or more antennas. In the embodiment of FIG. 14, although FEM 1404a and FEM 1404b are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of an FEM (not shown) that includes a transmit path and/or a receive path for both WLAN and BT signals, or the use of one or more FEM circuitries where at least some of the FEM circuitries share transmit and/or receive signal paths for both WLAN and BT signals.

Radio IC circuitry 1406a-b as shown may include WLAN radio IC circuitry 1406a and BT radio IC circuitry 1406b. The WLAN radio IC circuitry 1406a may include a receive signal path which may include circuitry to down-convert WLAN RF signals received from the FEM circuitry 1404a and provide baseband signals to WLAN baseband processing circuitry 1408a. BT radio IC circuitry 1406b may in turn include a receive signal path which may include circuitry to down-convert BT RF signals received from the FEM circuitry 1404b and provide baseband signals to BT baseband processing circuitry 1408b. WLAN radio IC circuitry 1406a may also include a transmit signal path which may include circuitry to up-convert WLAN baseband signals provided by the WLAN baseband processing circuitry 1408a and provide WLAN RF output signals to the FEM circuitry 1404a for subsequent wireless transmission by the one or more antennas 1401. BT radio IC circuitry 1406b may also include a transmit signal path which may include circuitry to up-convert BT baseband signals provided by the BT baseband processing circuitry 1408b and provide BT RF output signals to the FEM circuitry 1404b for subsequent wireless transmission by the one or more antennas 1401. In the embodiment of FIG. 14, although radio IC circuitries 1406a and 1406b are shown as being distinct from one another, embodiments are not so limited, and include within their scope the use of a radio IC circuitry (not shown) that includes a transmit signal path and/or a receive signal path for both WLAN and BT signals, or the use of one or more radio IC circuitries where at least some of the radio IC circuitries share transmit and/or receive signal paths for both WLAN and BT signals.

Baseband processing circuity 1408a-b may include a WLAN baseband processing circuitry 1408a and a BT baseband processing circuitry 1408b. The WLAN baseband processing circuitry 1408a may include a memory, such as, for example, a set of RAM arrays in a Fast

Fourier Transform or Inverse Fast Fourier Transform block (not shown) of the WLAN baseband processing circuitry 1408a. Each of the WLAN baseband circuitry 1408a and the BT baseband circuitry 1408b may further include one or more processors and control logic to process the signals received from the corresponding WLAN or BT receive signal path of the radio IC circuitry 1406a-b, and to also generate corresponding WLAN or BT baseband signals for the transmit signal path of the radio IC circuitry 1406a-b. Each of the baseband processing circuitries 1408a and 1408b may further include physical layer (PHY) and medium access control layer (MAC) circuitry, and may further interface with the link aggregator 144 for generation and processing of the baseband signals and for controlling operations of the radio IC circuitry 1406a- b.

Referring still to FIG. 14, according to the shown embodiment, WLAN-BT coexistence circuitry 1413 may include logic providing an interface between the WLAN baseband circuitry 1408a and the BT baseband circuitry 1408b to enable use cases requiring WLAN and BT coexistence. In addition, a switch 1403 may be provided between the WLAN FEM circuitry 1404a and the BT FEM circuitry 1404b to allow switching between the WLAN and BT radios according to application needs. In addition, although the antennas 1401 are depicted as being respectively connected to the WLAN FEM circuitry 1404a and the BT FEM circuitry 1404b, embodiments include within their scope the sharing of one or more antennas as between the WLAN and BT FEMs, or the provision of more than one antenna connected to each of FEM 1404a or 1404b.

In some embodiments, the front-end module circuitry 1404a-b, the radio IC circuitry

1406a-b, and baseband processing circuitry 1408a-b may be provided on a single radio card, such as wireless radio card 1402. In some other embodiments, the one or more antennas 1401, the FEM circuitry 1404a-b and the radio IC circuitry 1406a-b may be provided on a single radio card. In some other embodiments, the radio IC circuitry 1406a-b and the baseband processing circuitry 1408a-b may be provided on a single chip or integrated circuit (IC), such as IC 1412.

In some embodiments, the wireless radio card 1402 may include a WLAN radio card and may be configured for Wi-Fi communications, although the scope of the embodiments is not limited in this respect. In some of these embodiments, the radio architecture 105 A, 105B may be configured to receive and transmit orthogonal frequency division multiplexed (OFDM) or orthogonal frequency division multiple access (OFDMA) communication signals over a multicarrier communication channel. The OFDM or OFDMA signals may comprise a plurality of orthogonal subcarriers.

In some of these multicarrier embodiments, radio architecture 105 A, 105B may be part of a Wi-Fi communication station (STA) such as a wireless access point (AP), a base station or a mobile device including a Wi-Fi device. In some of these embodiments, radio architecture 105 A, 105B may be configured to transmit and receive signals in accordance with specific

communication standards and/or protocols, such as any of the Institute of Electrical and

Electronics Engineers (IEEE) standards including, 802.11n-2009, IEEE 802.11-2012, IEEE 802.11-2016, 802.11n-2009, 802.1 lac, 802.11ah, 802. Had, 802. Hay and/or 802.1 lax standards and/or proposed specifications for WLANs, although the scope of embodiments is not limited in this respect. Radio architecture 105 A, 105B may also be suitable to transmit and/or receive communications in accordance with other techniques and standards.

In some embodiments, the radio architecture 105 A, 105B may be configured for high- efficiency Wi-Fi (HEW) communications in accordance with the IEEE 802.1 lax standard. In these embodiments, the radio architecture 105 A, 105B may be configured to communicate in accordance with an OFDMA technique, although the scope of the embodiments is not limited in this respect.

In some other embodiments, the radio architecture 105 A, 105B may be configured to transmit and receive signals transmitted using one or more other modulation techniques such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and/or frequency hopping code division multiple access (FH-CDMA)), time-division

multiplexing (TDM) modulation, and/or frequency-division multiplexing (FDM) modulation, although the scope of the embodiments is not limited in this respect.

In some embodiments, as further shown in FIG. 6, the BT baseband circuitry 1408b may be compliant with a Bluetooth (BT) connectivity standard such as Bluetooth, Bluetooth 8.0 or Bluetooth 6.0, or any other iteration of the Bluetooth Standard. In

In some embodiments, the radio architecture 105 A, 105B may include other radio cards, such as a cellular radio card configured for cellular (e.g., 5GPP such as LTE, LTE-Advanced or 7G communications).

In some IEEE 802.11 embodiments, the radio architecture 105 A, 105B may be configured for communication over various channel bandwidths including bandwidths having center frequencies of about 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of about 2 MHz, 4 MHz, 5 MHz, 5.5 MHz, 6 MHz, 8 MHz, 10 MHz, 20 MHz, 40 MHz, 80 MHz (with contiguous bandwidths) or 80+80 MHz (160MHz) (with non-contiguous bandwidths). In some

embodiments, a 920 MHz channel bandwidth may be used. The scope of the embodiments is not limited with respect to the above center frequencies however.

FIG. 15 illustrates WLAN FEM circuitry 1404a in accordance with some embodiments. Although the example of FIG. 15 is described in conjunction with the WLAN FEM circuitry 1404a, the example of FIG. 15 may be described in conjunction with the example BT FEM circuitry 1404b (FIG. 14), although other circuitry configurations may also be suitable.

In some embodiments, the FEM circuitry 1404a may include a TX/RX switch 1502 to switch between transmit mode and receive mode operation. The FEM circuitry 1404a may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry 1404a may include a low-noise amplifier (LNA) 1506 to amplify received RF signals 1503 and provide the amplified received RF signals 1507 as an output (e.g., to the radio IC circuitry 1406a-b (FIG. 14)). The transmit signal path of the circuitry 1404a may include a power amplifier (PA) to amplify input RF signals 1509 (e.g., provided by the radio IC circuitry 1406a- b), and one or more filters 1512, such as band-pass filters (BPFs), low-pass filters (LPFs) or other types of filters, to generate RF signals 1515 for subsequent transmission (e.g., by one or more of the antennas 1401 (FIG. 14)) via an example duplexer 1514.

In some dual-mode embodiments for Wi-Fi communication, the FEM circuitry 1404a may be configured to operate in either the 2.4 GHz frequency spectrum or the 5 GHz frequency spectrum. In these embodiments, the receive signal path of the FEM circuitry 1404a may include a receive signal path duplexer 1504 to separate the signals from each spectrum as well as provide a separate LNA 1506 for each spectrum as shown. In these embodiments, the transmit signal path of the FEM circuitry 1404a may also include a power amplifier 1510 and a filter 1512, such as a BPF, an LPF or another type of filter for each frequency spectrum and a transmit signal path duplexer 1504 to provide the signals of one of the different spectrums onto a single transmit path for subsequent transmission by the one or more of the antennas 1401 (FIG. 14). In some embodiments, BT communications may utilize the 2.4 GHz signal paths and may utilize the same FEM circuitry 1404a as the one used for WLAN communications.

FIG. 16 illustrates radio IC circuitry 1406a in accordance with some embodiments. The radio IC circuitry 1406a is one example of circuitry that may be suitable for use as the WLAN or BT radio IC circuitry 1406a/1406b (FIG. 14), although other circuitry configurations may also be suitable. Alternatively, the example of FIG. 16 may be described in conjunction with the example BT radio IC circuitry 1406b.

In some embodiments, the radio IC circuitry 1406a may include a receive signal path and a transmit signal path. The receive signal path of the radio IC circuitry 1406a may include at least mixer circuitry 1602, such as, for example, down-conversion mixer circuitry, amplifier circuitry 1606 and filter circuitry 1608. The transmit signal path of the radio IC circuitry 1406a may include at least filter circuitry 1612 and mixer circuitry 1614, such as, for example, up- conversion mixer circuitry. Radio IC circuitry 1406a may also include synthesizer circuitry 1604 for synthesizing a frequency 1605 for use by the mixer circuitry 1602 and the mixer circuitry 1614. The mixer circuitry 1602 and/or 1614 may each, according to some embodiments, be configured to provide direct conversion functionality. The latter type of circuitry presents a much simpler architecture as compared with standard super-heterodyne mixer circuitries, and any flicker noise brought about by the same may be alleviated for example through the use of OFDM modulation. FIG. 16 illustrates only a simplified version of a radio IC circuitry, and may include, although not shown, embodiments where each of the depicted circuitries may include more than one component. For instance, mixer circuitry 1614 may each include one or more mixers, and filter circuitries 1608 and/or 1612 may each include one or more filters, such as one or more BPFs and/or LPFs according to application needs. For example, when mixer circuitries are of the direct-conversion type, they may each include two or more mixers.

In some embodiments, mixer circuitry 1602 may be configured to down-convert RF signals 1507 received from the FEM circuitry 1404a-b (FIG. 14) based on the synthesized frequency 1605 provided by synthesizer circuitry 1604. The amplifier circuitry 1606 may be configured to amplify the down-converted signals and the filter circuitry 1608 may include an LPF configured to remove unwanted signals from the down-converted signals to generate output baseband signals 1607. Output baseband signals 1607 may be provided to the baseband processing circuitry 1408a-b (FIG. 14) for further processing. In some embodiments, the output baseband signals 1607 may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 1602 may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

In some embodiments, the mixer circuitry 1614 may be configured to up-convert input baseband signals 1611 based on the synthesized frequency 1605 provided by the synthesizer circuitry 1604 to generate RF output signals 1509 for the FEM circuitry 1404a-b. The baseband signals 1611 may be provided by the baseband processing circuitry 1408a-b and may be filtered by filter circuitry 1612. The filter circuitry 1612 may include an LPF or a BPF, although the scope of the embodiments is not limited in this respect.

In some embodiments, the mixer circuitry 1602 and the mixer circuitry 1614 may each include two or more mixers and may be arranged for quadrature down-conversion and/or up- conversion respectively with the help of synthesizer 1604. In some embodiments, the mixer circuitry 1602 and the mixer circuitry 1614 may each include two or more mixers each configured for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 1602 and the mixer circuitry 1614 may be arranged for direct down-conversion and/or direct up-conversion, respectively. In some embodiments, the mixer circuitry 1602 and the mixer circuitry 1614 may be configured for super-heterodyne operation, although this is not a requirement. Mixer circuitry 1602 may comprise, according to one embodiment: quadrature passive mixers (e.g., for the in-phase (I) and quadrature phase (Q) paths). In such an embodiment, RF input signal 1507 from FIG. 16 may be down-converted to provide I and Q baseband output signals to be sent to the baseband processor

Quadrature passive mixers may be driven by zero and ninety-degree time-varying LO switching signals provided by a quadrature circuitry which may be configured to receive a LO frequency (fLO) from a local oscillator or a synthesizer, such as LO frequency 1605 of synthesizer 1604 (FIG. 16). In some embodiments, the LO frequency may be the carrier frequency, while in other embodiments, the LO frequency may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the zero and ninety-degree time- varying switching signals may be generated by the synthesizer, although the scope of the embodiments is not limited in this respect.

In some embodiments, the LO signals may differ in duty cycle (the percentage of one period in which the LO signal is high) and/or offset (the difference between start points of the period). In some embodiments, the LO signals may have an 85% duty cycle and an 80% offset. In some embodiments, each branch of the mixer circuitry (e.g., the in-phase (I) and quadrature phase (Q) path) may operate at an 80% duty cycle, which may result in a significant reduction is power consumption.

The RF input signal 1507 (FIG. 15) may comprise a balanced signal, although the scope of the embodiments is not limited in this respect. The I and Q baseband output signals may be provided to low-noise amplifier, such as amplifier circuitry 1606 (FIG. 16) or to filter circuitry 1608 (FIG. 16).

In some embodiments, the output baseband signals 1607 and the input baseband signals 1611 may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals 1607 and the input baseband signals 1611 may be digital baseband signals. In these alternate embodiments, the radio IC circuitry may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry.

In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, or for other spectrums not mentioned here, although the scope of the embodiments is not limited in this respect. In some embodiments, the synthesizer circuitry 1604 may be a fractional -N synthesizer or a fractional N/N+l synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 1604 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider. According to some embodiments, the synthesizer circuitry 1604 may include digital synthesizer circuitry. An advantage of using a digital synthesizer circuitry is that, although it may still include some analog components, its footprint may be scaled down much more than the footprint of an analog synthesizer circuitry. In some embodiments, frequency input into synthesizer circuity 1604 may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. A divider control input may further be provided by either the baseband processing circuitry 1408a-b (FIG. 14) depending on the desired output frequency 1605. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table (e.g., within a Wi-Fi card) based on a channel number and a channel center frequency as determined or indicated by the example application processor 1410. The application processor 1410 may include, or otherwise be connected to, one of the example secure signal converter 101 or the example received signal converter 103 (e.g., depending on which device the example radio architecture is implemented in).

In some embodiments, synthesizer circuitry 1604 may be configured to generate a carrier frequency as the output frequency 1605, while in other embodiments, the output frequency 1605 may be a fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the output frequency 1605 may be a LO frequency (fLO).

FIG. 17 illustrates a functional block diagram of baseband processing circuitry 1408a in accordance with some embodiments. The baseband processing circuitry 1408a is one example of circuitry that may be suitable for use as the baseband processing circuitry 1408a (FIG. 14), although other circuitry configurations may also be suitable. Alternatively, the example of FIG. 163 may be used to implement the example BT baseband processing circuitry 1408b of FIG. 14.

The baseband processing circuitry 1408a may include a receive baseband processor (RX BBP) 1702 for processing receive baseband signals 1609 provided by the radio IC circuitry 1406a-b (FIG. 14) and a transmit baseband processor (TX BBP) 1704 for generating transmit baseband signals 1611 for the radio IC circuitry 1406a-b. The baseband processing circuitry 1408a may also include control logic 1706 for coordinating the operations of the baseband processing circuitry 1408a.

In some embodiments (e.g., when analog baseband signals are exchanged between the baseband processing circuitry 1408a-b and the radio IC circuitry 1406a-b), the baseband processing circuitry 1408a may include ADC 1710 to convert analog baseband signals 1709 received from the radio IC circuitry 1406a-b to digital baseband signals for processing by the RX BBP 1702. In these embodiments, the baseband processing circuitry 1408a may also include DAC 1712 to convert digital baseband signals from the TX BBP 1704 to analog baseband signals 1711.

In some embodiments that communicate OFDM signals or OFDMA signals, such as through baseband processor 1408a, the transmit baseband processor 1704 may be configured to generate OFDM or OFDMA signals as appropriate for transmission by performing an inverse fast Fourier transform (IFFT). The receive baseband processor 1702 may be configured to process received OFDM signals or OFDMA signals by performing an FFT. In some

embodiments, the receive baseband processor 1702 may be configured to detect the presence of an OFDM signal or OFDMA signal by performing an autocorrelation, to detect a preamble, such as a short preamble, and by performing a cross-correlation, to detect a long preamble. The preambles may be part of a predetermined frame structure for Wi-Fi communication.

Referring back to FIG. 14, in some embodiments, the antennas 1401 (FIG. 14) may each comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some multiple-input multiple-output (MIMO) embodiments, the antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result. Antennas 1401 may each include a set of phased-array antennas, although embodiments are not so limited.

Although the radio architecture 105 A, 105B is illustrated as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements. For example, some elements may comprise one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein. In some embodiments, the functional elements may refer to one or more processes operating on one or more processing elements.

FIG. 18 is a block diagram of an example processor platform 1800 capable of executing the instructions of FIGS. 3-4 to implement the example secure signal converter 101 of FIGS. 1 and/or 2. The processor platform 1800 can be, for example, a server, a personal computer, a mobile device (e.g., a cell phone, a smart phone, a tablet such as an iPad™), a personal digital assistant (PDA), an Internet appliance, or any other type of computing device.

The processor platform 1800 of the illustrated example includes a processor 1812. The processor 1812 of the illustrated example is hardware. For example, the processor 1812 can be implemented by one or more integrated circuits, logic circuits, microprocessors, GPUs, DSPs, or controllers from any desired family or manufacturer. The hardware processor may be a semiconductor based (e.g., silicon based) device. In this example, the processor implements the example sounding signal generator 200, the example component interface 202, the example filter 204, and the example transformer 206

The processor 1812 of the illustrated example includes a local memory 1813 (e.g., a cache). The example processor 1812 of FIG. 18 executes the instructions of FIGS. 3-4 to implement the example sounding signal generator 200 and the example component interface 202 of FIG. 2. The processor 1812 of the illustrated example is in communication with a main memory including a volatile memory 1814 and a non- volatile memory 1816 via a bus 1818. The volatile memory 1814 may be implemented by Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), RAMBUS Dynamic Random Access Memory (RDRAM) and/or any other type of random access memory device. The non-volatile memory 1816 may be implemented by flash memory and/or any other desired type of memory device. Access to the main memory 1814, 1816 is controlled by a clock controller.

The processor platform 1800 of the illustrated example also includes an interface circuit 1820. The interface circuit 1820 may be implemented by any type of interface standard, such as an Ethernet interface, a universal serial bus (USB), and/or a PCI express interface.

In the illustrated example, one or more input devices 1822 are connected to the interface circuit 1820. The input device(s) 1822 permit(s) a user to enter data and commands into the processor 1812. The input device(s) can be implemented by, for example, a sensor, a microphone, a camera (still or video), a keyboard, a button, a mouse, a touchscreen, a track-pad, a trackball, isopoint and/or a voice recognition system.

One or more output devices 1824 are also connected to the interface circuit 1820 of the illustrated example. The output devices 1824 can be implemented, for example, by display devices (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touchscreen, a tactile output device, and/or speakers). The interface circuit 1820 of the illustrated example, thus, typically includes a graphics driver card, a graphics driver chip or a graphics driver processor.

The interface circuit 1820 of the illustrated example also includes a communication device such as a transmitter, a receiver, a transceiver, a modem and/or network interface card to facilitate exchange of data with external machines (e.g., computing devices of any kind) via a network 1826 (e.g., an Ethernet connection, a digital subscriber line (DSL), a telephone line, coaxial cable, a cellular telephone system, etc.).

The processor platform 1800 of the illustrated example also includes one or more mass storage devices 1828 for storing software and/or data. Examples of such mass storage devices 1828 include floppy disk drives, hard drive disks, compact disk drives, Blu-ray disk drives, RAID systems, and digital versatile disk (DVD) drives.

The coded instructions 1832 of FIGS. 3-4 may be stored in the mass storage device 1828, in the volatile memory 1814, in the non-volatile memory 1816, and/or on a removable tangible computer readable storage medium such as a CD or DVD.

FIG. 19 is a block diagram of an example processor platform 1900 capable of executing the instructions of FIG. 5 to implement the example received signal converter 103 of FIGS 1 and/or 2. The processor platform 1900 can be, for example, a server, a personal computer, a mobile device (e.g., a cell phone, a smart phone, a tablet such as an iPad™), a personal digital assistant (PDA), an Internet appliance, or any other type of computing device.

The processor platform 1900 of the illustrated example includes a processor 1912. The processor 1912 of the illustrated example is hardware. For example, the processor 1912 can be implemented by one or more integrated circuits, logic circuits, microprocessors, GPUs, DSPs, or controllers from any desired family or manufacturer. The hardware processor may be a semiconductor based (e.g., silicon based) device. In this example, the processor implements the example component interface 210, the example sounding signal analyzer 212, the example noise calculator 214, and the example transformer 216.

The processor 1912 of the illustrated example includes a local memory 1913 (e.g., a cache). The example processor 1912 of FIG. 19 executes the instructions of FIG. 5 to implement the example component interface 210 and/or the example sounding symbol analyzer 212 of FIG. 2. The processor 1912 of the illustrated example is in communication with a main memory including a volatile memory 1914 and a non- volatile memory 1916 via a bus 1918. The volatile memory 1914 may be implemented by Synchronous Dynamic Random Access Memory

(SDRAM), Dynamic Random Access Memory (DRAM), RAMBUS Dynamic Random Access Memory (RDRAM) and/or any other type of random access memory device. The non-volatile memory 1916 may be implemented by flash memory and/or any other desired type of memory device. Access to the main memory 1914, 1916 is controlled by a clock controller.

The processor platform 1900 of the illustrated example also includes an interface circuit 1920. The interface circuit 1920 may be implemented by any type of interface standard, such as an Ethernet interface, a universal serial bus (USB), and/or a PCI express interface.

In the illustrated example, one or more input devices 1922 are connected to the interface circuit 1920. The input device(s) 1922 permit(s) a user to enter data and commands into the processor 1912. The input device(s) can be implemented by, for example, a sensor, a

microphone, a camera (still or video), a keyboard, a button, a mouse, a touchscreen, a track-pad, a trackball, isopoint and/or a voice recognition system.

One or more output devices 1924 are also connected to the interface circuit 1920 of the illustrated example. The output devices 1924 can be implemented, for example, by display devices (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touchscreen, a tactile output device, and/or speakers). The interface circuit 1920 of the illustrated example, thus, typically includes a graphics driver card, a graphics driver chip or a graphics driver processor.

The interface circuit 1920 of the illustrated example also includes a communication device such as a transmitter, a receiver, a transceiver, a modem and/or network interface card to facilitate exchange of data with external machines (e.g., computing devices of any kind) via a network 1926 (e.g., an Ethernet connection, a digital subscriber line (DSL), a telephone line, coaxial cable, a cellular telephone system, etc.). The processor platform 1900 of the illustrated example also includes one or more mass storage devices 1928 for storing software and/or data. Examples of such mass storage devices 1928 include floppy disk drives, hard drive disks, compact disk drives, Blu-ray disk drives, RAID systems, and digital versatile disk (DVD) drives.

The coded instructions 1932 of FIG. 5 may be stored in the mass storage device 1928, in the volatile memory 1914, in the non-volatile memory 1916, and/or on a removable tangible computer readable storage medium such as a CD or DVD.

Example 1 includes an apparatus to secure sounding symbols, the apparatus comprising a transformer to transform received sounding symbols from a frequency domain to a time domain to generate time domain samples, and a signal generator to generate a secure sounding signal by adding zero power guard samples to the time domain samples.

Example 2 includes the apparatus of example 1, further including an interface is to transmit instruction to radio architecture to transmit the secure sounding signal.

Example 3 includes the apparatus of example 2, wherein the interface is to transmit the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.

Example 4 includes the apparatus of example 1, wherein a number of time domain samples corresponds to a power of two.

Example 5 includes the apparatus of example 1, wherein signal generator is to add the zero power guard samples to a beginning of the time domain samples.

Example 6 includes the apparatus of example 1, wherein a duration of the zero power guard samples is example 0 includes 8 milliseconds of example 1 includes 6 milliseconds.

Example 7 includes the apparatus of example 1, wherein the time domain samples corresponds to a long training field.

Example 8 includes the apparatus of example 1, wherein the time domain samples corresponds to two long training fields.

Example 9 includes the apparatus of example 1, wherein the signal generator is to reserve at least one of (a) three guard tones around a direct current town of a secure sounding signal (b) four guard tones at a beginning of the sounding signal or (c) four guard tones at an end of the sounding signal. Example 10 includes the apparatus of example 1, wherein the signal generator is to select a symbol of the secure sounding signal for each active tone from a finite constellation.

Example 11 includes the apparatus of example 1, wherein the secure sounding signal is an orthogonal frequency division multiple access (ofdm) signal.

Example 12 includes a non-transitory computer readable storage medium comprising instructions which, when executed cause a machine to at least transform received sounding symbols from a frequency domain to a time domain to generate time domain samples, and generate a secure sounding signal by adding zero power guard samples to the time domain samples.

Example 13 includes the computer readable storage medium of example 13, wherein the instructions cause the machine to transmit instruction to radio architecture to transmit the secure sounding signal.

Example 14 includes the computer readable storage medium of example 14, wherein the instructions cause the machine to transmit the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.

Example 15 includes the computer readable storage medium of example 13, wherein a number of time domain samples corresponds to a power of two.

Example 16 includes the computer readable storage medium of example 13, wherein the instructions cause the machine to add the zero power guard samples to a beginning of the time domain samples.

Example 17 includes the apparatus of example 1, wherein a duration of the zero power guard samples is example 0 includes 8 milliseconds of example 1 includes 6 milliseconds.

Example 18 includes the computer readable storage medium of example 13, wherein the time domain samples corresponds to a long training field.

Example 19 includes the computer readable storage medium of example 13, wherein the time domain samples corresponds to two long training fields.

Example 20 includes the computer readable storage medium of example 13, wherein the instructions cause the machine to reserve at least one of (a) three guard tones around a direct current town of a secure sounding signal (b) four guard tones at a beginning of the sounding signal or (c) four guard tones at an end of the sounding signal. Example 21 includes the computer readable storage medium of example 13, wherein the instructions cause the machine to select a symbol of the secure sounding signal for each active tone from a finite constellation.

Example 22 includes the computer readable storage medium of example 13, wherein the secure sounding signal is an orthogonal frequency division multiple access (ofdm) signal.

Example 23 includes a method to secure sounding signals, the method comprising transforming received sounding symbols from a frequency domain to a time domain to generate time domain samples, and generating a secure sounding signal by adding zero power guard samples to the time domain samples.

Example 24 includes the method of example 23, further including transmitting instruction to radio architecture to transmit the secure sounding signal.

Example 25 includes the method of example 24, further including transmitting the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.

Although certain example methods, apparatus and articles of manufacture have been described herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus and articles of manufacture fairly falling within the scope of the claims of this patent.

Claims

What Is Claimed Is:

1. An apparatus to secure sounding symbols, the apparatus comprising:

a transformer to transform received sounding symbols from a frequency domain to a time domain to generate time domain samples; and

a signal generator to generate a secure sounding signal by adding zero power guard samples to the time domain samples.

2. The apparatus of claim 1, further including an interface is to transmit instruction to radio architecture to transmit the secure sounding signal.

3. The apparatus of claim 2, wherein the interface is to transmit the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.

4. The apparatus of claim 1, wherein a number of time domain samples corresponds to a power of two.

5. The apparatus of claim 1, wherein signal generator is to add the zero power guard samples to a beginning of the time domain samples.

6. The apparatus of claim 1, wherein a duration of the zero power guard samples is 0.8 milliseconds of 1.6 milliseconds.

7. The apparatus of claim 1, wherein the time domain samples corresponds to a long training field.

8. The apparatus of claim 1, wherein the time domain samples corresponds to two long training fields.

9. The apparatus of claim 1, wherein the signal generator is to reserve at least one of (A) three guard tones around a direct current town of a secure sounding signal (B) four guard tones at a beginning of the sounding signal or (C) four guard tones at an end of the sounding signal.

10. The apparatus of claim 1, wherein the signal generator is to select a symbol of the secure sounding signal for each active tone from a finite constellation.

11. The apparatus of claim 1, wherein the secure sounding signal is an orthogonal frequency division multiple access (OFDM) signal.

12. A non-transitory computer readable storage medium comprising instructions which, when executed cause a machine to at least: transform received sounding symbols from a frequency domain to a time domain to generate time domain samples; and

generate a secure sounding signal by adding zero power guard samples to the time domain samples.

13. The computer readable storage medium of claim 13, wherein the instructions cause the machine to transmit instruction to radio architecture to transmit the secure sounding signal.

14. The computer readable storage medium of claim 14, wherein the instructions cause the machine to transmit the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.

15. The computer readable storage medium of claim 13, wherein a number of time domain samples corresponds to a power of two.

16. The computer readable storage medium of claim 13, wherein the instructions cause the machine to add the zero power guard samples to a beginning of the time domain samples.

17. The apparatus of claim 1, wherein a duration of the zero power guard samples is 0.8 milliseconds of 1.6 milliseconds.

18. The computer readable storage medium of claim 13, wherein the time domain samples corresponds to a long training field.

19. The computer readable storage medium of claim 13, wherein the time domain samples corresponds to two long training fields.

20. The computer readable storage medium of claim 13, wherein the instructions cause the machine to reserve at least one of (A) three guard tones around a direct current town of a secure sounding signal (B) four guard tones at a beginning of the sounding signal or (C) four guard tones at an end of the sounding signal.

21. The computer readable storage medium of claim 13, wherein the instructions cause the machine to select a symbol of the secure sounding signal for each active tone from a finite constellation.

22. The computer readable storage medium of claim 13, wherein the secure sounding signal is an orthogonal frequency division multiple access (OFDM) signal.

23. A method to secure sounding signals, the method comprising:

transforming received sounding symbols from a frequency domain to a time domain to generate time domain samples; and

generating a secure sounding signal by adding zero power guard samples to the time domain samples.

24. The method of claim 23, further including transmitting instruction to radio architecture to transmit the secure sounding signal.

25. The method of claim 24, further including transmitting the instructions to the radio architecture to transmit the second sounding signal while varying at least one of a phase, a polarity, or a magnitude of the secure sounding signal.