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WO2018211751A1 - Module semi-conducteur et dispositif de conversion de puissance - Google Patents

Module semi-conducteur et dispositif de conversion de puissance Download PDF

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Publication number
WO2018211751A1
WO2018211751A1 PCT/JP2018/004050 JP2018004050W WO2018211751A1 WO 2018211751 A1 WO2018211751 A1 WO 2018211751A1 JP 2018004050 W JP2018004050 W JP 2018004050W WO 2018211751 A1 WO2018211751 A1 WO 2018211751A1
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WO
WIPO (PCT)
Prior art keywords
insulating substrate
main surface
semiconductor module
insulating layer
convex portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2018/004050
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English (en)
Japanese (ja)
Inventor
耕三 原田
平松　星紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of WO2018211751A1 publication Critical patent/WO2018211751A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H10W40/10—
    • H10W70/60—
    • H10W70/68—
    • H10W74/10—
    • H10W74/40—
    • H10W76/47—
    • H10W90/00—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H10W72/5473—
    • H10W72/5475—
    • H10W72/884—
    • H10W74/00—
    • H10W90/734—
    • H10W90/753—

Definitions

  • the present invention relates to a semiconductor module and a power conversion device, and more particularly to a semiconductor module and a power conversion device in which a power semiconductor element is sealed with a resin.
  • a semiconductor element of a type in which the energization path is the longitudinal direction of the element is generally called a power semiconductor element.
  • the power semiconductor element include an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a bipolar transistor, and a diode.
  • IGBT Insulated Gate Bipolar Transistor
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • bipolar transistor Bipolar transistor
  • a power module semiconductor device as a semiconductor module in which a power semiconductor element is mounted on a circuit board and packaged with a sealing resin is used in a wide range of fields such as industrial equipment, automobiles, and railways.
  • demands for higher performance of power module semiconductor devices such as increased rated voltage and rated current and expanded operating temperature range (higher temperature or lower temperature). Is growing.
  • the package structure of the power module semiconductor device is mainly called a case structure.
  • the case type power module semiconductor device has a structure in which a power semiconductor element is mounted on a base plate for heat dissipation via an insulating substrate, and a case is bonded to the base plate.
  • the semiconductor element mounted inside the power module semiconductor device is connected to the main electrode.
  • a bonding wire is used to connect the power semiconductor element and the main electrode.
  • silicone gel or epoxy resin is used as a sealing resin for power module semiconductor devices for the purpose of preventing insulation failure when a high voltage is applied.
  • Patent Document 1 discloses a semiconductor device in which a high insulation voltage-resistant resin agent is provided on a creeping surface.
  • the surface of the base plate between the end portion of the insulating substrate and the case structure that is, the region in the casing composed of the base plate and the case structure is different from the above. It is sealed with a voltage-resistant resin agent.
  • Japanese Patent Laid-Open No. 2000-216332 it is possible to increase the breakdown voltage of the insulating material between the insulating substrate and the base plate and suppress the dielectric breakdown between the insulating substrate and the base plate.
  • Japanese Patent Laid-Open No. 2000-216332 in addition to the normal process, there is a separate process of providing a high-insulation voltage-resistant resin agent on the surface of the insulating substrate between the end of the conductive pattern of the insulating substrate and the end of the insulating substrate There arises a problem that the number of generated steps increases.
  • Japanese Patent Laid-Open No. 2000-216332 in the step of covering the insulating substrate creeping surface with a relatively high viscosity high insulating voltage-resistant resin agent, bubbles are entrained between the resin agent and the insulating substrate creeping surface. Problems arise.
  • Patent Document 2 a partition wall is bonded on a surface electrode pattern included in an insulating substrate.
  • the insulating substrate to which the partition walls are bonded is sealed with a sealing resin.
  • Patent Document 3 As another conventional power module semiconductor device, for example, in Japanese Patent Laid-Open No. 4-157758 (Patent Document 3), a first surface on which a substrate electrode is mounted and an outer side than the first surface are described. A configuration having a printed wiring board having a second surface formed above is disclosed.
  • an IC chip is mounted in a concave groove formed by the first surface, the inner side surface, and the inner bottom surface, and the concave groove is sealed with resin.
  • the partition wall bonded on the surface electrode pattern of the insulating substrate in Japanese Patent Application Laid-Open No. 2013-16684 is not integrated with the insulating substrate but bonded on it. For this reason, it is not possible to solve the problem of entrainment of bubbles in the region between the insulating substrate and the partition wall and the problem of an increase in the process due to the necessity of a separate process for joining the partition walls. Further, since the partition wall is bonded onto the surface electrode pattern included in the insulating substrate, for example, a discharge generated from the end face of the surface electrode pattern cannot suppress a dielectric breakdown due to a short circuit to the base plate side.
  • the printed wiring board has an upward convex portion formed by the second surface.
  • the convex portion of the printed wiring board is sealed.
  • the inside of the concave groove formed in the printed wiring board is only filled with resin. Therefore, inevitably, the insulation breakdown between the convex portion of the printed wiring board and the base plate directly below the printed wiring board is not suppressed by the sealing resin.
  • the present invention has been made in view of the above problems.
  • the purpose is to provide a semiconductor module capable of suppressing dielectric breakdown between the insulating substrate and the base plate while avoiding entrainment of bubbles between the substrate and the convex portion, and a power conversion device having the semiconductor module. Is to provide.
  • the semiconductor module according to the present invention includes an insulating substrate, a semiconductor element, a base plate, a case member, and a sealing resin.
  • the semiconductor element is mounted on one main surface side of the insulating substrate, and the base plate is bonded to the other main surface side of the insulating substrate.
  • the case member is joined to the base plate so as to surround the insulating substrate and the semiconductor element in a plan view.
  • the sealing resin is filled in a region surrounded by the base plate and the case member and seals the insulating substrate.
  • a convex portion that is integrated with the insulating substrate and extends in a direction crossing one main surface is formed at an end portion of the insulating substrate in plan view.
  • the convex shape complicates the shape of the creeping surface between the insulating substrate and the base plate while avoiding entrainment of bubbles between the two. Extend the creepage distance. Thereby, the dielectric breakdown between the insulating substrate sealed with the sealing resin and the base plate can be suppressed.
  • FIG. 1 is a schematic plan view showing a configuration of a semiconductor module according to a first embodiment.
  • 1 is a schematic cross-sectional view showing a configuration of a semiconductor module according to a first embodiment. It is a general
  • FIG. 3 is a schematic cross-sectional view of the same region as FIG. 2 of the semiconductor module of the comparative example of the first embodiment.
  • FIG. 5 is a schematic enlarged sectional view showing a dielectric breakdown path in a region V surrounded by a dotted line in FIG. 4.
  • FIG. 6 is a schematic enlarged cross-sectional view showing a dielectric breakdown path in the same region as that of FIG. 5 of the semiconductor module of the first embodiment.
  • FIG. 6 is a schematic cross-sectional view showing a configuration of a semiconductor module according to a second embodiment. It is a general
  • FIG. 6 is a schematic cross-sectional view showing a configuration of a semiconductor module according to a third embodiment.
  • FIG. 6 is a schematic cross-sectional view showing a configuration of a semiconductor module according to a fourth embodiment. It is a general
  • FIG. 12 is a schematic enlarged cross-sectional view showing a dielectric breakdown path in the same region as FIG. 11 of the semiconductor module of the comparative example of the fourth embodiment.
  • FIG. 10 is a schematic cross-sectional view showing a configuration of a semiconductor module of a first example of a fifth embodiment.
  • FIG. 10 is a schematic cross-sectional view showing a configuration of a semiconductor module of a second example of the fifth embodiment. It is a block diagram which shows the structure of the power conversion system to which the power converter device which concerns on Embodiment 6 of this invention is applied.
  • Embodiment 1 FIG. First, the structure of the semiconductor module of this embodiment will be described with reference to FIGS. For convenience of explanation, an X direction, a Y direction, and a Z direction are introduced.
  • FIG. 1 is a schematic plan view of each part of the semiconductor module according to the present embodiment except for a lid 9 which will be described later.
  • FIG. 2 is a schematic cross-sectional view of a portion of the semiconductor module according to the present embodiment taken along line II-II in FIG.
  • FIG. 3 is a schematic enlarged cross-sectional view of the semiconductor module of the present embodiment, particularly in a region III surrounded by a dotted line in FIG.
  • a semiconductor module 101 as a power module semiconductor device of the present embodiment includes an insulating substrate 1, a semiconductor element 2, a base plate 3, a case member 4, and a sealing resin 5. And is mainly prepared.
  • the semiconductor module 101 includes solders 6 ⁇ / b> A and 6 ⁇ / b> B, bonding wires 7, terminals 8, and a lid 9.
  • the insulating substrate 1 includes an insulating layer 11, an upper metal plate 12, a lower metal plate 13, and a convex portion 14.
  • the insulating layer 11 is a main member of the entire insulating substrate 1, and includes one main surface 11a extending along the XY plane shown in FIG. 1 and the other main surface 11b opposite to the one main surface 11a. Yes.
  • One main surface 11a is arranged on the positive side in the Z direction, and the other main surface 11b is arranged on the negative side in the Z direction, and both have a rectangular shape extending long in the X direction shown in FIG.
  • one main surface 11a and the other main surface 11b of the insulating layer 11 will be described below as one main surface 11a and the other main surface 11b of the entire insulating substrate 1.
  • the upper metal plate 12 is a region made of a thin metal plate disposed in at least a part of the insulating layer 11, that is, one main surface 11a of the insulating substrate 1, for example, a relatively central region.
  • the upper metal plate 12 has, as an example, a region extending in a rectangular shape on the X direction negative side in the drawing, a region extending in the Y direction negative side in a long and narrow rectangular shape, and a rectangular shape on the upper right side in the drawing as shown in FIG.
  • the present invention is not limited to this.
  • the upper metal plate 12 may be formed as a wiring pattern having a rectangular planar shape at the center in the X direction in the drawing and also on the positive side in the Y direction, but is not limited thereto. .
  • the lower metal plate 13 is a region made of a thin metal plate disposed in at least a part of the insulating layer 11, that is, the other main surface 11b of the insulating substrate 1, for example, a relatively central region.
  • the projecting portion 14 is formed, for example, so as to surround the upper metal plate 12 and the lower metal plate 13 from the outside in a rectangular shape at the end of the insulating layer 11 in plan view.
  • the insulating layer 11 is formed on one main surface 11a. It is a region extending in the intersecting Z direction. Since the end of the insulating layer 11 corresponds to the end of the entire insulating substrate 1, the convex portion 14 is formed at the end of the insulating substrate 1 in plan view.
  • the convex portion 14 is integrated with the insulating substrate 1, that is, the insulating layer 11 that is a part of the insulating substrate 1. In FIG. 2, the convex portion 14 is the insulating substrate 1, particularly the insulating layer 11 is in the XY plane. It arrange
  • the insulating layer 11 constituting the insulating substrate 1 is made of any ceramic material consisting of aluminum oxide, aluminum nitride, silicon nitride, or a resin material such as epoxy resin.
  • the upper metal plate 12 and the lower metal plate 13 are bonded to one main surface 11a and the other main surface 11b of the insulating layer 11, respectively, and are formed of a thin plate of copper or aluminum.
  • the convex portion 14 is integrated with the insulating layer 11, it is preferable that the convex portion 14 is integrally formed with the insulating layer 11. As shown in FIG. 3, for example, a thickness T1 as a distance between one main surface 11a extending along the XY plane of the insulating layer 11 and the other main surface 11b, and X of a portion extending in the Z direction of the convex portion 14
  • the thickness T2 may be equal to the direction or the Y direction, but is not limited thereto.
  • the semiconductor element 2 is mounted on the insulating layer 11, that is, on one main surface 11a side of the insulating substrate 1, that is, on the upper side in the Z direction in FIG.
  • the semiconductor element 2 is a semiconductor chip including a power semiconductor element, and has, for example, a square shape as shown in FIG.
  • the semiconductor element 2 is bonded to the upper surface of the upper metal plate 12 bonded on the one main surface 11 a of the insulating layer 11 by the solder 6 ⁇ / b> A.
  • the semiconductor element 2 is not limited to the solder 6A, and may be bonded onto the upper metal plate 12 by, for example, sintered silver or a conductive adhesive.
  • the semiconductor element 2 may be bonded onto the upper metal plate 12 by, for example, a liquid phase diffusion bonding technique.
  • a power control semiconductor element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor) or a free-wheeling diode is used.
  • the base plate 3 is bonded to the insulating layer 11, that is, the other main surface 11b side of the insulating substrate 1, that is, the lower side in the Z direction in FIG.
  • the base plate 3 is a member having a rectangular shape in plan view, for example, as shown in FIG. 1 for radiating the heat generated by the semiconductor element 2 from the lower side in the Z direction to the outside of the semiconductor module 101.
  • the base plate 3 is preferably formed of a generally known metal material having excellent thermal conductivity such as copper or aluminum. As shown in FIG. 2, the base plate 3 is joined to the lower surface in the Z direction of the lower metal plate 13 bonded to the other main surface 11 b of the insulating layer 11 by solder 6 ⁇ / b> B.
  • the base plate 3 is not limited to the solder 6B, and may be joined to the lower metal plate 13 by, for example, sintered silver or a conductive adhesive. Alternatively, the base plate 3 may be bonded onto the lower metal plate 13 by, for example, a liquid phase diffusion bonding technique.
  • the case member 4 is a member having a rectangular frame shape in plan view that is bonded to the surface of the base plate 3 facing upward in the Z direction in plan view. That is, the frame-shaped case member 4 is joined to the surface of the base plate 3 facing the upper side in the Z direction. Case member 4 is joined to base plate 3 so as to surround insulating substrate 1 and semiconductor element 2 in plan view. Thereby, the base plate 3 and the case member 4 form a housing.
  • the insulating substrate 1, the semiconductor element 2, and the like are joined and disposed in a space region surrounded by the housing, that is, the upper surface of the base plate 3 and the inner wall surface of the frame of the case member 4.
  • the case member 4 is, for example, any insulating resin selected from the group consisting of generally known sulfide resins, polyphenylene sulfide resins (PPS resins), polyethylene terephthalate resins (PBT resins), unsaturated polyester resins, and epoxy resins. As shown in FIG. 1, it is preferable that the material is formed to have a predetermined thickness in the X direction and the Y direction in plan view.
  • the case member 4 is joined to the surface of the base plate 3 by, for example, an adhesive (not shown).
  • a sealing resin 5 is disposed in a casing surrounded by the base plate 3 and the case member 4.
  • the sealing resin 5 is disposed so as to fill at least a relatively lower region in the Z direction in the casing. That is, the sealing resin 5 is filled so as to cover at least the entire surface of the semiconductor element 2 and the bonding wire 7 (up to a height equal to or higher than the position of the semiconductor element 2 and the bonding wire 7 in the Z direction).
  • the insulating substrate 1 and the semiconductor element 2 are sealed. That is, it is preferable that the insulating substrate 1 is entirely covered with the sealing resin 5 and sealed, including the one main surface 11a of the insulating layer 11, the other main surface 11b, and the end surfaces of the protrusions 14.
  • the uppermost region in the Z direction in the casing does not necessarily have to be filled with the sealing resin 5 as shown in FIG.
  • the sealing resin 5 is preferably a hard resin material such as an epoxy resin or a phenol resin, but when the case member 4 made of the resin material of the present embodiment is used, the sealing material is a silicone gel.
  • a soft resin material such as
  • the terminal 8 is a terminal for electrically connecting an internal circuit of the semiconductor module 101 and an external circuit, that is, for inputting and outputting current and voltage.
  • the terminal 8 is insert-molded or outsert-molded with respect to the case member 4. That is, the terminal 8 is exposed on the upper surface of the case member 4 at its uppermost portion while extending upward in the Z direction in a manner embedded in the case member 4, for example. The lowermost portion of the terminal 8 is exposed in the housing and can be connected to the bonding wire 7.
  • the terminal 8 is a copper plate electrode.
  • the bonding wire 7 is, for example, an aluminum alloy or copper alloy wire having a wire diameter of 0.1 mm to 0.5 mm.
  • a bonding ribbon may be used instead of the bonding wire 7 in FIGS.
  • the lid 9 is fixed to the upper part of the case member 4 in the Z direction, and thereby the inside of the casing composed of the base plate 3 and the case member 4 is sealed.
  • the lid 9 is fixed to the uppermost surface in the Z direction of the frame-like portion in plan view of the case member 4 by, for example, an adhesive or a screw (not shown).
  • the lid 9 separates the inside and the outside of the housing of the semiconductor module 101 and prevents the semiconductor module 101 from entering the housing such as dust.
  • FIG. 4 is a schematic cross-sectional view of the same region as FIG. 2 in the semiconductor module of the comparative example.
  • FIG. 5 is a schematic enlarged cross-sectional view showing the progress of the dielectric breakdown of the semiconductor module of the comparative example, particularly in a region V surrounded by a dotted line in FIG.
  • FIG. 6 is a schematic enlarged cross-sectional view showing the progress of dielectric breakdown in the same region as FIG. 5 of the present embodiment.
  • the semiconductor module 901 of the comparative example basically has the same configuration as that of the semiconductor module 101 of the present embodiment. Therefore, the same components are denoted by the same reference numerals and the description thereof is repeated. Absent. However, in the semiconductor module 901, the convex portion 14 is not formed at the end portion of the insulating substrate 1, that is, the insulating layer 11 in a plan view, and one main surface 11a and the other main surface 11b of the insulating layer 11 extend to the end surface. It extends straight along the XY plane. In this respect, the semiconductor module 901 is structurally different from the semiconductor module 101, but all other points are basically the same as those of the semiconductor module 101.
  • the sealing resin 5 of the semiconductor modules 101 and 901 is a silicone gel.
  • the linear expansion coefficient of the silicone gel is 300 ppm / K or more and 400 ppm / K or less.
  • the linear expansion coefficient of other members constituting the semiconductor modules 101 and 901 is 3 ppm / K or more and 25 ppm / K or less. That is, the linear expansion coefficient of the sealing resin 5 is much larger than the linear expansion coefficients of the other members constituting the semiconductor modules 101 and 901.
  • the sealing resin 5 of the semiconductor modules 101 and 901 is an epoxy resin
  • the adhesive strength of the epoxy resin is reduced.
  • peeling occurs at the interface between the sealing resin 5 and the insulating layer 11 covered by the sealing resin 5, and the insulating layer 11 and the sealing resin 5 Insulation failure occurs at the interface.
  • the arrow of the dielectric breakdown path 31 in the drawing indicates Then, peeling occurs starting from the point where the upper metal plate 12, the insulating layer 11, and the sealing resin 5 meet. This peeling proceeds from the starting point along the interface between the insulating layer 11 and the sealing resin 5 as indicated by the arrow of the dielectric breakdown path 31. That is, the dielectric breakdown path 31 first proceeds along the one main surface 11a, for example, to the positive side in the X direction, changes its direction when reaching the end surface of the insulating layer 11, and proceeds downward on the end surface 11c of the insulating layer 11 in the Z direction.
  • the dielectric breakdown path 31 proceeds in the sealing resin 5 as it is in the Z direction without changing its direction, and directly advances to the uppermost surface of the base plate 3. It is known that the insulation failure in the comparative example progresses as indicated by the above dielectric breakdown path 31.
  • the dielectric breakdown voltage between the upper metal plate 12 and the base plate 3 is low, and dielectric breakdown and a short circuit are easily generated between the two.
  • a convex portion 14 extending upward in the Z direction, that is, toward one main surface 11 a is formed at the end of the insulating layer 11 in plan view. ing. For this reason, referring to FIG. 6, when peeling occurs starting from the point where the same upper metal plate 12, insulating layer 11 and sealing resin 5 as in FIG. It progresses along the interface between the insulating layer 11 and the sealing resin 5 from the starting point.
  • the dielectric breakdown path 31 changes its direction and proceeds downward on the end surface 11c of the insulating layer 11 in the Z direction. Reach the top of the.
  • the convex portion 14 is disposed on the one main surface 11 a side of the insulating layer 11, the convex portion 14 is disposed on the side opposite to the base plate 3 with respect to the insulating layer 11. That is, since the convex portion 14 is arranged so as to be separated from the base plate 3, the creeping surface along the interface between the insulating layer 11 and the sealing resin 5 between the upper metal plate 12 and the base plate 3 due to the formation of the convex portion 14. The distance can be further increased.
  • the sealing resin 5 has an important role in order to obtain the purpose of ensuring the insulation between the members including the insulating substrate 1 in the casing formed by the base plate 3 and the case member 4. For this reason, from the viewpoint of reliably sealing the insulating layer 11 and the like of the insulating substrate 1 and enhancing its insulating characteristics, the creepage distance at the interface between the insulating layer 11 and the sealing resin 5 covering it is increased as described above. Thus, it is important that the short circuit between the upper metal plate 12 and the base plate 3 can be suppressed.
  • the convex portion 14 is formed on the end portion of the insulating substrate 1, particularly in the plan view of the insulating layer 11. For this reason, the effect which suppresses the dielectric breakdown by which the discharge emitted from the end surface of the upper side metal plate 12, for example can short-circuit to the base plate 3 side can be show
  • the convex portion 14 is formed integrally with the insulating layer 11 of the insulating substrate 1. For this reason, for example, when the convex portion is joined as a separate member on the surface of the insulating layer, it is possible to avoid the generation of bubbles that may occur in the region between the convex portion and the insulating layer. This is because bubbles cannot occur at the boundary portion between the insulating layer 11 and the convex portion 14 integrated.
  • the convex part 14 of this Embodiment is formed integrally with the insulating layer 11, it can be integrally molded with the insulating layer 11. For this reason, in order to lengthen the said creepage distance, the number of processes can be reduced compared with the case where a highly insulating resin agent etc. are separately supplied on the insulating layer 11, for example.
  • the convex portion 14 is formed on the insulating layer 11, so that the surface shape of the end portion of the insulating layer 11 becomes a complicated uneven shape.
  • the anchoring effect between the surface of the complex concavo-convex shape and the sealing resin 5 covering the surface is a comparative example of the adhesive strength and peeling resistance between the convex portion 14 and the sealing resin 5.
  • the dielectric breakdown voltage can be improved accordingly, and when the sealing resin 5 is a silicone gel, there is a possibility that bubbles are generated between the convex portion 14 and the sealing resin 5. Can be reduced.
  • FIG. FIG. 7 is a schematic cross-sectional view of the same region as the portion along the line II-II in FIG. 1 of the semiconductor module of the present embodiment.
  • FIG. 8 is a schematic enlarged cross-sectional view of the semiconductor module of the present embodiment, in particular, a region VIII surrounded by a dotted line in FIG.
  • semiconductor module 201 as the power module semiconductor device of the present embodiment basically has the same configuration as that of semiconductor module 101 of the first embodiment. Are given the same reference numerals and the description thereof will not be repeated. However, the semiconductor module 201 differs from the first embodiment in the length of the insulating substrate 1, that is, the length of the protrusion 14 formed at the end of the insulating layer 11.
  • the convex portion 14 extends to a position farther from the one main surface 11 a than the upper metal plate 12. That is, the uppermost portion in the Z direction of the convex portion 14 is disposed above the uppermost portion in the Z direction of the upper metal plate 12 by the gap G1. That is, the convex portion 14 extends by a length equal to or greater than the thickness of the upper metal plate 12 in the Z direction.
  • the thickness of the upper metal plate 12 is generally 0.2 mm or more and 0.5 mm or less.
  • the dielectric breakdown path 31 shown in FIG. 6 becomes longer than that in the first embodiment. For this reason, the dielectric breakdown voltage can be further improved as compared with the first embodiment.
  • FIG. 9 is a schematic cross-sectional view of the same region as the portion along the line II-II in FIG. 1 of the semiconductor module of the present embodiment.
  • semiconductor module 301 as the power module semiconductor device of the present embodiment basically has the same configuration as that of semiconductor module 101 of the first embodiment. The reference numerals are attached and the description is not repeated. However, the semiconductor module 301 is different from the first embodiment in the number of protrusions 14 formed.
  • a plurality of convex portions 14 are arranged at intervals with respect to the direction along one main surface 11 a of insulating layer 11. That is, two convex portions 14 are formed on the outermost portion of the insulating layer 11 in plan view and the slightly inner portion.
  • two convex portions 14 are formed as an example, but the present invention is not limited thereto, and three or more convex portions 14 may be provided.
  • 9 are formed so as to surround the upper metal plate 12 and the lower metal plate 13 in a rectangular shape from the outside, for example, and the insulating layer 11 intersects one main surface 11a. This is an area extending in the Z direction.
  • the interface between the upper metal plate 12 and the base plate 3 between the insulating layer 11 and the sealing resin 5 is increased.
  • the creepage distance along can be further increased.
  • the dielectric breakdown voltage can be further improved as compared with the first embodiment.
  • the increase in the convex portions 14 can further complicate the concave / convex shape of the interface between the insulating layer 11 and the sealing resin 5.
  • the anchor effect between the surface of the complicated uneven shape and the sealing resin 5 covering the surface is further enhanced, and the adhesive strength and peeling resistance between the convex portion 14 and the sealing resin 5 are improved.
  • the width W ⁇ b> 1 along the X direction of the region between the pair of adjacent convex portions 14 among the plurality of convex portions 14 is larger than the width W ⁇ b> 2 along the X direction of each convex portion 14. Larger is preferred. In this way, the embedding property of the sealing resin 5 in the region on the surface side of the insulating layer 11 in the region between the pair of adjacent convex portions 14 among the plurality of convex portions 14, and the surface associated therewith The insulating property of the side region can be improved.
  • FIG. 10 is a schematic cross-sectional view of the same region as the portion along the line II-II in FIG. 1 of the semiconductor module of the present embodiment.
  • FIG. 11 is a schematic enlarged cross-sectional view of the region XI surrounded by the dotted line in FIG. 10 of the semiconductor module of the present embodiment.
  • the semiconductor module 401 as the power module semiconductor device of the present embodiment basically has the same configuration as the semiconductor module 101 of the first embodiment. Are given the same reference numerals and the description thereof will not be repeated. However, the semiconductor module 401 is different from the first embodiment in the aspect of the convex portion 14.
  • the protrusion 14 at the end of the insulating layer 11 is a region where the insulating layer 11 of the insulating substrate 1 extends particularly along the XY plane. On the other hand, it is also arranged on the other main surface 11b side, that is, on the lower side in the Z direction.
  • the convex portion 14 extends below the insulating layer 11 in the Z direction. 10 and 11, similarly to the other embodiments, a convex portion 14 extending upward in the Z direction of one main surface 11 a of the insulating layer 11 is also formed, and extends upward in the Z direction of the insulating layer 11. Both the convex portion 14 and the convex portion 14 extending downward in the Z direction are formed.
  • the present embodiment is not limited to such an embodiment, and the present embodiment has a configuration in which the convex portion 14 extending upward in the Z direction of the insulating layer 11 is not provided and only the convex portion 14 extending downward in the Z direction of the insulating layer 11 is provided. May be.
  • the convex portion 14 is formed not only on the one main surface 11a side of the insulating substrate 1 but also on the other main surface 11b side of the insulating substrate 1, and accordingly, compared with the first embodiment.
  • the dielectric breakdown path 31 shown in FIG. For this reason, the dielectric breakdown voltage can be further improved as compared with the first embodiment.
  • sealing resin 5 is composed of normal sealing resin 5A similar to sealing resin 5 of the other embodiments and normal sealing resin 5A. And a high dielectric breakdown resistant sealing resin 5B made of a resin filler having high dielectric breakdown resistance. As shown in FIG.
  • At least a high dielectric breakdown resistant sealing resin is provided in a region below the other main surface 11b of the insulating layer 11 in the Z direction, that is, a region sandwiched between the insulating layer 11 and the base plate 3 in the housing. It is preferable that 5B is filled, and a normal sealing resin 5A is filled in a region on the upper side in the Z direction. However, since at least the region on the lower side in the Z direction of the insulating layer 11 only needs to have the high dielectric breakdown resistant sealing resin 5B, the entire interior of the housing may have only the high dielectric breakdown resistant sealing resin 5B. .
  • the dielectric breakdown path 31 changes its direction after reaching the other main surface 11b of the insulating layer 11, and proceeds toward the X direction negative side along the other main surface 11b.
  • the dielectric breakdown path 31 reaches a point where the lower metal plate 13, the insulating layer 11, and the sealing resin 5 meet.
  • the dielectric breakdown path 31 is different from FIG. 5 in which the sealing resin 5 just below the end surface 11c is straightly moved down to the base plate 3 in the Z direction.
  • the convex portion 14 is integrally formed on the other main surface 11b side of the insulating layer 11. Accordingly, the creepage distance along the interface between the insulating layer 11 and the sealing resin 5 can be increased and the dielectric breakdown path 31 can be increased as compared with the case where the convex portion 14 is not formed as shown in FIG. The dielectric breakdown voltage under the operating environment can be improved.
  • FIG. 13 is a schematic cross-sectional view of the same region as the portion along the line II-II in FIG. 1 of the semiconductor module of the first example of the present embodiment.
  • FIG. 14 is a schematic cross-sectional view of the same region as the portion along the line II-II in FIG. 1 of the semiconductor module of the second example of the present embodiment.
  • the first example semiconductor module 501 and the second example semiconductor module 502 of the present embodiment are basically the same as the semiconductor module 101 of the first embodiment. Since it has a structure, the same code
  • the convex portion 14 is formed so as to have a portion extending from one main surface 11a to the upper side in the Z direction and then bent and extending to the positive side or the negative side in the X direction, as in the semiconductor module 101.
  • the convex portion 14 of the semiconductor module 501 has an L-shaped cross-sectional shape having a portion extending in the Z direction and a portion extending in the X direction.
  • the semiconductor module 501 is different from the first embodiment having the convex portion 14 having only a portion extending in the Z direction.
  • the convex portion 14 is formed on one main surface 11a side so as to have a shape extending at an angle inclined with respect to the Z direction.
  • the angle is preferably an angle inclined by 30 ° or more and 60 ° or less (for example, 45 °) with respect to the Z direction.
  • the angle is not limited to the above numerical range and is arbitrary.
  • the semiconductor module 502 is different from the first embodiment in which the convex portion 14 extends along the Z direction.
  • the dielectric breakdown voltage is improved by increasing the creepage distance by the convex portion 14, and the adhesive strength between the sealing resin 5 and the insulating layer 11 is improved by the anchor effect.
  • effects such as suppression of bubble generation can be obtained.
  • Embodiment 6 the semiconductor device according to the first to fifth embodiments described above is applied to a power conversion device.
  • the present invention is not limited to a specific power converter, hereinafter, a case where the present invention is applied to a three-phase inverter will be described as a sixth embodiment.
  • FIG. 15 is a block diagram showing a configuration of a power conversion system to which the power conversion device according to the present embodiment is applied.
  • the power conversion system shown in FIG. 15 includes a power supply 1000, a power conversion device 2000, and a load 3000.
  • the power supply 1000 is a DC power supply and supplies DC power to the power converter 2000.
  • the power supply 1000 can be composed of various types.
  • the power source 1000 can be composed of a direct current system, a solar battery, or a storage battery, and can be composed of a rectifier circuit or an AC / DC converter connected to the alternating current system. Also good.
  • the power supply 1000 may be configured by a DC / DC converter that converts DC power output from the DC system into predetermined power.
  • the power conversion device 2000 is a three-phase inverter connected between the power supply 1000 and the load 3000, converts DC power supplied from the power supply 1000 into AC power, and supplies AC power to the load 3000. As shown in FIG. 15, the power conversion device 2000 converts the input DC power into AC power and outputs the converted power, and outputs a control signal for controlling the main conversion circuit 2010 to the main conversion circuit 2010. And a control circuit 2030.
  • the load 3000 is a three-phase motor driven by AC power supplied from the power converter 2000.
  • the load 3000 is not limited to a specific application, and is an electric motor mounted on various electric devices.
  • the load 3000 is used as an electric motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioner.
  • the main conversion circuit 2010 includes a switching element and a free wheel diode (not shown). When the switching element switches, the main conversion circuit 2010 converts DC power supplied from the power supply 1000 into AC power and supplies the AC power to the load 3000.
  • the main conversion circuit 2010 according to the present embodiment is a two-level three-phase full-bridge circuit, and includes six switching elements and respective switching elements. It can be composed of six anti-parallel diodes.
  • At least one of the switching elements and the free-wheeling diodes of the main conversion circuit 2010 corresponds to the power module of any of the first to fifth embodiments, that is, the semiconductor modules 101, 201, 301, 401, 501, 502, and 901 described above.
  • the semiconductor module 2020 is configured.
  • the six switching elements are connected in series for each of the two switching elements to constitute upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full bridge circuit.
  • the output terminals of the upper and lower arms, that is, the three output terminals of the main conversion circuit 2010 are connected to the load 3000.
  • the main conversion circuit 2010 includes a drive circuit (not shown) that drives at least one of the switching elements and the freewheeling diodes (hereinafter referred to as “(respective) switching elements”).
  • the drive circuit may be built in the semiconductor module 2020, or may be configured to include a drive circuit separately from the semiconductor module 2020.
  • the drive circuit generates a drive signal for driving the switching element of the main conversion circuit 2010 and supplies the drive signal to the control electrode of the switching element of the main conversion circuit 2010. Specifically, in accordance with a control signal from a control circuit 2030 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrode of each switching element.
  • the drive signal When the switching element is maintained in the ON state, the drive signal is a voltage signal (ON signal) that is equal to or higher than the threshold voltage of the switching element.
  • the drive signal When the switching element is maintained in the OFF state, the drive signal is a voltage signal that is equal to or lower than the threshold voltage of the switching element. (Off signal).
  • the control circuit 2030 controls the switching element of the main conversion circuit 2010 so that desired power is supplied to the load 3000. Specifically, based on the power to be supplied to the load 3000, a time (on time) in which each switching element of the main conversion circuit 2010 is to be turned on is calculated. For example, the main conversion circuit 2010 can be controlled by PWM control that modulates the ON time of the switching element according to the voltage to be output. Then, a control command (control signal) is supplied to the drive circuit included in the main conversion circuit 2010 so that an ON signal is output to the switching element that should be turned on at each time point and an OFF signal is output to the switching element that should be turned off. Is output. In accordance with this control signal, the drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element.
  • the power module according to the first to fifth embodiments is applied as the switching element and the free wheel diode of the main converter circuit 2010, so that the convex portion extends the creeping distance as described above. It is possible to realize the suppression of the dielectric breakdown due to.
  • the present invention is not limited to this, and can be applied to various power conversion devices.
  • a two-level power converter is used.
  • a three-level or multi-level power converter may be used.
  • the present invention is applied to a single-phase inverter. You may apply.
  • the present invention can be applied to a DC / DC converter or an AC / DC converter.
  • the power conversion device to which the present invention is applied is not limited to the case where the load described above is an electric motor.
  • the power source of an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system It can also be used as a device, and can also be used as a power conditioner for a photovoltaic power generation system, a power storage system, or the like.
  • Embodiment 4 a convex portion 14 having a shape extending at an angle inclined with respect to the Z direction is formed on the other main surface 11b side, that is, the lower side. May be.
  • Insulating substrate 2 semiconductor element, 3 base plate, 4 case member, 5 sealing resin, 5A normal sealing resin, 5B high dielectric breakdown resistant sealing resin, 6A, 6B solder, 7 bonding wire, 8 terminals, 9 Lid, 11 insulating layer, 11a one main surface, 11b other main surface, 11c end surface, 12 upper metal plate, 13 lower metal plate, 14 convex portion, 31 dielectric breakdown path 101, 201, 301, 401, 501 , 502, 901, 2020, semiconductor module, 1000 power supply, 2000 power conversion device, 2010 main conversion circuit, 2030 control circuit, 3000 load.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Inverter Devices (AREA)

Abstract

L'invention concerne : un module semi-conducteur dans lequel des bulles d'air peuvent être empêchées d'être piégées entre un substrat et des saillies, et une rupture diélectrique entre un substrat isolant et une feuille de base peut être inhibée; et un dispositif de conversion de puissance qui comprend le module semi-conducteur. Un module semi-conducteur (101) comprend un substrat isolant (1), un élément semi-conducteur (2), une feuille de base (3), un élément de boîtier (4), et une résine d'étanchéité (5). L'élément semi-conducteur (2) est monté sur un côté du substrat isolant (1), au niveau duquel une surface principale (11a) est présente, et la feuille de base (3) est jointe à un côté du substrat isolant (1), au niveau duquel une autre surface principale (11b) est présente. L'élément de boîtier (4) est relié à la feuille de base (3) de façon à entourer le substrat isolant (1) et l'élément semi-conducteur (2) dans une vue en plan. La résine d'étanchéité (5) étanchéifie le substrat isolant (1) disposé dans une région entourée par la feuille de base (3) et l'élément de boîtier (4). Des saillies (14) sont formées aux extrémités, dans une vue en plan, du substrat isolant (1) de manière à être intégrées au substrat isolant (1) et de façon à s'étendre dans une direction qui coupe la surface principale (11a).
PCT/JP2018/004050 2017-05-18 2018-02-06 Module semi-conducteur et dispositif de conversion de puissance Ceased WO2018211751A1 (fr)

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JP2017099161 2017-05-18

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JP6680414B1 (ja) * 2019-06-19 2020-04-15 三菱電機株式会社 半導体装置及び電力変換装置
CN111293087A (zh) * 2018-12-07 2020-06-16 三菱电机株式会社 半导体装置以及电力变换装置
JPWO2021070358A1 (fr) * 2019-10-11 2021-04-15
JP2021170616A (ja) * 2020-04-17 2021-10-28 三菱電機株式会社 半導体装置および半導体装置の製造方法
WO2024116873A1 (fr) * 2022-11-29 2024-06-06 ローム株式会社 Module à semi-conducteur

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CN111293087A (zh) * 2018-12-07 2020-06-16 三菱电机株式会社 半导体装置以及电力变换装置
CN111293087B (zh) * 2018-12-07 2023-10-13 三菱电机株式会社 半导体装置以及电力变换装置
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WO2024116873A1 (fr) * 2022-11-29 2024-06-06 ローム株式会社 Module à semi-conducteur

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