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WO2018201648A1 - Pcb、封装结构、终端及pcb的加工方法 - Google Patents

Pcb、封装结构、终端及pcb的加工方法 Download PDF

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Publication number
WO2018201648A1
WO2018201648A1 PCT/CN2017/100059 CN2017100059W WO2018201648A1 WO 2018201648 A1 WO2018201648 A1 WO 2018201648A1 CN 2017100059 W CN2017100059 W CN 2017100059W WO 2018201648 A1 WO2018201648 A1 WO 2018201648A1
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WO
WIPO (PCT)
Prior art keywords
groove
pcb
pad
region
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/100059
Other languages
English (en)
French (fr)
Inventor
洪伟强
周定国
张斌权
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN201780008030.9A priority Critical patent/CN108702842B/zh
Priority to KR1020197035402A priority patent/KR20200003113A/ko
Priority to EP17908173.2A priority patent/EP3612008A4/en
Priority to US16/610,418 priority patent/US20200060025A1/en
Priority to JP2019560383A priority patent/JP6999696B2/ja
Publication of WO2018201648A1 publication Critical patent/WO2018201648A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H10W72/20—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to the field of device packaging, and in particular, to a PCB, a package structure, a terminal, and a processing method of the PCB.
  • the thickness of the printed circuit board (PCB) in the terminal is getting thinner and thinner.
  • the PCB is internally printed with one or more layers of wires for electrical signal transmission between the devices electrically connected to the PCB, and the devices disposed on the PCB are electrically connected to the PCB by soldering or the like.
  • the embodiment of the present application provides a processing method for a PCB, a package structure, a terminal, and a PCB, which solves the problem that the solder joint is loose or even broken due to a thin PCB drop.
  • a first aspect of the embodiments of the present application provides a PCB including a device soldering region disposed on a PCB, the device soldering region including two regions of a first region and a second region, wherein the first region is a soldering region , that is, a region provided with a first pad for soldering connection with the device such that the device is in communication with a line in the PCB, and the second region is a blank region in which a first recess is disposed.
  • the second region is connected to the device by glue, and since the first groove is disposed in the second region, glue is also filled into the first groove.
  • the first groove is added in the second region, so that the surface of the second region is not a planar structure, but a three-dimensional structure, on the one hand, the contact area between the second region and the glue is increased, and the PCB and the device are enhanced.
  • the first groove is designed to enhance the shear strength of the glue and the PCB.
  • the second region is covered with an ink layer, and the second region is further provided with a second pad disposed between the second pad and the ink layer, and the second pad and the PCB
  • the upper circuit or device is insulated, that is, the second pad is actually an empty pad.
  • the ink layer covers the other conductors except the pad, which can avoid soldering short circuit during use, and can also protect the being Covered conductors enhance the life of the PCB.
  • the reason why the second pad is disposed in the second region in the present application is similar in processing to the processing of the first pad, so there is no need to add an additional process. The process only needs to be made together when the first pad is made, thereby reducing the complexity of the process and improving the production efficiency of the package structure.
  • the first groove is an annular groove and the second pad is located inside the inner ring of the first groove. That is, the first recess is actually placed on the second pad, and processing the second pad plus the first recess is also relatively simple in process, similar to the process of adding a pad, except that It is necessary to add a first groove on the outer periphery of the second pad.
  • the annular groove can make the bonding force between the PCB and the device before dispensing, and the combination between the two is stronger.
  • the second region is further provided with a second groove, which is the same or different from the width of the first groove, and the second groove and the first groove
  • the depth is the same or different. That is, the second groove is different in design from the first groove, and may be different from the groove depth and the groove width of the groove. Of course, the difference may also be reflected in the shape and arrangement.
  • the design is such that the first groove and the second groove can cooperate with each other to enhance the bonding force between the PCB and the device.
  • the first groove and the second groove communicate with each other.
  • This design is on the one hand in order to enable the first groove and the second groove to be integrated, and the glue is made in the groove during dispensing. Easy to fill.
  • the first groove and the second groove having different structures can further increase the contact area of the glue with the second region, thereby enhancing the bonding force between the PCB and the device.
  • the depth of the first groove and/or the second groove is no greater than the thickness of the ink layer. This design is for the protection of the PCB board. Since the groove depth is not greater than the thickness of the ink layer, there is no need to process on the PCB board, no additional processing of the board is required, and only the ink layer of the PCB is required. Or it can be processed on the ink layer after the ink layer is applied.
  • the second aspect of the embodiment of the present application further provides a package structure, comprising the PCB according to the first aspect or any one of the first aspect; the chip is further mounted with a chip, and the chip is The first regions of the package structure are connected, the chip is bonded to the second region of the package structure by glue, and the first groove is filled with glue.
  • the second groove will also be filled with glue.
  • the bonding force between the chip and the PCB is greatly enhanced, and the design of the grooves can enhance the glue and the PCB. Shear strength.
  • the third aspect of the present application further provides a terminal, which is provided with the package structure according to the second aspect, or the PCB according to the first aspect or any one of the first aspects.
  • a fourth aspect of the embodiments of the present application further provides a method for processing a PCB, the method comprising:
  • the weld zone includes the first zone and the second zone, the second zone being a blank zone;
  • a first groove is machined in the blank area.
  • the surface of the second region is not a planar structure, but a three-dimensional structure, on the one hand, the contact area between the second region and the glue is increased, and the PCB and the device are enhanced.
  • the problem of cracking or loose solder joints and even breakage, and the design of the first groove enhances the shear strength of the glue and the PCB.
  • the method may further include: before applying the ink layer to the blank area of the PCB:
  • a second pad is processed in the blank region, the second pad being between the first recess and the ink layer, the second pad being insulated from circuitry or devices on the PCB. That is, the empty pad is added in the second region, and the reason why the second pad is disposed in the second region is similar to that in processing the first pad, so there is no need to add an additional process flow, and only the first pad needs to be fabricated. At the same time, it can be produced together, thereby reducing the complexity of the process and improving the production efficiency of the package structure.
  • the first groove is an annular groove and the second pad is located inside the inner ring of the first groove. That is, the first recess is actually placed on the second pad, and processing the second pad plus the first recess is also relatively simple in process, similar to the process of adding a pad, except that It is necessary to add a first groove on the outer periphery of the second pad.
  • the annular groove can make the bonding force between the PCB and the device before dispensing, and the combination between the two is stronger.
  • the method can further include:
  • the second groove is processed in the blank area, the second groove being the same or different from the width of the first groove, and the second groove is the same as or different from the depth of the first groove. That is, the second groove is different in design from the first groove, and may be different from the groove depth and the groove width of the groove. Of course, the difference may also be reflected in the shape and arrangement.
  • the design is such that the first groove and the second groove can cooperate with each other to enhance the bonding force between the PCB and the device.
  • the first groove and the second groove communicate with each other.
  • This design is on the one hand in order to enable the first groove and the second groove to be integrated, and the glue is made in the groove during dispensing. Easy to fill.
  • the first groove and the second groove having different structures can further increase the contact area of the glue with the second region, thereby enhancing the bonding force between the PCB and the device.
  • the depth of the first groove and/or the second groove is no greater than the thickness of the ink layer. This design is for the protection of the PCB board. Since the groove depth is not greater than the thickness of the ink layer, there is no need to process on the PCB board, no additional processing is required, only when the ink layer of the PCB is coated or After the ink layer is applied, it can be processed on the ink layer.
  • FIG. 1 is a schematic diagram of a package structure of an eMMC chip corresponding to a BGA package on a PCB;
  • 2A is a schematic view showing the connection of a pad and a device pin after mounting
  • Figure 2B is a cross-sectional view taken along line A-A of Figure 2A;
  • 3A is a diagram of an embodiment of a PCB according to an embodiment of the present application.
  • Figure 3B is an enlarged schematic view of a portion A in Figure 3A;
  • 4A is a diagram of an embodiment of a PCB of an embodiment of the present application.
  • Figure 4B is a cross-sectional view taken along line B-B of Figure 4A;
  • FIG. 5A is a diagram of an embodiment of a PCB according to an embodiment of the present application.
  • FIG. 5B is a diagram of an embodiment of a PCB according to an embodiment of the present application.
  • FIG. 5C is a diagram of an embodiment of a PCB according to an embodiment of the present application.
  • FIG. 6 is a view showing an embodiment of a method of processing a PCB according to an embodiment of the present application.
  • the embodiment of the present application provides a processing method of a PCB, a package structure, a terminal, and a PCB to solve the problem that the drop caused by the thin PCB of the terminal is easy to cause the solder joint to loose or even break.
  • the thickness of the PCB in the terminal is getting thinner and thinner, for example, the thickness of the PCB of the mobile phone, the palmtop computer, etc. has been changed from 1.0 mm to 0.6 mm or even 0.5 mm, because the current devices on the PCB mostly use surface mount technology ( Surface mounted technology (SMT) for placement, and the risk of breakage between solder joints between the mounted device and the PCB is greatly increased due to the reduced thickness, for example, due to the mechanical drop stress of the mobile phone. The risk of breakage of the solder joint.
  • SMT Surface mounted technology
  • SMT is a commonly used technology in the electronics assembly industry. It is a kind of leadless or short lead surface mount component (referred to as SMC/SMD, Chinese called chip component) mounted on the surface of PCB or other substrate, and soldered by reflow soldering or dip soldering. Circuit mounting technology.
  • SMT includes surface mount, surface mount equipment, surface mount components, and SMT management.
  • the basic process of SMT includes: printing (red glue / solder paste), first inspection, placement, second inspection, welding, and third inspection.
  • the first detection may be, for example, automatic optical inspection (AOI) or visual inspection for detecting red or solder paste after printing; the second detection is for post-installation.
  • AOI automatic optical inspection
  • visual inspection for detecting red or solder paste after printing
  • the second detection is for post-installation.
  • the connection between the device and the PCB is tested; the principle of mounting is to attach a small device to a large device; the soldering is performed by hot air reflow soldering, etc.; the third inspection is mainly for the appearance and functional testing. If a defect is found after the third inspection, repair can be performed, and a soldering station and a hot air desoldering station can be used. If the third inspection has no defects, the cutting can be performed by a manual or a splitter.
  • SMT-mountable devices are available in a variety of package types, such as ball grid array (BGA) and flip-chip packages.
  • the BGA package method is to form an array solder ball at the bottom of the package substrate as an input/output (I/O) end of the circuit and the PCB, and then seal with a molding resin or a potting method to realize Placement of the device. Since the BGA is connected to the PCB by using the solder balls at the bottom of the chip, the I/O number of the device is greatly improved, the signal transmission path is shortened, and the heat dissipation performance is good, and since the lead wires are short, the self-inductance of the wires and the wires are interposed. The mutual inductance is very low, and the frequency characteristics are good. When reflowing, the wetting force between the molten solder balls and the solder paste will produce a good self-centering effect, that is, the effect of automatic positioning, thereby Allows a certain deviation when placing.
  • FIG. 1 is a schematic diagram of a package structure of an eMMC chip in a BGA package
  • FIG. 1 is a schematic diagram of a package structure of an eMMC chip in a BGA package
  • FIG. 2A is a schematic diagram of a connection between a pad and a device pin after mounting
  • FIG. 2B is a view of FIG. 2A .
  • Sectional view The PCB includes a pad a1 corresponding to the array solder ball at the bottom of the eMMC chip, each solder ball corresponding to the lead b1 of one eMMC chip, the area where the pad is disposed is the main soldering area a, and the remaining positions are blank. region. After the soldering area a is soldered to the array solder ball portion of the eMMC chip, glue is filled between the eMMC chip and the PCB for reinforcement.
  • the glue is in planar contact with the PCB in the blank area after dispensing, so that the bonding force between the glue and the PCB is insufficient, which makes the collision easy.
  • a pin b1 is connected to the pad a1 by a solder ball.
  • the bottom plate PCB plate a3, the pad a1 above the plate and the ink layer a2, and the ink layer is the glue layer c.
  • the glue layer c is separated from the ink layer a2 of the PCB, there is a risk of solder joint breakage between the lead b1 and the pad a1.
  • the ink layer a2 refers to an ink layer coated on the copper foil on the PCB, and the ink layer can cover the conductor other than the pad a1, can avoid solder short circuit during use, and can extend the PCB For the service life, the ink layer is also referred to as a solder resist layer or a solder resist layer.
  • FIG. 3A is a diagram of an embodiment of a PCB according to an embodiment of the present application
  • FIG. 3B is an enlarged schematic view of a portion of FIG.
  • the PCB 1 includes a device pad 2 disposed on the PCB 1.
  • the device pad 2 includes a first region 21 and a second region 22, wherein the first region 21 is The area of the first pad 211 is provided, specifically the area inside the dotted line in FIG.
  • the first pad 211 is used for soldering connection with the device, so that the device is in communication with the line in the PCB1, and the second area 22 is a blank area, specifically In the region of the device soldering region of FIG. 3A except the dotted line region, a first recess 221 is disposed in the region, and the second region 22 is connected to the device by glue, since the first recess 221 is disposed at In the second region 22, glue is also filled into the first recess 221.
  • first groove 221 may actually be a groove of various shapes.
  • first groove 221 is a circular groove as an example, and actually other grooves of various shapes may be used.
  • the present application adds the first groove 221 in the second region 22, so that the surface of the second region 22 is not a planar structure, but a three-dimensional structure, on the one hand, the contact area between the second region 22 and the glue is increased.
  • the design of the first groove 221 will produce similar pinning
  • the limiting action is such that no relative sliding occurs between the second region 22 and the device, so that no cracking or loose solder joints or even breakage occurs in the case of dropping or severe shaking, and the first concave
  • the groove 221 is designed to enhance the shear strength of the glue and the PCB 1.
  • FIG. 4A is a diagram of an embodiment of a PCB according to an embodiment of the present application
  • FIG. 4B is a cross-sectional view of the line B-B of FIG. 4A.
  • the second region 22 is covered with an ink layer 223, and a second pad 222 is further disposed in the second region 22, and the first recess 221 is disposed between the second pad 222 and the ink layer 223.
  • FIG. 4A the second region 22 is covered with an ink layer 223, and a second pad 222 is further disposed in the second region 22, and the first recess 221 is disposed between the second pad 222 and the ink layer 223.
  • the bottom is a sheet 11 of a PCB1 board having an arranged line 12 therein, the second pad 222 and the ink layer 223 are both disposed on the surface of the sheet 11, and the first recess 221 is Located between the second pad 222 and the ink layer 223, above the second pad 222 and the ink layer 223 is a glue layer 3, of course, the glue layer 3 is also filled into the first groove 221.
  • the second pads 222 are insulated from the lines 12 or devices on the PCB 1, ie, are not connected to each other, so the second pads 222 are actually empty pads, not with any PCB 1 or The metal on the device is in contact with the metal signal.
  • the first groove 221 may be an annular groove, and the second pad 222 may be located inside the inner ring of the first groove 221. That is, the first recess 221 is actually sleeved on the second pad 222, and processing the second pad 222 and the first recess 221 is relatively simple in process, and only needs to be added on the outer periphery of the second pad 222.
  • the first groove 221 is sufficient, and the annular first groove 221 can make the bonding force between the PCB 1 and the device before dispensing, and the bonding between the two is stronger. As can be seen from FIG.
  • the outer diameter of the second pad 222 is in contact with the inner diameter of the first recess 221, and the design is to process the first recess together when the second pad is processed. 221.
  • the ink layer 223 is covered on other conductors than the first pad 211 and the second pad 222, which can avoid soldering short circuit during use, and can also protect the covered conductor and enhance the service life of the PCB 1.
  • SMD solder mask definition
  • the second pad in the embodiment of the present application may employ an NSMD pad, and since the NSMD pad does not need to be soldered to the device, it is not necessary to add tin to the NSMD pad during soldering of the SMT. Of course, even if the tin is printed on the NSMD pad during the soldering process of the SMT and the subsequent dispensing process is performed between the NSMD pad and the glue, it does not affect the NSMD pad in the embodiment of the present application.
  • the process of disposing the second pad 222 in the second region 22 is similar to the process of processing the first pad, so there is no need to add an additional process flow, and only when the first pad 211 is formed, it can be fabricated together, thereby reducing the process.
  • the complexity increases the productivity of the package structure.
  • the second region 22 is further provided with a second groove 224, which is the same or different from the width of the first groove 221, and the second groove 224 is the same as or different from the depth of the first groove 221 . That is, the second groove 224 is different in design from the first groove 221, and may be different from the groove depth and the groove width of the groove. Of course, the difference may also be reflected in the shape and arrangement.
  • the first groove 221 and the second groove 224 can be matched with each other to enhance the bonding force between the PCB 1 and the device.
  • FIG. 5A is a diagram of an embodiment of a PCB according to an embodiment of the present application, wherein a width of the first groove is d1, and a width of the second groove is d2.
  • the groove 224 is wider than the first groove 221 in width and deeper than the first groove 221 in depth.
  • the second groove 224 may also exceed the first groove 221 in one of the width and the depth.
  • a groove 221 and a second groove 224 may have other structures in addition to the regular structure as shown in FIG. 5A, such as inconsistent widths of the top and bottom of the groove, and the like.
  • first groove 221 and the second groove 224 may be separated from each other, and the first groove 221 and the second groove 224 communicate with each other.
  • FIG. 5B is a diagram of an embodiment of a PCB according to an embodiment of the present application
  • FIG. 5C is a diagram of an embodiment of a PCB according to an embodiment of the present application.
  • One end of the first groove is connected to the second groove 224.
  • one end of the first groove 221 is connected to one end of the second groove 224 as shown in FIG. 5C. It is understood that in addition to the two modes of communication, There are many other ways to connect, as long as it is easy to fill with glue.
  • This design is used on the one hand in order to enable the first recess 221 and the second recess 224 to be integrated, so that the glue is more easily filled in the recess during dispensing.
  • the first recess 221 and the second recess 224 having different structures can further increase the contact area of the glue with the second region, thereby enhancing the bonding force between the PCB 1 and the device.
  • the depth of the first groove 221 and/or the second groove 224 is not greater than the thickness of the ink layer 223.
  • the depth of the first groove 221 is not greater than the thickness of the ink layer 223.
  • This design is for the protection of the board of PCB1, since the depth of the first recess 221 and/or the second recess 224 is not greater than the thickness of the ink layer 223, so that no processing on the board of the PCB 1 is required, and no additional processing is required. It is only necessary to process the ink layer 223 on the sheet of the PCB 1 or on the ink layer 223 after the ink layer 223 is applied.
  • the PCB of the embodiment of the present application has been described above.
  • the package structure may include the PCB in any of the embodiments shown in FIG. 3A to FIG. 5B; the PCB 1 is also mounted.
  • There is a chip, and the pins of the chip are connected to the first region 21 of the package structure, the chip is bonded to the second region 22 of the package structure by glue, and the first groove 221 is filled with glue.
  • the second recess 224 is also filled with glue.
  • first recess 221 of the package structure, or the first recess 221 and the second recess 224 are filled with glue, the bonding force between the chip and the PCB 1 is greatly enhanced, and the design of the grooves can enhance the glue Shear strength with PCB1.
  • the package structure of the embodiment of the present application has been described above.
  • the following describes the terminal structure of the package structure in the present application.
  • the package structure of the terminal is the package structure in the above solution, or in the embodiment shown in FIG. 3A to FIG. 5B.
  • the PCB in any of the embodiments.
  • FIG. 6 is a diagram of an embodiment of a method for processing a package structure according to an embodiment of the present application. As shown in FIG. 6, the method may include:
  • the first pad is in communication with a line on the PCB, the first pad is for soldering connection with the device, the device pad includes the first area and the second area, and the second area is An empty area.
  • the first pad is a structure for soldering a pin of the chip when the PCB and the chip are packaged, and the first pad is a circuit disposed on the surface of the PCB and after the circuit is printed in the PCB. Connected structure.
  • the ink layer may be an ink layer coated on the copper foil on the PCB, the layer of ink may cover the surface of the PCB except the pad, the function of which can avoid solder short circuit during use, and can extend the PCB
  • the ink layer is also referred to as a solder resist layer or a solder resist layer.
  • the first groove is disposed in the blank area, and the first groove may be any shape as long as the blank area can be made into a three-dimensional structure.
  • the surface of the second region is not a planar structure, but a three-dimensional structure, on the one hand, the contact area between the second region and the glue is increased, and the PCB and the device are enhanced.
  • the method may further include:
  • the second pad may be located in the first recess, and the second pad is insulated from a line or device on the PCB. That is, the empty pad is added in the second region, and the reason why the second pad is disposed in the second region is similar to that in processing the first pad, so there is no need to add an additional process flow, and only the first pad needs to be fabricated. At the same time, it can be produced together, thereby reducing the complexity of the process and improving the production efficiency of the package structure.
  • the first groove may be a groove around the NSMD pad.
  • the process of processing the first groove in step 604 can be completed prior to applying the ink in step 603.
  • the process of processing the first pad is basically similar to the process of processing the second pad, on the PCB printed on the circuit, the first pad can be processed first to process the second pad, or the first processing is performed.
  • the second pad reprocesses the first pad, or the first pad and the second pad can be processed simultaneously. Therefore, there is no absolute order relationship between step 602 and step 601.
  • the first groove is disposed between the second pad and the ink layer of the second region, the first groove is an annular groove, and the second pad is located inside the inner ring of the first groove.
  • the method may further include:
  • the second groove is the same as or different from the width of the first groove, and the second groove is the same as or different from the depth of the first groove. That is, the second groove is different in design from the first groove, and may be different from the groove depth and the groove width of the groove. Of course, the difference may also be reflected in the shape and arrangement.
  • the design is such that the first groove and the second groove can cooperate with each other to enhance the bonding force between the PCB and the device.
  • the width, depth, shape and arrangement of the second groove and the first groove can be referred to the description in the embodiment shown in FIG. 5A, and details are not described herein.
  • the first groove and the second groove communicate with each other.
  • the design is on the one hand so that the first groove and the second groove can be integrated, and the glue is more easily filled in the groove when dispensing. .
  • the first groove and the second groove can further increase the contact area of the glue with the second region, thereby enhancing the bonding force between the PCB and the device.
  • the depth of the first groove and/or the second groove is not greater than the thickness of the ink layer.
  • This design is for the protection of the PCB board. Since the groove depth is not greater than the thickness of the ink layer, there is no need to process on the PCB board, no additional processing is required, only when the ink layer of the PCB is coated or After the ink layer is applied, it can be processed on the ink layer.
  • the computer program product includes one or more computer instructions.
  • the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
  • the computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.).
  • wire eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.).
  • the computer readable storage medium can be any available media that can be stored by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
  • the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (such as a solid state disk (SSD)).
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in the embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

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Abstract

一种PCB、封装结构、终端及PCB的加工方法。该PCB（1）包括设置在PCB（1）上的器件焊接区（2），器件焊接区（2）包括第一区域（21）和第二区域（22），第一区域（21）内设有第一焊盘（211），第一焊盘（211）用于与器件焊接连接，第二区域（22）为空白区域，第二区域（22）内设有第一凹槽（221），第二区域（22）用于与器件通过胶水连接。通过在第二区域（22）中添加第一凹槽（211），使得第二区域（22）的表面为立体结构，增加了第二区域（22）与胶水之间的接触面积，增强PCB（1）与器件之间的结合力，同时使得第二区域（22）与器件之间的不会发生相对滑动，从而使得在跌落或者是剧烈抖动的情况下不会发生胶裂或者焊点松动乃至断裂的问题。

Description

PCB、封装结构、终端及PCB的加工方法
本申请要求于2017年5月3日提交中国专利局、申请号为201710304896.6、发明名称为“一种增加焊点结合强度的方法、PCB表面结构以及终端”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及器件封装领域，具体涉及一种PCB、封装结构、终端及PCB的加工方法。
背景技术
随着终端的轻薄化程度越来越高，以及集成电路工艺的提高，终端内的印刷电路板(printed circuit board，简称PCB)的厚度越来越薄。
PCB内部印制有一层或多层线路，这些线路用于与PCB电连接的各器件之间电信号传输，设于PCB上的各器件通过焊接等方式与PCB电连接。
然而由于印刷电路板的厚度越来越薄，终端在机械跌落时，其上焊接的器件容易出现焊点松动甚至断裂的情况，导致器件无法工作，最终导致终端无法工作。
发明内容
本申请实施例提供了一种PCB、封装结构、终端及PCB的加工方法，解决了薄型PCB跌落易导致的焊点松动甚至断裂的问题。
本申请实施例的第一方面提供一种PCB，该PCB包括设置在PCB上的器件焊接区，该器件焊接区包括第一区域和第二区域共两个区域，其中，第一区域是焊接区，即设有第一焊盘的区域，该第一焊盘用于与器件焊接连接，使得器件与PCB内的线路连通，第二区域为空白区域，在该区域内设置有第一凹槽，该第二区域与器件之间通过胶水连接，由于该第一凹槽设置在第二区域内，因此胶水也会填充至该第一凹槽内。
可以看出，由于PCB中的点胶对于增加焊点强度起了较为重要的作用，而在一些器件的设计中，除开焊点区域，即本申请中第一区域，其他区域如本申请第二区域实际并没有任何焊盘的存在，第二区域与器件的相对面均为平面结构，而在这种平面结构上填充胶水容易出现结合力不足的问题，如第二区域与器件之间具有相对滑动的风险，从而跌落时容易产生胶裂或者是焊点失效的问题。而本申请中在第二区域中添加第一凹槽，使得第二区域的表面并非平面结构，而是立体结构，一方面增加了第二区域与胶水之间的接触面积，增强PCB与器件之间的结合力，另一方面在胶水凝固后，由于第一凹槽的设计会产生类似钉扎的限位作用，使得第二区域与器件之间的不会发生相对滑动，从而使得在跌落或者是剧烈抖动的情况下不会发生胶裂或者焊点松动乃至断裂的问题，并且第一凹槽的设计能够增强胶水与PCB的抗剪切强度。
在一些实施例中，第二区域覆盖有油墨层，第二区域内还设有第二焊盘，该第一凹槽设置在第二焊盘以及油墨层之间，且第二焊盘与PCB上的线路或者器件绝缘，即该第二焊盘实际上是空焊盘，另外，油墨层是覆盖在除焊盘以外的其他导体上，可以在使用过程中避免焊接短路，同时也能保护被覆盖的导体，增强PCB的使用寿命。本申请中采用在第二区域设置第二焊盘的原因在其加工过程与加工第一焊盘时类似，因此无需增加额外的工艺 流程，仅需要在制作第一焊盘时，一并制作即可，从而降低工艺的复杂度，提高封装结构的生产效率。
在一些实施例中，第一凹槽为环形凹槽，第二焊盘位于第一凹槽的内环的内部。即该第一凹槽实际上是套在第二焊盘上，而加工这种第二焊盘加第一凹槽同样在工艺上较为简单，与增加焊盘的工艺类似，所不同之处在于需要在第二焊盘外周添加第一凹槽，环形的凹槽能够使得PCB与器件之前在点胶后结合力更强，二者之间结合更为牢固。
在一些实施例中，第二区域内还设有第二凹槽，该第二凹槽与所述第一凹槽的宽度相同或者不同，所述第二凹槽与所述第一凹槽的深度相同或者不同。即该第二凹槽在设计上区别于第一凹槽，从凹槽深度以及凹槽的槽宽上均可以是不同的，当然，不同之处还可以体现在形状和排布上，通过这些设计方式，使得第一凹槽与第二凹槽之间能够相互配合，增强PCB与器件之间的结合力。
在一些实施例中，第一凹槽与第二凹槽相互连通，此设计一方面是为了使得第一凹槽与第二凹槽能够成为一个整体，在点胶时使得胶水在凹槽内更容易填充。另一方面，通过结构不同的第一凹槽和第二凹槽能够进一步增加胶水与第二区域的接触面积，从而增强PCB与器件之间的结合力。
在一些实施例中，所述第一凹槽和/或第二凹槽的深度不大于油墨层的厚度。此设计是出于对PCB的板材的保护，由于凹槽深度不大于油墨层的厚度，从而无需在PCB的板材上进行加工，无需额外加工板材的工艺，仅需要在PCB的板材涂油墨层时或者在涂完油墨层后在油墨层上进行加工即可。
本申请实施例第二方面还提供一种封装结构，该结构包括如第一方面或者第一方面任意一种实施例所述的PCB；该封装结构上还安装有芯片，且芯片的引脚与封装结构的第一区域相连接，芯片与封装结构的第二区域之间通过胶水粘接，并且第一凹槽内填充有胶水。当然，在具有第二凹槽的一方面的实施例中，第二凹槽内同样会填充有胶水。而由于封装结构的第一凹槽，或者第一凹槽和第二凹槽内均填充有胶水，使得芯片与PCB之间的结合力大大增强，并且这些凹槽的设计能够增强胶水与PCB的抗剪切强度。
本申请实施例第三方面还提供一种终端，该终端上设有如第二方面所述的封装结构，或者如第一方面或者第一方面任意一种实施例所述的PCB。
本申请实施例第四方面还提供一种PCB的加工方法，该方法包括：
在PCB的器件焊接区的第一区域内加工第一焊盘，所述第一焊盘与所述PCB上的线路连通，所述第一焊盘用于与器件焊接连接，其中，所述器件焊接区包括所述第一区域和第二区域，所述第二区域为空白区域；
在所述空白区域涂覆油墨层；
在所述空白区域内加工第一凹槽。
可以看出，由于在第二区域中添加第一凹槽，使得第二区域的表面并非平面结构，而是立体结构，一方面增加了第二区域与胶水之间的接触面积，增强PCB与器件之间的结合力，另一方面在胶水凝固后，由于第一凹槽的设计会产生类似钉扎的限位作用，使得第二区域与器件之间的不会发生相对滑动，从而使得在跌落或者是剧烈抖动的情况下不会发生 胶裂或者焊点松动乃至断裂的问题，并且第一凹槽的设计能够增强胶水与PCB的抗剪切强度。
在一些实施例中，在在PCB的空白区域涂覆油墨层之前，该方法还可包括：
在空白区域内加工第二焊盘，所述第二焊盘位于所述第一凹槽与所述油墨层之间，所述第二焊盘与所述PCB上的线路或器件绝缘。即在第二区域内添加空焊盘，第二区域设置第二焊盘的原因在其加工过程与加工第一焊盘时类似，因此无需增加额外的工艺流程，仅需要在制作第一焊盘时，一并制作即可，从而降低工艺的复杂度，提高封装结构的生产效率。
在一些实施例中，第一凹槽为环形凹槽，第二焊盘位于第一凹槽的内环的内部。即该第一凹槽实际上是套在第二焊盘上，而加工这种第二焊盘加第一凹槽同样在工艺上较为简单，与增加焊盘的工艺类似，所不同之处在于需要在第二焊盘外周添加第一凹槽，环形的凹槽能够使得PCB与器件之前在点胶后结合力更强，二者之间结合更为牢固。
在一些实施例中，该方法还可包括：
在空白区域内加工第二凹槽，所述第二凹槽与所述第一凹槽的宽度相同或者不同，所述第二凹槽与所述第一凹槽的深度相同或者不同。即该第二凹槽在设计上区别于第一凹槽，从凹槽深度以及凹槽的槽宽上均可以是不同的，当然，不同之处还可以体现在形状和排布上，通过这些设计方式，使得第一凹槽与第二凹槽之间能够相互配合，增强PCB与器件之间的结合力。
在一些实施例中，第一凹槽与第二凹槽相互连通，此设计一方面是为了使得第一凹槽与第二凹槽能够成为一个整体，在点胶时使得胶水在凹槽内更容易填充。另一方面，通过结构不同的第一凹槽和第二凹槽能够进一步增加胶水与第二区域的接触面积，从而增强PCB与器件之间的结合力。
在一些实施例中，所述第一凹槽和/或第二凹槽的深度不大于油墨层的厚度。此设计是出于对PCB的板材的保护，由于凹槽深度不大于油墨层的厚度，从而无需在PCB的板材上进行加工，无需额外加工工艺，仅需要在PCB的板材涂油墨层时或者在涂完油墨层后在油墨层上进行加工即可。
附图说明
图1是PCB上对应BGA封装的eMMC芯片的封装结构示意图；
图2A是贴装后焊盘与器件引脚的连接示意图；
图2B是图2A的A-A截面图；
图3A是本申请实施例的PCB的一个实施例图；
图3B是图3A中A处放大示意图；
图4A是本申请实施例的PCB的一个实施例图；
图4B是图4A中B-B截面示意图；
图5A是本申请实施例的PCB的一个实施例图；
图5B是本申请实施例的PCB的一个实施例图；
图5C是本申请实施例的PCB的一个实施例图；
图6是本申请实施例的PCB的加工方法的一个实施例图。
具体实施方式
本申请实施例提供了一种PCB、封装结构、终端及PCB的加工方法来解决了终端的薄型PCB带来的跌落易导致焊点松动甚至断裂的问题。
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实施例中的附图，对本申请实施例进行描述。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”或“具有”及其任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
随着终端内的PCB的厚度越来越薄，例如，手机、掌上电脑等终端的PCB厚度已从1.0mm演变至0.6mm甚至0.5mm，由于目前的PCB上的器件多采用表面贴装技术(surface mounted technology，简称SMT)进行贴装，而由于厚度降低会使得贴装的器件与PCB之间的焊接点之间出现断裂的风险大大增加，例如，手机使用过程的机械跌落应力所带来的焊点的断裂风险。
SMT是电子组装行业里一种常用的技术。它是一种将无引脚或短引线表面组装元器件(简称SMC/SMD，中文称片状元器件)安装在PCB的表面或其它基板的表面上，通过回流焊或浸焊等方法加以焊接组装的电路装连技术。总的来说，SMT包括表面贴装、表面贴装设备、表面贴装元器件、SMT管理。SMT基本工艺流程包括：印刷(红胶/锡膏)、第一次检测、贴装、第二次检测、焊接、第三次检测。其中，第一次检测例如可以为自动光学检测(automatic optic inspection，简称AOI)或者目视检测，用于对印刷后的红胶或者锡膏进行检测；第二次检测用于对贴装后的器件与PCB之间的连接进行检测；贴装的原则是先贴小器件后贴大器件；焊接例如采用热风回流焊进行焊接等；第三次检测主要对外观及功能性测试检测。如果第三次检测后发现有缺陷，则进行维修，可使用焊台及热风拆焊台等，如果第三次检测无缺陷，则可采用手工或者分板机进行切板。
可采用SMT贴装的器件的封装类型有多种，例如焊球阵列封装(ball grid array，简称BGA)和倒焊芯片(flip-chip)封装等封装方式。其中，BGA封装方式是在封装体基板的底部制作阵列焊球作为电路的输入/输出(input/output，简称I/O)端与PCB互接，然后用模压树脂或者灌封方法进行密封，实现器件的贴装。由于BGA是利用芯片底部的焊锡球与PCB连接，这样极大提高了器件的I/O数，缩短了信号传输路径，并且具有良好的散热性能，并且由于引线短，导线的自感和导线间的互感很低，频率特性好，在回流焊时，熔融的焊球与焊膏之间的润湿力作用会产生良好的自对中效果，即自动定位的效果，从而 使得贴装时允许一定的偏差。
在BGA封装方式中，有一些器件由于输入输出的引脚较少，会出现器件底部的引脚区域仅占到整个器件底部的一部分。例如，嵌入式多媒体卡(embedded multimedia card，eMMC)外形较大，但是引脚较少，当对eMMC和PCB进行封装时，eMMC芯片的底部上会有大量空白部分，相应的在PCB上的器件焊接区与该芯片的大小对应。如图1、图2A和图2B所示，图1是PCB采用BGA封装对eMMC芯片进行封装结构示意图，图2A是贴装后焊盘与器件引脚的连接示意图，图2B是图2A的A-A截面图。其中PCB上包括与eMMC芯片底部的阵列焊球对应的焊盘a1，每个焊球对应一个eMMC芯片的引脚b1，设置有焊盘的区域为主要的焊接区域a，而其余位置则是空白区域。在焊接区域a与eMMC芯片的阵列焊球部分焊接后，会在eMMC芯片与PCB之间填充胶水进行加固。
然而，由于eMMC芯片与PCB相接触的空白区域过大，导致在点胶后，胶水在空白区域与PCB呈平面接触，使得胶水与PCB之间的结合力不足，从而导致在碰撞发生时，容易产生胶裂的情况；且由于焊点数量以及焊点区域的面积相对于eMMC器件的底部面积来说是较少的，会导致每个焊点的受力比较大，在出现碰撞时产生的外力容易导致焊点断裂。
如图2A中，焊盘a1上通过焊球连接有引脚b1。如图2B中，包括底部的PCB板材a3，板材之上的焊盘a1以及油墨层a2，油墨层之上则是胶水层c。从图2B可以看出，若胶水层c与PCB的油墨层a2发生分离，会进一步带来引脚b1和焊盘a1之间出现焊点断裂的风险。其中，油墨层a2指的是PCB上涂覆在铜箔上的油墨层，这层油墨层可以覆盖在除了焊盘a1以外的导体上，可以在使用过程中避免焊接短路，同时能够延长PCB的使用寿命，该油墨层也被称之为阻焊层或者防焊层。
可以看出，由于BGA等类型的封装在焊点阵列比BGA封装的外形小很多的时候，容易出现胶水与PCB之间结合力不足，对焊点的保护能力弱，抗碰撞跌落能力差，易出现碰撞或跌落时焊点松动断裂的情况。
有鉴于此，本申请实施例提供一种PCB，通过在BGA封装中PCB上的焊盘阵列之外的空白区域设置第一凹槽221的方式，增加胶水与PCB之间的结合力。请参阅图3A和图3B，图3A是本申请实施例的PCB的一个实施例图，图3B是图3A中A处放大示意图。其中，从图3A中可以看出，该PCB1包括设置在PCB1上的器件焊接区2，该器件焊接区2包括第一区域21和第二区域22共两个区域，其中，第一区域21是设有第一焊盘211的区域，具体为图3A中虚线内区域，该第一焊盘211用于与器件焊接连接，使得器件与PCB1内的线路连通，第二区域22为空白区域，具体为图3A中器件焊接区内除虚线区域之外的区域，在该区域内设置有第一凹槽221，该第二区域22与器件之间通过胶水连接，由于该第一凹槽221设置在第二区域22内，因此胶水也会填充至该第一凹槽221内。
需要说明的是，第一凹槽221实际可以是各种形状的凹槽，图3B中仅以第一凹槽221为圆形槽作为示例，实际上还可以是其他各种形状的槽。
可以看出，本申请在第二区域22中添加第一凹槽221，使得第二区域22的表面并非平面结构，而是立体结构，一方面增加了第二区域22与胶水之间的接触面积，增强PCB1与器件之间的结合力，另一方面在胶水凝固后，由于第一凹槽221的设计会产生类似钉扎 的限位作用，使得第二区域22与器件之间的不会发生相对滑动，从而使得在跌落或者是剧烈抖动的情况下不会发生胶裂或者焊点松动乃至断裂的问题，并且第一凹槽221的设计能够增强胶水与PCB1的抗剪切强度。
其中，对于第一凹槽221，其在PCB1上的位置以及结构可以根据第二区域的形状以及大小进行设置，下面分别进行说明。
可选的，请参阅图4A，图4A是本申请实施例的PCB的一个实施例图，图4B是图4A中B-B截面示意图。在图4A中，第二区域22覆盖有油墨层223，该第二区域22内还设有第二焊盘222，该第一凹槽221设置在第二焊盘222以及油墨层223之间。在图4B中，底部为PCB1板的板材11，该板材11内具有已布置的线路12，第二焊盘222和油墨层223均设置在该板材11的表面上，而第一凹槽221则位于第二焊盘222与油墨层223之间，位于第二焊盘222与油墨层223之上则为胶水层3，当然该胶水层3还会填充到第一凹槽221内。从图4B可以看出第二焊盘222与PCB1上的线路12或者器件是绝缘的，即相互之间并不连接，因此该第二焊盘222实际上是空焊盘，不与任何PCB1或者器件上的传输电信号的金属相接触。在此情形下，第一凹槽221可以是环形凹槽，第二焊盘222则可以位于第一凹槽221的内环的内部。即该第一凹槽221实际上是套在第二焊盘222上，而加工这种第二焊盘222加第一凹槽221在工艺上较为简单，仅需要在第二焊盘222外周添加第一凹槽221即可，环形的第一凹槽221能够使得PCB1与器件之前在点胶后结合力更强，二者之间结合更为牢固。从图4A中可以看出，该第二焊盘222的外径与第一凹槽221的内径是相接触的，此设计是在加工第二焊盘时，一并加工出该第一凹槽221。另外，油墨层223是覆盖在除第一焊盘211与第二焊盘222以外的其他导体上，可以在使用过程中避免焊接短路，同时也能保护被覆盖的导体，增强PCB1的使用寿命。
需要说明的是，在SMT工艺中，焊盘有两种，一种为非阻焊定义(none solder mask defined，简称NSMD)焊盘，另一种为阻焊定义(solder mask defined,简称SMD)焊盘，两者的区别在于SMD是绿油层覆盖铜箔而形成焊盘,而NSMD则是单独的焊盘,焊盘与油墨层之间有凹槽。
本申请实施例中的第二焊盘可以采用NSMD焊盘，并且由于该NSMD焊盘无需与器件的针脚焊接，因此在SMT的焊接过程中无需在该NSMD焊盘处加锡。当然，即便在SMT的焊接过程中在该NSMD焊盘上印锡并进行后续的点胶处理也仅限在NSMD焊盘与胶水之间，不会影响本申请实施例中的在NSMD焊盘与油墨层223之间的第一凹槽221的作用。在第二区域22设置第二焊盘222加工过程与加工第一焊盘时类似，因此无需增加额外的工艺流程，仅需要在制作第一焊盘211时，一并制作即可，从而降低工艺的复杂度，提高封装结构的生产效率。
可选的，如图5A所示，第二区域22内还设有第二凹槽224，该第二凹槽224与所述第一凹槽221的宽度相同或者不同，所述第二凹槽224与所述第一凹槽221的深度相同或者不同。即该第二凹槽224在设计上区别于第一凹槽221，从凹槽深度以及凹槽的槽宽上均可以是不同的，当然，不同之处还可以体现在形状和排布上，通过这些设计方式，使得第一凹槽221与第二凹槽224之间能够相互配合，增强PCB1与器件之间的结合力。
举例来说，请参阅图5A，图5A是本申请实施例的PCB的一个实施例图，其中，第一凹槽的宽度为d1，第二凹槽的宽度为d2，可以看出，第二凹槽224在宽度上比第一凹槽221宽，在深度上都比第一凹槽221深，当然，第二凹槽224也可以在宽度和深度中之一超过第一凹槽221，第一凹槽221和第二凹槽224除了如图5A所示的规则结构之外，还可是其他结构，例如槽的顶部和底部的宽度不一致等。
此外，该第一凹槽221与第二凹槽224除了可以相互隔离开，第一凹槽221与第二凹槽224相互连通。具体的请参阅图5B和图5C，图5B是本申请实施例的PCB一个实施例图，图5C是本申请实施例的PCB一个实施例图，其中，图5B所示为第一凹槽221的一端与第二凹槽224连通，当然，还可以如图5C所示第一凹槽221的一端与第二凹槽224的一端连接，可以理解的是，除了这两种连通方式，还有其他多种连通方式，只要是能够便于胶水填充即可。采用这种设计一方面是为了使得第一凹槽221与第二凹槽224能够成为一个整体，在点胶时使得胶水在凹槽内更容易填充。另一方面，通过结构不同的第一凹槽221和第二凹槽224能够进一步增加胶水与第二区域的接触面积，从而增强PCB1与器件之间的结合力。
可选的，所述第一凹槽221和/或第二凹槽224的深度不大于油墨层223的厚度。可参见图4B，其中第一凹槽221的深度不大于油墨层223的厚度。此设计是出于对PCB1的板材的保护，由于第一凹槽221和/或第二凹槽224深度不大于油墨层223的厚度，从而无需在PCB1的板材上进行加工，无需额外加工工艺，仅需要在PCB1的板材涂油墨层223时或者在涂完油墨层223后在油墨层223上进行加工即可。
上面对本申请实施例的PCB进行了说明，下面对本申请中封装结构进行说明，该封装结构可包括如图3A至图5B所示实施例之中任一实施例中的PCB；该PCB1上还安装有芯片，且芯片的引脚与封装结构的第一区域21相连接，芯片与封装结构的第二区域22之间通过胶水粘接，并且第一凹槽221内填充有胶水。当然，在具有第二凹槽224的情形下，第二凹槽224内同样会填充有胶水。而由于封装结构的第一凹槽221，或者第一凹槽221和第二凹槽224内均填充有胶水，使得芯片与PCB1之间的结合力大大增强，并且这些凹槽的设计能够增强胶水与PCB1的抗剪切强度。
上面对本申请实施例的封装结构进行了说明，下面对本申请中采用此封装结构的终端说明，该终端的封装结构为上述方案中的封装结构，或者如图3A至图5B所示实施例之中任一实施例中的PCB。
上面对本申请实施例的终端进行了说明，下面对本申请实施例中封装结构的加工方法进行说明。请参阅图6，图6是本申请实施例的封装结构的加工方法的一个实施例图，如6所示，该方法可包括：
601、在PCB的器件焊接区的第一区域内加工第一焊盘。
其中，第一焊盘与所述PCB上的线路连通，所述第一焊盘用于与器件焊接连接，所述器件焊接区包括所述第一区域和第二区域，所述第二区域为空白区域。
该第一焊盘为PCB与芯片进行封装时，与芯片的引脚进行焊接的结构，该第一焊盘是在PCB内的线路印制完成后，在PCB的表面设置的与PCB内的线路连通的结构。
603、在空白区域涂覆油墨层。其中，该油墨层可以是在PCB上涂覆在铜箔上的油墨层，这层油墨可以覆盖在除了焊盘以外的PCB表面，其作用是可以在使用过程中避免焊接短路，同时能够延长PCB的使用寿命，该油墨层也被称之为阻焊层或者防焊层。
604、在空白区域内加工第一凹槽。
其中，该第一凹槽设置在空白区域内，该第一凹槽可以是任意形状，只要能使得空白区域成为立体结构即可。
可以看出，由于在第二区域中设置第一凹槽，使得第二区域的表面并非平面结构，而是立体结构，一方面增加了第二区域与胶水之间的接触面积，增强PCB与器件之间的结合力，另一方面在胶水凝固后，由于第一凹槽的设计会产生类似钉扎的限位作用，使得第二区域与器件之间的不会发生相对滑动，从而使得在跌落或者是剧烈抖动的情况下不会发生胶裂或者焊点松动乃至断裂的问题，并且第一凹槽的设计能够增强胶水与PCB的抗剪切强度。
可选的，在步骤603之前，该方法还可包括：
602、在空白区域内加工第二焊盘。
其中，所述第二焊盘可以位于所述第一凹槽内，所述第二焊盘与所述PCB上的线路或器件绝缘。即在第二区域内添加空焊盘，第二区域设置第二焊盘的原因在其加工过程与加工第一焊盘时类似，因此无需增加额外的工艺流程，仅需要在制作第一焊盘时，一并制作即可，从而降低工艺的复杂度，提高封装结构的生产效率。
需要说明的是，若第二焊盘为NSMD焊盘时，第一凹槽可以是该NSMD焊盘周围的凹槽。此时，步骤604加工第一凹槽的过程可以在步骤603涂覆油墨之前完成。另外，由于加工第一焊盘与加工第二焊盘采用的工艺是基本类似的，因此在印制好线路的PCB上，可以先加工第一焊盘再加工第二焊盘，或者先加工第二焊盘再加工第一焊盘，亦或是可以第一焊盘和第二焊盘同时加工，因此，步骤602和步骤601之间并没有绝对的顺序关系。
可选的，该第一凹槽设置在第二焊盘以及第二区域的油墨层之间，第一凹槽为环形凹槽，第二焊盘位于第一凹槽的内环的内部。
需要说明的是，添加第二焊盘以及第一凹槽与第二焊盘之间的位置关系可参见图4所示实施例中的说明，此处不在赘述。
可选的，该方法还可包括：
605、在空白区域内加工第二凹槽。
其中，所述第二凹槽与所述第一凹槽的宽度相同或者不同，所述第二凹槽与所述第一凹槽的深度相同或者不同。即该第二凹槽在设计上区别于第一凹槽，从凹槽深度以及凹槽的槽宽上均可以是不同的，当然，不同之处还可以体现在形状和排布上，通过这些设计方式，使得第一凹槽与第二凹槽之间能够相互配合，增强PCB与器件之间的结合力。
需要说明的是，关于第二凹槽与第一凹槽的宽度、深度、形状以及排布可参见图5A所示实施例中的说明，此处不在赘述。
可选的，第一凹槽与第二凹槽相互连通，此设计一方面是为了使得第一凹槽与第二凹槽能够成为一个整体，在点胶时使得胶水在凹槽内更容易填充。另一方面，通过结构不同 的第一凹槽和第二凹槽能够进一步增加胶水与第二区域的接触面积，从而增强PCB与器件之间的结合力。
需要说明的是，关于第二凹槽与第一凹槽的连通方式可参见图5B所示实施例中的说明，此处不在赘述。
可选的，所述第一凹槽和/或第二凹槽的深度不大于油墨层的厚度。此设计是出于对PCB的板材的保护，由于凹槽深度不大于油墨层的厚度，从而无需在PCB的板材上进行加工，无需额外加工工艺，仅需要在PCB的板材涂油墨层时或者在涂完油墨层后在油墨层上进行加工即可。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。
所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存储的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。

Claims (10)

  1. 一种印刷电路板PCB，其特征在于，包括设置在所述PCB上的器件焊接区，所述器件焊接区包括第一区域和第二区域，所述第一区域内设有第一焊盘，所述第一焊盘用于与器件焊接连接，所述第二区域为空白区域，所述第二区域内设有第一凹槽，所述第二区域用于与所述器件通过胶水连接。
  2. 根据权利要求1所述的PCB，其特征在于，所述第二区域覆盖有油墨层，所述第二区域内还设有第二焊盘，所述第一凹槽位于所述第二焊盘和所述油墨层之间，所述第二焊盘与所述PCB上的线路或器件绝缘。
  3. 根据权利要求1或2所述的PCB，其特征在于，所述第二区域内还设有第二凹槽，所述第二凹槽与所述第一凹槽的宽度相同或者不同，所述第二凹槽与所述第一凹槽的深度相同或者不同。
  4. 根据权利要求3所述的PCB，其特征在于，所述第一凹槽和所述第二凹槽相互连通。
  5. 根据权利要求3或4所述的PCB，其特征在于，所述第一凹槽和/或第二凹槽的深度不大于油墨层的厚度。
  6. 一种封装结构，其特征在于，包括芯片以及如权利要求1至5中任一项所述的印刷电路板PCB；
    所述芯片的引脚与所述PCB的所述第一区域焊接连接，所述芯片与所述PCB的所述第二区域通过胶水粘接，所述第一凹槽内填充有所述胶水。
  7. 一种终端，其特征在于，所述终端包括如权利要求6所述封装结构，或如权利要求1-5任一项所述的印刷电路板PCB。
  8. 一种印刷电路板PCB的加工方法，其特征在于，包括：
    在PCB的器件焊接区的第一区域内加工第一焊盘，所述第一焊盘与所述PCB上的线路连通，所述第一焊盘用于与器件焊接连接，其中，所述器件焊接区包括所述第一区域和第二区域，所述第二区域为空白区域；
    在所述空白区域涂覆油墨层；
    在所述空白区域内加工第一凹槽。
  9. 根据权利要求8所述的PCB的加工方法，其特征在于，在所述空白区域涂覆油墨层之前，所述方法还包括：
    在所述空白区域内加工第二焊盘，所述第二焊盘位于所述第一凹槽与所述油墨层之间，所述第二焊盘与所述PCB上的线路或器件绝缘。
  10. 根据权利要求8或9所述的PCB的加工方法，其特征在于，所述方法还包括：
    在所述空白区域内加工第二凹槽，所述第二凹槽与所述第一凹槽的宽度相同或者不同，所述第二凹槽与所述第一凹槽的深度相同或者不同。
PCT/CN2017/100059 2017-05-03 2017-08-31 Pcb、封装结构、终端及pcb的加工方法 Ceased WO2018201648A1 (zh)

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