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WO2018192182A1 - Système et procédé de mesure de température de surface de puce et support d'informations informatique - Google Patents

Système et procédé de mesure de température de surface de puce et support d'informations informatique Download PDF

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Publication number
WO2018192182A1
WO2018192182A1 PCT/CN2017/103639 CN2017103639W WO2018192182A1 WO 2018192182 A1 WO2018192182 A1 WO 2018192182A1 CN 2017103639 W CN2017103639 W CN 2017103639W WO 2018192182 A1 WO2018192182 A1 WO 2018192182A1
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WIPO (PCT)
Prior art keywords
chip
module
tested
programmable logic
logic array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/103639
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English (en)
Chinese (zh)
Inventor
李丛丛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanechips Technology Co Ltd
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Sanechips Technology Co Ltd
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Publication date
Application filed by Sanechips Technology Co Ltd filed Critical Sanechips Technology Co Ltd
Publication of WO2018192182A1 publication Critical patent/WO2018192182A1/fr
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K1/00—Details of thermometers not specially adapted for particular types of thermometer
    • G01K1/02—Means for indicating or recording specially adapted for thermometers
    • G01K1/024—Means for indicating or recording specially adapted for thermometers for remote indication
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K1/00—Details of thermometers not specially adapted for particular types of thermometer
    • G01K1/02—Means for indicating or recording specially adapted for thermometers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer

Definitions

  • the invention relates to the field of chip physical property measurement, in particular to a chip surface temperature measuring system and method, and a computer storage medium.
  • a reliable chip surface temperature measuring system is very important for chip development, verification, manufacturing, and inspection.
  • Modern large-scale integrated circuit chips whether digital or analog, RF, are modular
  • the direction of integration is developing, and the working mode of the chip is very much. If each working mode is to be a printed circuit board, the program is burned, and then the surface temperature of the chip is measured, which is time-consuming and labor-intensive, and is not in the R&D design stage of the chip. realistic. Therefore, how to measure the surface temperature of the chip, improve the measurement efficiency, and ensure the smooth progress of the measurement work has become a problem that the technician needs to consider.
  • the embodiment of the invention provides a chip surface temperature measuring system and method, and a computer storage medium, which can measure the surface temperature of the chip and improve the measuring efficiency.
  • an embodiment of the present invention provides a chip surface temperature measuring system, including:
  • the programmable logic array module is configured to configure the working state of the chip through dynamic simulation, and receive the measured surface temperature value of the chip;
  • a chip socket module configured to place a chip to be tested, wherein the chip socket module and the programmable logic array module are connected by a connection module having a plurality of sockets;
  • a temperature sensing module configured to measure a surface temperature of the chip to be tested in each working state, and send the measured chip surface temperature value to the programmable logic array module;
  • the power supply module is respectively connected to the programmable logic array module and the chip socket module to provide power for the circuit, and the power supply module supports a pulse width modulation technology, and is configured to pass when the surface temperature of the chip to be tested is higher than a preset value.
  • the programming logic array module controls the power supply module to reduce power consumption to lower the temperature of the chip to be tested.
  • an embodiment of the present invention further provides a method for measuring a surface temperature of a chip, including:
  • Embodiments of the present invention also provide a computer storage medium storing computer executable instructions that are implemented when the computer executable instructions are executed.
  • the chip surface temperature measuring system and method and the computer storage medium provided by the embodiments of the present invention realize automatic measurement of the surface temperature of the chip to be tested in the chip design or screening stage, and obtain physical characteristics of the chip to be tested, thereby providing powerful design for the chip design. reference.
  • the chip socket module provided by the embodiment of the invention can be used to place a plurality of chips to be tested.
  • the programmable logic array module provided by the embodiment of the invention can dynamically simulate the working state of various chips, and is implemented with a bus connection module having multiple interfaces. Various working state parameters are sent to the chip to be tested, thereby obtaining temperature data of the chip to be tested under various working states.
  • the embodiment of the present invention can realize measurement of a plurality of chips to be tested, improve work efficiency, and facilitate chip designers to evaluate chip temperature characteristics.
  • the embodiment of the present invention also provides three kinds of feedback (down voltage, frequency reduction, fan speed) to adjust the working temperature of the chip, thereby ensuring smooth and reliable test work without causing excessive temperature of the chip. And the consequences of the damage.
  • FIG. 1 is a schematic structural diagram of a chip surface temperature measuring system according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of an application scenario of an audio-video SOC (system on a chip) in which a chip to be tested is a first application example of the present invention.
  • FIG. 3 is a schematic diagram of an application scenario in which a chip to be tested is a digital analog hybrid circuit according to a second application example of the present invention.
  • FIG. 4 is a schematic diagram of an application scenario in which a chip to be tested is a protocol interface circuit according to a third application example of the present invention.
  • FIG. 5 is a schematic diagram of a table in which the programmable logic array module measures the surface temperature of the chip after the completion of the programmable logic array module in the embodiment of the present invention.
  • FIG. 1 it is a schematic structural diagram of a chip surface temperature measuring system according to an embodiment of the present invention.
  • the chip surface temperature measuring system of this embodiment includes:
  • the programmable logic array module 01 is configured to configure the working state of the chip through dynamic simulation, and receive the measured surface temperature value of the chip;
  • the chip socket module 02 is configured to place a chip to be tested, and is connected to the programmable logic array module 01 through a connection module 10 having a plurality of sockets;
  • the temperature sensing module 03 is configured to measure the surface temperature of the chip to be tested in each working state, and send the measured temperature value to the programmable logic array module 01;
  • the power supply module 04 is respectively connected to the programmable logic array module 01 and the chip socket module 02 to provide power for the circuit, and the power supply module 04 supports a pulse width modulation technology, and the surface temperature of the chip to be tested is higher than a preset value. Reduce the temperature of the chip to be tested by reducing power consumption;
  • the basic indicators for selecting a programmable logic chip include the number of logic cells (equivalent number of logic gates), the number of available I/O pins, and the on-chip memory resources (embedded hard) Core block RAM and distributed RAM), clock management unit (PLL and DCM), High-speed I/O interface module (MGT), embedded hard core multiplier (DSP segment element), embedded hard CPU.
  • the chip socket module 02 can be docked with a plurality of chips, so that various systems can be temperature tested using the system of the present invention.
  • a single chip socket cannot be used to unify various chips. Therefore, it is necessary to customize the chips according to the characteristics of various chips, such as application manuals of various chips. socket.
  • the temperature sensor can use a PT100-based Huygens bridge circuit to sense temperature changes, and then transmit the temperature data to the programmable logic array module 01 through an analog-to-digital converter for processing.
  • the temperature sensor can also adopt other The type of the embodiment of the present invention is not limited thereto.
  • the power supply module 04 in addition to providing a power supply function, also adjusts the voltage of the power supply by PWM (Pulse Width Modulation) technology.
  • PWM Pulse Width Modulation
  • the programmable logic array module lowers the PWM. The frequency to achieve the purpose of cooling, thus protecting the chip from damage.
  • the chip surface temperature measurement system further includes:
  • the clock module 05 is respectively connected to the programmable logic array module 01 and the chip socket module 02, and configured to provide a clock reference for the digital circuit when the chip to be tested is a digital circuit, and the surface temperature of the chip to be tested is higher than the pre-measurement When the value is set, the temperature of the chip to be tested is lowered by lowering the clock frequency.
  • the clock module 05 can be an integrated clock chip or a discrete phase-locked loop circuit.
  • the chip surface temperature measurement system further includes:
  • variable speed fan module 06 is respectively connected to the programmable logic array module 01 and the chip socket module 02, and configured to pass the negative feedback by the programmable logic array module 01 when the surface temperature of the chip to be tested is higher than a preset value.
  • the temperature adjustment controls the speed of the speed control fan to reduce the temperature.
  • the fan speed data can be used to give suggestions for future use.
  • the chip surface temperature measurement system further includes:
  • the storage module 07 is connected to the programmable logic array module 01, configured to store measured chip temperature data to be tested; the display module 08, and the programmable logic
  • the array module 01 is connected and configured to output and display the chip temperature data to be tested.
  • the storage module 07 and the storage module may include at least one type of storage medium including a flash memory, a hard disk, a card type memory (eg, SD, TF memory, etc.), a multimedia card, a random access memory (RAM), and the like.
  • a flash memory e.g, a hard disk
  • a card type memory e.g, SD, TF memory, etc.
  • a multimedia card e.g., a multimedia card
  • RAM random access memory
  • PROM Programmable Read Only Memory
  • SRAM Static Random Access Memory
  • EEPROM Electrically Erasable Programmable Read Only Memory
  • ROM Read Only Memory
  • the display module 08 may include at least one of a liquid crystal display (LCD), a thin film transistor LCD (TFT-LCD), an organic light emitting diode (OLED) display, a flexible display, and the like.
  • LCD liquid crystal display
  • TFT-LCD thin film transistor LCD
  • OLED organic light emitting diode
  • display module 08 may include two or more display units, and display module 08 may include a touch screen configured to detect touch operations.
  • the chip surface temperature measurement system further includes:
  • the alarm device 09 is connected to the programmable logic array module 01 and configured to send an alarm message when the temperature of the chip to be tested is higher than a preset value. It can be a speaker, a buzzer or an LED flashing light.
  • connection module 10 is a bus structure including a plurality of interfaces configured to implement physical connection between the programmable logic array and the chip to be tested.
  • Embodiments of the invention are digital systems based on programmable logic arrays.
  • Modern large-scale integrated circuit chips, whether digital or analog, or RF, are moving in the direction of modular integration. There are many working modes of the chip. If each working mode is to be a printed circuit board, the programming program, Re-measuring the temperature, time and labor, is unrealistic in the R&D design phase of the chip.
  • This invention The programmable logic array module 01 provided by the embodiment is rich in logic, peripherals and IO resources, and can solve this problem well.
  • the programmable logic array module 01 can update the digital logic circuit in real time by updating the code.
  • the tester prepares a series of automated test cases for pre-existing by consulting the function manual of the chip to be tested.
  • the high-speed chip socket 02 is connected to the chip to be tested, and the digital logic code is updated.
  • the working mode of the chip to be tested is configured by connecting the bus of the module 10, including the normal design working state and the stress test before the chip leaves the factory, and then passed.
  • the temperature sensor 03 installed in the chip socket 02 converts the measured analog signal into a digital signal, and the obtained temperature of the chip to be tested is transmitted back to the programmable logic array module 01.
  • the programmable logic array module 01 is rich in logic resources and is used to implement negative feedback control of the chip surface temperature.
  • the measurement system of the invention can realize the negative feedback adjustment of the chip temperature through three kinds of modules, so as to ensure that the chip is not damaged during the measurement process.
  • the programmable logic array module 01 controls the power supply module 04 of the circuit to be tested, and adjusts the voltage of the power supply by PWM (Pulse Width Modulation) technology.
  • PWM Pulse Width Modulation
  • the programmable logic array module 01 The frequency of the PWM is lowered.
  • the programmable logic array module 01 controls the clock module 05 of the circuit to be tested, and the frequency of the clock is configured by the control word.
  • the programmable logic array module 01 When the temperature is higher than the preset maximum value, the programmable logic array module 01 is lowered. The frequency of the clock, especially the frequency of the main clock, is very obvious. Third, the programmable logic array module 01 controls the speed of the speed regulating fan 06 mounted on the chip socket 02. When the temperature is higher than the preset maximum value, The programmed logic array module 01 increases the speed of the fan. If all three methods have been tried, the temperature is still higher than the maximum value of the chip manufacturing trademark, and the programmable logic array module 01 disconnects the power supply module 04 of the chip to be tested, and issues an alarm through the alarm device 09 to achieve the purpose of protecting the test chip.
  • the programmable logic array module 01 measures the surface temperature of the chip
  • the data is intelligently organized into a format as shown in FIG. 5, displayed by the liquid crystal display of the display module 08 of the system, and stored in the storage module 07, such as erasable.
  • the storage module 07 such as erasable.
  • connection module performs the working process after the connection, and other modules relating to the embodiment of the present invention are consistent with the description of the above embodiment.
  • the programmable logic array module configures the working mode, measures by the temperature sensor, and records the surface temperature of the chip by the programmable logic array module.
  • FIG. 2 is a schematic diagram of an application scenario in which a chip to be tested is an audio-video SOC (system on a chip) according to a first application example of the present invention.
  • the chip to be tested is an audio and video on-chip system chip, and the peripheral resources are relatively abundant.
  • the application scenarios of the audio and video on-chip system commonly used in the market are very diverse, and the number of chip pins is very large. Since the programmable logic array provided by the embodiment of the present invention has many types of peripherals, and the number of pins is a limit state supported by the package, it can be fully connected to the chip to be tested.
  • the audio and video file 01 is a file that can be read by the system of audio and video on-chip stored by the programmable logic array.
  • the configuration interface 02 is the UART, JTAG, I2C, SPI, etc. of the audio and video on-chip system.
  • the logic code is written in the programmable logic array module according to the chip manual to be tested, and the control audio and video file 01 is downloaded through the configuration interface 02.
  • the audio and video on-chip system operates.
  • the peripheral interface can be realized as a DDR (Double Rate Synchronous Dynamic Random Access Memory) controller, a memory controller, an Ethernet network transceiver, and the like. Therefore, the programmable logic array can be used to simulate various application scenarios so that all modules of the audio and video on-chip system can be fully operated, and then the chip surface temperature data is obtained according to all application scenarios of the chip design.
  • DDR Double Rate Synchronous Dynamic Random Access Memory
  • FIG. 3 it is a schematic diagram of an application scenario in which a chip to be tested is a digital analog hybrid circuit according to a second application example of the present invention.
  • the chip to be tested is a digital analog hybrid circuit chip
  • the programmable logic array module sends the analog signal 01 to the hybrid circuit through the peripheral of the analog circuit, and vice versa, the digital signal 02 can be sent to the hybrid circuit.
  • the hybrid circuit works in different working scenarios.
  • the digital signal 02 signal and the analog signal 04 converted by the hybrid circuit can be collected by the programmable logic array module, and the chip is evaluated according to the collected signal, and then the temperature sensor is collected. The surface temperature of the chip, thereby obtaining the temperature of the chip under various operating conditions.
  • a third application example of the present invention is a schematic diagram of an application scenario of a protocol interface circuit.
  • the chip to be tested is an interface protocol conversion circuit chip
  • the programmable logic array module sends the first protocol data 01 to the protocol interface circuit, and after the chip processing, forwards the second protocol data 02 to the programmable logic array. It is possible to form a data loop to generate circuits for transmission and reception.
  • the temperature sensor collects the temperature, sends it to the programmable logic array circuit for real-time processing, and confirms the correct operation of the protocol interface circuit through the protocol verification code word.
  • the embodiment of the invention further provides a chip surface temperature measuring method, the method comprising:
  • the obtaining the type of the chip to be tested may be obtained by the number of chip pins, or may be identified by receiving a parameter input by the user.
  • the obtaining temperature data of the chip to be tested in various working modes is obtained by a temperature sensor.
  • an embodiment of the present invention further provides a computer storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
  • the computer readable storage medium described above includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to perform some of the steps of the methods described in various embodiments of the present disclosure.
  • the computer readable storage medium includes: a USB flash drive, a removable hard disk, a read only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. medium.
  • the foregoing embodiment method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be through hardware, but in many cases, the former is better.
  • Implementation Based on such understanding, the technical solution of the present invention, which is essential or contributes to the prior art, may be embodied in the form of a software product stored in a storage medium (such as ROM/RAM, disk,
  • the optical disc includes a number of instructions for causing a terminal device (which may be a cell phone, a computer, a server, an air conditioner, or a network device, etc.) to perform the methods described in various embodiments of the present invention.
  • the technical solution of the embodiment of the invention realizes automatic measurement of the surface temperature of the chip to be tested in the chip design or screening stage, and obtains the physical characteristics of the chip to be tested, thereby providing a powerful reference for the chip design.
  • the chip socket module provided by the embodiment of the invention can be used to place a plurality of chips to be tested.
  • the programmable logic array module provided by the embodiment of the invention can dynamically simulate the working state of various chips, and is implemented with a bus connection module having multiple interfaces. Various working state parameters are sent to the chip to be tested, thereby obtaining temperature data of the chip to be tested under various working states.
  • the embodiment of the present invention can realize measurement of a plurality of chips to be tested, improve work efficiency, and facilitate chip designers to evaluate chip temperature characteristics.
  • the embodiment of the present invention also provides three kinds of feedback (down voltage, frequency reduction, fan speed) to adjust the working temperature of the chip, thereby ensuring smooth and reliable test work without causing excessive temperature of the chip. And the consequences of the damage.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

L'invention concerne un système et un procédé de mesure de température de surface de puce, ainsi qu'un support d'informations informatique. Le système comprend : un module de réseau logique programmable (01), conçu pour configurer des états de fonctionnement d'une puce au moyen d'une simulation dynamique, et recevoir une valeur numérique de température de surface de puce obtenue par mesure ; un module de prise de puce (02), conçu pour loger une puce à tester, le module de prise de puce (02) étant connecté au module de réseau logique programmable (01) au moyen d'un module de connexion (10) possédant des prises multiples ; un module de détection de température (03), conçu pour mesurer les températures de surface de la puce à tester dans divers états de fonctionnement, et envoyer les valeurs numériques de température de surface de puce, obtenues par mesure, au module de réseau logique programmable (01) ; et un module d'alimentation électrique (04), connecté à la fois au module de réseau logique programmable (01) et au module de prise de puce (02), permettant de fournir une source d'alimentation pour un circuit. Le module d'alimentation électrique (04) prend en charge la technologie de modulation de largeur d'impulsion, de telle sorte que lorsque la température de surface d'une puce à tester est supérieure à une valeur en cours, le système est conçu pour utiliser le module de réseau logique programmable (01) afin de commander au module d'alimentation électrique (04) de réduire la consommation d'énergie de façon à réduire la température de la puce à tester.
PCT/CN2017/103639 2017-04-19 2017-09-27 Système et procédé de mesure de température de surface de puce et support d'informations informatique Ceased WO2018192182A1 (fr)

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CN110297171B (zh) * 2019-06-14 2021-10-01 苏州福瑞思信息科技有限公司 一种芯片的功耗测试系统和设备
CN110687952A (zh) * 2019-10-24 2020-01-14 广东美的白色家电技术创新中心有限公司 电压调节电路、电压调节方法和存储介质
CN111208349A (zh) * 2019-12-31 2020-05-29 深圳市芯天下技术有限公司 基于FPGA开发板的Nor Flash芯片功耗测试装置及方法
CN114325291A (zh) * 2020-09-29 2022-04-12 圣邦微电子（北京）股份有限公司 芯片测试的温度监测装置及监测方法

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