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WO2017219192A1 - Procédé et système de dessin de tension de puce électronique - Google Patents

Procédé et système de dessin de tension de puce électronique Download PDF

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Publication number
WO2017219192A1
WO2017219192A1 PCT/CN2016/086384 CN2016086384W WO2017219192A1 WO 2017219192 A1 WO2017219192 A1 WO 2017219192A1 CN 2016086384 W CN2016086384 W CN 2016086384W WO 2017219192 A1 WO2017219192 A1 WO 2017219192A1
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WO
WIPO (PCT)
Prior art keywords
voltage
data
electronic chip
curve
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/086384
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English (en)
Chinese (zh)
Inventor
张升泽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to PCT/CN2016/086384 priority Critical patent/WO2017219192A1/fr
Publication of WO2017219192A1 publication Critical patent/WO2017219192A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof

Definitions

  • the present invention relates to the field of chips and electronics, and in particular, to a voltage drawing method and system for an electronic chip.
  • Chip English is Chip; Chipset is Chipset.
  • the chip generally refers to the carrier of the integrated circuit, and is also the result of the integrated circuit after being designed, manufactured, packaged, and tested. It is usually an independent whole that can be used immediately.
  • the words "chip” and "integrated circuit” are often mixed. For example, in the common discussion topic, integrated circuit design and chip design say that the chip industry, the integrated circuit industry, and the IC industry are often also meanings. . In fact, these two words are related and different.
  • Integrated circuit entities often exist in the form of chips, because narrowly defined integrated circuits emphasize the circuit itself, such as a phase-shifted oscillator that is simply connected with only five components. When it is still on the drawing, we It can also be called an integrated circuit.
  • this small integrated circuit When we want to use this small integrated circuit for application, it must be a separate piece of real object, or embedded in a larger integrated circuit, relying on the chip to play its role; Focusing on the design and layout of the circuit, the chip emphasizes the integration, production and packaging of the circuit.
  • the generalized integrated circuit when it comes to the industry (different from other industries), can also contain various meanings related to the chip.
  • the chip also has its own unique place. In a broad sense, as long as it is a semiconductor wafer manufactured by microfabrication, it can be called a chip, and there is no circuit inside.
  • a semiconductor light source chip for example, a mechanical chip such as a MEMS gyroscope; or a biochip such as a DNA chip.
  • the intersection of the chip and the integrated circuit is on the "circuit on the silicon wafer.”
  • the chipset is a series of interrelated chipsets that are interdependent and can play a bigger role, such as the processor inside the computer and the North-South Bridge chipset, the RF, baseband and power management chipset in the phone. .
  • a voltage drawing method for an electronic chip is provided, which solves the shortcomings of the prior art that the voltage variation curve cannot be drawn.
  • a voltage drawing method for an electronic chip comprising the steps of:
  • the analytically processed voltage data is plotted as a voltage curve.
  • the method further includes:
  • the curve is processed to obtain peak data.
  • the method further includes:
  • the change curve is processed to obtain a rate of change.
  • a voltage drawing system for an electronic chip comprising:
  • a sampling unit for sampling voltage data of the electronic chip
  • a parsing unit configured to parse the sampled data
  • a drawing unit is configured to plot the voltage data of the parsing process into a voltage variation curve.
  • system further includes:
  • a peak unit for processing the curve to obtain peak data A peak unit for processing the curve to obtain peak data.
  • system further includes:
  • a rate of change unit for processing the curve to obtain a rate of change for processing the curve to obtain a rate of change.
  • the technical solution provided by the specific embodiment of the present invention samples the voltage data of the electronic chip, analyzes the sampled data, and plots the analyzed voltage data into a voltage variation curve. Therefore, the technical solution has a voltage variation curve.
  • FIG. 1 is a flow chart of a voltage drawing method of an electronic chip according to the present invention.
  • FIG. 2 is a structural diagram of a voltage drawing system of an electronic chip according to the present invention.
  • FIG. 1 is a flowchart of a voltage drawing method of an electronic chip according to a first preferred embodiment of the present invention.
  • the method is implemented by an intelligent terminal.
  • the method is as shown in FIG. 1 , and includes the following steps:
  • Step S101 sampling voltage data of the electronic chip
  • Step S102 performing parsing processing on the sampled data
  • Step S103 drawing the voltage data of the analysis process into a voltage change curve.
  • the technical solution provided by the specific embodiment of the present invention samples the voltage data of the electronic chip, analyzes the sampled data, and plots the analyzed voltage data into a voltage variation curve. Therefore, the technical solution has a voltage variation curve.
  • the foregoing method may further include:
  • the curve is processed to obtain peak data.
  • the foregoing method may further include:
  • the change curve is processed to obtain a rate of change.
  • FIG. 2 is a diagram of a voltage drawing system for an electronic chip according to a second preferred embodiment of the present invention.
  • the system includes:
  • a sampling unit 201 configured to sample voltage data of the electronic chip
  • the parsing unit 202 is configured to perform parsing processing on the sampled data
  • the drawing unit 203 is configured to plot the voltage data of the parsing process into a voltage variation curve.
  • the technical solution provided by the specific embodiment of the present invention samples the voltage data of the electronic chip, analyzes the sampled data, and plots the analyzed voltage data into a voltage variation curve. Therefore, the technical solution has a voltage variation curve.
  • the above system may further include:
  • the peak unit 204 is configured to process the curve to obtain peak data.
  • the above system may further include:
  • the rate of change unit 205 is configured to process the curve to obtain a rate of change.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a computer.
  • the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium.
  • a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne un procédé et un appareil de dessin de tension de puce électronique, le procédé comprenant les étapes suivantes : l'échantillonnage des données de tension d'une puce électronique (101) ; la mise en œuvre d'un traitement d'analyse des données échantillonnées (102) ; et le dessin des données de tension analysées sous forme de courbe de variation de tension (103). La solution technique présente l'avantage de mettre en œuvre un dessin de courbe de variation de tension.
PCT/CN2016/086384 2016-06-20 2016-06-20 Procédé et système de dessin de tension de puce électronique Ceased WO2017219192A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/086384 WO2017219192A1 (fr) 2016-06-20 2016-06-20 Procédé et système de dessin de tension de puce électronique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/086384 WO2017219192A1 (fr) 2016-06-20 2016-06-20 Procédé et système de dessin de tension de puce électronique

Publications (1)

Publication Number Publication Date
WO2017219192A1 true WO2017219192A1 (fr) 2017-12-28

Family

ID=60783150

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/086384 Ceased WO2017219192A1 (fr) 2016-06-20 2016-06-20 Procédé et système de dessin de tension de puce électronique

Country Status (1)

Country Link
WO (1) WO2017219192A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7272760B2 (en) * 2004-11-18 2007-09-18 Systems On Silicon Manufacturing Co. Pte. Ltd. Curve tracing device and method
CN102608449A (zh) * 2012-02-08 2012-07-25 电子科技大学 砷化镓单片微波功放的电应力极限评估方法
CN104301088A (zh) * 2014-09-20 2015-01-21 北京电子科技学院 密码芯片功耗分析装置、方法及功耗分析防护装置、方法
CN104635144A (zh) * 2015-03-02 2015-05-20 中国电子科技集团公司第五十八研究所 一种不依赖基准曲线的硬件木马检测方法
CN106154014A (zh) * 2016-06-20 2016-11-23 张升泽 电子芯片的电压绘制方法及系统

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7272760B2 (en) * 2004-11-18 2007-09-18 Systems On Silicon Manufacturing Co. Pte. Ltd. Curve tracing device and method
CN102608449A (zh) * 2012-02-08 2012-07-25 电子科技大学 砷化镓单片微波功放的电应力极限评估方法
CN104301088A (zh) * 2014-09-20 2015-01-21 北京电子科技学院 密码芯片功耗分析装置、方法及功耗分析防护装置、方法
CN104635144A (zh) * 2015-03-02 2015-05-20 中国电子科技集团公司第五十八研究所 一种不依赖基准曲线的硬件木马检测方法
CN106154014A (zh) * 2016-06-20 2016-11-23 张升泽 电子芯片的电压绘制方法及系统

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