WO2017204370A1 - Device and method for receiving broadcast signal - Google Patents

Abstract

A method for receiving a broadcast signal is disclosed. The method for receiving a broadcast signal, according to one embodiment of the present invention, comprises the steps of: synchronizing and orthogonal frequency-division multiplexing (OFDM)-demodulating a received broadcast signal; parsing a signal frame of the received broadcast signal; time-deinterleaving broadcast data of the signal frame; forward error correction (FEC)-decoding the broadcast data; and output-formatting the broadcast data and outputting a data stream.

Description

Broadcast signal receiving device and method

The present invention relates to a broadcast signal receiving apparatus and a broadcast signal receiving method.

As analog broadcast signal transmission is terminated, various techniques for transmitting and receiving digital broadcast signals have been developed. The digital broadcast signal may include a larger amount of video / audio data than the analog broadcast signal, and may further include various types of additional data as well as the video / audio data.

The digital broadcasting system may provide high definition (HD) images, multichannel audio, and various additional services. However, for digital broadcasting, data transmission efficiency for a large amount of data transmission, robustness of a transmission / reception network, and network flexibility in consideration of a mobile receiving device should be improved.

In order to solve the above technical problem, the present invention proposes a method for receiving a broadcast signal and an apparatus for receiving the broadcast signal.

According to an embodiment of the present invention, a method of receiving a broadcast signal includes synchronizing and demodulating an orthogonal frequency division multiplexing (OFDM) signal; Parsing a signal frame of the received broadcast signal; Time deinterleaving PLP (Physical Layer Pipe) data included in the signal frame; Forward error correction (FEC) decoding the PLP data; And output formatting the PLP data and outputting a data stream. The time deinterleaving comprises: determining whether an extended interleaving mode has been applied to the PLP data; Reconfiguring a time deinterleaving (TDI) memory when the extended interleaving mode is applied to the PLP data; And time deinterleaving the PLP data using the reconstructed TDI memory.

The method for receiving a broadcast signal according to an embodiment of the present invention may further include obtaining physical layer signaling (PLS) information included in the signal frame, wherein the extended interleaving mode is applied to the PLP data. Determining whether or not the information is applied to the PLS data may include determining whether an extended interleaving mode is applied to the PLP data based on the extended interleaving mode information included in the PLS information.

Further, in a method for receiving a broadcast signal according to an embodiment of the present invention, the reconfiguring of the TDI memory may include: determining a bit resolution for the time deinterleaving; And reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution.

Further, in the method for receiving a broadcast signal according to an embodiment of the present invention, time deinterleaving the PLP data using the reconstructed TDI memory may include: data cells of the PLP data based on the determined bit resolution; Quantizing the PLP data such that each size is reduced; And time deinterleaving the quantized PLP data according to a TDI mode using the reconstructed TDI memory.

In the method for receiving a broadcast signal according to an embodiment of the present invention, the TI mode is a Convolutional Time Interleaving (CTI) mode or a Hybrid Time Interleaving (HTI) mode, and the PLS information indicates a TI mode. It may include mode information.

Also, in the method for receiving a broadcast signal according to an embodiment of the present invention, the step of time deinterleaving the quantized PLP data according to the TI mode using the reconstructed TDI memory may include a TDI before reconstruction. While using the same memory size as the memory, it is possible to time deinterleave the increased number of data cells by the number of memory units that increases with the reduced memory unit size.

In addition, in the method for receiving a broadcast signal according to an embodiment of the present invention, the extended interleaving mode may be applied only when the PLP data is modulated by a quaternary phased shift keying (QPSK) scheme.

An apparatus for receiving a broadcast signal according to an embodiment of the present invention includes a synchronization and demodulation unit for synchronizing a received broadcast signal and an Orthgonal Frequency Division Multiplexing (OFDM); A parsing unit for parsing a signal frame of the received broadcast signal; A time deinterleaver for time deinterleaving PLP (Physical Layer Pipe) data included in the signal frame; A demapping and decoding unit for decoding the PLP data with Forward Error Correction (FEC); And an output processor for output formatting the PLP data and outputting a data stream. The time deinterleaver determines whether an extended interleaving mode is applied to the PLP data, reconfigures a time deinterleaving (TDI) memory when the extended interleaving mode is applied to the PLP data, and The reconfigured TDI memory may be used to time deinterleave the PLP data.

In the broadcast signal receiver according to an embodiment of the present invention, the time deinterleaver may determine whether an extended interleaving mode is applied to the PLP data based on extended interleaving mode information in the PLS information included in the signal frame. You can decide whether or not.

In a broadcast signal receiver according to an embodiment of the present invention, reconstructing the TDI memory includes: determining a bit resolution for the time deinterleaving; And reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution.

In the broadcast signal receiver according to an embodiment of the present invention, time deinterleaving the PLP data using the reconstructed TDI memory may include: reducing the size of each of the data cells of the PLP data based on the determined bit resolution. Quantizing PLP data; And time deinterleaving the quantized PLP data according to a TI mode using the reconstructed TDI memory.

In a broadcast signal receiver according to an embodiment of the present invention, the TI mode is a Convolutional Time Interleaving (CTI) mode or a Hybrid Time Interleaving (HTI) mode, and the PLS information may include TI mode information indicating the TI mode. have.

In the broadcast signal receiver according to an embodiment of the present invention, time deinterleaving the quantized PLP data according to the TI mode using the reconstructed TDI memory uses the same memory size as the TDI memory before reconstruction. In the meantime, the number of data cells increased by the number of memory units increased according to the size of the reduced memory unit may be time deinterleaved.

In the broadcast signal receiver according to an embodiment of the present invention, the extended interleaving mode may be applied only when the PLP data is modulated by a quaternary phased shift keying (QPSK) scheme.

According to the present invention, an efficient broadcast signal can be received and processed.

In particular, in the present invention, even when extended interleaving is applied, time deinterleaving may be performed without expanding the time deinterleaving (TDI) memory size for time deinterleaving, thereby increasing efficiency of receiver memory use.

In addition, when extended interleaving is applied, the present invention reconfigures the TDI memory so that the number of memory units is increased by reducing the size of each memory unit constituting the TDI memory while maintaining the TDI memory size, and reconstructing the reconfigured TDI memory. Time deinterleaving. Accordingly, when extended interleaving is applied, the time deinterleaver according to the present invention can perform time interleaving by one data cell unit by mapping each data cell to an increased number of memory units. Accordingly, the same size as compared to a time deinterleaver using a pair-wise method of performing time deinterleaving by two data cells by mapping two data cells to one memory unit without reconfiguring the TDI memory. It has the effect of deinterleaving a larger number of individual data cells while using a TDI memory. That is, the interleaving depth is increased, and the effect of data interleaving can be increased.

1 shows a system architecture of a broadcast signal transmitter according to an embodiment of the present invention.

2 illustrates a framing and interleaving unit according to an embodiment of the invention.

3 illustrates a time interleaver according to an embodiment of the present invention.

4 illustrates a twisted block interleaver and its operation according to an embodiment of the present invention.

5 shows a system architecture of a broadcast signal receiver according to an embodiment of the present invention.

6 illustrates a frame parsing and deinterleaving unit according to an embodiment of the present invention.

7 shows a block diagram of a time deinterleaver according to an embodiment of the present invention.

8 illustrates a twisted block deinterleaver and its operation according to an embodiment of the present invention.

9 shows an example of a time interleaving operation according to an embodiment of the present invention.

10 illustrates an example of time deinterleaving operation according to an embodiment of the present invention.

11 illustrates a deinterleaver memory and its deinterleaving operation according to an embodiment of the present invention.

12 illustrates interleaving and deinterleaving operations of a TI block including virtual cells according to an embodiment of the present invention.

13 illustrates an embodiment of estimating the position and amount of virtual cells according to an embodiment of the present invention.

14 illustrates a TI memory configuration for the CTI mode according to an embodiment of the present invention.

15 illustrates a TI memory structure for HTI mode according to an embodiment of the present invention.

16 illustrates a structure of a TDI memory according to whether an extended interleaving mode is applied according to an embodiment of the present invention.

17 illustrates a TDI memory structure for a CTI mode or an HTI mode according to an embodiment of the present invention.

18 illustrates a method of receiving a broadcast signal according to an embodiment of the present invention.

19 illustrates a time deinterleaving method according to an embodiment of the present invention.

20 illustrates a time deinterleaving method when the extended interleaving mode is applied according to an embodiment of the present invention.

Preferred embodiments of the present invention will be described in detail, examples of which are illustrated in the accompanying drawings. DETAILED DESCRIPTION The following detailed description with reference to the accompanying drawings is intended to explain preferred embodiments of the invention rather than to show only embodiments that may be implemented in accordance with embodiments of the invention. The following detailed description includes details to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without these details.

Most of the terms used in the present invention are selected from general ones widely used in the art, but some terms are arbitrarily selected by the applicant, and their meanings are described in detail in the following description as necessary. Therefore, the present invention should be understood based on the intended meaning of the term and not the simple name or meaning of the term.

The present invention relates to a receiving apparatus and a receiving method for a broadcast signal. However, in order to explain a broadcast signal reception apparatus and a reception method, a broadcast signal transmission apparatus and a transmission method will first be briefly described.

1 shows a system architecture of a broadcast signal transmitter according to an embodiment of the present invention.

The broadcast signal transmitter includes an input formatting unit 1010, a bit interleaved and coded modulation (BICM) unit 1020, a framing and interleaving unit 1030, and a waveform generation unit 1040. Units may be referred to herein as modules, blocks, and such units may be implemented as hardware or as software operating on specific hardware.

The input formatting unit 1010 formats the input data. The input formatting unit 1010 may perform header compression on data and encapsulate it into a link layer packet. The input formatting unit 1010 may baseband format data to output baseband packets for respective physical layer pipes (PLPs). The input formatting unit 1010 outputs data in units of PLPs.

The BICM unit 1020 may process FEC (Forward Error Correction) and constellation map the data. The BICM unit 1010 may FEC encode, bit interleave, and map constellations of the PLP data. FEC encoding of BICM may be performed by using at least one encoding method of BCH (Bose, Chaudhuri, Hocquenghem) encoding and Low-Density Parity Check (LDPC) encoding.

The framing and interleaving unit 1030 may time interleave the data, generate a signal frame containing the data, and frequency interleave the data. The operation of the framing and interleaving unit 1030 will be described later with reference to FIG. 2.

The waveform generation unit 1040 may generate an output waveform. The waveform generation unit 1040 may process the signal frame to generate a transmission signal. The waveform generation unit 1040 may generate a transmission signal by inserting a pilot, performing an inverse fast fourier transform (IFFT), inserting a guard interval, and adding a bootstrap signal.

2 illustrates a framing and interleaving unit according to an embodiment of the invention.

The framing and interleaving unit of FIG. 2 represents the framing and interleaving unit 1030 of FIG. 1.

The framing and interleaving unit 1030 may include a time interleaver 2010, a framing unit 2020, and a frequency interleaver 2030.

The time interleaver 2010 time interleaves the broadcast data. Time interleaving is described in more detail below. Although FIG. 2 illustrates a plurality of time interleaver 2010 for each PLP, one time interleaver may interleave data in parallel for each PLP.

The framing unit 2020 may generate / configure signal frames. The signal frame may include bootstrap, preamble and data portion. However, bootstrap may be added in the waveform generation unit. The bootstrap and preamble carry L1 (Layer 1) signaling information. The data portion may include at least one subframe. The preamble may carry L1 basic information and L1 detail information. The L1 basic information may include the most fundamental signaling information of the system and parameter information necessary for decoding the L1 detail information. The L1 basic information may have a fixed length. The L1 detail information may include a data context and information necessary to decode the data context. The length of the L1 detail information may vary from frame to frame.

The frequency interleaver 2030 may interleave data in the frequency domain. The frequency interleaver 2030 may interleave data cells of an orthogonal frequency division multiplexing (OFDM) symbol in a frequency domain. Frequency interleaving may optionally be used for data in a subframe, but may always be used for preamble symbols.

3 illustrates a time interleaver according to an embodiment of the present invention.

In FIG. 3, the time interleaver shown in FIG. 2 will be described in more detail. The time interleaver can operate in two modes.

As shown in FIG. 3A, the time interleaver may operate in a convolutional time interleaver (CTI) mode. Alternatively, as shown in FIG. 3B, the time interleaver may operate in a hybrid time interleaving (HTI) mode. The operating mode of the time interleaver for the PLP may be signaled as TI mode information through the L1 detail information.

When the time interleaver operates in the CTI mode, the time interleaver includes a convolutional interleaver 2010, which interleaves a sequence of cells of the input PLP.

When the time interleaver operates in the HTI mode, the time interleaver may include a cell interleaver 2020, a twisted block interleaver (TBI) 2030, and a convolutional delay line (CDL) 2040.

The cell interleaver 2020 arranges input cells of the FEC blocks into TI blocks. The TI block may include at least one FEC block. The cell interleaver 2020 interleaves the cells within each FEC block.

The TBI 2030 may perform intra-subframe interleaving by interleaving the TI blocks. The TI block may include at least one cell-interleaved FEC blocks. Hereinafter, the twisted block interleaver may be referred to as a block interleaver.

The convolutional delay line 3040 may optionally perform inter-subframe interleaving. The CDL 3040 may spread block-interleaved TI blocks into a plurality of subframes.

4 illustrates a twisted block interleaver and its operation according to an embodiment of the present invention.

4 illustrates the twisted block interleaver 2030 and its operation in FIG. 3.

In the interleaving of each TI block, the TBI is divided into cells of the N _{FEC _ TI} (n, s) FEC blocks d _{n, s, 0 , 0} , d _{n, s, 0 , 0} , from the output of the cell interleaver in memory. d _{n, s, 0 , 1} ,... , d _{n, s, 0, N _ (cells-1)} , d _{n, s, 1,0} , d _{n, s, 1,1,.} , d _{n, s, N _ ( FEC _ TI ) ( n, s ) -1,0} , d _{n, s, N _ ( FEC _ TI ) ( n, s ) -1,1,.} , d _{n, s, N _ ( FEC _ TI ) ( n, s ) -1, N _ (cells-1)} can be stored in the memory. Here, d_ (n, s, r, q) represents an output cell of the cell interleaver, belonging to the TI block s in the interleaving frame n. Number (N_r) is (N_c) of the cell and the number of, the column (column) of the FEC block in the twisted block interleaver, the row (row) is the maximum number of FEC blocks of a TI Block (N _{FEC _ TI _MAX)} . In addition, in the interleaving operation, a virtual FEC block (Virtual FEC block) is defined, and the number of virtual FEC blocks in the TI block may be represented by Equation (1).

That is, the number of virtual FEC blocks in the TI block can be obtained by subtracting the number of FEC blocks of the TI block s in the interleaving frame n of the TI block from the maximum number of FEC blocks of the TI block. The virtual FEC blocks included in the TI block must be located before the data FEC blocks of the TI block for deinterleaving in a given memory. That is, the virtual FEC blocks are located in the preceding columns of the TI memory. Virtual FEC blocks are usually skipped in a reading operation. Thus, virtual FEC blocks may have any value, such as 0 or x. A non-zero value of N _{FEC _ TI _ Diff} (n, s) may indicate that the number of FEC blocks between TI blocks varies depending on the cell rate.

As in FIG. 4 (a), the FEC convexes are written to the TBI memory in a column direction, ie, column-wise. In the embodiment of Fig. 4 (a), the number of virtual FEC blocks (N _{FEC _ TI _ Diff} (n, s)) is two. As shown in FIG. 4 (b), cells shall be read out diagonal-wise from the first row (rightwards along the row beginning). with the left-most column) to the last row out as shown in Figure 1 (b)). During the read process for intra-subframe interleaving, virtual cells belonging to virtual FEC blocks are skipped. In block interleaved array, the diagonal direction reading can be carried out by calculation, such as the location of the data and the virtual cell of a coordinate (R _i, C _i) and (2) below.

In Equation 2, R_i and C_i represent a row index and a column index, respectively, and T_i represents a twisting parameter. When cells are read out sequentially from the linear memory, the cell positions can be calculated as θ_i = N_r * C_i + R_i. If the condition θ _i ≧ N _{FEC _ TI _ Diff} (n, s) * N _r is not satisfied, virtual cells are skipped in the reading process.

Hereinafter, operations of the receiver and the deinterleaving side will be described.

5 shows a system architecture of a broadcast signal receiver according to an embodiment of the present invention.

In FIG. 5, the broadcast signal receiver may include a synchronization and demodulation unit 5010, a frame parsing and deinterleaving unit 5020, a demapping and decoding unit 5030, and an output processor 5040. Units may be referred to herein as modules, blocks, and such units may be implemented as hardware or as software operating on specific hardware.

The synchronization and demodulation unit 5010 may detect / receive a broadcast signal through a receive antenna and perform synchronization. The synchronization and demodulation unit 5010 may perform an operation corresponding to an inverse process of the operation of the waveform generation unit 1040 on the transmitter side. The synchronization and demodulation unit 5010 may OFDM demodulate the OFDM modulated broadcast signal.

The frame parsing and deinterleaving unit 5020 may parse a signal frame included in a received broadcast signal and extract data corresponding to a service selected by a user. The frame parsing and deinterleaving unit 5020 may perform an operation corresponding to a reverse process of the operation of the framing and interleaving unit 1030. The configuration and operation of the frame parsing and deinterleaving unit 5020 will be described later.

The demapping and decoding unit 5030 may FEC decode the received data, convert the received data into bit region data, and deinterleave the data as necessary. The demapping and decoding unit 5030 may perform an operation corresponding to the reverse process of the operation of the BICM unit 1020.

The output processor 5040 can output process the data. The output processor 5040 may perform an operation corresponding to an inverse process of the operation of the input formatting unit 1010. The output processor 5040 may output a data stream by changing a format of data processed in the physical layer.

6 illustrates a frame parsing and deinterleaving unit according to an embodiment of the present invention.

The frame parsing and deinterleaving unit may correspond to the frame parsing and deinterleaving unit 5020 of FIG. 5. The frame parsing and deinterleaving unit 5020 may include a frequency deinterleaver 6010, a frame parser 6020, and a time deinterleaver 6030.

The frequency deinterleaver 6010 may perform an operation corresponding to an inverse process of the operation of the frequency interleaver 2030. In other words, the frequency deinterleaver 6010 may perform frequency deinterleaving on cells included in a symbol.

The frame parser 6020 may extract data included in the signal frame based on the signaling information. For example, PLP data including data for a specific service may be extracted from the signal frame and output to the demapping and decoding unit 5030.

The time deinterleaver 6030 may perform an operation corresponding to a reverse process of the operation of the time interleaver 2010. The time deinterleaver may time deinterleave data.

The time deinterleaver may operate in a convolutional time deinterleaver (CTD) mode or a hybrid time deinterleaver (HTD) mode. The broadcast signal receiver may acquire TI mode information included in the L1 signaling information. The TI mode information indicates whether the time interleaving mode for the corresponding PLP is a CTI mode or an HTI mode. Accordingly, the broadcast signal receiver may decode L1 detail information to obtain TI mode information on the corresponding PLP, and operate the time deinterleaver in the CTD mode or the HTD mode according to the TI mode information. The CTD mode may be referred to as a CTI mode and the HTD mode may be referred to as an HTI mode, respectively.

In the CTD mode, the time deinterleaver includes a convolutional deinterleaver and may deinterleave a sequence of cells of the input PLP.

In the HTD mode, the time deinterleaver may include a cell deinterleaver, a twisted block deinterleaver, and a convolutional delay line. The cell deinterleaver may deinterleave cells within the FEC block. The convolutional delay line can optionally perform inter-subframe deinterleaving. The convolutional delay line may collect TI blocks distributed into a plurality of subframes.

Hereinafter, the operation of the twisted block deinterleaver will be described in detail. First, the deinterleaving operation of constant bit-rate will be described first, and then the deinterleaving operation of variable bit-rate will be described. Hereinafter, the twisted block deinterleaver may be referred to as a block deinterleaver.

Since the TI block is synchronized to the subframe boundary in the time direction, the receiver can start time deinterleaving after subframe detection. The receiver may first detect the preamble included in the signal frame to decode the L1 detail information. The receiver may acquire time interleaving depth information included in the L1 detail information. And the receiver may initiate deinterleaving into the deinterleaver memory.

Hereinafter, an operation of the twisted block deinterleaver using a single memory will be described in detail. In the following description, the following two conditions may be assumed.

1) Virtual FEC blocks are not considered. However, the operation effect of the virtual FEC block will be described later. As described above, the virtual FEC block on the transmitter side is skipped in the read operation and therefore has an arbitrary value such as 0 or x.

2) In HTI mode, the cell interleaver and the convolutional delay line may not be used as an optional interleaving scheme. The convolutional delay line (in the transmitter / receiver) may perform first-in first out (FIFO) processing like a conventional convolutional interleaver / deinterleaver. Even when the cell interleaver and the convolutional delay line are used as an optional interleaving scheme, the description of the twisted block deinterleaver can be effectively applied.

7 shows a block diagram of a time deinterleaver according to an embodiment of the present invention.

For each TI block within the same PLP, the address generator for time deinterleaving may be the same. Two memories may be required at the time deinterleaver. However, a more efficient method using only one memory corresponding to one TI block can be used, such a memory-efficient deinterleaver is shown in FIG.

After subframe synchronization, for each TI block, data cells can be read out one at a time from the deinterleaver memory based on the address sequence generated by the address generator. For each outgoing cell, a new input cell can be written to the same address of the memory since the memory location has just been cleared by reading the output cell. The address generator 7020 may generate an address for reading data from the data cells in the time deinterleaver memory. And when using a single memory, the address used to read the data can be used to write the data of the next TI block. Thus, since one address is used to read data from the previous TI block and write data of the subsequent TI block, read and write operations can be implemented on one memory.

8 illustrates a twisted block deinterleaver and its operation according to an embodiment of the present invention.

As shown in Fig. 4, the twisted block interleaver writes input data to the buffer memory (R rows × C columns) in the column direction and reads out in the diagonal direction. The corresponding deinterleaver thus performs an inverse operation of interleaving. That is, the block deinterleaver writes data in the diagonal direction and reads the data in the column direction as shown in FIG. In Fig. 8, the block deinterleaver can write data in the order of first writing data in the diagonal direction of (1), then writing data in the diagonal direction of (2). Therefore, the total memory size M = R × C of the deinterleaver may be defined.

The actual block of memory used may be implemented as a contiguous memory block as in FIG. 8 (c). In the case of the memory block shown in FIG. 8C, a correct address sequence must be calculated. The addresses of the elements of the memory can be calculated by index i, where i is greater than or equal to 0 and less than or equal to M-1 (0 ≦ i ≦ M-1).

The address generator must compute the output sequence, which can be computed based on the definition of the address generator of the twisted block interleaver. Basically, the twisted block deinterleaving preferably operates based on the following operation sequence.

1) After initial subframe synchronization, for the first TI block of data, data is received and written to the memory in sequential order to the memory. Only for this TI block, the deinterleaver memory is filled but no output data is produced. Once the whole TI block is input, the data is ready for output.

2) When the second TI block of input data is received, the first TI block is read out. The (same) address sequence from which the first TI block is read out can be used to write data symbols belonging to the second TI block. Thus, efficient use of the time deinterleaving memory is possible.

3) Once all of the second TI blocks are stored in memory (or the first TI block is read out completely), the second TI block is also ready to be read out. The second TI block data is read based on the generated second address sequence, and the third TI block data is written based on the second address sequence.

4) Steps 2) and 3) are repeatedly performed on the input TI blocks.

For the above write-and-read operation, the address generation of the address generator can be described using 2D memory. Addresses for sequential memory can be calculated by switching the addresses of the 2D memory. Equation for the operation of the address generator may be defined as in Equation 3 below.

In Equation 3, an address for cells of the 2D memory may be defined by coordinates Ri _{, j} , Ci _{, j} , i = 0,1, ..., M-1. The row index and column index of the i-th data of the j-th TI block may be defined by coordinates (R _{i, j} , C _{i, j} ), and t _{i, j} represents a twisting parameter. The parameter s _j that changes with the TI block number j may be defined as in Equation 4 below.

In the sequential memory array, data, that is, cells are read and written sequentially, and the coordinate addresses R _{i, j} , C _{i, j} of the 2D memory may be converted into linear addresses by Equation 5 below. That is, the coordinate address of the i-th data of the j-th TI block may be converted into a linear address sequence by Equation 5.

9 shows an example of a time interleaving operation according to an embodiment of the present invention.

The embodiment of FIG. 9 shows an embodiment of a twisted block interleaver with four rows and three columns.

In Fig. 9A, the data a0, b0, ..., k0, l0 of the 0th TI block are written in the 4x3 memory in the column direction and read in the diagonal direction. The twisted block interleaved output data cells are output in the order of a0, f0, k0, d0, e0, j0, c0, h0, i0, b0, g0, l0 as shown in FIG.

In Fig. 9B, the data a1, b1, ..., k1, l1 of the first TI block are written in the 4x3 memory in the column direction and read in the diagonal direction. The twisted block interleaved output data cells are output in the order of a1, f1, k1, d1, e1, j1, c1, h1, i1, b1, g1, l1 as shown in FIG.

10 illustrates an example of time deinterleaving operation according to an embodiment of the present invention.

10 illustrates an embodiment of a twisted time deinterleaver using a linear memory.

10 (a) shows input data cells for the 0 th TI block. In FIG. 9 (a), output data cells a0, f0, k0, ..., b0, l0 for the 0th TI block are input to the 0th TDI block as shown in FIG. 10 (a).

The address generator generates an address sequence for deinterleaving the data cells of the 0 th TI block. Addresses for deinterleaving the 0th TI block data are as shown in FIG. 10 (b), as shown in FIG. 10 (b). Accordingly, the time deinterleaver may perform deinterleaving by outputting cells in the order of the cell a0 of the 0th memory, the cell b0 of the ninth memory, and the cell c0 of the 6th memory.

The time deinterleaver may write the data cells of the first TI block into the memory according to the address sequence for the 0 th TI block of FIG. 10 (b). That is, a1 may be written in the position where the 0th memory cell a0 is read, f1 may be written in the position where the ninth memory cell b0 is read, and k1 may be written in the position where the 6th memory cell c0 is read. Data cells of the first TI block are written as shown in FIG.

The address generator generates an address sequence for deinterleaving the data cells of the first TI block. The address sequence for deinterleaving the first TI block data is as shown in 0, 5, 10, 3, 4, 9, 2, 7, 8, 1, 6, and 11 as shown in FIG. Accordingly, the time deinterleaver may perform deinterleaving by outputting cells in the order of the cell a1 of the 0th memory, the cell b1 of the fifth memory, and the cell c1 of the 10th memory.

In terms of time interleaver, variable bit rate means that the number of FEC blocks for every TI block can vary. However, the basic time interleaving structure for a constant bit rate can also be used for variable bit rates if the following two requests are satisfied.

1) The column size of the block interleaver is set to the maximum number of FEC blocks for TI blocks.

2) If the current number of FEC blocks is smaller than the maximum number of FEC blocks for the TI block, virtual FEC blocks are added by that difference (e.g., N _{FEC _ TI _ Diff} (n, s) =). N _{FEC_TI_MAX} -N _{FEC _ TI} (n, s)). Thus, by using a virtual FEC block, the variable bit-rate case can be processed like a fixed bit-rate case. The virtual FEC block is skipped during the diagonal read operation of the transmitter.

For efficient deinterleaving using a single memory at the receiver, virtual FEC blocks should be placed in front of data FEC blocks. If the virtual FEC block is located behind the TI block, problems may occur at the receiving end. That is, the receiver can perform read / write using the same address sequence during time deinterleaving operation using linear memory. When the virtual FEC block is located behind the TI block, the next cell is written to the unread memory unit. This is because a conflict may occur.

Receive side deinterleaving is performed taking into account virtual FEC blocks. That is, the deinterleaving address sequence is generated in consideration of the skipped position and the skipped virtual cells.

11 illustrates a deinterleaver memory and its deinterleaving operation according to an embodiment of the present invention.

FIG. 11 illustrates an embodiment in which deinterleaving is performed using a 2D memory.

Basically, the time deinterleaver performs the reverse operation of the interleaver. Therefore, the position of skipped virtual FEC blocks (or virtual cells) must be considered / estimated in order to achieve an accurate deinterleaving process at the receiver. 11 illustrates a diagonal memory write operation considering the positions of virtual FEC blocks.

In the embodiment of Figure 11, the number of virtual FEC blocks is three. Therefore, when the block deinterleaver writes received data to the memory, the block of the first three FEC blocks is considered as virtual FEC blocks to perform data writing in a diagonal direction. FIG. 11 is a conceptual diagram of performing block deinterleaving, and a receiver may not actually write virtual FEC cells of a virtual FEC block into a memory. The receiver may write data according to the address sequence generated in consideration of the virtual FEC block, and read the written data in the column direction. Virtual FEC blocks / virtual cells are skipped in a read operation.

12 illustrates interleaving and deinterleaving operations of a TI block including virtual cells according to an embodiment of the present invention.

12 illustrates an embodiment in which deinterleaving is performed using a linear memory.

Also in FIG. 12, accurate deinterleaving is possible only if the position of the virtual cell and the amount of sequential virtual cells are accurately considered or estimated. The position and amount of the virtual cell can be estimated using the skip pattern used in the interleaving process. Once the skip pattern of the virtual FEC blocks is obtained, the estimation for the virtual FEC blocks is the inverse processing of the obtained capture pattern.

12 (a) shows the interleaved data sequence of the 0 th TI block. For a TI block of 3x4 blocks, the first column corresponds to the virtual FEC block. Accordingly, the deinterleaved output data cells become b0, g0, a0, f0, d0, e0, c0, h0 as shown in FIG.

12B illustrates an operation of writing the 0th TI block data into a memory in the deinterleaver. The deinterleaver may write the TI block data into the memory in consideration of the position and amount of the omitted virtual cells. The deinterleaver may perform the deinterleaving operation by generating an address sequence in consideration of the virtual cell and reading data cells according to the generated address sequence.

In FIG. 12B, the virtual cells have the 0th, 3rd, 6th, and 9th addresses of the memory. Accordingly, the time deinterleaver may input data cells to the addresses of the remaining memory units and skip the virtual cells in the read operation.

Although virtual cells may be written to the memory in FIG. 12B, the virtual cells are not necessarily written to the memory. That is, the data cells b0, g0, a0, f0, d0, e0, c0, h0 may be written to the memory, and the data cells may be read from the memory according to the address sequence considering the virtual cell.

13 illustrates an embodiment of estimating the position and amount of virtual cells according to an embodiment of the present invention.

In FIG. 13, μ denotes the estimation of the skipped virtual cell position and amount. The embodiment of FIG. 13 is _{skipped based on} the maximum number of FEC blocks (N _{FEC _ TI _ MAX} ), the number of virtual blocks (N _{FEC _ TI _ Diff (n)} ), and column information (C _i-1 ). One method of obtaining the position and amount of virtual cells is shown.

However, the receiver obtains the maximum number of FEC blocks and the number of virtual blocks by referring to the TI parameters of the SI information included in the received signal, and uses virtual information using at least one of the maximum number of FEC blocks, the number of virtual blocks, or column information. The location and amount of cells can be obtained.

The TI parameter of SI information includes information indicating the number of TI blocks per interleaving frame (L1D_plp_HTI_num_ti_blocks), information indicating the maximum number of FEC blocks per interleaving frame for the current PLP (L1D_plp_HTI_num_fec_blocks_max), and current interleaving frame for the current PLP. Information indicating the number of FEC blocks included (L1D_plp_HTI_num_fec_blocks) is included. The broadcast receiver may use the TI parameter information to obtain whether virtual cells are included in the TI block and the position and amount of the virtual cells.

## Herein, the operation of the time interleaver of the transmitter and the time deinterleaver of the receiver when the extended interleaving mode is applied will be described in detail.

First, the extended interleaving mode will be described. The extended interleaving mode refers to a mode in which the size of the TI memory is expanded to increase the time interleaving depth. For example, the extended interleaving mode may be a mode that physically doubles the size of the TI memory to increase the time interleaving depth.

When this extended interleaving mode is applied, the transmitter can physically expand the size of the TI memory for time interleaving, which can increase the type interleaving depth, but burdens the memory usage at the transmitter. (burden) can be given. In addition, when the receiver performs time deinterleaving in a general manner, it is necessary to physically expand the TDI memory to perform time deinterleaving on the input data to which the extended interleaving mode is applied, which also burdens the memory usage of the receiver. Can give However, in the receiver according to the embodiment of the present invention, unlike the other conventional receivers, even when the extended interleaving mode is applied, the TDI memory is reconfigured without reconfiguring the TDI memory without physically expanding the size of the TDI memory for time deinterleaving. By performing interleaving, the memory can be efficiently used. This will be discussed in detail below.

The extended interleaving mode may be optionally enabled. Whether to apply the extended interleaving mode may be signaled through signaling information. As an embodiment, whether to apply the extended interleaving mode may be signaled through physical layer signaling (PLS) information. Here, the PLS information may be referred to as L1 signaling information described above. For example, whether to apply the extended interleaving mode may be signaled as extended interleaving mode information included in the PLS information. In this case, the extended interleaving mode information may be information (eg, a flag) indicating whether the extended interleaving mode is applied to the corresponding PLP. For example, if the value of the extended interleaving mode information in the L1 detail information is '1', it indicates that the extended interleaving mode is applied, and if the value of the extended interleaving mode information in the L1 detail information is '0'. , May indicate that the extended interleaving mode is not applied.

In addition, the extended interleaving mode may be applied when modulated by a quaternary phased shift keying (QPSK) scheme. When the extended interleaving mode is applied, the receiver according to the embodiment of the present invention needs to reduce the bit resolution of the data cell in order to time deinterleave without expanding the size of the TDI memory. Unlike other modulation schemes, QPSK In this case, since the spacing between constellations is sufficiently wide, the decoding error is less likely to occur even if the receiver reduces the bit resolution of the data cells. In addition, the extended interleaving mode may not be applied to layered division multiplexing (LDM). As an embodiment, the extended interleaving mode may be applied only when modulated in the QPSK scheme or only when the LDM is modulated in the QPSK scheme without being applied. In this case, the extended interleaving mode may be optional. As an embodiment, the extended interleaving mode may be applied to low capacity data transmission or a bad channel situation.

Hereinafter, the operation of the time interleaver when the extended interleaving mode is applied will be described.

The time interleaver according to an embodiment of the present invention may operate in the extended interleaving mode in the CTI mode or the HTI mode. When the extended interleaving mode is applied in the CTI mode or the HTI mode, the time interleaver may expand the size of the TI memory for the CTI mode or the HTI mode. For example, the time interleaver may physically double the maximum TI memory size (M _TI ) for the CTI mode or the HTI mode from '2 ¹⁹ cells' to '2 ²⁰ cells'. Here, the maximum TI memory size may be the maximum memory size that can be allocated for time interleaving. Hereinafter, the operation of the time interleaver according to the exemplary TI memory structure when the extended interleaving mode is applied in the CTI mode or the HTI mode will be described in detail with reference to FIG. 14.

14 illustrates a TI memory configuration for the CTI mode according to an embodiment of the present invention. More specifically, FIG. 14A illustrates a TI memory structure when the extended interleaving mode is not applied in the CTI mode, and FIG. 14B illustrates a TI memory when the extended interleaving mode is applied in the CTI mode. Represents a memory structure.

When the extended interleaving mode is applied in the CTI mode, the size of the TI memory may be expanded as compared with the case where the extended interleaving mode is not applied. For example, as shown in FIGS. 14A and 14B, when the extended interleaving mode is applied in the CTI mode, the maximum TI memory size M _TI is physically 2 without changing the size of each memory unit. Can be expanded by ship. Through this, the number of rows used in the CTI mode can be doubled. In this case, since the time interleaver can interleave a larger number of cells of the input data (eg, PLP data) using the convolutional interleaver, the time interleaving depth can be increased.

In this case, the number N _rows used in the CTI may be signaled as the CTI depth information through the PLS information. For example, when the extended interleaving mode is applied, the value of the CTI depth information in the L1 detail information may be signaled as '010', which indicates that 'N _rows = 1254' and indicates a time interleaving depth of about 300 ms. Can correspond. For another example, when the extended interleaving mode is applied, the value of the CTI depth information in the L1 detail information may be signaled as '011', which indicates that 'N _rows = 1448' and a time interleaving depth of about 400 ms. May correspond to.

In addition, as shown in Figs. 14A and 14B, the bit resolution of the data cells (indicated by the y-bit resolution) when the extended interleaving mode is applied despite the expansion of the TI memory size. It does not change. Here, the bit resolution is a parameter associated with the number of bits representing the data cell, and the higher the bit resolution, the more detailed the same data cell can be represented. For example, a 10 bit resolution may be understood to represent a data cell in 10 bits, and a 5 bit resolution may be understood to represent a data cell in 5 bits.

In one embodiment, the bit resolution may be determined depending on the robustness of the constellation. For example, in the case of QPSK and Extended Interleaving Mode, a relatively low resolution (e.g., 5 bit resolution) may be determined as bit resolution, and other combinations (e.g., LDM and Extended Interleaving mode) In this case, a relatively high resolution (eg, 10 bit resolution) may be determined as bit resolution.

15 illustrates a TI memory structure for HTI mode according to an embodiment of the present invention. More specifically, FIG. 15 (a) shows the TI memory structure when the extended interleaving mode is not applied in the HTI mode, and FIG. 15 (b) shows the TI memory structure when the extended interleaving mode is applied in the HTI mode. Represents a memory structure. The application of extended interleaving mode in HTI can affect both cell interleaver, TBI and convolutional delay lines.

When the extended interleaving mode is applied in the HTI mode, the size of the TI memory may be expanded as compared with the case where the extended interleaving mode is not applied. For example, as shown in FIGS. 15A and 15B, when the extended interleaving mode is applied in the HTI mode, the maximum TI memory size M _TI is doubled without changing the size of each memory unit. Can be. Through this, the maximum number N _{BLOCK_IF_MAX} of FEC blocks per interleaving frame may be doubled. However, as shown, the row size (FEC block length) may not be changed regardless of whether the extended interleaving mode is applied.

 In this case, the cell interleaver can interleave cells in a larger number of FEC blocks, the TBI can interleave a larger number of TI blocks, and the convolutional delay line has a larger number of block-interleaved TI blocks. Since they can be interleaved, the time interleaving depth can be increased. Meanwhile, the cell interleaver and the convolutional delay line may operate selectively.

In one embodiment, when the _extended interleaving mode is applied in the HTI mode, the M _TI becomes '2 ²⁰ cells' and the N _{BLOCK _IF_MAX} cannot exceed '517'. In another embodiment, when the _extended interleaving mode is not applied in the HTI mode, the M _TI becomes '2 ¹⁹ cells' and the N _{BLOCK_IF_MAX} cannot exceed '258'. Also, as shown in Figs. 15A and 15B, at the transmitter, the bit resolution (denoted as y-bit resolution) of the data cell is not changed despite the expansion of the TI memory size.

As described above, when the extended interleaving mode is applied, the transmitter may physically expand the size of the TI memory for time interleaving, which may increase the type interleaving depth, As described above, the burden on the memory usage may be burdened.

On the other hand, in the receiver according to the embodiment of the present invention, unlike the other conventional receivers, even when the extended interleaving mode is applied, the TDI memory by reconfiguring the TDI memory without physical expansion of the size of the TDI memory for time deinterleaving By performing interleaving, the memory can be efficiently used. Hereinafter, the operation of the time deinterleaver will be described when the extended interleaving mode is applied.

The time deinterleaver according to an embodiment of the present invention is an input data (for example, PLP unit) input to the time deinterleaver without extending the TDI memory size even when the extended interleaving mode is applied in order to use the memory efficiently. Data) can be time deinterleaved. For example, the time deinterleaver may perform time deinterleaving by setting the maximum TDI memory size M _TDI to '2 ¹⁹ cells' at all times regardless of whether extended interleaving is applied. Here, the maximum TDI memory size may be a maximum memory size that can be allocated for time deinterleaving. As an embodiment, the maximum TDI memory size M _TDI is the same size as the maximum TI memory size M _TI without extended interleaving mode (i.e., no extended memory size) (e.g., 2). ¹⁹ cells).

In this case, since the time deinterleaver must time deinterleave extended interleaved data or unextended interleaved data using TDI memories of the same size, the time deinterleaver is not required to be used in the extended interleaving mode. Therefore, the TDI memory structure needs to be set differently. For example, if the memory structure for the extended interleaving mode is not applied as the default structure of the TDI memory, the time deinterleaver must reconfigure the TDI memory if the extended interleaving mode is applied. .

As an embodiment, the time deinterleaver may reconstruct the TDI memory by determining the bit resolution for time deinterleaving and reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution. Hereinafter, a description will be given of the TDI memory structure according to whether the extended interleaving mode is applied and the operation of the time deinterleaver according to the description with reference to FIGS. 16 to 17.

16 illustrates a structure of a TDI memory according to whether an extended interleaving mode is applied according to an embodiment of the present invention. More specifically, FIG. 16A illustrates a TDI memory structure when the extended interleaving mode is not applied, and FIG. 16B illustrates a reconfigured TDI memory structure when the extended interleaving mode is applied. . In FIG. 16, it is assumed that a memory is configured as a linear memory and a TDI memory structure according to whether an extended interleaving mode is applied will be described. In addition, hereinafter, it is assumed that the TDI memory structure when the extended interleaving mode is not applied as the basic structure of the TI memory.

If the extended interleaving mode is not applied, the TDI memory may be configured with a basic memory structure. For example, as shown in Fig. 16A, when the extended interleaving mode is not applied, the TDI memory is capable of reading and writing data cells having a default bit resolution (e.g., 10 bit resolution). Memory units of size (eg, 10 bits). Here, the basic bit resolution may be the same bit resolution as the bit resolution of the data cell input to the time deinterleaver. Using this basic TDI memory, the time deinterleaver can time deinterleave input data to which extended interleaving has not been applied.

When extended interleaving mode is applied, bit resolution for time deinterleaving is determined, and the TDI memory can be reconstructed based on the determined bit resolution. For example, as shown in FIG. 16 (b), when the extended interleaving mode is applied, the reduced (eg, reduced to 1/2) bit resolution is determined as the bit resolution for time deinterleaving, and TDI The memory may be reconstructed into memory units of a size (eg, 5 bits) capable of reading and writing data cells having a determined bit resolution (eg, 5 bit resolution). In this case, the number of memory units in the TDI memory can be increased by an inverse (eg, twice) of the rate at which the size is reduced.

In addition, when the TDI memory is reconfigured, the time deinterleaver may reduce the size of the data cell of the input data to perform time deinterleaving using the reconfigured TDI memory. For example, the time deinterleaver may quantize the input data such that the size of each of the data cells of the input data is reduced based on the determined (eg, reduced) bit resolution.

Through such a reconfiguration of the TDI memory structure and quantization of the input data cells, the time deinterleaver uses the same memory size as the TDI memory before reconstruction, while increasing the size of the memory unit in accordance with the reduced memory unit size. The number of data cells increased by the number may be time deinterleaved. This allows the time deinterleaver to time deinterleave extended interleaved input data without physically extending the TDI memory size.

In FIG. 16, only an embodiment in which the memory is configured as a linear memory has been described, but the same or similar description may be applied to the case where the memory is configured as a memory other than the linear memory (for example, 2-D memory). Can be understood clearly. For example, when the memory is configured as 2-D memory, there is a difference in the arrangement method of the memory units constituting the TDI memory as compared with the case where the memory is configured as the linear memory, and the data cell according to the application of the extended interleaving mode. The reconstruction of the TDI memory through the change of the bit resolution and the size of the memory unit, and the time deinterleaving using the reconstructed TDI memory may be equally applied.

17 illustrates a TDI memory structure for a CTI mode or an HTI mode according to an embodiment of the present invention. In more detail, FIG. 17A illustrates a reconfigured TDI memory structure when the extended interleaving mode is applied in the CTI mode, and FIG. 17B illustrates a reconstruction when the extended interleaving mode is applied in the HTI mode. TDI memory structure. It can be understood that the TDI memory structures in FIGS. 17A and 17B are reconstructed based on the contents described with reference to FIG. 16.

Referring to FIGS. 17A and 17B, the reconstructed TDI memory structure when the extended interleaving mode is applied in the CTI mode or the HTI mode is the same as compared with the case where the extended interleaving mode is not applied. Memory size (e.g., M _TDI = 2 ¹⁹ cells), but the size of each memory unit constituting the TDI memory decreases (e.g., decreases in half) with respect to time resolution (e.g., 1/2) for time deinterleaving. 1/2), and the number of memory units is increased (e.g., doubled). In this case, the time deinterleaver may quantize the input data to reduce the size of the input data cell in order to deinterleave the input data using the reconfigured TDI memory. For example, the time deinterleaver may quantize the input data such that the size of each of the data cells of the PLP data is reduced based on the reduced bit resolution.

As such, the time deinterleaver may reinterleave the input data without changing the maximum TDI memory size by reconfiguring the TDI memory so as to reduce the size of the memory unit and quantizing the input data so as to reduce the size of the data cell. That is, the time deinterleaver may time deinterleave the increased number of data cells by the number of memory units increased according to the reduced memory unit size while using the same memory size as the TDI memory before reconstruction.

18 illustrates a method of receiving a broadcast signal according to an embodiment of the present invention.

The broadcast signal receiver may synchronize and OFDM demodulate the received broadcast signal (S18010).

The broadcast signal receiver may parse a signal frame of the received broadcast signal (S18020). The signal frame may include bootstrap, preamble and payload portions. The preamble may include PLS information, and the payload portion may include data of at least one PLP. The broadcast signal receiver may acquire PLS information included in a signal frame. The PLS information may include extended interleaving mode information, TI mode information, and TI mode parameter information.

Extended interleaving mode information means information indicating whether extended interleaving is applied to a corresponding PLP. TI mode information means information indicating a TI mode. In one embodiment, the TI mode may be a CTI mode or an HTI mode. The TI mode parameter information means information on a parameter indicating the configuration of each TI mode. The TI mode parameter information is CTI mode parameter information (for example, the above-described CTI depth information) which is information on a parameter indicating the configuration of the convolutional time interleaver in the CTI mode, or a hybrid used when the HTI mode is configured for the corresponding PLP. HTI mode parameter information (for example, information indicating whether CDL is used in HTI mode and information indicating whether cell interleaver is used in HTI mode, etc.), which is information on a parameter indicating a configuration of a time interleaver.

The broadcast signal receiver may time deinterleave at least one piece of PLP data included in the signal frame (S18030). Here, the PLP data may mean data of the PLP or data of a PLP unit. For example, the PLP data may be broadcast data in units of PLPs. The broadcast signal receiver may perform time deinterleaving according to the TI mode. This TI mode may be determined through TI mode information included in the above-described PLS information.

In addition, the broadcast signal receiver may perform time deinterleaving according to whether the extended interleaving mode is applied. When the extended interleaving mode is applied in the CTI mode or the HTI mode, the broadcast signal receiver may reconstruct the TDI memory and perform time deinterleaving using the reconstructed TDI memory. This will be described later in detail with reference to FIG. 19.

The broadcast signal receiver may FEC decode the PLP data (S18040), output format the PLP data, and output a data stream (S18050).

19 illustrates a time deinterleaving method according to an embodiment of the present invention. In FIG. 19, a detailed operation of the time deinterleaving step S18030 of FIG. 18 will be described according to whether the extended interleaving mode is applied.

The broadcast signal receiver may determine whether the extended interleaving mode is applied (S19031). According to an embodiment, the broadcast signal receiver may determine whether the extended interleaving mode is applied to the corresponding PLP data based on the extended interleaving mode information included in the PLS information.

When the extended interleaving mode is applied, the broadcast signal receiver may reconfigure the TDI memory (S19032). In one embodiment, the broadcast signal receiver may reconstruct the TDI memory by determining the bit resolution for time deinterleaving and reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution. The reconstructed TDI memory structure has been specifically described with reference to FIGS. 16 to 17.

When the extended interleaving mode is not applied, the broadcast signal receiver may use a default TDI memory structure without reconfiguring the TDI memory. The difference between the basic TDI memory and the reconstructed TDI memory has been described with reference to FIG. 16 in particular.

The broadcast signal receiver may perform time deinterleaving according to the TI mode (S19033). As described above, the broadcast signal receiver may operate in the CTD mode or the HTD mode. The broadcast signal receiver may acquire TI mode information included in the PLS information. The TI mode information indicates whether the time interleaving mode for the corresponding PLP is a CTI mode or an HTI mode. Accordingly, the broadcast signal receiver may decode L1 detail information to obtain TI mode information on the corresponding PLP, and operate the time deinterleaver in the CTD mode or the HTD mode according to the TI mode information. In this case, the CTD mode may be referred to as a CTI mode and the HTD mode may be referred to as an HTI mode. Hereinafter, operations in which the broadcast signal receiver performs time deinterleaving according to the TI mode will be described according to whether the extended interleaving mode is applied.

When the extended interleaving mode is applied, the broadcast signal receiver may perform time deinterleaving according to the TI mode using the reconfigured TDI memory. In this case, the broadcast signal receiver quantizes the PLP data such that the size of each of the data cells of the PLP data is reduced based on the determined bit resolution, and quantizes the quantized PLP data using the reconstructed TDI memory according to the TI mode. Time deinterleaving is possible. Through this, the broadcast signal receiver may perform time deinterleaving by writing and reading each data cell of quantized PLP data to each memory unit of the reconfigured TDI memory.

When the TI mode is the CTI mode, the broadcast signal receiver may deinterleave the sequence of cells of the PLP data using the convolutional deinterleaver as described above. When the TI mode is the HTI mode, the broadcast signal receiver may sequentially deinterleave the PLP data using a CDL, a twisted block deinterleaver, and a cell deinterleaver. The CDL may perform the above-described inter-subframe deinterleaving. The twisted block deinterleaver may perform the above-described intra-subframe deinterleaving. The cell deinterleaver may deinterleave cells within the FEC block as described above. A method of performing time deinterleaving in the CTI mode or the HTI mode has been described in detail with reference to FIGS. 1 to 13.

In this case, deinterleaving using the CDL and the cell deinterleaver may be performed selectively depending on whether interleaving using the cell interleaver and the CDL interleaver is performed in the broadcast signal transmitter. Whether such cell deinterleaving and CDL deinterleaving is performed may be signaled as TI mode parameter information in the PLS information. In one embodiment, the broadcast signal receiver may perform constellation demapping between twisted block deinterleaving and cell deinterleaving. In this case, the PLP data may be represented as a bit word rather than a cell. In another embodiment, constellation demapping may be performed after the time deinterleaving operation is completed.

When the extended interleaving mode is not applied, the broadcast signal receiver may perform time deinterleaving according to the TI mode using the basic TDI memory. In this case, the broadcast signal receiver may not quantize the PLP data. The time deinterleaving method according to the TI mode is as described above.

20 illustrates a time deinterleaving method when the extended interleaving mode is applied according to an embodiment of the present invention.

The broadcast signal receiver may acquire PLS information (S20010). The broadcast signal receiver may obtain PLS information from the signal frame. The PLS information may include the above-described extended interleaving mode information, TI mode information, and TI mode parameter information.

The broadcast signal receiver may determine whether the extended interleaving mode is applied (S20020). According to an embodiment, the broadcast signal receiver may determine whether the extended interleaving mode is applied to the corresponding PLP data based on the extended interleaving mode information included in the PLS information.

When the extended interleaving mode is applied, the broadcast signal receiver may determine a bit resolution for time deinterleaving (S20030) and reconfigure the TDI memory based on the determined bit resolution (S20040). The steps S20030 and S20040 may be collectively referred to as a step of reconfiguring the TDI memory, which may be a step corresponding to step 19032 of FIG. 19. In one embodiment, the broadcast signal receiver may reconstruct the TDI memory by reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution. The reconstructed TDI memory structure has been specifically described with reference to FIGS. 16 to 17.

When the extended interleaving mode is not applied, the broadcast signal receiver may not perform the step of reconfiguring the above-described TDI memory. In this case, the broadcast signal receiver may perform time deinterleaving using the above-described basic TDI memory.

The broadcast signal receiver may determine whether the TI mode is the HTI mode (S20050).

When the TI mode is the HTI mode, the broadcast signal receiver may perform each of the following steps.

First, the broadcast signal receiver may determine whether CDL is used (S20060). That is, the broadcast signal receiver may determine whether interleaving (CDL interleaving) using CDL is performed in the broadcast signal transmitter. In one embodiment, the broadcast signal receiver may determine whether the CDL is used based on the TI mode parameter information (eg, HTI mode parameter information) in the above-described PLS information.

When CDL is used, the broadcast signal receiver may perform CDL deinterleaving on PLP data (S20070). When CDL is not used, the broadcast signal receiver may not perform CDL deinterleaving. CDL deinterleaving may be performed in the reverse process of CDL interleaving as described above.

The broadcast signal receiver may perform twisted block deinterleaving on the PLP data (S20080). Twisted block deinterleaving has been described in particular with reference to FIGS. 7 to 13.

The broadcast signal receiver may perform constellation demapping on the PLP data (S20090). In one embodiment, the broadcast signal receiver may perform constellation demapping between twisted block deinterleaving and cell deinterleaving. In another embodiment, constellation demapping may be performed after the time deinterleaving operation is completed.

The broadcast signal receiver may determine whether the cell interleaver is used (S20100). That is, the broadcast signal receiver may determine whether interleaving (cell interleaving) using the cell interleaver is performed in the broadcast signal transmitter. In one embodiment, the broadcast signal receiver may determine whether the cell interleaver is used based on the TI mode parameter information (eg, HTI mode parameter information) in the above-described PLS information.

When the cell interleaver is used, the broadcast signal receiver may perform cell deinterleaving on PLP data (S20070). When the cell interleaver is not used, the broadcast signal receiver may not perform cell deinterleaving. In one embodiment, cell deinterleaving may be performed in the reverse process of cell interleaving.

If the TI mode is not the HTI mode, the broadcast signal receiver may determine whether the TI mode is the CTI mode (S20120). If the TI mode is the CTI mode, the broadcast signal receiver may perform convolutional deinterleaving on the PLP data (S20130). In this case, the broadcast signal receiver may deinterleave the sequence of cells of the PLP data using the convolutional deinterleaver as described above. If the TI mode is not the CTI mode, the broadcast signal receiver may not perform the above time deinterleaving process.

The broadcast signal receiver may perform bit interleaving on the PLP data and perform FEC decoding (S20140).

Each of the steps described in the above embodiments may be performed by hardware / processors. Each module / block / unit described in the above embodiments can operate as a hardware / processor. In addition, the methods proposed by the present invention can be executed as code. This code can be written to a processor readable storage medium and thus read by a processor provided by an apparatus.

For convenience of description, the drawings are divided and described, but the embodiments described in each drawing may be merged to implement a new embodiment. Apparatus and method according to the present invention is not limited to the configuration and method of the embodiments described as described above, the above-described embodiments may be selectively all or part of each embodiment so that various modifications can be made It may be configured in combination.

On the other hand, it is possible to implement the method proposed by the present invention as a processor-readable code in a processor-readable recording medium provided in a network device. The processor-readable recording medium includes all kinds of recording devices that store data that can be read by the processor. Examples of the processor-readable recording medium include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, and the like, and may also be implemented in the form of a carrier wave such as transmission over the Internet. . The processor-readable recording medium can also be distributed over network coupled computer systems so that the processor-readable code is stored and executed in a distributed fashion.

In addition, although the preferred embodiment of the present invention has been shown and described above, the present invention is not limited to the above-described specific embodiment, the technical field to which the invention belongs without departing from the spirit of the invention claimed in the claims. Of course, various modifications can be made by those skilled in the art, and these modifications should not be individually understood from the technical spirit or the prospect of the present invention.

It is understood by those skilled in the art that various changes and modifications can be made in the present invention without departing from the spirit or scope of the invention. Accordingly, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Reference is made herein to both apparatus and method inventions, and the descriptions of both apparatus and method inventions may be complementary to one another.

Various embodiments have been described in the best mode for carrying out the invention.

The present invention is used in the field of providing a series of broadcast signals.

It will be apparent to those skilled in the art that various changes and modifications can be made in the present invention without departing from the spirit or scope of the invention. Accordingly, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims (14)

Synchronizing and demodulating the received broadcast signal with Orthgonal Frequency Division Multiplexing (OFDM); Parsing a signal frame of the received broadcast signal; Time deinterleaving PLP (Physical Layer Pipe) data included in the signal frame; Forward error correction (FEC) decoding the PLP data; And Output formatting the PLP data and outputting a data stream; The time deinterleaving includes: Determining whether an extended interleaving mode has been applied for the PLP data; Reconfiguring a time deinterleaving (TDI) memory when the extended interleaving mode is applied to the PLP data; And Time deinterleaving the PLP data using the reconstructed TDI memory. The method of claim 1, The method for receiving the broadcast signal is: Obtaining physical layer signaling (PLS) information included in the signal frame; Determining whether the extended interleaving mode has been applied to the PLP data comprises: based on the extended interleaving mode information included in the PLS information, whether the extended interleaving mode has been applied to the PLP data. A method of receiving a broadcast signal, determining whether or not. The method of claim 1, Reconfiguring the TDI memory includes: Determining a bit resolution for the time deinterleaving; And Reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution. The method of claim 3, wherein Time deinterleaving the PLP data using the reconstructed TDI memory may include: Quantizing the PLP data such that the size of each of the data cells of the PLP data is reduced based on the determined bit resolution; And Time deinterleaving the quantized PLP data according to a TI mode using the reconstructed TDI memory. The method of claim 4, wherein The TI mode is a convolutional time interleaving (CTI) mode or a hybrid time interleaving (HTI) mode. The PLS information includes TI mode information indicating the TI mode. The method of claim 4, wherein De-interleaving the quantized PLP data according to a TI mode using the reconstructed TDI memory, Time deinterleaving the increased number of data cells by the number of memory units increased according to the reduced memory unit size while using the same memory size as the TDI memory before reconstruction. The method of claim 1, The extended interleaving mode is applied only when the PLP data is modulated in a quaternary phased shift keying (QPSK) scheme. A synchronization and demodulation unit for synchronizing a received broadcast signal and an Orthgonal Frequency Division Multiplexing (OFDM); A parsing unit for parsing a signal frame of the received broadcast signal; A time deinterleaver for time deinterleaving PLP (Physical Layer Pipe) data included in the signal frame; A demapping and decoding unit for decoding the PLP data with Forward Error Correction (FEC); And An output processor for output formatting the PLP data and outputting a data stream, The time deinterleaver is, Determine whether an extended interleaving mode has been applied for the PLP data, If the extended interleaving mode is applied to the PLP data, reconfigure a time deinterleaving (TDI) memory, and And time deinterleaving the PLP data using the reconstructed TDI memory. The method of claim 8, The time deinterleaver is, And determining whether an extended interleaving mode is applied to the PLP data based on extended interleaving mode information in PLS information included in the signal frame. The method of claim 8, Reconfiguring the TDI memory is: Determining a bit resolution for the time deinterleaving; And Reducing the size of each of the memory units included in the TDI memory based on the determined bit resolution. The method of claim 10, Time deinterleaving the PLP data using the reconstructed TDI memory includes: Quantizing the PLP data such that the size of each of the data cells of the PLP data is reduced based on the determined bit resolution; And And time deinterleaving the quantized PLP data according to TI mode using the reconstructed TDI memory. The method of claim 11, The TI mode is a convolutional time interleaving (CTI) mode or a hybrid time interleaving (HTI) mode. The PLS information includes TI mode information indicating the TI mode. The method of claim 10, Time deinterleaving the quantized PLP data according to the TI mode using the reconstructed TDI memory increases with the size of the reduced memory unit, using the same memory size as the TDI memory before reconstruction. And time deinterleaving the increased number of data cells by the number of memory units being. The method of claim 8, The extended interleaving mode is applied only when the PLP data is modulated in a quaternary phased shift keying (QPSK) scheme.

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