WO2017118206A1 - Pixel structure, driving method therefor, organic electroluminescent display panel, and display device - Google Patents
Pixel structure, driving method therefor, organic electroluminescent display panel, and display device Download PDFInfo
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- WO2017118206A1 WO2017118206A1 PCT/CN2016/104973 CN2016104973W WO2017118206A1 WO 2017118206 A1 WO2017118206 A1 WO 2017118206A1 CN 2016104973 W CN2016104973 W CN 2016104973W WO 2017118206 A1 WO2017118206 A1 WO 2017118206A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G09G2300/04—Structural and physical details of display devices
- G09G2300/0439—Pixel structures
- G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
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- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
Definitions
- OLED displays are one of the hotspots in the field of flat panel display research. Compared with Liquid Crystal Display (LCD), OLED display has the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response. Therefore, at present, in the display field of mobile phones and digital cameras, OLED displays Has begun to replace the traditional LCD. In the OLED display, the pixel compensation circuit design for controlling the illumination of the light-emitting device is the core technical content of the OLED display, and has important research significance.
- the OLED display includes a plurality of pixel regions, each of the pixel regions including a light emitting device and a pixel compensation circuit for driving the light emitting device to be correspondingly connected to the light emitting device.
- the pixel compensation circuit includes, for example, a compensation module and a control module for supplying a power supply voltage and a reference signal to the compensation module, each of which includes, for example, a plurality of switching transistors. Therefore, in an OLED display, such a pixel compensation circuit occupies a large area in a pixel region, thereby lowering the pixel aperture ratio of the OLED display.
- Embodiments of the present invention provide a pixel structure, a driving method thereof, an organic electroluminescence display panel, and a display device, which can simplify each pixel by sharing a plurality of pixel compensation circuits with the same voltage input control circuit and the same potential conversion circuit.
- the structure of the compensation circuit is to increase the aperture ratio of the pixel region.
- Embodiments of the present invention provide a pixel structure including N light emitting devices, a first power terminal, a second power terminal, a reference signal terminal, a first potential conversion terminal, a second potential conversion terminal, a charging control terminal, and an illumination control And a potential input circuit, a voltage input control circuit, and a pixel compensation circuit connected in one-to-one correspondence with the first ends of the respective light-emitting devices; wherein N is a positive integer greater than zero.
- the potential conversion circuit includes a first input terminal, a second input terminal, a third input terminal, a first control terminal, a second control terminal, a first output terminal, and a second output terminal, and the first input of the potential conversion circuit
- the terminal is connected to the first power terminal
- the second input terminal is connected to the second power terminal
- the third input terminal is connected to the reference signal terminal
- the first control terminal is connected to the first potential conversion terminal
- the second control terminal is coupled to the second potential terminal.
- the first output end is connected to each of the pixel compensation circuits, and the second output end is connected to the second end of each of the light emitting devices;
- the potential conversion circuit is configured to be under the control of the first potential conversion end Supplying a voltage of the first power supply terminal to each of the light emitting devices, and simultaneously supplying a voltage of the reference signal terminal to each of the pixel compensation circuits, and controlling the second power supply end under the control of the second potential conversion end Voltages are supplied to each of the light emitting devices and each of the pixel compensation circuits.
- the voltage input control circuit includes an input end, a first output end, a second output end, a first control end, and a second control end, and an input end of the voltage input control circuit is connected to the first power supply end, first The output end and the second output end are respectively connected to each of the pixel compensation circuits, the first control end is connected to the charging control end, and the second control end is connected to the illumination control end; the voltage input control circuit is configured to be in the charging The voltage of the first power supply terminal is supplied to each of the pixel compensation circuits under control of the control terminal to charge each of the pixel compensation circuits, and the voltage of the first power supply terminal is supplied to each under the control of the light emission control terminal The pixel compensation circuit controls the pixel compensation circuit to drive the light emitting device to emit light.
- the embodiment of the invention further provides a driving method for the above pixel structure, which comprises: a charging phase, a discharging phase, a holding phase and a lighting phase.
- the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and simultaneously supplies the voltage of the reference signal terminal Providing a second node in each of the pixel compensation circuits;
- the voltage input control circuit provides a voltage of the first power supply terminal to a first node in each of the pixel compensation circuits under the control of the charge control terminal;
- the compensation control module implements charging under the common control of the first node and the second node.
- the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and simultaneously supplies the voltage of the reference signal terminal Giving a second node in each of said pixel compensation circuits;
- said data writing module is The signal of the data signal end is supplied to the first end of the drive control module under the control of the scan signal end;
- the compensation control module causes the first node and the drive control under the control of the compensation control end
- the first end of the module is turned on, and the threshold voltage of the drive control module and the voltage of the first end of the drive control module are stored in the first node.
- the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of the light emitting device and the first of the pixel compensation circuits respectively under the control of the second potential conversion end Two nodes.
- the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of each of the light emitting devices and each of the pixel compensation circuits under the control of the second potential conversion end a second node;
- the voltage input control circuit supplies the voltage of the first power terminal to the third end of the drive control module in each of the pixel compensation circuits under the control of the illumination control terminal;
- the drive control module is The light emitting device emits light under the control of the first node and the third end of the drive control module.
- the embodiment of the invention further provides a display device comprising the above-mentioned organic electroluminescent display panel provided by the embodiment of the invention.
- 1a is a schematic structural diagram of a pixel structure according to an embodiment of the present invention.
- FIG. 1b is a second schematic structural diagram of a pixel structure according to an embodiment of the present disclosure.
- 2b is a second schematic structural diagram of a pixel structure according to an embodiment of the present disclosure.
- 3a is a third schematic structural diagram of a pixel structure according to an embodiment of the present invention.
- FIG. 3b is a fourth schematic diagram of a specific structure of a pixel structure according to an embodiment of the present disclosure.
- 4a is a circuit timing diagram of the pixel structure provided in FIG. 2b;
- Figure 4b is a circuit timing diagram of the pixel structure provided in Figure 3b;
- FIG. 5 is a schematic structural diagram of a pixel structure in an organic electroluminescence display panel according to an embodiment of the present invention.
- the first input terminal 3a of the potential conversion circuit 3 is connected to the first power supply terminal VDD, the second input terminal 3b is connected to the second power supply terminal VSS, and the third input terminal 3c is connected to the reference signal terminal Ref.
- the first control terminal 3d and the A potential conversion terminal E1 is connected, a second control terminal 3e is connected to the second potential conversion terminal E2, a first output terminal 3f is connected to each pixel compensation circuit 2_n, and a second output terminal 3g is connected to the second terminal 1b of each of the light emitting devices 1_n.
- the potential conversion circuit 3 is configured to supply the voltage of the first power supply terminal VDD to the respective light emitting devices 1_n under the control of the first potential conversion terminal E1, and supply the voltage of the reference signal terminal Ref to each of the pixel compensation circuits 2_n.
- the voltage of the second power supply terminal VSS is supplied to each of the light-emitting devices 1_n and the respective pixel compensation circuits 2_n under the control of the two-potential conversion terminal E2.
- the input terminal 4a of the voltage input control circuit 4 is connected to the first power supply terminal VDD, and the first output terminal 4b and the second output terminal 4c are respectively connected to the respective pixel compensation circuits 2_n (as shown in FIG. 1a, each pixel compensation circuit 2_n is Connecting the first output terminal 4b and the second output terminal 4c), the first control terminal 4d is connected to the charging control terminal DC, the second control terminal 4e is connected to the lighting control terminal EM, and the voltage input control circuit 4 is used at the charging control terminal DC.
- the voltage of the first power supply terminal VDD is supplied to each pixel compensation circuit 2_n to charge each pixel compensation circuit 2_n, and the voltage of the first power supply terminal VDD is supplied to each pixel compensation circuit under the control of the light emission control terminal EM. 2_n, the light-emitting device 1_n is driven to emit light by the control pixel compensation circuit 2_n.
- the voltage of the first power terminal VDD and the voltage of the reference signal terminal Ref are both higher than the voltage of the second power terminal VSS.
- the pixel structure provided by the embodiment of the present invention includes N (N is a positive integer greater than 0) light-emitting devices, a pixel compensation circuit connected in one-to-one correspondence with each light-emitting device, and a potential conversion circuit and a voltage input control circuit;
- N is a positive integer greater than 0
- the pixel structure provided by the embodiment of the invention can realize that a plurality of pixel compensation circuits are connected to the same potential conversion circuit and the same voltage input control circuit, which is equivalent to making a plurality of pixel compensation circuits share one potential conversion circuit and one voltage input control circuit.
- each pixel compensation circuit includes a control module for controlling the input voltage of the power supply voltage and the reference signal
- the structure of each pixel compensation circuit can be simplified, thereby reducing the occupied area of the pixel compensation circuit in the pixel region, and further Increase the aperture ratio of each pixel area.
- the data writing module 21 has a first end 21a connected to the scanning signal end Sc, a second end 21b connected to the data signal end Da, and a third end 21c respectively connected to the first end 23a of the driving control module 23 and the light emitting device 1_1. One end 1a is connected; the data writing module 21 is for supplying the signal of the data signal terminal Da to the first end 23a of the drive control module 23 under the control of the scanning signal terminal Sc.
- the compensation control module 22 has a first end 22a connected to the compensation control end EC, and a second end 22b respectively connected to the first output end 4b of the voltage input control circuit 4, the second end 23b of the drive control module 23, and the connection voltage input control circuit
- the first output terminal 4b of 4 is connected to the first node A of the second terminal 23b of the drive control module 23, and the third terminal 22c is respectively connected to the second output terminal 4c of the voltage input control circuit 4 and the third terminal of the drive control module 23.
- the driving control module 23 is configured to drive the light-emitting device 1_1 corresponding to the pixel compensation circuit 2_1 to emit light under the control of the first node A and the second output terminal 4c of the voltage input control circuit 4.
- the pixel compensation circuit can cooperate with the three modules of the data writing module, the compensation control module and the driving control module to enable the driving control module in each pixel compensation circuit to drive the operating current of the light emitting device to emit only the voltage and reference signal of the data signal end.
- the voltage at the terminal is independent of the threshold voltage in the drive control module and the voltage at the first power supply terminal, which can avoid the influence of the threshold voltage and the voltage drop (IR Drop) on the current flowing through the light emitting device, thereby maintaining the operating current for driving the light emitting device to emit light. Stable, it can improve the uniformity of the brightness of the display area in the display device.
- the potential conversion circuit 3 may include a first conversion module 31 and a second conversion module 32.
- the second conversion module 32 is respectively connected to the second power terminal VSS, the second potential conversion terminal E2, the first output terminal 3f of the potential conversion circuit 3, and the second output terminal 3g of the potential conversion circuit 3;
- the voltage of the second power supply terminal VSS is supplied to each of the light-emitting devices 1_1 and the respective pixel compensation circuits 2_1 under the control of the second potential conversion terminal E2.
- the light emitting device in the above pixel structure provided by the embodiment of the present invention is an organic electroluminescent diode.
- the light emitting device realizes light emission under the action of the saturation current of the driving transistor.
- the first conversion module 31 may include: a first switching transistor M1 and a second switching transistor M2; a gate of the first switching transistor M1
- the pole M11 is connected to the first potential conversion terminal E1
- the source M12 is connected to the first power terminal VDD
- the drain M13 is connected to the second output terminal 3g of the potential conversion circuit 3
- the gate M21 of the second switching transistor M2 is first.
- the potential conversion terminal E1 is connected
- the source M22 is connected to the reference signal terminal Ref
- the drain M23 is connected to the first output terminal 3f of the potential conversion circuit 3.
- the first switching transistor M1 and the second switching transistor M2 may be N-type switching transistors; or, as shown in FIG. 3a and FIG. 3b. It is to be noted that the first switching transistor M1 and the second switching transistor M2 may also be P-type switching transistors, which are not limited herein.
- the above is only a specific structure of the first conversion module in the pixel structure.
- the specific structure of the first conversion module is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. Not limited.
- the second conversion module 32 may include: a third switching transistor M3 and a fourth switching transistor M4; a gate M31 of the third switching transistor M3 is connected to the second potential conversion terminal E2, and a source M32 is connected to the second power terminal VSS, and the drain
- the pole M33 is connected to the second output terminal 3g of the potential conversion circuit 3; the gate M41 of the fourth switching transistor M4 is connected to the second potential conversion terminal E2, the source M42 is connected to the second power supply terminal VSS, and the drain M43 is connected to the potential The first output 3f of the circuit 3 is connected.
- the third switching transistor M3 and the fourth switching transistor M4 may be P-type switching transistors; or, as shown in FIG. 3a and FIG. 3b.
- the third switching transistor M3 and the fourth switching transistor M4 may also be N-type switching transistors, which are not limited herein.
- the above is only a specific structure of the second conversion module in the pixel structure.
- the specific structure of the second conversion module is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. Not limited.
- the first switching transistor M1 and the second switching transistor M2 are N-type switching transistors
- the transistor M4 is a P-type switching transistor; or, as shown in FIG. 3b, the first switching transistor M1 and the second switching transistor M2 are P-type switching transistors, and the third switching transistor M3 and the fourth switching transistor M4 are N-type switching transistors.
- the first potential conversion terminal E1 and the second potential conversion terminal E2 can be set to the same signal terminal, which can reduce the number of signal lines, thereby further increasing the aperture ratio of the pixel region.
- the voltage input control circuit 4 includes: a fifth switching transistor M5 and a sixth switching transistor M6; and a gate of the fifth switching transistor M5.
- M51 is connected to the charging control terminal DC
- the source M52 is connected to the first power terminal VDD
- the drain M53 is connected to the first output terminal 4b of the voltage input control circuit 4
- the gate M61 of the sixth switching transistor M6 is connected to the illumination control terminal EM.
- the source M62 is connected to the first power terminal VDD
- the drain M63 is connected to the second output terminal 4c of the voltage input control circuit 4.
- the fifth switching transistor M5 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the fifth switching transistor M5 can also be a P-type switching transistor, which is not limited herein.
- the sixth switching transistor M6 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, The sixth switching transistor M6 may also be a P-type switching transistor, which is not limited herein.
- the data writing module 21 may include a seventh switching transistor M7; the gate M71 of the seventh switching transistor M7 and the scanning signal end Sc Connected, the source M72 is connected to the data signal terminal Da, and the drain M73 is connected to the first end 1a of the light emitting device 1_1.
- the seventh switching transistor M7 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the seventh switching transistor M7 can also be a P-type switching transistor, which is not limited herein.
- the compensation control module 22 includes: an eighth switching transistor M8 and a capacitor C; a gate M81 of the eighth switching transistor M8 and a compensation control
- the terminal EC is connected, the source M82 is connected to the second output terminal 4c of the voltage input control circuit 4, the drain M83 is connected to the first node A, and the capacitor C is connected between the first node A and the second node B.
- the eighth switching transistor M8 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the eighth switching transistor M8 can also be a P-type switching transistor, which is not limited herein.
- the driving transistor and the switching transistor may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Scmiconductor). ), here is not limited.
- TFT thin film transistor
- MOS metal oxide semiconductor field effect transistor
- the sources and drains of these transistors can be interchanged without specific distinction.
- the case where the driving transistor and the switching transistor are both thin film transistors will be described as an example.
- the third switching transistor M3 and the fourth switching transistor M4 are both P-type switching transistors, and the remaining switching transistors are all N-type switching transistors; the voltage of the second power supply terminal VSS is As an example, the corresponding input/output timing diagram is as shown in FIG. 4a, and includes four stages: a charging phase T1, a discharging phase T2, a holding phase T3, and a lighting phase T4.
- the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, and the seventh switching transistor M7 are all turned on; the third switching transistor M3, the fourth switching transistor M4, the sixth switching transistor M6, and the eighth switching transistor M8 Both are closed.
- the fifth switching transistor M5 that is turned on will be the first power terminal
- the turned-on seventh switching transistor M7 Writing a low potential voltage of the data signal terminal Da to the first end of the light emitting device 1_1, and turning on the first switching transistor M1 to write the voltage V dd of the first power terminal VDD to the second end of the light emitting
- the third switching transistor M3 and the fourth switching transistor M4 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed.
- the turned-on third switching transistor M3 writes the voltage 0 of the second power supply terminal V2 to the second end of the light emitting device 1_1, and the source of the driving transistor M0 has no voltage writing, so the light emitting device 1_1 does not emit light;
- the switching transistor M3 writes the voltage 0 of the second power terminal V2 to the second node B, that is, the second terminal c2 of the capacitor C, so that the voltage of the second terminal c2 of the capacitor C changes from V ref to 0, according to the principle of conservation of capacitance In order to ensure that the voltage difference between the two ends of the first capacitor C1 is still V data +V th -V ref , the voltage of the first end c1 of the capacitor C jumps from V data +V th to V data +
- the third switching transistor M3, the fourth switching transistor M4, and the sixth switching transistor M6 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed.
- the turned-on third switching transistor M3 writes the voltage 0 of the second power supply terminal V2 to the second end of the light emitting device 1_1 and the second node B, that is, the second end c2 of the capacitor C, so that the second end c2 of the capacitor C
- the voltage is still 0;
- the turned-on sixth switching transistor M6 writes the voltage V dd of the first power terminal VDD to the source of the driving transistor M0; since the driving transistor M0 operates in a saturated state, according to the saturation state current characteristic, it flows
- the gate-source voltage V gs V data + V th - V ref of the driving transistor M0.
- the driving current of the driving transistor M0 is only related to the voltage V data voltage V ref and the data signal terminal Da of the reference signal terminal Ref, and with the threshold voltage V th and the first supply terminal of the driving transistor M0 voltage V dd Irrelevantly, the drift of the threshold voltage Vth due to the process of the driving transistor M0 and the long-time operation, and the influence of the IR Drop on the current flowing through the light-emitting device are solved, thereby keeping the operating current of the light-emitting device 1_1 stable, thereby ensuring The normal operation of the light emitting device 1_1.
- each P-type switching transistor acts at a low potential The lower conduction is turned off under the action of high potential; each N-type switching transistor is turned on under the action of high potential, and is cut off under the action of low potential; taking the voltage of the second power supply terminal as 0V as an example, the corresponding input and output timing diagram is as shown in the figure 4b, including: charging phase T1, discharging phase T2, the holding phase T3 and the lighting phase T4 are in four stages.
- the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, and the seventh switching transistor M7 are all turned on; the third switching transistor M3, the fourth switching transistor M4, the sixth switching transistor M6, and the eighth switching transistor M8 Both are closed.
- the fifth switching transistor M5 that is turned on will be the first power terminal
- the turned-on seventh switching transistor M7 Writing a low potential voltage of the data signal terminal Da to the first end of the light emitting device 1_1, and turning on the first switching transistor M1 to write the voltage V dd of the first power terminal VDD to the second end of the light emitting
- the third switching transistor M3 and the fourth switching transistor M4 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed.
- the turned-on third switching transistor M3 writes the voltage 0 of the second power supply terminal V2 to the second end of the light emitting device 1_1, and the source of the driving transistor M0 has no voltage writing, so the light emitting device 1_1 does not emit light;
- the switching transistor M3 writes the voltage 0 of the second power terminal V2 to the second node B, that is, the second terminal c2 of the capacitor C, so that the voltage of the second terminal c2 of the capacitor C changes from V ref to 0, according to the principle of conservation of capacitance In order to ensure that the voltage difference between the two ends of the first capacitor C1 is still V data +V th -V ref , the voltage of the first end c1 of the capacitor C jumps from V data +V th to V data +
- the third switching transistor M3, the fourth switching transistor M4, and the sixth switching transistor M6 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed.
- the turned-on third switching transistor M3 writes the voltage 0 of the second power supply terminal V2 to the second end of the light emitting device 1_1 and the second node B, that is, the second end c2 of the capacitor C, so that the second end c2 of the capacitor C
- the voltage is still 0;
- the turned-on sixth switching transistor M6 writes the voltage V dd of the first power terminal VDD to the source of the driving transistor M0; since the driving transistor M0 operates in a saturated state, according to the saturation state current characteristic, it flows
- the potential conversion circuit supplies the voltage of the first power terminal to the second end of each light emitting device under the control of the first potential converting end, and supplies the voltage of the reference signal terminal to the second node in each pixel compensation circuit;
- the input control circuit supplies the voltage of the first power terminal to the first node in each pixel compensation circuit under the control of the charging control terminal;
- the data writing module provides the signal of the data signal terminal to the first of the driving control module under the control of the scanning signal terminal And the first end of the light emitting device;
- the driving control module turns on the first end and the third end of the driving control module under the control of the compensation control end; the compensation control module realizes charging under the common control of the first node and the second node.
- the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and supplies the voltage of the reference signal terminal to each pixel.
- a second node in the circuit the data writing module provides the signal of the data signal end to the first end of the driving control module and the first end of the light emitting device under the control of the scanning signal end; the compensation control module is controlled under the control of the compensation control end
- the first node is electrically connected to the first end of the driving control module, and stores the threshold voltage of the driving control module and the voltage of the first end of the driving control module at the first node.
- the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of the light emitting device and the second node of each pixel compensation circuit under the control of the second potential conversion end.
- the high potential of the voltage of the control signal for controlling the switching transistor in each pixel compensation circuit is 20V to 30V, and the low potential is -8V.
- the potential conversion circuit and the voltage input control circuit in each pixel structure may be fabricated on the array substrate, or may be fabricated in the peripheral circuit chip, and are not used herein. limited.
- the potential conversion circuit and the voltage input control circuit are fabricated in the peripheral circuit chip, the high potential of the voltage of the control signal for controlling each of the switching transistors is, for example, 3.3 V, and the low potential is, for example, 0 V.
- an embodiment of the present invention further provides a display device including the above-described organic electroluminescent display panel provided by the embodiment of the present invention.
- the display device may be a display, a mobile phone, a television, a notebook, an all-in-one, etc., and other essential components of the display device are understood by those of ordinary skill in the art, and will not be described herein. As a limitation of the invention.
- the embodiment of the invention provides a pixel structure, a driving method thereof, an organic electroluminescence display panel and a display device.
- the pixel structure comprises N light emitting devices, a pixel compensation circuit connected in one-to-one correspondence with each light emitting device, and a potential a conversion circuit and a voltage input control circuit; by connecting a plurality of pixel compensation circuits to the same potential conversion circuit and the same voltage input control circuit (in this case, N is a positive integer greater than or equal to 2), which is equivalent to Having a plurality of pixel compensation circuits share a potential conversion circuit and a voltage input control circuit, which simplifies each pixel as compared with a method in which each pixel compensation circuit includes a control module for controlling a power supply voltage and an input of a reference signal.
- the structure of the compensation circuit can thereby reduce the occupied area of the pixel compensation circuit in the pixel region (see the region 01 in FIG. 5), thereby increasing the aperture ratio of each pixel region.
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Abstract
Description
本发明实施例涉及一种像素结构、其驱动方法、有机电致发光显示面板及显示装置。Embodiments of the present invention relate to a pixel structure, a driving method thereof, an organic electroluminescence display panel, and a display device.
有机电致发光二极管(Organic Light Emitting Diode,OLED)显示器是当今平板显示器研究领域的热点之一。与液晶显示器(Liquid Crystal Display,LCD)相比,OLED显示器具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点,因此,目前,在手机、数码相机等显示领域,OLED显示器已经开始取代传统的LCD。在OLED显示器中,用于控制发光器件发光的像素补偿电路设计是OLED显示器的核心技术内容,具有重要的研究意义。Organic Light Emitting Diode (OLED) displays are one of the hotspots in the field of flat panel display research. Compared with Liquid Crystal Display (LCD), OLED display has the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response. Therefore, at present, in the display field of mobile phones and digital cameras, OLED displays Has begun to replace the traditional LCD. In the OLED display, the pixel compensation circuit design for controlling the illumination of the light-emitting device is the core technical content of the OLED display, and has important research significance.
例如,OLED显示器中包括多个像素区域,每个像素区域包括一个发光器件以及与该发光器件对应连接的一个用于驱动发光器件发光的像素补偿电路。像素补偿电路例如包括补偿模块以及用于向补偿模块提供电源电压以及参考信号的控制模块,各模块中例如包括多个开关晶体管。因此在OLED显示器中,这样的像素补偿电路会占用像素区域中较大的面积,从而使OLED显示器的像素开口率降低。For example, the OLED display includes a plurality of pixel regions, each of the pixel regions including a light emitting device and a pixel compensation circuit for driving the light emitting device to be correspondingly connected to the light emitting device. The pixel compensation circuit includes, for example, a compensation module and a control module for supplying a power supply voltage and a reference signal to the compensation module, each of which includes, for example, a plurality of switching transistors. Therefore, in an OLED display, such a pixel compensation circuit occupies a large area in a pixel region, thereby lowering the pixel aperture ratio of the OLED display.
发明内容Summary of the invention
本发明实施例提供了一种像素结构、其驱动方法、有机电致发光显示面板及显示装置,通过使多个像素补偿电路共用同一个电压输入控制电路以及同一个电位转换电路,可以简化各像素补偿电路的结构,以提高像素区域的开口率。Embodiments of the present invention provide a pixel structure, a driving method thereof, an organic electroluminescence display panel, and a display device, which can simplify each pixel by sharing a plurality of pixel compensation circuits with the same voltage input control circuit and the same potential conversion circuit. The structure of the compensation circuit is to increase the aperture ratio of the pixel region.
本发明实施例提供了一种像素结构,其包括N个发光器件、第一电源端、第二电源端、参考信号端、第一电位转换端、第二电位转换端、充电控制端、发光控制端、一个电位转换电路、一个电压输入控制电路、以及与各所述发光器件的第一端一一对应连接的像素补偿电路;其中,N为大于0的正整数。 Embodiments of the present invention provide a pixel structure including N light emitting devices, a first power terminal, a second power terminal, a reference signal terminal, a first potential conversion terminal, a second potential conversion terminal, a charging control terminal, and an illumination control And a potential input circuit, a voltage input control circuit, and a pixel compensation circuit connected in one-to-one correspondence with the first ends of the respective light-emitting devices; wherein N is a positive integer greater than zero.
所述电位转换电路包括第一输入端、第二输入端、第三输入端、第一控制端、第二控制端、第一输出端和第二输出端,所述电位转换电路的第一输入端与第一电源端相连,第二输入端与第二电源端相连,第三输入端与参考信号端相连,第一控制端与第一电位转换端相连,第二控制端与第二电位转换端相连,第一输出端与各所述像素补偿电路相连,第二输出端与各所述发光器件的第二端相连;所述电位转换电路被配置为在所述第一电位转换端的控制下将所述第一电源端的电压提供给各所述发光器件,同时将所述参考信号端的电压提供给各所述像素补偿电路,在所述第二电位转换端的控制下将所述第二电源端的电压分别提供给各所述发光器件和各所述像素补偿电路。The potential conversion circuit includes a first input terminal, a second input terminal, a third input terminal, a first control terminal, a second control terminal, a first output terminal, and a second output terminal, and the first input of the potential conversion circuit The terminal is connected to the first power terminal, the second input terminal is connected to the second power terminal, the third input terminal is connected to the reference signal terminal, the first control terminal is connected to the first potential conversion terminal, and the second control terminal is coupled to the second potential terminal. Connected to the end, the first output end is connected to each of the pixel compensation circuits, and the second output end is connected to the second end of each of the light emitting devices; the potential conversion circuit is configured to be under the control of the first potential conversion end Supplying a voltage of the first power supply terminal to each of the light emitting devices, and simultaneously supplying a voltage of the reference signal terminal to each of the pixel compensation circuits, and controlling the second power supply end under the control of the second potential conversion end Voltages are supplied to each of the light emitting devices and each of the pixel compensation circuits.
所述电压输入控制电路包括输入端、第一输出端、第二输出端、第一控制端和第二控制端,所述电压输入控制电路的输入端与所述第一电源端相连,第一输出端和第二输出端分别与各所述像素补偿电路相连,第一控制端与充电控制端相连,第二控制端与发光控制端相连;所述电压输入控制电路被配置为在所述充电控制端的控制下将所述第一电源端的电压提供给各所述像素补偿电路,以对各所述像素补偿电路充电,在所述发光控制端的控制下将所述第一电源端的电压提供给各所述像素补偿电路,以控制所述像素补偿电路驱动所述发光器件发光。The voltage input control circuit includes an input end, a first output end, a second output end, a first control end, and a second control end, and an input end of the voltage input control circuit is connected to the first power supply end, first The output end and the second output end are respectively connected to each of the pixel compensation circuits, the first control end is connected to the charging control end, and the second control end is connected to the illumination control end; the voltage input control circuit is configured to be in the charging The voltage of the first power supply terminal is supplied to each of the pixel compensation circuits under control of the control terminal to charge each of the pixel compensation circuits, and the voltage of the first power supply terminal is supplied to each under the control of the light emission control terminal The pixel compensation circuit controls the pixel compensation circuit to drive the light emitting device to emit light.
所述第一电源端的电压和所述参考信号端的电压均高于所述第二电源端的电压。The voltage of the first power terminal and the voltage of the reference signal terminal are both higher than the voltage of the second power terminal.
本发明实施例还提供了一种上述像素结构的驱动方法,其包括:充电阶段、放电阶段、保持阶段和发光阶段。The embodiment of the invention further provides a driving method for the above pixel structure, which comprises: a charging phase, a discharging phase, a holding phase and a lighting phase.
在所述充电阶段,所述电位转换电路在所述第一电位转换端的控制下将所述第一电源端的电压提供给各所述发光器件的第二端,同时将所述参考信号端的电压提供给各所述像素补偿电路中的第二节点;所述电压输入控制电路在所述充电控制端的控制下将所述第一电源端的电压提供给各所述像素补偿电路中的第一节点;所述补偿控制模块在所述第一节点和所述第二节点共同控制下实现充电。In the charging phase, the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and simultaneously supplies the voltage of the reference signal terminal Providing a second node in each of the pixel compensation circuits; the voltage input control circuit provides a voltage of the first power supply terminal to a first node in each of the pixel compensation circuits under the control of the charge control terminal; The compensation control module implements charging under the common control of the first node and the second node.
在所述放电阶段,所述电位转换电路在所述第一电位转换端的控制下将所述第一电源端的电压提供给各所述发光器件的第二端,同时将所述参考信号端的电压提供给各所述像素补偿电路中的第二节点;所述数据写入模块在 所述扫描信号端的控制下将所述数据信号端的信号提供给所述驱动控制模块的第一端;所述补偿控制模块在所述补偿控制端的控制下使所述第一节点与所述驱动控制模块的第一端导通,并将所述驱动控制模块的阈值电压以及所述驱动控制模块的第一端的电压均储存于所述第一节点。In the discharging phase, the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and simultaneously supplies the voltage of the reference signal terminal Giving a second node in each of said pixel compensation circuits; said data writing module is The signal of the data signal end is supplied to the first end of the drive control module under the control of the scan signal end; the compensation control module causes the first node and the drive control under the control of the compensation control end The first end of the module is turned on, and the threshold voltage of the drive control module and the voltage of the first end of the drive control module are stored in the first node.
在所述保持阶段,所述电位转换电路在所述第二电位转换端的控制下将所述第二电源端的电压分别提供给所述发光器件的第二端和各所述像素补偿电路中的第二节点。In the holding phase, the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of the light emitting device and the first of the pixel compensation circuits respectively under the control of the second potential conversion end Two nodes.
在所述发光阶段,所述电位转换电路在所述第二电位转换端的控制下将所述第二电源端的电压分别提供给各所述发光器件的第二端和各所述像素补偿电路中的第二节点;所述电压输入控制电路在所述发光控制端的控制下将所述第一电源端的电压提供给各所述像素补偿电路中的驱动控制模块的第三端;所述驱动控制模块在所述第一节点和所述驱动控制模块的第三端的控制下驱动所述发光器件发光。In the light emitting phase, the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of each of the light emitting devices and each of the pixel compensation circuits under the control of the second potential conversion end a second node; the voltage input control circuit supplies the voltage of the first power terminal to the third end of the drive control module in each of the pixel compensation circuits under the control of the illumination control terminal; the drive control module is The light emitting device emits light under the control of the first node and the third end of the drive control module.
本发明实施例还提供了一种有机电致发光显示面板,其包括呈矩阵排列的M列区域、以及与每行区域一一对应的本发明实施例提供的上述像素结构。各所述像素结构中发光器件的数量相等;M等于N;各所述像素结构中的发光器件和像素补偿电路均设置于对应行的区域中,且一个区域中设置一个发光器件以及与所述发光器件连接的一个像素补偿电路。The embodiment of the present invention further provides an organic electroluminescent display panel, which includes an M column region arranged in a matrix, and the pixel structure provided by the embodiment of the present invention corresponding to each row region. The number of the light emitting devices in each of the pixel structures is equal; M is equal to N; the light emitting device and the pixel compensation circuit in each of the pixel structures are disposed in a region of a corresponding row, and a light emitting device is disposed in one region and A pixel compensation circuit connected to the light emitting device.
本发明实施例还提供了一种显示装置,其包括本发明实施例提供的上述有机电致发光显示面板。The embodiment of the invention further provides a display device comprising the above-mentioned organic electroluminescent display panel provided by the embodiment of the invention.
为了更清楚地说明本发明实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例,而非对本发明的限制。In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly described below. It is obvious that the drawings in the following description relate only to some embodiments of the present invention, and are not intended to limit the present invention. .
图1a为本发明实施例提供的像素结构的结构示意图之一;1a is a schematic structural diagram of a pixel structure according to an embodiment of the present invention;
图1b为本发明实施例提供的像素结构的结构示意图之二;FIG. 1b is a second schematic structural diagram of a pixel structure according to an embodiment of the present disclosure;
图2a为本发明实施例提供的像素结构的具体结构示意图之一;2a is a schematic diagram of a specific structure of a pixel structure according to an embodiment of the present invention;
图2b为本发明实施例提供的像素结构的具体结构示意图之二;2b is a second schematic structural diagram of a pixel structure according to an embodiment of the present disclosure;
图3a为本发明实施例提供的像素结构的具体结构示意图之三; 3a is a third schematic structural diagram of a pixel structure according to an embodiment of the present invention;
图3b为本发明实施例提供的像素结构的具体结构示意图之四;FIG. 3b is a fourth schematic diagram of a specific structure of a pixel structure according to an embodiment of the present disclosure;
图4a为图2b提供的像素结构的电路时序图;4a is a circuit timing diagram of the pixel structure provided in FIG. 2b;
图4b为图3b提供的像素结构的电路时序图;Figure 4b is a circuit timing diagram of the pixel structure provided in Figure 3b;
图5为本发明实施例提供的有机电致发光显示面板中的像素结构的结构示意图。FIG. 5 is a schematic structural diagram of a pixel structure in an organic electroluminescence display panel according to an embodiment of the present invention.
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例的附图,对本发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于所描述的本发明的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions of the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings. It is apparent that the described embodiments are part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the described embodiments of the present invention without departing from the scope of the invention are within the scope of the invention.
除非另外定义,本公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。Unless otherwise defined, technical terms or scientific terms used in the present disclosure are intended to be in the ordinary meaning of those of ordinary skill in the art. The words "first," "second," and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. The word "comprising" or "comprises" or the like means that the element or item preceding the word is intended to be in the The words "connected" or "connected" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to indicate the relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may also change accordingly.
下面结合附图,对本发明实施例提供的像素结构、其驱动方法、有机电致发光显示面板及显示装置的具体实施方式进行详细的说明。The specific embodiments of the pixel structure, the driving method, the organic electroluminescent display panel and the display device provided by the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
本发明实施例提供的一种像素结构,如图1a所示,该像素结构包括N个发光器件1_n(n=1、2、3…N)、以及与各发光器件1_n的第一端1a一一对应连接的像素补偿电路2_n;该像素结构还包括第一电源端VDD、第二电源端VSS、参考信号端Ref、第一电位转换端E1、第二电位转换端E2、充电控制端DC、发光控制端EM、一个电位转换电路3和一个电压输入控制电路4。在该像素结构中,N为大于0的正整数,例如,N为大于或等于2的整数,以使多个像素补偿电路2_n共用一个电位转换电路3和一个电压输入
控制电路4。A pixel structure is provided in the embodiment of the present invention. As shown in FIG. 1a, the pixel structure includes N light emitting devices 1_n (n=1, 2, 3...N) and a first end 1a of each of the light emitting devices 1_n. a corresponding pixel compensation circuit 2_n; the pixel structure further includes a first power terminal VDD, a second power terminal VSS, a reference signal terminal Ref, a first potential conversion terminal E1, a second potential conversion terminal E2, a charging control terminal DC, The light-emitting control terminal EM, a
电位转换电路3的第一输入端3a与第一电源端VDD相连,第二输入端3b与第二电源端VSS相连,第三输入端3c与参考信号端Ref相连,第一控制端3d与第一电位转换端E1相连,第二控制端3e与第二电位转换端E2相连,第一输出端3f与各像素补偿电路2_n相连,第二输出端3g与各发光器件1_n的第二端1b相连;电位转换电路3用于在第一电位转换端E1的控制下将第一电源端VDD的电压提供给各发光器件1_n,同时将参考信号端Ref的电压提供给各像素补偿电路2_n,在第二电位转换端E2的控制下将第二电源端VSS的电压分别提供给各发光器件1_n和各像素补偿电路2_n。The first input terminal 3a of the
电压输入控制电路4的输入端4a与第一电源端VDD相连,第一输出端4b和第二输出端4c分别与各像素补偿电路2_n相连(如图1a所示,每个像素补偿电路2_n都连接第一输出端4b和第二输出端4c),第一控制端4d与充电控制端DC相连,第二控制端4e与发光控制端EM相连;电压输入控制电路4用于在充电控制端DC的控制下将第一电源端VDD的电压提供给各像素补偿电路2_n,以对各像素补偿电路2_n充电,在发光控制端EM的控制下将第一电源端VDD的电压提供给各像素补偿电路2_n,以控制像素补偿电路2_n驱动发光器件1_n发光。The
第一电源端VDD的电压和参考信号端Ref的电压均高于第二电源端VSS的电压。The voltage of the first power terminal VDD and the voltage of the reference signal terminal Ref are both higher than the voltage of the second power terminal VSS.
本发明实施例提供的上述像素结构包括N(N为大于0的正整数)个发光器件、与各发光器件一一对应连接的像素补偿电路、以及一个电位转换电路和一个电压输入控制电路;本发明实施例提供的像素结构可以实现多个像素补偿电路均连接同一个电位转换电路以及同一个电压输入控制电路,相当于使多个像素补偿电路共用一个电位转换电路和一个电压输入控制电路,这与各像素补偿电路中均包括一个用于控制电源电压以及参考信号的输入的控制模块的方式相比,可以简化各像素补偿电路的结构,从而可以降低像素区域中像素补偿电路的占用面积,进而提高每个像素区域的开口率。The pixel structure provided by the embodiment of the present invention includes N (N is a positive integer greater than 0) light-emitting devices, a pixel compensation circuit connected in one-to-one correspondence with each light-emitting device, and a potential conversion circuit and a voltage input control circuit; The pixel structure provided by the embodiment of the invention can realize that a plurality of pixel compensation circuits are connected to the same potential conversion circuit and the same voltage input control circuit, which is equivalent to making a plurality of pixel compensation circuits share one potential conversion circuit and one voltage input control circuit. Compared with the manner in which each pixel compensation circuit includes a control module for controlling the input voltage of the power supply voltage and the reference signal, the structure of each pixel compensation circuit can be simplified, thereby reducing the occupied area of the pixel compensation circuit in the pixel region, and further Increase the aperture ratio of each pixel area.
例如,在本发明实施例提供的上述像素结构中,如图1b所示(以N等于1为例),像素补偿电路2_1包括:数据写入模块21,补偿控制模块22和驱动控制模块23。
For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 1b (taking N equal to 1 as an example), the pixel compensation circuit 2_1 includes a
数据写入模块21,其第一端21a与扫描信号端Sc相连,第二端21b与数据信号端Da相连,第三端21c分别与驱动控制模块23的第一端23a以及发光器件1_1的第一端1a相连;数据写入模块21用于在扫描信号端Sc的控制下将数据信号端Da的信号提供给驱动控制模块23的第一端23a。The
补偿控制模块22,其第一端22a与补偿控制端EC相连,第二端22b分别与电压输入控制电路4的第一输出端4b、驱动控制模块23的第二端23b以及连接电压输入控制电路4的第一输出端4b和驱动控制模块23的第二端23b的第一节点A相连,第三端22c分别与电压输入控制电路4的第二输出端4c、驱动控制模块23的第三端23c相连,第四端22d与电位转换电路3的第一输出端3f以及连接补偿控制模块22和电位转换电路3的第二节点B相连;补偿控制模块22用于:在电位转换电路3的第一输出端3f和电压输入控制电路4的第一输出端4b的控制下实现充电,在补偿控制端EC的控制下使第一节点A与驱动控制模块23的第一端23a导通,以将驱动控制模块23的阈值电压以及驱动控制模块23的第一端23a的电压均储存于第一节点A。The
驱动控制模块23,用于在第一节点A和电压输入控制电路4的第二输出端4c的控制下驱动该像素补偿电路2_1对应连接的发光器件1_1发光。The driving
上述像素补偿电路通过数据写入模块、补偿控制模块和驱动控制模块三个模块的相互配合,可以使各像素补偿电路中驱动控制模块驱动发光器件发光的工作电流仅与数据信号端的电压和参考信号端的电压有关,与驱动控制模块中的阈值电压和第一电源端的电压无关,能避免阈值电压与压降(IR Drop)对流过发光器件的电流的影响,从而使驱动发光器件发光的工作电流保持稳定,可以提高显示装置中显示区域画面亮度的均匀性。The pixel compensation circuit can cooperate with the three modules of the data writing module, the compensation control module and the driving control module to enable the driving control module in each pixel compensation circuit to drive the operating current of the light emitting device to emit only the voltage and reference signal of the data signal end. The voltage at the terminal is independent of the threshold voltage in the drive control module and the voltage at the first power supply terminal, which can avoid the influence of the threshold voltage and the voltage drop (IR Drop) on the current flowing through the light emitting device, thereby maintaining the operating current for driving the light emitting device to emit light. Stable, it can improve the uniformity of the brightness of the display area in the display device.
例如,在本发明实施例提供的上述像素结构中,如图1b所示,电位转换电路3可以包括第一转换模块31和第二转换模块32。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 1b, the
第一转换模块31分别与第一电源端VDD、参考信号端Ref、第一电位转换端E1、电位转换电路3的第一输出端3f、以及电位转换电路3的第二输出端3g相连;第一转换模块31用于在第一电位转换端E1的控制下,将参考信号端Ref的电压提供给各像素补偿电路2_1,同时将第一电源端VDD的电压提供给各发光器件1_1。
The
第二转换模块32分别与第二电源端VSS、第二电位转换端E2、电位转换电路3的第一输出端3f、以及电位转换电路3的第二输出端3g相连;第二转换模块32用于在第二电位转换端E2的控制下,将第二电源端VSS的电压分别提供给各发光器件1_1和各像素补偿电路2_1。The
下面结合具体实施例,对本发明实施例提供的上述像素结构进行详细说明。需要说明的是,本发明实施例仅是为了更好的解释本发明,但不限制本发明。The above pixel structure provided by the embodiment of the present invention will be described in detail below with reference to specific embodiments. It should be noted that the embodiments of the present invention are only for better explanation of the present invention, but do not limit the present invention.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示(以N等于1为例),驱动控制模块23可以包括驱动晶体管M0;驱动晶体管M0的栅极M01与第一节点A相连,源极M02与电压输入控制电路4的第二输出端4c相连,漏极M03与发光器件1_1的第一端1a相连。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b (taking N equal to 1 as an example), the driving
例如,本发明实施例提供的上述像素结构中的发光器件为有机电致发光二极管。发光器件在驱动晶体管的饱和电流的作用下实现发光。For example, the light emitting device in the above pixel structure provided by the embodiment of the present invention is an organic electroluminescent diode. The light emitting device realizes light emission under the action of the saturation current of the driving transistor.
例如,本发明实施例提供的上述像素结构中,驱动发光器件发光的驱动晶体管为N型晶体管。为了保证驱动晶体管能正常工作,对应的第一电源端的电压为正电压,第二电源端的电压低于第一电源端的电压。For example, in the above pixel structure provided by the embodiment of the present invention, the driving transistor that drives the light emitting device to emit light is an N-type transistor. In order to ensure that the driving transistor can work normally, the voltage of the corresponding first power terminal is a positive voltage, and the voltage of the second power terminal is lower than the voltage of the first power terminal.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示,第一转换模块31可以包括:第一开关晶体管M1和第二开关晶体管M2;第一开关晶体管M1的栅极M11与第一电位转换端E1相连,源极M12与第一电源端VDD相连,漏极M13与电位转换电路3的第二输出端3g相连;第二开关晶体管M2的栅极M21与第一电位转换端E1相连,源极M22与参考信号端Ref相连,漏极M23与电位转换电路3的第一输出端3f相连。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b, the
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第一开关晶体管M1和第二开关晶体管M2可以为N型开关晶体管;或者,如图3a和图3b所示,第一开关晶体管M1和第二开关晶体管M2也可以均P型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the first switching transistor M1 and the second switching transistor M2 may be N-type switching transistors; or, as shown in FIG. 3a and FIG. 3b. It is to be noted that the first switching transistor M1 and the second switching transistor M2 may also be P-type switching transistors, which are not limited herein.
以上仅是举例说明像素结构中第一转换模块的具体结构,例如,第一转换模块的具体结构不限于本发明实施例提供的上述结构,还可以是本领域技术人员可知的其他结构,在此不作限定。The above is only a specific structure of the first conversion module in the pixel structure. For example, the specific structure of the first conversion module is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. Not limited.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示,
第二转换模块32可以包括:第三开关晶体管M3和第四开关晶体管M4;第三开关晶体管M3的栅极M31与第二电位转换端E2相连,源极M32与第二电源端VSS相连,漏极M33与电位转换电路3的第二输出端3g相连;第四开关晶体管M4的栅极M41与第二电位转换端E2相连,源极M42与第二电源端VSS相连,漏极M43与电位转换电路3的第一输出端3f相连。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b,
The
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第三开关晶体管M3和第四开关晶体管M4可以为P型开关晶体管;或者,如图3a和图3b所示,第三开关晶体管M3和第四开关晶体管M4也可以为N型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the third switching transistor M3 and the fourth switching transistor M4 may be P-type switching transistors; or, as shown in FIG. 3a and FIG. 3b. The third switching transistor M3 and the fourth switching transistor M4 may also be N-type switching transistors, which are not limited herein.
以上仅是举例说明像素结构中第二转换模块的具体结构,例如,第二转换模块的具体结构不限于本发明实施例提供的上述结构,还可以是本领域技术人员可知的其他结构,在此不作限定。The above is only a specific structure of the second conversion module in the pixel structure. For example, the specific structure of the second conversion module is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. Not limited.
进一步地,例如,在本发明实施例提供的上述像素结构中,如图2b所示,第一开关晶体管M1和第二开关晶体管M2为N型开关晶体管,且第三开关晶体管M3和第四开关晶体管M4为P型开关晶体管;或者,如图3b所示,第一开关晶体管M1和第二开关晶体管M2为P型开关晶体管,且第三开关晶体管M3和第四开关晶体管M4为N型开关晶体管。这样可以将第一电位转换端E1与第二电位转换端E2设置为同一信号端,这样可以减少信号线的数量,从而进一步提高像素区域的开口率。Further, for example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2b, the first switching transistor M1 and the second switching transistor M2 are N-type switching transistors, and the third switching transistor M3 and the fourth switch The transistor M4 is a P-type switching transistor; or, as shown in FIG. 3b, the first switching transistor M1 and the second switching transistor M2 are P-type switching transistors, and the third switching transistor M3 and the fourth switching transistor M4 are N-type switching transistors. . In this way, the first potential conversion terminal E1 and the second potential conversion terminal E2 can be set to the same signal terminal, which can reduce the number of signal lines, thereby further increasing the aperture ratio of the pixel region.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示,电压输入控制电路4包括:第五开关晶体管M5和第六开关晶体管M6;第五开关晶体管M5的栅极M51与充电控制端DC相连,源极M52与第一电源端VDD相连,漏极M53与电压输入控制电路4的第一输出端4b相连;第六开关晶体管M6的栅极M61与发光控制端EM相连,源极M62与第一电源端VDD相连,漏极M63与电压输入控制电路4的第二输出端4c相连。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b, the voltage
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第五开关晶体管M5可以为N型开关晶体管;或者,如图3a和图3b所示,第五开关晶体管M5也可以为P型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the fifth switching transistor M5 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the fifth switching transistor M5 can also be a P-type switching transistor, which is not limited herein.
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第六开关晶体管M6可以为N型开关晶体管;或者,如图3a和图3b所示, 第六开关晶体管M6也可以为P型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the sixth switching transistor M6 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, The sixth switching transistor M6 may also be a P-type switching transistor, which is not limited herein.
以上仅是举例说明像素结构中电压输入控制电路的具体结构,例如,电压输入控制电路的具体结构不限于本发明实施例提供的上述结构,还可以是本领域技术人员可知的其他结构,在此不作限定。The above is only a specific structure of the voltage input control circuit in the pixel structure. For example, the specific structure of the voltage input control circuit is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. Not limited.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示,数据写入模块21可以包括第七开关晶体管M7;第七开关晶体管M7的栅极M71与扫描信号端Sc相连,源极M72与数据信号端Da相连,漏极M73与发光器件1_1的第一端1a相连。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b, the
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第七开关晶体管M7可以为N型开关晶体管;或者,如图3a和图3b所示,第七开关晶体管M7也可以为P型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the seventh switching transistor M7 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the seventh switching transistor M7 can also be a P-type switching transistor, which is not limited herein.
例如,在本发明实施例提供的上述像素结构中,如图2a至图3b所示,补偿控制模块22包括:第八开关晶体管M8和电容C;第八开关晶体管M8的栅极M81与补偿控制端EC相连,源极M82与电压输入控制电路4的第二输出端4c相连,漏极M83与第一节点A相连;电容C连接于第一节点A与第二节点B之间。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a to FIG. 3b, the
例如,在本发明实施例提供的上述像素结构中,如图2a和图2b所示,第八开关晶体管M8可以为N型开关晶体管;或者,如图3a和图3b所示,第八开关晶体管M8也可以为P型开关晶体管,在此不作限定。For example, in the above pixel structure provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, the eighth switching transistor M8 may be an N-type switching transistor; or, as shown in FIG. 3a and FIG. 3b, the eighth switching transistor M8 can also be a P-type switching transistor, which is not limited herein.
进一步的,例如,P型开关晶体管在高电位作用下截止,在低电位作用下导通;N型开关晶体管在高电位作用下导通,在低电位作用下截止。Further, for example, the P-type switching transistor is turned off under a high potential and turned on under a low potential; the N-type switching transistor is turned on under a high potential and is turned off under a low potential.
需要说明的是,在本发明实施例提供的上述像素结构中,驱动晶体管和开关晶体管可以是薄膜晶体管(TFT,Thin Film Transistor),也可以是金属氧化物半导体场效应管(MOS,Metal Oxide Scmiconductor),在此不作限定。在具体实施中,这些晶体管的源极和漏极可以互换,不做具体区分。在描述具体实施例是以驱动晶体管和开关晶体管都为薄膜晶体管为例进行说明的。It should be noted that, in the above pixel structure provided by the embodiment of the present invention, the driving transistor and the switching transistor may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Scmiconductor). ), here is not limited. In a specific implementation, the sources and drains of these transistors can be interchanged without specific distinction. In the description of the specific embodiment, the case where the driving transistor and the switching transistor are both thin film transistors will be described as an example.
下面以图2b和图3b所示的像素结构为例,结合电路时序图对本发明实施例提供的上述像素结构的工作过程作以描述。下述描述中以1表示高电位,0表示低电位,需要说明的是,1和0是逻辑电位,其仅是为了更好的解释本发明实施例的具体工作过程,而不是在具体实施时施加在各开关晶体管的栅 极上的电位。The working process of the above pixel structure provided by the embodiment of the present invention is described below by taking the pixel structure shown in FIG. 2b and FIG. 3b as an example. In the following description, 1 indicates a high potential, and 0 indicates a low potential. It should be noted that 1 and 0 are logic potentials, which are only for better explanation of the specific working process of the embodiment of the present invention, and are not specifically implemented. Applied to the gate of each switching transistor The potential on the pole.
实施例一
以图2b所示的像素结构为例,其中,第三开关晶体管M3和第四开关晶体管M4均为P型开关晶体管,其余开关晶体管均为N型开关晶体管;以第二电源端VSS的电压为0V为例,对应的输入输出时序图如图4a所示,包括:充电阶段T1、放电阶段T2、保持阶段T3和发光阶段T4四个阶段。Taking the pixel structure shown in FIG. 2b as an example, the third switching transistor M3 and the fourth switching transistor M4 are both P-type switching transistors, and the remaining switching transistors are all N-type switching transistors; the voltage of the second power supply terminal VSS is As an example, the corresponding input/output timing diagram is as shown in FIG. 4a, and includes four stages: a charging phase T1, a discharging phase T2, a holding phase T3, and a lighting phase T4.
在充电阶段T1,E1=1,EM=0,DC=1,EC=0,Da=0,Sc=1。In the charging phase T1, E1=1, EM=0, DC=1, EC=0, Da=0, Sc=1.
第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5和第七开关晶体管M7均导通;第三开关晶体管M3、第四开关晶体管M4、第六开关晶体管M6和第八开关晶体管M8均截止。导通的第二开关晶体管M2将参考信号端Ref的电压Vref写入第二节点B,因此第二节点B的电压VB=Vref;导通的第五开关晶体管M5将第一电源端VDD的电压Vdd写入第一节点A,因此第一节点A的电压VA=Vref,电容C开始充电,驱动晶体管在第一节点的控制下导通;导通的第七开关晶体管M7将数据信号端Da的低电位的电压分别写入发光器件1_1的第一端,而导通的第一开关晶体管M1将第一电源端VDD的电压Vdd写入发光器件1_1的第二端,因此发光器件1_1不发光。The first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, and the seventh switching transistor M7 are all turned on; the third switching transistor M3, the fourth switching transistor M4, the sixth switching transistor M6, and the eighth switching transistor M8 Both are closed. The turned-on second switching transistor M2 writes the voltage V ref of the reference signal terminal Ref to the second node B, so that the voltage of the second node B is V B =V ref ; the fifth switching transistor M5 that is turned on will be the first power terminal The voltage V dd of VDD is written into the first node A, so the voltage of the first node A is V A = V ref , the capacitor C starts to be charged, the driving transistor is turned on under the control of the first node; the turned-on seventh switching transistor M7 Writing a low potential voltage of the data signal terminal Da to the first end of the light emitting device 1_1, and turning on the first switching transistor M1 to write the voltage V dd of the first power terminal VDD to the second end of the light emitting device 1_1. Therefore, the light emitting device 1_1 does not emit light.
在放电阶段T2,E1=1,EM=0,DC=0,EC=1,Da=1,Sc=1。In the discharge phase T2, E1=1, EM=0, DC=0, EC=1, Da=1, Sc=1.
第一开关晶体管M1、第二开关晶体管M2、第七开关晶体管M7和第八开关晶体管M8均导通;第三开关晶体管M3、第四开关晶体管M4、第五开关晶体管M5和第六开关晶体管M6均截止。导通的第二开关晶体管M2将参考信号端Ref的电压Vref写入第二节点B,第二节点B的电压VB=Vref,导通的第七开关晶体管M7将数据信号端Da的高电位的电压Vdata写入驱动晶体管M0的漏极;导通的第八开关晶体管M8使驱动晶体管M0变为二极管,二极管导通,电容C开始放电,直至第一节点A的电压变为Vdata+Vth时二极管截止,电容停止放电,此时电容C两端的电压差为Vdata+Vth-Vref1,从而在驱动晶体管M0的栅极处实现了驱动晶体管M0的阈值电压Vth的存储。The first switching transistor M1, the second switching transistor M2, the seventh switching transistor M7, and the eighth switching transistor M8 are both turned on; the third switching transistor M3, the fourth switching transistor M4, the fifth switching transistor M5, and the sixth switching transistor M6 Both are closed. The turned-on second switching transistor M2 writes the voltage V ref of the reference signal terminal Ref to the second node B, the voltage of the second node B V B =V ref , and the turned-on seventh switching transistor M7 turns the data signal terminal Da The high-potential voltage V data is written to the drain of the driving transistor M0; the turned-on eighth switching transistor M8 turns the driving transistor M0 into a diode, the diode is turned on, and the capacitor C starts to discharge until the voltage of the first node A becomes V. When data +V th , the diode is turned off, and the capacitor stops discharging. At this time, the voltage difference across the capacitor C is V data +V th -V ref1 , thereby realizing the threshold voltage V th of the driving transistor M0 at the gate of the driving transistor M0. storage.
在保持阶段T3,E1=0,EM=0,DC=0,EC=0,Da=0,Sc=0。In the hold phase T3, E1=0, EM=0, DC=0, EC=0, Da=0, Sc=0.
第三开关晶体管M3和第四开关晶体管M4均导通;第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5、第六开关晶体管M6、第七开关晶体管M7和第八开关晶体管M8均截止。导通的第三开关晶体管M3将第
二电源端V2的电压0写入发光器件1_1的第二端,驱动晶体管M0的源极无电压写入,因此发光器件1_1不发光;导通的第三开关晶体管M3将第二电源端V2的电压0写入第二节点B,即电容C的第二端c2,使电容C的第二端c2的电压由Vref变为0,根据电容电量守恒原理,为了保证第一电容C1的两端的电压差仍为Vdata+Vth-Vref,电容C的第一端c1的电压由Vdata+Vth跳变为Vdata+Vth-Vref。The third switching transistor M3 and the fourth switching transistor M4 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed. The turned-on third switching transistor M3 writes the
在发光阶段T4,E1=0,EM=1,DC=0,EC=0,Da=0,Sc=0。In the illuminating phase T4, E1=0, EM=1, DC=0, EC=0, Da=0, Sc=0.
第三开关晶体管M3、第四开关晶体管M4和第六开关晶体管M6均导通;第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5、第七开关晶体管M7和第八开关晶体管M8均截止。导通的第三开关晶体管M3将第二电源端V2的电压0写入发光器件1_1的第二端以及第二节点B,即电容C的第二端c2,使电容C的第二端c2的电压仍为0;导通的第六开关晶体管M6将第一电源端VDD的电压Vdd写入驱动晶体管M0的源极;由于驱动晶体管M0工作处于饱和状态,根据饱和状态电流特性可知,流过驱动晶体管M0且用于驱动发光器件1_1发光的工作电流I满足公式:I=K(Vgs-Vth)2=K(Vdata+Vth-Vref-Vth)2=K(Vdata-Vref)2,其中K为结构参数,相同结构中此数值相对稳定,可以算作常量。驱动晶体管M0的栅源电压Vgs=Vdata+Vth-Vref。通过上式可知,驱动晶体管M0的驱动电流仅与参考信号端Ref的电压Vref和数据信号端Da的电压Vdata相关,而与驱动晶体管M0的阈值电压Vth和第一电源端的电压Vdd无关,解决了由于驱动晶体管M0的工艺制程以及长时间的操作造成的阈值电压Vth漂移,以及IR Drop对流过发光器件的电流的影响,从而使发光器件1_1的工作电流保持稳定,进而保证了发光器件1_1的正常工作。The third switching transistor M3, the fourth switching transistor M4, and the sixth switching transistor M6 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed. The turned-on third switching transistor M3 writes the
实施例二
以图3b所示的像素结构为例,其中,第三开关晶体管M3和第四开关晶体管M4均为N型开关晶体管,其余开关晶体管均为P型开关晶体管;各P型开关晶体管在低电位作用下导通,在高电位作用下截止;各N型开关晶体管在高电位作用下导通,在低电位作用下截止;以第二电源端的电压为0V为例,对应的输入输出时序图如图4b所示,包括:充电阶段T1、放电阶段 T2、保持阶段T3和发光阶段T4四个阶段。Taking the pixel structure shown in FIG. 3b as an example, wherein the third switching transistor M3 and the fourth switching transistor M4 are N-type switching transistors, and the remaining switching transistors are P-type switching transistors; each P-type switching transistor acts at a low potential The lower conduction is turned off under the action of high potential; each N-type switching transistor is turned on under the action of high potential, and is cut off under the action of low potential; taking the voltage of the second power supply terminal as 0V as an example, the corresponding input and output timing diagram is as shown in the figure 4b, including: charging phase T1, discharging phase T2, the holding phase T3 and the lighting phase T4 are in four stages.
在充电阶段T1,E1=0,EM=1,DC=0,EC=1,Da=1,Sc=0。In the charging phase T1, E1=0, EM=1, DC=0, EC=1, Da=1, Sc=0.
第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5和第七开关晶体管M7均导通;第三开关晶体管M3、第四开关晶体管M4、第六开关晶体管M6和第八开关晶体管M8均截止。导通的第二开关晶体管M2将参考信号端Ref的电压Vref写入第二节点B,因此第二节点B的电压VB=Vref;导通的第五开关晶体管M5将第一电源端VDD的电压Vdd写入第一节点A,因此第一节点A的电压VA=Vref,电容C开始充电,驱动晶体管在第一节点的控制下导通;导通的第七开关晶体管M7将数据信号端Da的低电位的电压分别写入发光器件1_1的第一端,而导通的第一开关晶体管M1将第一电源端VDD的电压Vdd写入发光器件1_1的第二端,因此发光器件1_1不发光。The first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, and the seventh switching transistor M7 are all turned on; the third switching transistor M3, the fourth switching transistor M4, the sixth switching transistor M6, and the eighth switching transistor M8 Both are closed. The turned-on second switching transistor M2 writes the voltage V ref of the reference signal terminal Ref to the second node B, so that the voltage of the second node B is V B =V ref ; the fifth switching transistor M5 that is turned on will be the first power terminal The voltage V dd of VDD is written into the first node A, so the voltage of the first node A is V A = V ref , the capacitor C starts to be charged, the driving transistor is turned on under the control of the first node; the turned-on seventh switching transistor M7 Writing a low potential voltage of the data signal terminal Da to the first end of the light emitting device 1_1, and turning on the first switching transistor M1 to write the voltage V dd of the first power terminal VDD to the second end of the light emitting device 1_1. Therefore, the light emitting device 1_1 does not emit light.
在放电阶段T2,E1=0,EM=1,DC=1,EC=0,Da=0,Sc=0。In the discharge phase T2, E1=0, EM=1, DC=1, EC=0, Da=0, Sc=0.
第一开关晶体管M1、第二开关晶体管M2、第七开关晶体管M7和第八开关晶体管M8均导通;第三开关晶体管M3、第四开关晶体管M4、第五开关晶体管M5和第六开关晶体管M6均截止。导通的第二开关晶体管M2将参考信号端Ref的电压Vref写入第二节点B,第二节点B的电压VB=Vref,导通的第七开关晶体管M7将数据信号端Da的高电位的电压Vdata写入驱动晶体管M0的漏极;导通的第八开关晶体管M8使驱动晶体管M0变为二极管,二极管导通,电容C开始放电,直至第一节点A的电压变为Vdata+Vth时二极管截止,电容停止放电,此时电容C两端的电压差为Vdata+Vth-Vref1,从而在驱动晶体管M0的栅极处实现了驱动晶体管M0的阈值电压Vth的存储。The first switching transistor M1, the second switching transistor M2, the seventh switching transistor M7, and the eighth switching transistor M8 are both turned on; the third switching transistor M3, the fourth switching transistor M4, the fifth switching transistor M5, and the sixth switching transistor M6 Both are closed. The turned-on second switching transistor M2 writes the voltage V ref of the reference signal terminal Ref to the second node B, the voltage of the second node B V B =V ref , and the turned-on seventh switching transistor M7 turns the data signal terminal Da The high-potential voltage V data is written to the drain of the driving transistor M0; the turned-on eighth switching transistor M8 turns the driving transistor M0 into a diode, the diode is turned on, and the capacitor C starts to discharge until the voltage of the first node A becomes V. When data +V th , the diode is turned off, and the capacitor stops discharging. At this time, the voltage difference across the capacitor C is V data +V th -V ref1 , thereby realizing the threshold voltage V th of the driving transistor M0 at the gate of the driving transistor M0. storage.
在保持阶段T3,E1=1,EM=1,DC=1,EC=1,Da=1,Sc=1。In the hold phase T3, E1=1, EM=1, DC=1, EC=1, Da=1, and Sc=1.
第三开关晶体管M3和第四开关晶体管M4均导通;第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5、第六开关晶体管M6、第七开关晶体管M7和第八开关晶体管M8均截止。导通的第三开关晶体管M3将第二电源端V2的电压0写入发光器件1_1的第二端,驱动晶体管M0的源极无电压写入,因此发光器件1_1不发光;导通的第三开关晶体管M3将第二电源端V2的电压0写入第二节点B,即电容C的第二端c2,使电容C的第二端c2的电压由Vref变为0,根据电容电量守恒原理,为了保证第一电容C1的两端的电压差仍为Vdata+Vth-Vref,电容C的第一端c1的电压由Vdata+Vth
跳变为Vdata+Vth-Vref。The third switching transistor M3 and the fourth switching transistor M4 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed. The turned-on third switching transistor M3 writes the
在发光阶段T4,E1=1,EM=0,DC=1,EC=1,Da=1,Sc=1。In the illumination phase T4, E1=1, EM=0, DC=1, EC=1, Da=1, and Sc=1.
第三开关晶体管M3、第四开关晶体管M4和第六开关晶体管M6均导通;第一开关晶体管M1、第二开关晶体管M2、第五开关晶体管M5、第七开关晶体管M7和第八开关晶体管M8均截止。导通的第三开关晶体管M3将第二电源端V2的电压0写入发光器件1_1的第二端以及第二节点B,即电容C的第二端c2,使电容C的第二端c2的电压仍为0;导通的第六开关晶体管M6将第一电源端VDD的电压Vdd写入驱动晶体管M0的源极;由于驱动晶体管M0工作处于饱和状态,根据饱和状态电流特性可知,流过驱动晶体管M0且用于驱动发光器件1_1发光的工作电流I满足公式:I=K(Vgs-Vth)2=K(Vdata+Vth-Vref-Vth)2=K(Vdata-Vref)2,其中K为结构参数,相同结构中此数值相对稳定,可以算作常量。驱动晶体管M0的栅源电压Vgs=Vdata+Vth-Vref。通过上式可知,驱动晶体管M0的驱动电流仅与参考信号端Ref的电压Vref和数据信号端Da的电压Vdata相关,而与驱动晶体管M0的阈值电压Vth和第一电源端的电压Vdd无关,解决了由于驱动晶体管M0的工艺制程以及长时间的操作造成的阈值电压Vth漂移,以及压降(IR Drop)对流过发光器件的电流的影响,从而使发光器件1_1的工作电流保持稳定,进而保证了发光器件1_1的正常工作。The third switching transistor M3, the fourth switching transistor M4, and the sixth switching transistor M6 are both turned on; the first switching transistor M1, the second switching transistor M2, the fifth switching transistor M5, the seventh switching transistor M7, and the eighth switching transistor M8 Both are closed. The turned-on third switching transistor M3 writes the
基于同一发明构思,本发明实施例还提供了一种上述任一种像素结构的驱动方法,包括:充电阶段、放电阶段、保持阶段和发光阶段。Based on the same inventive concept, an embodiment of the present invention further provides a driving method for any of the above pixel structures, including: a charging phase, a discharging phase, a holding phase, and a lighting phase.
在充电阶段,电位转换电路在第一电位转换端的控制下将第一电源端的电压提供给各发光器件的第二端,同时将参考信号端的电压提供给各像素补偿电路中的第二节点;电压输入控制电路在充电控制端的控制下将第一电源端的电压提供给各像素补偿电路中的第一节点;数据写入模块在扫描信号端的控制下将数据信号端的信号提供给驱动控制模块的第一端以及发光器件的第一端;驱动控制模块在补偿控制端的控制下使驱动控制模块的第一端和第三端导通;补偿控制模块在第一节点和第二节点共同控制下实现充电。In the charging phase, the potential conversion circuit supplies the voltage of the first power terminal to the second end of each light emitting device under the control of the first potential converting end, and supplies the voltage of the reference signal terminal to the second node in each pixel compensation circuit; The input control circuit supplies the voltage of the first power terminal to the first node in each pixel compensation circuit under the control of the charging control terminal; the data writing module provides the signal of the data signal terminal to the first of the driving control module under the control of the scanning signal terminal And the first end of the light emitting device; the driving control module turns on the first end and the third end of the driving control module under the control of the compensation control end; the compensation control module realizes charging under the common control of the first node and the second node.
在放电阶段,电位转换电路在第一电位转换端的控制下将第一电源端的电压提供给各发光器件的第二端,同时将参考信号端的电压提供给各像素补 偿电路中的第二节点;数据写入模块在扫描信号端的控制下将数据信号端的信号提供给驱动控制模块的第一端以及发光器件的第一端;补偿控制模块在补偿控制端的控制下使第一节点与驱动控制模块的第一端导通,将驱动控制模块的阈值电压以及驱动控制模块的第一端的电压均储存于第一节点。In the discharging phase, the potential conversion circuit supplies the voltage of the first power terminal to the second end of each of the light emitting devices under the control of the first potential converting end, and supplies the voltage of the reference signal terminal to each pixel. a second node in the circuit; the data writing module provides the signal of the data signal end to the first end of the driving control module and the first end of the light emitting device under the control of the scanning signal end; the compensation control module is controlled under the control of the compensation control end The first node is electrically connected to the first end of the driving control module, and stores the threshold voltage of the driving control module and the voltage of the first end of the driving control module at the first node.
在保持阶段,电位转换电路在第二电位转换端的控制下将第二电源端的电压分别提供给发光器件的第二端和各像素补偿电路中的第二节点。In the holding phase, the potential conversion circuit supplies the voltage of the second power supply terminal to the second end of the light emitting device and the second node of each pixel compensation circuit under the control of the second potential conversion end.
在发光阶段,电位转换电路在第二电位转换端的控制下将第二电源端的电压分别提供给各发光器件的第二端和各像素补偿电路中的第二节点;电压输入控制电路在发光控制端的控制下将第一电源端的电压提供给各像素补偿电路中的驱动控制模块的第三端;驱动控制模块在第一节点和驱动控制模块的第三端的控制下驱动发光器件发光。In the illuminating phase, the potential conversion circuit supplies the voltage of the second power terminal to the second end of each illuminating device and the second node of each pixel compensating circuit under the control of the second potential converting end; the voltage input control circuit is at the illuminating control end The voltage of the first power terminal is controlled to be supplied to the third end of the driving control module in each pixel compensation circuit; the driving control module drives the light emitting device to emit light under the control of the first node and the third end of the driving control module.
基于同一发明构思,本发明实施例还提供了一种有机电致发光显示面板,如图5所示,包括呈矩阵排列的M列区域01(参见01_1-01_M),还包括与每行区域01一一对应的本发明实施例提供的上述任一种像素结构,且各像素结构中发光器件的数量相等;其中,M等于N;各像素结构中的发光器件和像素补偿电路均设置于对应行的区域01中,且一个区域01中设置一个发光器件以及与发光器件连接的一个像素补偿电路。Based on the same inventive concept, an embodiment of the present invention further provides an organic electroluminescence display panel, as shown in FIG. 5, including an
例如,有机电致发光显示面板还包括沿像素的行方向延伸且依次排列的多条栅线GT以及沿像素的列方向延伸且依次排列的多条数据线DT(参见DT_1-DT_N),每行栅线对应连接所在行的像素结构中的各像素补偿电路的扫描信号端,以向各像素补偿电路输入扫描信号;每列数据线对应连接所在列的每行像素结构中的各像素补偿电路的数据信号端,以向各像素补偿电路输入数据信号。For example, the organic electroluminescence display panel further includes a plurality of gate lines GT extending in the row direction of the pixels and sequentially arranged, and a plurality of data lines DT (see DT_1-DT_N) extending in the column direction of the pixels and sequentially arranged, each row The gate line corresponds to the scan signal end of each pixel compensation circuit in the pixel structure of the connected row, to input a scan signal to each pixel compensation circuit; each column of data lines corresponds to each pixel compensation circuit in each row of pixel structures connected to the column The data signal terminal inputs a data signal to each pixel compensation circuit.
例如,在有机电致发光显示面板中,控制各像素补偿电路中的开关晶体管的控制信号的电压的高电位为20V-30V,低电位为-8V。For example, in the organic electroluminescence display panel, the high potential of the voltage of the control signal for controlling the switching transistor in each pixel compensation circuit is 20V to 30V, and the low potential is -8V.
例如,在本发明实施例提供的上述有机电致发光显示面板中,各像素结构中的电位转换电路和电压输入控制电路可以制作在阵列基板上,也可以制作在外围电路芯片中,在此不作限定。当电位转换电路和电压输入控制电路制作在外围电路芯片中时,其中控制这两个电路中的各开关晶体管的控制信号的电压的高电位例如为3.3V,低电位例如为0V。 For example, in the above organic electroluminescent display panel provided by the embodiment of the present invention, the potential conversion circuit and the voltage input control circuit in each pixel structure may be fabricated on the array substrate, or may be fabricated in the peripheral circuit chip, and are not used herein. limited. When the potential conversion circuit and the voltage input control circuit are fabricated in the peripheral circuit chip, the high potential of the voltage of the control signal for controlling each of the switching transistors is, for example, 3.3 V, and the low potential is, for example, 0 V.
由于该有机电致发光显示面板解决问题的原理与前述的像素结构相似,因此该有机电致发光显示面板的实施可以参见像素结构的实施,重复之处不再赘述。Since the principle of solving the problem of the organic electroluminescent display panel is similar to the foregoing pixel structure, the implementation of the organic electroluminescent display panel can be referred to the implementation of the pixel structure, and the repeated description is omitted.
基于同一发明构思,本发明实施例还提供了一种显示装置,其包括本发明实施例提供的上述有机电致发光显示面板。该显示装置可以是显示器、手机、电视、笔记本、一体机等,对于显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本发明的限制。Based on the same inventive concept, an embodiment of the present invention further provides a display device including the above-described organic electroluminescent display panel provided by the embodiment of the present invention. The display device may be a display, a mobile phone, a television, a notebook, an all-in-one, etc., and other essential components of the display device are understood by those of ordinary skill in the art, and will not be described herein. As a limitation of the invention.
本发明实施例提供的一种像素结构、其驱动方法、有机电致发光显示面板及显示装置,该像素结构包括N个发光器件、与各发光器件一一对应连接的像素补偿电路、以及一个电位转换电路和一个电压输入控制电路;通过将多个像素补偿电路均连接同一个电位转换电路以及同一个电压输入控制电路(在这种情况下,N为大于或等于2的正整数),相当于使多个像素补偿电路共用一个电位转换电路和一个电压输入控制电路,这与各像素补偿电路中均包括一个用于控制电源电压以及参考信号的输入的控制模块的方式相比,可以简化各像素补偿电路的结构,从而可以降低像素区域(参见图5中的区域01)中像素补偿电路的占用面积,进而提高每个像素区域的开口率。The embodiment of the invention provides a pixel structure, a driving method thereof, an organic electroluminescence display panel and a display device. The pixel structure comprises N light emitting devices, a pixel compensation circuit connected in one-to-one correspondence with each light emitting device, and a potential a conversion circuit and a voltage input control circuit; by connecting a plurality of pixel compensation circuits to the same potential conversion circuit and the same voltage input control circuit (in this case, N is a positive integer greater than or equal to 2), which is equivalent to Having a plurality of pixel compensation circuits share a potential conversion circuit and a voltage input control circuit, which simplifies each pixel as compared with a method in which each pixel compensation circuit includes a control module for controlling a power supply voltage and an input of a reference signal. The structure of the compensation circuit can thereby reduce the occupied area of the pixel compensation circuit in the pixel region (see the
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。It is apparent that those skilled in the art can make various modifications and variations to the invention without departing from the spirit and scope of the invention. Thus, it is intended that the present invention cover the modifications and modifications of the invention
本申请要求于2016年1月4日递交的中国专利申请第201610006810.7号的优先权,在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。 The present application claims the priority of the Chinese Patent Application No. 201610006810.7 filed on Jan. 4, 2016, the content of which is hereby incorporated by reference.
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| US9972249B2 (en) | 2018-05-15 |
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