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WO2016208993A1 - Light-emitting element and display device comprising same - Google Patents

Light-emitting element and display device comprising same Download PDF

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Publication number
WO2016208993A1
WO2016208993A1 PCT/KR2016/006687 KR2016006687W WO2016208993A1 WO 2016208993 A1 WO2016208993 A1 WO 2016208993A1 KR 2016006687 W KR2016006687 W KR 2016006687W WO 2016208993 A1 WO2016208993 A1 WO 2016208993A1
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WIPO (PCT)
Prior art keywords
layer
light emitting
insulating
semiconductor
disposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2016/006687
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French (fr)
Korean (ko)
Inventor
김원호
김종국
박형조
서덕원
윤여제
이은형
전용한
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LG Innotek Co Ltd
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LG Innotek Co Ltd
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Publication date
Priority claimed from KR1020150089160A external-priority patent/KR102348533B1/en
Priority claimed from KR1020150169323A external-priority patent/KR102523696B1/en
Application filed by LG Innotek Co Ltd filed Critical LG Innotek Co Ltd
Publication of WO2016208993A1 publication Critical patent/WO2016208993A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/815Bodies having stress relaxation structures, e.g. buffer layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/816Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/819Bodies characterised by their shape, e.g. curved or truncated substrates

Definitions

  • the embodiment relates to a light emitting device and a display device including the same.
  • a light emitting device is a compound semiconductor device that converts electrical energy into light energy, and various colors can be realized by adjusting the composition ratio of the compound semiconductor.
  • the nitride semiconductor light emitting device has advantages of low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent lamps and incandescent lamps. Therefore, LED backlights that replace the Cold Cathode Fluorescence Lamps (CCFLs) that make up the backlight of liquid crystal display (LCD) displays, white LED lighting devices that can replace fluorescent or incandescent bulbs, and automotive headlights. And the application is expanding to traffic lights.
  • CCFLs Cold Cathode Fluorescence Lamps
  • LCD liquid crystal display
  • the embodiment provides a light emitting device capable of reducing leakage current and a display device including the same.
  • a light emitting device includes: a conductive base layer; An insulating layer disposed on the base layer and including a plurality of first holes; A plurality of light emitting structures including a first semiconductor core electrically connected to the base layer through the first hole, an active layer disposed on the first semiconductor core, and a second semiconductor layer; An insulating particle layer including insulating particles filled between the plurality of light emitting structures; And a first conductive layer disposed on the insulating particle layer, wherein the diameter of the insulating particle is smaller than the width of the first hole.
  • At least one of the plurality of first holes may be filled with the insulating particles.
  • the width of the first hole may be 0.5 ⁇ m or more and 3 ⁇ m or less.
  • the diameter of the insulating particles may be 150nm or more and 500nm or less.
  • the insulating particle layer may have a thickness of 400 nm or more and 1000 nm or less.
  • the material of the insulating film and the material of the insulating particles may be different.
  • the insulating particles may include first insulating particles having a first diameter and second insulating particles having a second diameter, and the second diameter may be larger than the first diameter.
  • the insulating particle layer may include a lower insulating particle layer including a first insulating particle, and an upper insulating particle layer including the second insulating particle.
  • the first insulating particles may be filled in at least one of the plurality of first holes.
  • the first insulating particles and the second insulating particles may be randomly dispersed.
  • It may include a surface treatment layer formed on the second semiconductor layer.
  • the surface treatment layer may include a silane-based material.
  • a method of manufacturing a light emitting device includes: forming an insulating layer having a plurality of first holes on a conductive base layer; Growing a light emitting structure including a first semiconductor core, an active layer, and a second semiconductor layer on the first hole; Forming an insulating particle layer between the light emitting structures; The method may include forming a conductive layer on the insulating particle layer and the light emitting structure.
  • insulating particles having a diameter smaller than the width of the first hole may be formed between the light emitting structures.
  • the material of the insulating film and the material of the insulating particles may be different.
  • the insulating particles may include first insulating particles having a first diameter and second insulating particles having a second diameter, and the second diameter may be larger than the first diameter.
  • the leakage current is reduced to manufacture a light emitting device having excellent electrical characteristics.
  • FIG. 1 is a conceptual diagram of a light emitting device according to an embodiment of the present invention.
  • FIG. 2 is a view for explaining a path in which leakage current occurs
  • FIG. 3 is a photograph showing a first leakage path occurring at the lower end of the light emitting structure
  • FIG. 5 is a photograph showing a third leakage path generated by the pinhole of the insulating film
  • FIG. 6 is a view illustrating a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1,
  • FIG. 7 is a photograph showing a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1,
  • FIG. 8 is a view illustrating a state in which an insulating particle layer is disposed between light emitting structures having various shapes
  • FIG. 9 is a photograph showing a state in which an insulating particle layer is disposed between light emitting structures having various shapes
  • FIG. 10 is a view illustrating a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1,
  • FIG. 11 is a photograph showing a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1,
  • FIG. 12 is a view illustrating a state in which insulating particles having different sizes are randomly disposed between the light emitting structures of FIG. 1,
  • FIG. 13 is a view illustrating a state in which insulating particles having different materials are randomly disposed between the light emitting structures of FIG. 1,
  • FIG. 14 is a view illustrating a state in which insulating particles having different shapes are randomly disposed between the light emitting structures of FIG. 1,
  • FIG. 15 is a view showing a state in which a surface layer is formed on the light emitting structure of FIG. 1,
  • FIG. 16 is a view illustrating a state in which an insulating particle layer is formed between the surface-treated light emitting structures of FIG. 15,
  • 17A to 17F are views for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • FIG. 18 is a conceptual diagram of a light emitting device according to another embodiment of the present invention.
  • FIG. 20 is an enlarged view of a portion A of FIG. 18;
  • FIG. 21 is a photograph of the first semiconductor layer core of FIG. 18;
  • FIG. 22 is a photograph of the light emitting structure of FIG. 18,
  • FIG. 23 is a conceptual diagram of a light emitting device according to another embodiment of the present invention.
  • 24A to 24E are flowcharts illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • 25A to 25E are flowcharts illustrating a method of manufacturing a light emitting device according to still another embodiment of the present invention.
  • first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another.
  • the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component.
  • FIG. 1 is a conceptual diagram of a light emitting device according to an embodiment of the present invention.
  • a light emitting device may include a conductive base layer 131 on a substrate 110, an insulating layer 120 including a plurality of first holes W1, and a plurality of light emitting devices.
  • the light emitting structure 130, an insulating particle layer 140 disposed between the plurality of light emitting structures 130, and a first conductive layer 150 disposed on the insulating particle layer 140 are included.
  • the substrate 110 may include a conductive substrate or an insulating substrate.
  • the substrate 110 may be a material or a carrier wafer suitable for growing a semiconductor material.
  • the substrate 110 may be formed of a material selected from sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.
  • the conductive base layer 131 may be formed on the substrate 110 and provide a growth surface of the light emitting structure 130. In addition, the base layer 131 may be electrically connected to the first electrode 171 and the light emitting structure 130.
  • the conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto.
  • the base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.
  • the insulating film 120 is disposed on the conductive base layer 131.
  • the insulating layer 120 includes a plurality of first holes W1 through which the base layer 131 and the light emitting structure 130 are electrically connected.
  • the plurality of first holes W1 may be formed by a mask pattern.
  • the insulating layer 120 may include an insulating material such as SiO 2 or SiNx, but is not limited thereto.
  • the plurality of light emitting structures 130 may include a first semiconductor core 132 electrically connected to the base layer 131 through a first hole W1, an active layer 134 formed on the first semiconductor core 132, It may include a second semiconductor layer 133 formed on the active layer 134.
  • the light emitting structure 130 may grow in a substantially vertical direction on the substrate 110 and have a size of nano size. Light emitted from the light emitting structure 130 may be emitted in the substrate direction and / or in the opposite direction.
  • the first semiconductor core 132 may grow on the surface of the base layer 131 exposed by the first hole W1.
  • the first semiconductor core 132 may be a nanorod, but is not limited thereto.
  • the first semiconductor core 132 may be a compound semiconductor such as a III-V group or a II-VI group, and a first dopant may be doped into the first semiconductor core 132.
  • the first semiconductor core 132 is a semiconductor material having a composition formula of In x1 Al y1 Ga 1-x1-y1 N (0 ⁇ x1 ⁇ 1, 0 ⁇ y1 ⁇ 1, 0 ⁇ x1 + y1 ⁇ 1), for example GaN, AlGaN, InGaN, InAlGaN and the like can be selected.
  • the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first semiconductor core 132 doped with the first dopant may be an n-type semiconductor.
  • the active layer 134 grows on the insulating film 120 and is disposed on the first semiconductor core 132.
  • the active layer 134 is a layer where electrons (or holes) injected through the first semiconductor core 132 meet holes (or electrons) injected through the second semiconductor layer 133.
  • the active layer 134 transitions to a low energy level as electrons and holes recombine, and may generate light having a corresponding wavelength. There is no restriction on the emission wavelength in this embodiment.
  • the active layer 134 may have any one of a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum line structure, and the active layer 134
  • the structure of is not limited to this.
  • the active layer 134 may have a structure in which a plurality of well layers and barrier layers are alternately arranged.
  • the well layer and the barrier layer may have a composition formula of InxAlyGa1-x-yN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1), and the energy bandgap of the barrier layer is the energy of the well layer. It may be larger than the bandgap.
  • the second semiconductor layer 133 is grown on the insulating film 120 and disposed on the active layer 134.
  • the second semiconductor layer 133 may be formed of a compound semiconductor such as a group III-V group or a group II-VI group, and a second dopant may be doped into the second semiconductor layer 133.
  • the second semiconductor layer 133 may be formed of a semiconductor material having a composition formula of In x5 Al y2 Ga 1 -x5- y2 N (0 ⁇ x5 ⁇ 1, 0 ⁇ y2 ⁇ 1, 0 ⁇ x5 + y2 ⁇ 1), or AlInN, AlGaAs. It may be formed of a material selected from GaP, GaAs, GaAsP, AlGaInP.
  • the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba
  • the second semiconductor layer 133 doped with the second dopant may be a p-type semiconductor.
  • An electron blocking layer EBL may be disposed between the active layer 134 and the second semiconductor layer 133.
  • the electron blocking layer is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0 ⁇ x1 ⁇ 1, 0 ⁇ y1 ⁇ 1, 0 ⁇ x1 + y1 ⁇ 1), for example AlGaN, InGaN, InAlGaN may be selected from, but is not limited thereto.
  • the conductive layer 150 is disposed on the insulating particle layer 140 and the light emitting structure 130.
  • the conductive layer 150 may electrically connect the second electrode 172 and the second semiconductor layer 133.
  • the first electrode 171 may be disposed on the partially exposed base layer 131 and electrically connected to the first semiconductor core 132.
  • the insulating particle layer 140 may be filled between the plurality of light emitting structures 130 to support the light emitting structures 130 and to electrically insulate the same.
  • FIG. 2 is a view illustrating a path in which leakage current occurs
  • FIG. 3 is a photograph showing a first leakage path occurring at a lower end of the light emitting structure
  • FIG. 4 is a second view in a region in which the light emitting structure is partially unformed.
  • 5 is a photograph showing a leakage path
  • FIG. 5 is a photograph showing a third leakage path generated by the pinhole of the insulating layer.
  • the first leakage path D1 may occur at the lower end of the light emitting structure 130.
  • Current condensation occurs at the lower end of the light emitting structure 130. Therefore, the current leakage path occurs in the current density region.
  • the size of the current density region may be 300 to 500 nm.
  • the second leakage path D2 may occur in a region where the light emitting structure 130 is not generated and a region where the light emitting structure 130 is broken. Due to various processes, the light emitting structure 130 may not be grown in some of the first holes W1. In addition, the light emitting structure 130 may be broken during growth due to the large aspect ratio.
  • the third leakage path D3 may be caused by a defect formed on the insulating layer 120.
  • a pinhole d4 may be generated in a nanostructure growth environment of high temperature / high pressure to leak current.
  • the diameter of the pinhole d4 may be 50 nm to 100 nm.
  • FIG. 6 is a view illustrating a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1
  • FIG. 7 is a photograph showing a state in which the insulating particle layer is disposed between the light emitting structures of FIG. 1.
  • the insulating particle layer 140 may insulate between the plurality of light emitting structures 130 to block the first leakage path and the third leakage path.
  • the thickness of the insulating particle layer 140 may be 400 nm or more and 1000 nm or less. When the thickness is less than 400 nm, a dislocation formed during regrowth of the light emitting structure 130 may come into contact with the conductive layer 150 or the base layer 131, thereby causing leakage current. When the thickness exceeds 1000 nm, the light emitting area of the side surface (m-plane) of the light emitting structure 130 may be excessively reduced, thereby reducing the light emitting efficiency.
  • the insulating particle layer 140 may be filled in the first hole W1 in which the light emitting structure 130 is not generated to block the leakage path.
  • the insulating particle layer 140 may be applied after the light emitting structure 130 is formed, the size may be smaller than the width of the first hole (W1). Since the width of the first hole W1 may be controlled to 0.5 ⁇ m or more and 3 ⁇ m or less, the diameter of the insulating particles P is preferably at least 0.5 ⁇ m.
  • the diameter of the insulating particles (P) may be 150nm or more and less than 500nm. If the diameter is less than 150nm, the insulating particles (P) is stuck to the upper end of the light emitting structure 130 there is a problem that the luminous efficiency is reduced. That is, when the diameter is less than 150nm, the attraction of the light emitting structure 130 and the insulating particles (P) is stronger than the attraction between the insulating particles (P) it may be difficult to uniformly apply to the lower end of the light emitting structure (130).
  • the gap between the insulating particles P increases, so that the conductive layer 150 penetrates to the lower end of the light emitting structure 130 when the conductive layer 150 is formed. If the diameter of the insulating particles (P) is 200nm to 400nm can solve the problems listed more effectively.
  • the gap between the insulating particles P since the gap between the insulating particles P is present in the insulating particle layer 140, it may have a light extraction effect as compared with the insulating film 120. That is, the light L1 generated from the side surface of the light emitting structure 130 covering the insulating particle layer 140 may be scattered in the insulating particle layer 140 and emitted to the outside. Therefore, luminous efficiency can be improved.
  • the porosity may be about 0.2 to 0.3, but is not limited thereto.
  • FIG. 8 is a view illustrating a state in which an insulating particle layer is disposed between light emitting structures having various shapes
  • FIG. 9 is a photo illustrating a state in which the insulating particle layer is disposed between various light emitting structures.
  • the insulating particle layer 140 may be formed of an insulating film.
  • Exemplary PVDs such as sputtering, E-Beam evaporation, Thermal evaporation, Pulsed Laser Deposition, Laser molecular beam epitaxy Process and CVD processes such as MOCVD, HVPE, ALD, PECVD, LPCVD, APCVD can be applied.
  • FIG. 10 is a view illustrating a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1
  • FIG. 11 is a photo illustrating a state in which insulating particles of different sizes are disposed between the light emitting structures of FIG. 1
  • FIG. 12. 1 is a view illustrating a state in which insulating particles having different sizes are randomly disposed between the light emitting structures of FIG. 1.
  • the insulating particle layer 140 may include first insulating particles P1 having a first diameter and second insulating particles P2 having a second diameter.
  • the second diameter may be larger than the first diameter.
  • the first insulating particles P1 may constitute a lower insulating particle layer, and the second insulating particles P2 may constitute an upper insulating particle layer.
  • the first insulating particles P1 having a small diameter can be densely packed in the first holes W1 to effectively block the second leakage path.
  • the second insulating particles P2 having a relatively large diameter may emit light emitted from the side surface of the light emitting structure 130 to the outside.
  • the first insulating particles P1 and the second insulating particles P2 may be randomly dispersed.
  • two kinds of insulating particles P1 and P2 having different sizes may be dispersed to reduce porosity. Therefore, the first to third leakage paths can be effectively blocked.
  • FIG. 13 is a view illustrating a state in which insulating particles having different materials are randomly disposed between the light emitting structures of FIG. 1
  • FIG. 14 is a view illustrating a state in which insulating particles having different shapes are randomly disposed between the light emitting structures of FIG. 1. to be.
  • the plurality of insulating particles P3 and P4 having different materials may be SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , TiO 2 may be selected. Therefore, insulating materials having different effects may be mixed. For example, by using SiO 2 having excellent electrical insulation and Al 2 O 3 having excellent reflectance, electrical insulation and light extraction may be simultaneously improved.
  • the shapes of the insulating particles P3, P4, and P5 may be different from each other.
  • the shape of the insulating particles P3, P4, P5 is not particularly limited.
  • the shape of the insulating particles (P3, P4, P5) is spherical, rod-like, polygonal, cube-like (branched), branched, complex, Polygonal shape and the like can be applied in various ways.
  • FIG. 15 is a view illustrating a surface layer formed on the light emitting structure of FIG. 1
  • FIG. 16 is a view illustrating a state in which an insulating particle layer is formed between the surface treated light emitting structures of FIG. 15.
  • a surface layer 135 may be further formed on the light emitting structure 130.
  • GaN semiconductors are exposed to air and have tens of nm thick Ga 2 O 3 layers. Since the Ga 2 O 3 layer is hydrophilic (Hydrophillic), the attraction to the insulating particles is stronger. Therefore, when the insulating particle layer is formed, most of the insulating particles are attached to the light emitting structure 130, and thus uniform coating becomes difficult.
  • the surface layer 135 When the surface treatment material is applied to the light emitting structure 130, the surface layer 135 has a hydrophobic property. Therefore, the attraction force with the insulating particles P having a hydrophilic surface is weakened to form a uniform insulating particle layer 140. That is, the attraction between the insulating particles (P) is greater than the attraction between the insulating particles (P) and the light emitting structure 130 can be uniformly applied.
  • the surface treatment material may be selected from various materials that can impart hydrophobicity.
  • it may include a silane-based material or an organic-inorganic silane compound.
  • the surface treatment material may include at least one selected from heptadecafluorodecyltrimethoxysilane (PFAS), octadecyldimethylchlorosilane, octadecyltrichlorosilane (OTS), tris (trimethylsiloxy silylethyl-dimethylchlorosilane, octyl dimethylchlorosilane, dimethyldichlorosilane, butyl dimethyl chlorosilane, and trimethylchlorosilane.
  • PFAS heptadecafluorodecyltrimethoxysilane
  • OTS octadecyltrichlorosilane
  • tris trimethylsiloxy silylethyl-dimethylchlor
  • the cover layer S having the same composition as the surface layer 135 may also be formed in the first hole W1, thereby enabling uniform coating of the insulating particles.
  • the present invention is not limited thereto, and the insulating film 120 may maintain a hydrophilic surface to easily insert the insulating particles into the first hole W1.
  • the method in which the insulating film maintains the hydrophilic surface is not particularly limited. For example, it may be selectively coated only on the light emitting structure 130 using a mask.
  • 17A to 17F are views for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • a conductive base layer 131 is formed on the substrate 110.
  • the substrate 110 may be formed of a material selected from sapphire (Al 2 O 3), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.
  • the base layer 131 may have the same composition as the first semiconductor core, but is not limited thereto.
  • the base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.
  • an insulating layer 120 having a plurality of first holes W1 is formed on the base layer 131.
  • the insulating layer 120 may be selected from various insulating materials such as SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , TiO 2 .
  • the first hole W1 can be produced in a width of 0.5 ⁇ m or more and 3 ⁇ m or less.
  • a plurality of light emitting structures 130 are grown on the insulating film 120.
  • the growth method of the light emitting structure 130 all conventional semiconductor growth methods may be applied.
  • the first semiconductor core 132 may be grown on the surface of the base layer 131, and an active layer 134 and a second semiconductor layer 133 may be formed thereon.
  • the active layer 134 and the second semiconductor layer 133 may be grown on the insulating layer 120. If necessary, a mask pattern may be used to grow the light emitting structure 130.
  • a solution in which insulating particles P are dispersed may be coated on the light emitting structures 130.
  • the solution is not particularly limited.
  • Dispersion methods include drop-coating, dip coating, spin coating, electrophoretic deposition, self-assembly at the gas / liquid interface, and transceiver methods. (transfer from the gas / liquid to the gas / solid interface), and spray coating (spray coating) can be used. If a solution is used, the solution may be volatilized after coating.
  • the diameter of the insulating particles P may be 150 nm or more and less than 500 nm. Therefore, the diameter of the insulating particles may be smaller than the diameter of the first hole (W1).
  • the material of the insulating particles P may be different from the material of the insulating film 120, and the diameter size may be different.
  • the insulating particle layer 140 may be formed so that all of the aforementioned characteristics of the insulating particle may be applied.
  • the light emitting structure 130 may be subjected to surface treatment in advance.
  • the surface of the light emitting structure may be hydrophobic to allow uniform coating of the insulating particles P by surface treatment.
  • the silane-based material or the organic-inorganic silane compound may be coated on the light emitting structure 130.
  • the conductive layer 150 may be formed on the insulating particle layer 140, and the filling layer 160 may be further formed thereon.
  • Fill layer 160 may be an optically transparent layer or an insulating layer.
  • the filling layer 160 may include spin on glass.
  • the height of the filling layer 160 may be lower than the height of the light emitting structure 130.
  • the second electrode 172 may be formed on the light emitting structure 130 exposed to the outside of the filling layer 160, and the first electrode 171 may be formed on the partially exposed base layer 131.
  • FIG. 18 is a conceptual view of a light emitting device according to another embodiment of the present invention
  • FIG. 19 is a photograph of a conventional light emitting device
  • FIG. 20 is an enlarged view of a portion A of FIG. 18,
  • FIG. 21 is a first semiconductor layer core of FIG. 18.
  • 22 is a photograph of the light emitting structure of FIG. 18.
  • the light emitting device includes a conductive base layer 131 disposed on the substrate 110, and a plurality of first holes W1 disposed on the conductive base layer 131.
  • the first insulating layer 120 and a plurality of light emitting structures 130 are electrically connected to the conductive base layer 131 through the first hole W1.
  • the substrate 110 may include a conductive substrate or an insulating substrate.
  • the substrate 110 may be a material or a carrier wafer suitable for growing a semiconductor material.
  • the substrate 110 may be formed of a material selected from sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.
  • the conductive base layer 131 may be formed on the substrate 110 and provide a growth surface of the light emitting structure 130. In addition, the conductive base layer 131 may be electrically connected to the first electrode 171 and the light emitting structure 130.
  • the conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto.
  • the conductive base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.
  • the first insulating layer 120 is disposed on the conductive base layer 131.
  • the first insulating layer 120 includes a plurality of first holes W1 through which the conductive base layer 131 and the light emitting structure 130 are electrically connected.
  • the plurality of first holes W1 may be formed by a mask pattern.
  • the first insulating layer 120 may include an insulating material such as SiO 2 or SiNx, but is not limited thereto.
  • the plurality of light emitting structures 130 may be formed on the first semiconductor core 132 and the first semiconductor core 132 that are electrically connected to the conductive base layer 131 through the first hole W1.
  • the second semiconductor layer 133 may be formed on the active layer 134.
  • the light emitting structure 130 may grow in a substantially vertical direction on the substrate 110 and have a size of nano size. Light emitted from the light emitting structure 130 may be emitted in the direction of the substrate 110 and / or in the opposite direction.
  • the first semiconductor core 132 may grow on the surface of the conductive base layer 131 exposed by the first hole W1.
  • the first semiconductor core 132 may be a nanorod, but is not limited thereto.
  • the first semiconductor core 132 may be a compound semiconductor such as a III-V group or a II-VI group, and a first dopant may be doped into the first semiconductor core 132.
  • the first semiconductor core 132 is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0 ⁇ x1 ⁇ 1, 0 ⁇ y1 ⁇ 1, 0 ⁇ x1 + y1 ⁇ 1), for example GaN, AlGaN, InGaN, InAlGaN and the like can be selected.
  • the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, Te.
  • the first semiconductor core 132 doped with the first dopant may be an n-type semiconductor.
  • the active layer grown on the pointed core may have a problem in which the upper region A is partially collapsed.
  • the collapsed region forms a first leakage current path.
  • the dislocation present between B and nGaN forms a second leakage current path.
  • the first semiconductor core 132 may include a first flat surface 132a formed at an upper portion thereof.
  • the method of controlling the top of the first semiconductor core 132 to be flat may vary. For example, it may be grown in a nitrogen atmosphere to control the top flat, or may be controlled by mechanical leveling.
  • the active layer 134 is disposed on the first semiconductor core 132. Accordingly, the active layer 134 includes a second planar surface 134a formed on the first planar surface 132a of the first semiconductor core 132. Therefore, the problem that the active layer 134 is sufficiently supported by the first semiconductor core 132 may collapse.
  • the active layer 134 is a layer where electrons (or holes) injected through the first semiconductor core 132 meet holes (or electrons) injected through the second semiconductor layer 133.
  • the active layer 134 transitions to a low energy level as electrons and holes recombine, and may generate light having a corresponding wavelength. There is no restriction on the emission wavelength in this embodiment.
  • the active layer 134 may have any one of a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum line structure, and the active layer 134
  • the structure of is not limited to this.
  • the active layer 134 may have a structure in which a plurality of well layers and barrier layers are alternately arranged.
  • the well layer and the barrier layer may have a composition formula of InxAlyGa1-x-yN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1), and the energy bandgap of the barrier layer is the energy of the well layer. It may be larger than the bandgap.
  • the second semiconductor layer 133 is disposed on the active layer 134.
  • the second semiconductor layer 133 may be formed of a compound semiconductor such as a group III-V group or a group II-VI group, and a second dopant may be doped into the second semiconductor layer 133.
  • the second semiconductor layer 133 may be formed of a semiconductor material having a composition formula of In x5 Al y2 Ga 1 -x5- y2 N (0 ⁇ x5 ⁇ 1, 0 ⁇ y2 ⁇ 1, 0 ⁇ x5 + y2 ⁇ 1), or AlInN, AlGaAs. It may be formed of a material selected from GaP, GaAs, GaAsP, AlGaInP.
  • the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba
  • the second semiconductor layer 133 doped with the second dopant may be a p-type semiconductor.
  • An electron blocking layer EBL may be disposed between the active layer 134 and the second semiconductor layer 133.
  • the electron blocking layer is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0 ⁇ x1 ⁇ 1, 0 ⁇ y1 ⁇ 1, 0 ⁇ x1 + y1 ⁇ 1), for example AlGaN, InGaN, InAlGaN may be selected from, but is not limited thereto.
  • the second insulating layer 141 may be disposed on the second semiconductor layer 133.
  • the second insulating layer 141 may block the first leakage current path and / or the second leakage current path.
  • the height h2 of the second insulating layer 141 may be formed to 1/5 to 1/2 of the height h1 of the second semiconductor layer 133.
  • the leakage current path may not be effectively blocked.
  • the emission area may be excessively reduced.
  • the conductive layer 160 is disposed on the light emitting structure 130.
  • the conductive layer 160 may electrically connect the second electrode 172 and the second semiconductor layer 133.
  • the first electrode 171 may be disposed on the partially exposed conductive base layer 131 and electrically connected to the first semiconductor core 132.
  • the light emitting structure 130 may be applied to all the various shapes. Depending on the growth conditions, it may include all of the pyramid shape, nano rod shape, and the flat top shape. Referring to FIG. 21, even when the first flat surface 132a is formed on the first semiconductor core 132, the final light emitting structure 130 may have a pyramid shape as shown in FIG. 22.
  • FIG. 23 is a conceptual view of a light emitting device according to another embodiment of the present invention.
  • the light emitting device may include a conductive base layer 131, a first insulating layer 120 disposed on the conductive base layer 131 and including a plurality of first holes W1, And a plurality of light emitting structures 130 connected to the conductive base layer 131 through the first hole W1.
  • the light emitting structure 130 is disposed on the first semiconductor core 132 electrically connected to the conductive base layer 131, the active layer 134 disposed on the first semiconductor core 132, and the active layer 134.
  • the second semiconductor layer 133 is included.
  • the above-described configuration may be applied as it is except for the upper portion 132b of the first semiconductor core 132. That is, the general structure of the conductive base layer 131, the first insulating layer 120, the second insulating layer 141, and the light emitting structure may be applied as it is.
  • the upper portion 132b of the first semiconductor core 132 may be controlled to have a different doping concentration from the conductive base layer 131.
  • the upper portion 132b of the first semiconductor core 132 may include an undoped u-GaN layer.
  • the conductive portion of the first semiconductor core 132 and the second semiconductor layer 133 may not be electrically connected by the u-GaN layer. That is, the upper portion 132b of the first semiconductor core 132 may block the current leakage path.
  • the height at which the upper portion 132b starts may be 1/5 to 1/2 of the second semiconductor layer 133.
  • 24A to 24E are flowcharts illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • the method of manufacturing a light emitting device may include forming a first insulating layer 120 having a plurality of first holes W1 on the conductive base layer 131, and forming a first insulating layer 120 on the first hole W1.
  • a conductive conductive base layer 131 is formed on the substrate 110.
  • the substrate 110 may be formed of a material selected from sapphire (Al 2 O 3), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.
  • the conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto.
  • the conductive base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.
  • a first insulating layer 120 having a plurality of first holes W1 is formed on the conductive base layer 131.
  • the first insulating layer 120 may be formed of various insulating materials such as SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , and TiO 2 .
  • the first hole W1 may be manufactured to have a width of 0.5 ⁇ m or more and 3 ⁇ m or less, but is not limited thereto.
  • a plurality of light emitting structures 130 are grown on the first insulating layer 120.
  • all conventional semiconductor growth methods may be applied.
  • all CVD processes such as MOCVD, HVPE, ALD, PECVD, LPCVD, and APCVD may be applied.
  • the first semiconductor core 132 may be grown on the surface of the conductive base layer 131.
  • the first semiconductor core 132 may be grown in a nitrogen atmosphere so that the upper portion of the first semiconductor core 132 may have the first flat surface 132a.
  • the active layer 134 and the second semiconductor layer 133 may be sequentially grown.
  • the active layer 134 may grow along the outer surface of the first semiconductor core 132.
  • the active layer has a second planar surface 134.
  • the end may be sharply controlled by growing in a hydrogen and nitrogen atmosphere.
  • a second insulating layer 141 may be formed on the light emitting structure 130 and the first insulating layer 120.
  • the height of the second insulating layer 141 may be formed to 1/5 to 1/2 of the second semiconductor layer 133.
  • the conductive layer 160 covering the light emitting structure 130 may be formed, and the first electrode 171 and the second electrode 172 may be formed.
  • 25 is a flowchart illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • the step of forming a first insulating layer 120 having a plurality of first holes on the conductive base layer 131, and the first semiconductor core 132 on the first hole may be applied as it is, including growing the light emitting structure 130 including the active layer 134 and the second semiconductor layer 133.
  • the characteristic part will be described.
  • the first semiconductor core 132 may be grown on the surface of the conductive base layer 131.
  • the first semiconductor core 132 may be grown by blocking the doping element supply from the upper portion 132b.
  • the upper portion 132b of the first semiconductor core 132 may include a u-GaN layer.
  • trace amounts of doping elements may be doped depending on the growth conditions.
  • the active layer 134 and the second semiconductor layer 133 may be sequentially grown.
  • the active layer 134 may grow along the outer surface of the first semiconductor core 132. According to this structure, even when the upper portion of the light emitting structure collapses, the first semiconductor core 132 and the second semiconductor layer 133 may not be electrically connected by the u-GaN layer. That is, the u-GaN layer may block the current leakage path.
  • the light emitting device may further include an optical member such as a light guide plate, a prism sheet, and a diffusion sheet to function as a backlight unit.
  • an optical member such as a light guide plate, a prism sheet, and a diffusion sheet to function as a backlight unit.
  • the light emitting device of the embodiment may be further applied to a display device, a lighting device, and a pointing device.
  • the display device may include a bottom cover, a reflector, a light emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter.
  • the bottom cover, the reflector, the light emitting module, the light guide plate, and the optical sheet may form a backlight unit.
  • the reflecting plate is disposed on the bottom cover, and the light emitting module emits light.
  • the light guide plate is disposed in front of the reflective plate to guide light emitted from the light emitting module to the front, and the optical sheet includes a prism sheet or the like and is disposed in front of the light guide plate.
  • the display panel is disposed in front of the optical sheet, the image signal output circuit supplies the image signal to the display panel, and the color filter is disposed in front of the display panel.
  • the lighting apparatus may include a light source module including a substrate and a light emitting device according to an embodiment, a heat dissipation unit for dissipating heat of the light source module, and a power supply unit for processing or converting an electrical signal provided from the outside and providing the light source module to the light source module.
  • the lighting device may include a lamp, a head lamp, a street lamp or the like.

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Abstract

An embodiment provides a light-emitting element and a display device comprising the same, the light-emitting element comprising: a conductive base layer; an insulating film, which is arranged on the base layer, and which comprises a plurality of first holes; a plurality of light-emitting structures, each comprising a first semiconductor core, which is electrically connected to the base layer through the first holes, an active layer, which is arranged on the first semiconductor core, and a second semiconductor layer; an insulating particle layer comprising insulating particles that fill the space between the plurality of light-emitting structures; and a first conductive layer arranged on the insulating particle layer, wherein the diameter of the insulating particles is smaller than the width of the first holes.

Description

발광소자 및 이를 포함하는 표시장치Light emitting device and display device including same

실시 예는 발광소자 및 이를 포함하는 표시장치에 관한 것이다.The embodiment relates to a light emitting device and a display device including the same.

발광소자(Light Emitting Device, LED)는 전기에너지를 빛 에너지로 변환하는 화합물 반도체 소자로서, 화합물반도체의 조성비를 조절함으로써 다양한 색상구현이 가능하다.A light emitting device (LED) is a compound semiconductor device that converts electrical energy into light energy, and various colors can be realized by adjusting the composition ratio of the compound semiconductor.

질화물반도체 발광소자는 형광등, 백열등 등 기존의 광원에 비해 저소비 전력, 반영구적인 수명, 빠른 응답속도, 안전성, 환경친화성의 장점을 갖고 있다. 따라서, LCD(Liquid Crystal Display) 표시 장치의 백라이트를 구성하는 냉음극관(CCFL: Cold Cathode Fluorescence Lamp)을 대체하는 발광 다이오드 백라이트, 형광등이나 백열 전구를 대체할 수 있는 백색 발광 다이오드 조명 장치, 자동차 헤드 라이트 및 신호등에까지 응용이 확대되고 있다.The nitride semiconductor light emitting device has advantages of low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent lamps and incandescent lamps. Therefore, LED backlights that replace the Cold Cathode Fluorescence Lamps (CCFLs) that make up the backlight of liquid crystal display (LCD) displays, white LED lighting devices that can replace fluorescent or incandescent bulbs, and automotive headlights. And the application is expanding to traffic lights.

최근에는, 수직 성장된 나노 구조물을 이용한 발광소자가 개발되고 있다. 이러한 나노 구조물은 전면에서 발광하므로 발광면적을 넓힐 수 있다.Recently, light emitting devices using vertically grown nanostructures have been developed. Since the nanostructures emit light from the front surface, the light emitting area can be widened.

그러나, 나노 구조물의 하단부에서 전류가 밀집되어 누설 전류가 발생하는 문제가 있다. 또한, 나노 구조물의 미성장 영역 또는 나노 구조물이 부러진 영역에서 누설 전류가 발생하여 전기적 특성이 떨어지는 문제가 있다.However, there is a problem that leakage current occurs because current is concentrated at the lower end of the nanostructure. In addition, a leakage current occurs in an ungrown region of the nanostructure or a region in which the nanostructure is broken, resulting in a decrease in electrical characteristics.

실시 예는 누설 전류를 감소할 수 있는 발광소자 및 이를 포함하는 표시장치를 제공한다.The embodiment provides a light emitting device capable of reducing leakage current and a display device including the same.

실시 예에서 해결하고자 하는 과제는 이에 한정되는 것은 아니며, 아래에서 설명하는 과제의 해결수단이나 실시 형태로부터 파악될 수 있는 목적이나 효과도 포함된다고 할 것이다.The problem to be solved in the examples is not limited thereto, and the object or effect that can be grasped from the solution means or the embodiment described below will also be included.

일 실시 예에 따른 발광소자는, 도전성 베이스층; 상기 베이스층 상에 배치되고 복수 개의 제1홀을 포함하는 절연막; 상기 제1홀을 통해 상기 베이스층과 전기적으로 연결되는 제1반도체 코어와, 상기 제1반도체 코어상에 배치되는 활성층, 및 제2반도체층을 포함하는 복수 개의 발광 구조물; 상기 복수 개의 발광 구조물의 사이에 채워지는 절연입자를 포함하는 절연입자층; 및 상기 절연입자층 상에 배치되는 제1도전층을 포함하고, 상기 절연입자의 직경은 상기 제1홀의 폭보다 작다.In one embodiment, a light emitting device includes: a conductive base layer; An insulating layer disposed on the base layer and including a plurality of first holes; A plurality of light emitting structures including a first semiconductor core electrically connected to the base layer through the first hole, an active layer disposed on the first semiconductor core, and a second semiconductor layer; An insulating particle layer including insulating particles filled between the plurality of light emitting structures; And a first conductive layer disposed on the insulating particle layer, wherein the diameter of the insulating particle is smaller than the width of the first hole.

상기 복수 개의 제1홀 중 적어도 어느 하나에는 상기 절연입자가 충진될 수 있다.At least one of the plurality of first holes may be filled with the insulating particles.

상기 제1홀의 폭은 0.5㎛ 이상 3㎛ 이하일 수 있다.The width of the first hole may be 0.5 μm or more and 3 μm or less.

상기 절연입자의 직경은 150nm 이상 500nm이하일 수 있다.The diameter of the insulating particles may be 150nm or more and 500nm or less.

상기 절연입자층의 두께는 400nm 이상 1000nm이하일 수 있다.The insulating particle layer may have a thickness of 400 nm or more and 1000 nm or less.

상기 절연막의 재질과 상기 절연입자의 재질은 상이할 수 있다.The material of the insulating film and the material of the insulating particles may be different.

상기 절연입자는 제1직경을 갖는 제1절연입자 및 제2직경을 갖는 제2절연입자를 포함하고, 상기 제2직경은 상기 제1직경보다 클 수 있다.The insulating particles may include first insulating particles having a first diameter and second insulating particles having a second diameter, and the second diameter may be larger than the first diameter.

상기 절연입자층은 제1절연입자를 포함하는 하부 절연입자층, 및 상기 제2절연입자를 포함하는 상부 절연입자층을 포함할 수 있다.The insulating particle layer may include a lower insulating particle layer including a first insulating particle, and an upper insulating particle layer including the second insulating particle.

상기 제1절연입자는 상기 복수 개의 제1홀 중 적어도 어느 하나에 충진될 수 있다.The first insulating particles may be filled in at least one of the plurality of first holes.

상기 절연입자층은 상기 제1절연입자와 제2절연입자가 랜덤하게 분산될 수 있다.In the insulating particle layer, the first insulating particles and the second insulating particles may be randomly dispersed.

상기 제2반도체층상에 형성된 표면처리층을 포함할 수 있다.It may include a surface treatment layer formed on the second semiconductor layer.

상기 표면처리층은 실란계 물질을 포함할 수 있다.The surface treatment layer may include a silane-based material.

일 실시 예에 따른 발광소자 제조방법은, 도전성 베이스층 상에 복수 개의 제1홀을 갖는 절연막을 형성하는 단계; 상기 제1홀 상에 제1반도체 코어, 활성층, 및 제2반도체층을 포함하는 발광 구조물을 성장시키는 단계; 상기 발광 구조물 사이에 절연입자층을 형성하는 단계; 상기 절연입자층 및 상기 발광 구조물 상에 도전층을 형성하는 단계를 포함할 수 있다.According to one or more exemplary embodiments, a method of manufacturing a light emitting device includes: forming an insulating layer having a plurality of first holes on a conductive base layer; Growing a light emitting structure including a first semiconductor core, an active layer, and a second semiconductor layer on the first hole; Forming an insulating particle layer between the light emitting structures; The method may include forming a conductive layer on the insulating particle layer and the light emitting structure.

상기 절연입자층을 형성하는 단계는, 상기 제1홀의 폭보다 작은 직경을 갖는 절연입자를 발광구조물 사이에 형성할 수 있다. In the forming of the insulating particle layer, insulating particles having a diameter smaller than the width of the first hole may be formed between the light emitting structures.

상기 절연막의 재질과 상기 절연입자의 재질은 상이할 수 있다.The material of the insulating film and the material of the insulating particles may be different.

상기 절연입자는 제1직경을 갖는 제1절연입자 및 제2직경을 갖는 제2절연입자를 포함하고, 상기 제2직경은 상기 제1직경보다 클 수 있다.The insulating particles may include first insulating particles having a first diameter and second insulating particles having a second diameter, and the second diameter may be larger than the first diameter.

실시 예에 따르면, 누설 전류가 감소되어 전기적 특성이 우수한 발광소자를 제조할 수 있다. According to the embodiment, the leakage current is reduced to manufacture a light emitting device having excellent electrical characteristics.

본 발명의 다양하면서도 유익한 장점과 효과는 상술한 내용에 한정되지 않으며, 본 발명의 구체적인 실시형태를 설명하는 과정에서 보다 쉽게 이해될 수 있을 것이다.Various and advantageous advantages and effects of the present invention are not limited to the above description, and will be more readily understood in the course of describing specific embodiments of the present invention.

도 1은 본 발명의 일 실시 예에 따른 발광소자의 개념도이고,1 is a conceptual diagram of a light emitting device according to an embodiment of the present invention;

도 2는 누설 전류가 발생하는 경로를 설명하기 위한 도면이고,2 is a view for explaining a path in which leakage current occurs;

도 3은 발광 구조물의 하단부에 발생하는 제1누설경로를 보여주는 사진이고,3 is a photograph showing a first leakage path occurring at the lower end of the light emitting structure,

도 4는 발광 구조물이 일부 미형성된 영역에서 발생하는 제2누설경로를 보여주는 사진이고,4 is a photograph showing a second leakage path occurring in a region in which the light emitting structure is partially unformed,

도 5는 절연막의 핀홀에 의해 발생하는 제3누설경로를 보여주는 사진이고,5 is a photograph showing a third leakage path generated by the pinhole of the insulating film,

도 6은 도 1의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 도면이고,6 is a view illustrating a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1,

도 7은 도 1의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 사진이고,7 is a photograph showing a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1,

도 8은 다양한 형상의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 도면이고,8 is a view illustrating a state in which an insulating particle layer is disposed between light emitting structures having various shapes,

도 9는 다양한 형상의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 사진이고,9 is a photograph showing a state in which an insulating particle layer is disposed between light emitting structures having various shapes,

도 10은 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 배치된 상태를 보여주는 도면이고,10 is a view illustrating a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1,

도 11은 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 배치된 상태를 보여주는 사진이고,11 is a photograph showing a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1,

도 12는 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이고,12 is a view illustrating a state in which insulating particles having different sizes are randomly disposed between the light emitting structures of FIG. 1,

도 13은 도 1의 발광 구조물 사이에 재질이 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이고,FIG. 13 is a view illustrating a state in which insulating particles having different materials are randomly disposed between the light emitting structures of FIG. 1,

도 14는 도 1의 발광 구조물 사이에 형상이 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이고,14 is a view illustrating a state in which insulating particles having different shapes are randomly disposed between the light emitting structures of FIG. 1,

도 15는 도 1의 발광 구조물에 표면층이 형성된 상태를 보여주는 도면이고,15 is a view showing a state in which a surface layer is formed on the light emitting structure of FIG. 1,

도 16은 도 15의 표면 처리된 발광 구조물 사이에 절연입자층이 형성된 상태를 보여주는 도면이고,16 is a view illustrating a state in which an insulating particle layer is formed between the surface-treated light emitting structures of FIG. 15,

도 17a 내지 도 17f는 본 발명의 일 실시 예에 따른 발광소자 제조방법을 설명하기 위한 도면들이고,17A to 17F are views for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention;

도 18은 본 발명의 다른 실시 예에 따른 발광소자의 개념도이고,18 is a conceptual diagram of a light emitting device according to another embodiment of the present invention;

도 19는 종래 발광소자의 사진이고,19 is a photograph of a conventional light emitting device,

도 20은 도 18의 A부분 확대도이고,20 is an enlarged view of a portion A of FIG. 18;

도 21은 도 18의 제1반도체층 코어의 사진이고,FIG. 21 is a photograph of the first semiconductor layer core of FIG. 18;

도 22는 도 18의 발광 구조물의 사진이고,22 is a photograph of the light emitting structure of FIG. 18,

도 23은 본 발명의 또 다른 실시 예에 따른 발광소자의 개념도이고23 is a conceptual diagram of a light emitting device according to another embodiment of the present invention;

도 24a 내지 도 24e는 본 발명의 다른 실시 예에 따른 발광소자 제조방법을 보여주는 순서도이고,24A to 24E are flowcharts illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention;

도 25a 내지 도 25e는 본 발명의 또 다른 실시 예에 따른 발광소자 제조방법을 보여주는 순서도이다.25A to 25E are flowcharts illustrating a method of manufacturing a light emitting device according to still another embodiment of the present invention.

본 발명은 다양한 변경을 가할 수 있고 여러 가지 실시 예를 가질 수 있는 바, 특정 실시 예를 도면에 예시하고 설명하고자 한다. 그러나, 이는 본 발명 실시 예를 특정한 실시 형태에 대해 한정하려는 것이 아니며, 실시 예의 사상 및 기술 범위에 포함되는 모든 변경, 균등물 내지 대체물을 포함하는 것으로 이해되어야 한다.As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated and described in the drawings. However, this is not intended to limit the embodiments of the present invention to specific embodiments, it should be understood to include all changes, equivalents, and substitutes included in the spirit and scope of the embodiments.

제 1, 제 2 등과 같이 서수를 포함하는 용어는 다양한 구성 요소들을 설명하는데 사용될 수 있지만, 상기 구성 요소들은 상기 용어들에 의해 한정되지는 않는다. 상기 용어들은 하나의 구성 요소를 다른 구성 요소로부터 구별하는 목적으로만 사용된다. 예를 들어, 실시 예의 권리 범위를 벗어나지 않으면서 제 2 구성 요소는 제 1 구성 요소로 명명될 수 있고, 유사하게 제 1 구성 요소도 제 2 구성 요소로 명명될 수 있다. 및/또는 이라는 용어는 복수의 관련된 기재된 항목들의 조합 또는 복수의 관련된 기재된 항목들 중의 어느 항목을 포함한다.Terms including ordinal numbers such as first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the embodiments, the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component. The term and / or includes a combination of a plurality of related items or any item of a plurality of related items.

본 출원에서 사용한 용어는 단지 특정한 실시 예를 설명하기 위해 사용된 것으로, 본 발명 실시 예를 한정하려는 의도가 아니다. 단수의 표현은 문맥상 명백하게 다르게 뜻하지 않는 한, 복수의 표현을 포함한다. 본 출원에서, "포함하다" 또는 "가지다" 등의 용어는 명세서상에 기재된 특징, 숫자, 단계, 동작, 구성 요소, 부품 또는 이들을 조합한 것이 존재함을 지정하려는 것이지, 하나 또는 그 이상의 다른 특징들이나 숫자, 단계, 동작, 구성 요소, 부품 또는 이들을 조합한 것들의 존재 또는 부가 가능성을 미리 배제하지 않는 것으로 이해되어야 한다.The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of example embodiments. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

실시 예의 설명에 있어서, 어느 한 element가 다른 element의 "상(위) 또는 하(아래)(on or under)"에 형성되는 것으로 기재되는 경우에 있어, 상(위) 또는 하(아래)(on or under)는 두 개의 element가 서로 직접(directly)접촉되거나 하나 이상의 다른 element가 상기 두 element 사이에 배치되어(indirectly) 형성되는 것을 모두 포함한다. 또한 "상(위) 또는 하(아래)(on or under)"으로 표현되는 경우 하나의 element를 기준으로 위쪽 방향뿐만 아니라 아래쪽 방향의 의미도 포함할 수 있다.In the description of the embodiment, when one element is described as being formed "on or under" of another element, it is on (up) or down (on). or under) includes both two elements being directly contacted with each other or one or more other elements are formed indirectly between the two elements. In addition, when expressed as "on" or "under", it may include the meaning of the downward direction as well as the upward direction based on one element.

이하, 첨부된 도면을 참조하여 실시 예를 상세히 설명하되, 도면 부호에 관계없이 동일하거나 대응하는 구성 요소는 동일한 참조 번호를 부여하고 이에 대한 중복되는 설명은 생략하기로 한다.Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings, and the same or corresponding components will be given the same reference numerals regardless of the reference numerals, and redundant description thereof will be omitted.

도 1은 본 발명의 일 실시 예에 따른 발광소자의 개념도이다.1 is a conceptual diagram of a light emitting device according to an embodiment of the present invention.

도 1을 참고하면, 본 발명의 일 실시 예에 따른 발광소자는, 기판(110) 상의 도전성 베이스층(131)과, 복수 개의 제1홀(W1)을 포함하는 절연막(120)과, 복수 개의 발광 구조물(130)과, 복수 개의 발광 구조물(130)의 사이에 배치되는 절연입자층(140), 및 절연입자층(140) 상에 배치되는 제1도전층(150)을 포함한다.Referring to FIG. 1, a light emitting device according to an exemplary embodiment may include a conductive base layer 131 on a substrate 110, an insulating layer 120 including a plurality of first holes W1, and a plurality of light emitting devices. The light emitting structure 130, an insulating particle layer 140 disposed between the plurality of light emitting structures 130, and a first conductive layer 150 disposed on the insulating particle layer 140 are included.

기판(110)은 전도성 기판 또는 절연성 기판을 포함할 수 있다. 기판(110)은 반도체 물질 성장에 적합한 물질이나 캐리어 웨이퍼일 수 있다. 기판(110)은 사파이어(Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP 및 Ge 중 선택된 물질로 형성될 수 있으며, 이에 대해 한정하지는 않는다. The substrate 110 may include a conductive substrate or an insulating substrate. The substrate 110 may be a material or a carrier wafer suitable for growing a semiconductor material. The substrate 110 may be formed of a material selected from sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.

도전성 베이스층(131)은 기판(110) 상에 형성되고 발광 구조물(130)의 성장면을 제공할 수 있다. 또한, 베이스층(131)은 도전성을 가져 제1전극(171)과 발광 구조물(130)을 전기적으로 연결할 수 있다. 도전성 베이스층(131)은 제1반도체 코어(132)와 동일한 조성일 수 있으나 이에 한정하지 않는다. 베이스층(131)은 Si, Ge, Sn, Se, Te와 같은 n형 도펀트가 도핑될 수 있으나 이에 한정하지 않는다.The conductive base layer 131 may be formed on the substrate 110 and provide a growth surface of the light emitting structure 130. In addition, the base layer 131 may be electrically connected to the first electrode 171 and the light emitting structure 130. The conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto. The base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.

절연막(120)은 도전성 베이스층(131)상에 배치된다. 절연막(120)은 베이스층(131)과 발광 구조물(130)이 전기적으로 연결되는 복수 개의 제1홀(W1)을 포함한다. 복수 개의 제1홀(W1)은 마스크 패턴에 의해 형성될 수 있다. 절연막(120)은 SiO2 또는 SiNx와 같은 절연물질을 포함할 수 있으나 이에 한정하지 않는다.The insulating film 120 is disposed on the conductive base layer 131. The insulating layer 120 includes a plurality of first holes W1 through which the base layer 131 and the light emitting structure 130 are electrically connected. The plurality of first holes W1 may be formed by a mask pattern. The insulating layer 120 may include an insulating material such as SiO 2 or SiNx, but is not limited thereto.

복수 개의 발광 구조물(130)은 제1홀(W1)을 통해 베이스층(131)과 전기적으로 연결되는 제1반도체 코어(132), 제1반도체 코어(132)상에 형성되는 활성층(134), 활성층(134) 상에 형성되는 제2반도체층(133)을 포함할 수 있다. The plurality of light emitting structures 130 may include a first semiconductor core 132 electrically connected to the base layer 131 through a first hole W1, an active layer 134 formed on the first semiconductor core 132, It may include a second semiconductor layer 133 formed on the active layer 134.

발광 구조물(130)은 기판(110)상에 실질적으로 수직한 방향으로 성장하며, 나노 사이즈의 크기를 가질 수 있다. 발광 구조물(130)에서 방출된 광은 기판 방향 및/또는 반대 방향으로 방출될 수 있다. The light emitting structure 130 may grow in a substantially vertical direction on the substrate 110 and have a size of nano size. Light emitted from the light emitting structure 130 may be emitted in the substrate direction and / or in the opposite direction.

제1반도체 코어(132)는 제1홀(W1)에 의해 노출된 베이스층(131)의 표면에서 성장할 수 있다. 제1반도체 코어(132)는 나노 로드일 수 있으나 이에 한정하지 않는다. The first semiconductor core 132 may grow on the surface of the base layer 131 exposed by the first hole W1. The first semiconductor core 132 may be a nanorod, but is not limited thereto.

제1반도체 코어(132)는 Ⅲ-Ⅴ족, Ⅱ-Ⅵ족 등의 화합물 반도체일 수 있으며, 제1반도체 코어(132)에 제1도펀트가 도핑될 수 있다. 제1반도체 코어(132)는 Inx1Aly1Ga1-x1-y1N(0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1)의 조성식을 갖는 반도체 재료, 예를 들어 GaN, AlGaN, InGaN, InAlGaN 등에서 선택될 수 있다. 그리고, 제1도펀트는 Si, Ge, Sn, Se, Te와 같은 n형 도펀트일 수 있다. 제1도펀트가 n형 도펀트인 경우, 제1도펀트가 도핑된 제1반도체 코어(132)는 n형 반도체일 수 있다.The first semiconductor core 132 may be a compound semiconductor such as a III-V group or a II-VI group, and a first dopant may be doped into the first semiconductor core 132. The first semiconductor core 132 is a semiconductor material having a composition formula of In x1 Al y1 Ga 1-x1-y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 ≦ x1 + y1 ≦ 1), for example GaN, AlGaN, InGaN, InAlGaN and the like can be selected. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first semiconductor core 132 doped with the first dopant may be an n-type semiconductor.

활성층(134)은 절연막(120)상에서 성장하고 제1반도체 코어(132)상에 배치된다. 활성층(134)은 제1반도체 코어(132)를 통해서 주입되는 전자(또는 정공)와 제2반도체층(133)을 통해서 주입되는 정공(또는 전자)이 만나는 층이다. 활성층(134)은 전자와 정공이 재결합함에 따라 낮은 에너지 준위로 천이하며, 그에 상응하는 파장을 가지는 빛을 생성할 수 있다. 본 실시 예에서 발광 파장에는 제한이 없다.The active layer 134 grows on the insulating film 120 and is disposed on the first semiconductor core 132. The active layer 134 is a layer where electrons (or holes) injected through the first semiconductor core 132 meet holes (or electrons) injected through the second semiconductor layer 133. The active layer 134 transitions to a low energy level as electrons and holes recombine, and may generate light having a corresponding wavelength. There is no restriction on the emission wavelength in this embodiment.

활성층(134)은 단일 우물 구조, 다중 우물 구조, 단일 양자 우물 구조, 다중 양자 우물(Multi Quantum Well; MQW) 구조, 양자점 구조 또는 양자선 구조 중 어느 하나의 구조를 가질 수 있으며, 활성층(134)의 구조는 이에 한정하지 않는다. The active layer 134 may have any one of a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum line structure, and the active layer 134 The structure of is not limited to this.

활성층(134)은 복수 개의 우물층 및 장벽층이 교대로 배치되는 구조를 가질 수 있다. 우물층과 장벽층은 InxAlyGa1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1)의 조성식을 가질 수 있고, 장벽층의 에너지 밴드갭은 우물층의 에너지 밴드갭보다 클 수 있다.The active layer 134 may have a structure in which a plurality of well layers and barrier layers are alternately arranged. The well layer and the barrier layer may have a composition formula of InxAlyGa1-x-yN (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), and the energy bandgap of the barrier layer is the energy of the well layer. It may be larger than the bandgap.

제2반도체층(133)은 절연막(120)상에서 성장하고 활성층(134)상에 배치된다. 제2반도체층(133)은 Ⅲ-Ⅴ족, Ⅱ-Ⅵ족 등의 화합물 반도체로 구현될 수 있으며, 제2반도체층(133)에 제2도펀트가 도핑될 수 있다. 제2반도체층(133)은 Inx5Aly2Ga1 -x5- y2N (0≤x5≤1, 0≤y2≤1, 0≤x5+y2≤1)의 조성식을 갖는 반도체 물질 또는 AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP 중 선택된 물질로 형성될 수 있다. 제2도펀트가 Mg, Zn, Ca, Sr, Ba 등과 같은 p형 도펀트인 경우, 제2도펀트가 도핑된 제2반도체층(133)은 p형 반도체일 수 있다.The second semiconductor layer 133 is grown on the insulating film 120 and disposed on the active layer 134. The second semiconductor layer 133 may be formed of a compound semiconductor such as a group III-V group or a group II-VI group, and a second dopant may be doped into the second semiconductor layer 133. The second semiconductor layer 133 may be formed of a semiconductor material having a composition formula of In x5 Al y2 Ga 1 -x5- y2 N (0≤x5≤1, 0≤y2≤1, 0≤x5 + y2≤1), or AlInN, AlGaAs. It may be formed of a material selected from GaP, GaAs, GaAsP, AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second semiconductor layer 133 doped with the second dopant may be a p-type semiconductor.

활성층(134)과 제2반도체층(133) 사이에는 전자 차단층(EBL)이 배치될 수 있다. 전자 차단층은 Inx1Aly1Ga1 -x1- y1N(0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1)의 조성식을 갖는 반도체 재료, 예를 들어 AlGaN, InGaN, InAlGaN 등에서 선택될 수 있으나 이에 한정하지 않는다.An electron blocking layer EBL may be disposed between the active layer 134 and the second semiconductor layer 133. The electron blocking layer is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0≤x1≤1, 0≤y1≤1, 0≤x1 + y1≤1), for example AlGaN, InGaN, InAlGaN may be selected from, but is not limited thereto.

도전층(150)은 절연입자층(140) 및 발광 구조물(130)상에 배치된다. 도전층(150)은 제2전극(172)과 제2반도체층(133)을 전기적을 연결할 수 있다. 또한, 제1전극(171)은 일부 노출된 베이스층(131)상에 배치되어 제1반도체 코어(132)와 전기적으로 연결될 수 있다.The conductive layer 150 is disposed on the insulating particle layer 140 and the light emitting structure 130. The conductive layer 150 may electrically connect the second electrode 172 and the second semiconductor layer 133. In addition, the first electrode 171 may be disposed on the partially exposed base layer 131 and electrically connected to the first semiconductor core 132.

절연입자층(140)은 복수 개의 발광 구조물(130)의 사이에 채워져 발광 구조물(130)들을 지지하는 동시에 전기적으로 절연할 수 있다. The insulating particle layer 140 may be filled between the plurality of light emitting structures 130 to support the light emitting structures 130 and to electrically insulate the same.

도 2는 누설 전류가 발생하는 경로를 설명하기 위한 도면이고, 도 3은 발광 구조물의 하단부에 발생하는 제1누설경로를 보여주는 사진이고, 도 4는 발광 구조물이 일부 미형성된 영역에서 발생하는 제2누설경로를 보여주는 사진이고, 도 5는 절연막의 핀홀에 의해 발생하는 제3누설경로를 보여주는 사진이다.2 is a view illustrating a path in which leakage current occurs, FIG. 3 is a photograph showing a first leakage path occurring at a lower end of the light emitting structure, and FIG. 4 is a second view in a region in which the light emitting structure is partially unformed. 5 is a photograph showing a leakage path, and FIG. 5 is a photograph showing a third leakage path generated by the pinhole of the insulating layer.

도 2 내지 도 5를 참고하면, 나노 발광 구조물(130)을 포함하는 발광소자에서는 크게 3가지 타입의 누설 경로가 형성될 수 있다. 제1누설경로(D1)는 발광 구조물(130)의 하단부에서 발생할 수 있다. 발광 구조물(130)의 하단부에는 전류밀집현상이 발생한다. 따라서 전류 밀집 영역에서 전류누설 경로가 발생하게 된다. 전류 밀집 영역의 크기는 300~500nm일 수 있다.2 to 5, three types of leakage paths may be formed in the light emitting device including the nano light emitting structure 130. The first leakage path D1 may occur at the lower end of the light emitting structure 130. Current condensation occurs at the lower end of the light emitting structure 130. Therefore, the current leakage path occurs in the current density region. The size of the current density region may be 300 to 500 nm.

제2누설경로(D2)는 발광 구조물(130)이 생성되지 않은 영역 및 발광 구조물(130)이 부러진 영역에서 발생할 수 있다. 공정상 여러 이유로 일부 제1홀(W1)에는 발광 구조물(130)이 성장되지 않을 수 있다. 또한 큰 종횡비 때문에 성장 도중에 발광 구조물(130)이 부러질 수 있다.The second leakage path D2 may occur in a region where the light emitting structure 130 is not generated and a region where the light emitting structure 130 is broken. Due to various processes, the light emitting structure 130 may not be grown in some of the first holes W1. In addition, the light emitting structure 130 may be broken during growth due to the large aspect ratio.

제3누설경로(D3)는 절연막(120) 상에 형성된 결함에 의해 발생할 수 있다. 발광 구조물(130)을 성장시키기 위한 절연막(120)의 막질(Film quality)이 떨어지는 경우 고온/고압의 나노 구조체 성장 환경에서 핀홀(d4)이 발생하여 전류가 누설될 수 있다. 핀홀(d4)의 직경은 50~100nm일 수 있다.The third leakage path D3 may be caused by a defect formed on the insulating layer 120. When the film quality of the insulating layer 120 for growing the light emitting structure 130 is reduced, a pinhole d4 may be generated in a nanostructure growth environment of high temperature / high pressure to leak current. The diameter of the pinhole d4 may be 50 nm to 100 nm.

도 6은 도 1의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 도면이고, 도 7은 도 1의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 사진이다.6 is a view illustrating a state in which an insulating particle layer is disposed between the light emitting structures of FIG. 1, and FIG. 7 is a photograph showing a state in which the insulating particle layer is disposed between the light emitting structures of FIG. 1.

도 6과 도 7을 참고하면, 절연입자층(140)은 복수 개의 발광 구조물(130)의 사이를 절연하여 제1누설경로 및 제3누설경로를 차단할 수 있다. 절연입자층(140)의 두께는 400nm 이상 1000nm이하일 수 있다. 두께가 400nm미만인 경우 발광 구조물(130) 재성장시 형성되는 결함(dislocation)이 도전층(150) 또는 베이스층(131)과 접촉하게 되어 누설 전류가 발생할 수 있다. 두께가 1000nm를 초과하는 경우에는 발광 구조물(130)의 측면(m-plane) 발광 면적이 지나치게 감소하여 발광 효율이 감소할 수 있다. 6 and 7, the insulating particle layer 140 may insulate between the plurality of light emitting structures 130 to block the first leakage path and the third leakage path. The thickness of the insulating particle layer 140 may be 400 nm or more and 1000 nm or less. When the thickness is less than 400 nm, a dislocation formed during regrowth of the light emitting structure 130 may come into contact with the conductive layer 150 or the base layer 131, thereby causing leakage current. When the thickness exceeds 1000 nm, the light emitting area of the side surface (m-plane) of the light emitting structure 130 may be excessively reduced, thereby reducing the light emitting efficiency.

또한, 절연입자층(140)은 발광 구조물(130)이 생성되지 않은 제1홀(W1)에 충진되어 누설경로를 차단할 수 있다. 이를 위해 절연입자층(140)은 발광 구조물(130)이 형성된 후 도포될 수 있으며, 크기는 제1홀(W1)의 폭보다 작을 수 있다. 제1홀(W1)의 폭은 0.5㎛ 이상 3㎛이하로 제어될 수 있으므로, 절연입자(P)의 직경은 적어도 0.5㎛미만인 것이 바람직하다.In addition, the insulating particle layer 140 may be filled in the first hole W1 in which the light emitting structure 130 is not generated to block the leakage path. To this end, the insulating particle layer 140 may be applied after the light emitting structure 130 is formed, the size may be smaller than the width of the first hole (W1). Since the width of the first hole W1 may be controlled to 0.5 μm or more and 3 μm or less, the diameter of the insulating particles P is preferably at least 0.5 μm.

이때, 절연입자(P)의 직경은 150nm 이상 500nm미만일 수 있다. 직경이 150nm미만인 경우에는 절연입자(P)가 발광 구조물(130)의 상단부에 달라붙게 되어 발광효율이 감소하는 문제가 있다. 즉, 직경이 150nm미만인 경우에는 절연입자(P)간의 인력보다 발광 구조물(130)과 절연입자(P)의 인력이 강해져 발광 구조물(130)의 하단부에 균일한 도포가 어려워질 수 있다. At this time, the diameter of the insulating particles (P) may be 150nm or more and less than 500nm. If the diameter is less than 150nm, the insulating particles (P) is stuck to the upper end of the light emitting structure 130 there is a problem that the luminous efficiency is reduced. That is, when the diameter is less than 150nm, the attraction of the light emitting structure 130 and the insulating particles (P) is stronger than the attraction between the insulating particles (P) it may be difficult to uniformly apply to the lower end of the light emitting structure (130).

직경이 500nm를 초과하는 경우에는 절연입자(P) 사이의 공극이 커져 도전층(150) 형성시 발광 구조물(130)의 하단까지 도전층(150)이 침투하는 문제가 있다. 절연입자(P)의 직경이 200nm 내지 400nm인 경우 열거한 문제점을 더욱 효과적으로 해결할 수 있다.When the diameter exceeds 500 nm, the gap between the insulating particles P increases, so that the conductive layer 150 penetrates to the lower end of the light emitting structure 130 when the conductive layer 150 is formed. If the diameter of the insulating particles (P) is 200nm to 400nm can solve the problems listed more effectively.

절연입자층(140)에는 절연입자(P)간 공극이 존재하므로 절연막(120)에 비해 광 추출 효과를 가질 수 있다. 즉, 절연입자층(140)을 커버한 발광 구조물(130)의 측면에서 발생한 광(L1)은 절연입자층(140) 내에서 산란되어 외부로 출사될 수도 있다. 따라서, 발광효율이 향상될 수 있다. 공극률은 약 0.2 내지 0.3일 수 있으나 이에 한정하지 않는다.Since the gap between the insulating particles P is present in the insulating particle layer 140, it may have a light extraction effect as compared with the insulating film 120. That is, the light L1 generated from the side surface of the light emitting structure 130 covering the insulating particle layer 140 may be scattered in the insulating particle layer 140 and emitted to the outside. Therefore, luminous efficiency can be improved. The porosity may be about 0.2 to 0.3, but is not limited thereto.

도 8은 다양한 형상의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 도면이고, 도 9는 다양한 형상의 발광 구조물 사이에 절연입자층이 배치된 상태를 보여주는 사진이다.8 is a view illustrating a state in which an insulating particle layer is disposed between light emitting structures having various shapes, and FIG. 9 is a photo illustrating a state in which the insulating particle layer is disposed between various light emitting structures.

도 8 및 도 9를 참고하면, 발광 구조물(130)은 다양한 형상이 모두 적용될 수 있다. 성장 조건에 따라 피라미드 형상, 나노 로드 형상, 및 상단이 평평한 형상을 모두 포함할 수 있다. 이때, 절연입자층(140)을 절연막으로 형성할 수도 있다. 절연막 형성방법에는 제한이 없다. 예시적으로 스퍼터링(Sputtering), E-빔 증착(E-Beam evaporation), 열 증착(Thermal evaporation), 펄스 레이저 증착(Pulsed Laser Deposition), 레이저 분자빔 에피텍시(Laser molecular beam epitaxy)와 같은 PVD 공정, 및 MOCVD, HVPE, ALD, PECVD, LPCVD, APCVD 등의 CVD 공정이 모두 적용될 수 있다. 8 and 9, various shapes of the light emitting structure 130 may be applied. Depending on the growth conditions, it may include all of the pyramid shape, nano rod shape, and the flat top shape. In this case, the insulating particle layer 140 may be formed of an insulating film. There is no restriction on the method of forming the insulating film. Exemplary PVDs such as sputtering, E-Beam evaporation, Thermal evaporation, Pulsed Laser Deposition, Laser molecular beam epitaxy Process and CVD processes such as MOCVD, HVPE, ALD, PECVD, LPCVD, APCVD can be applied.

도 10은 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 배치된 상태를 보여주는 도면이고, 도 11은 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 배치된 상태를 보여주는 사진이고, 도 12는 도 1의 발광 구조물 사이에 크기가 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이다.FIG. 10 is a view illustrating a state in which insulating particles having different sizes are disposed between the light emitting structures of FIG. 1, and FIG. 11 is a photo illustrating a state in which insulating particles of different sizes are disposed between the light emitting structures of FIG. 1, and FIG. 12. 1 is a view illustrating a state in which insulating particles having different sizes are randomly disposed between the light emitting structures of FIG. 1.

도 10과 도 11을 참고하면, 절연입자층(140)은 제1직경을 갖는 제1절연입자(P1), 및 제2직경을 갖는 제2절연입자(P2)를 포함할 수 있다. 이때, 제2직경은 제1직경보다 클 수 있다. 제1절연입자(P1)는 하부 절연입자층을 구성할 수 있고, 제2절연입자(P2)는 상부 절연입자층을 구성할 수 있다.10 and 11, the insulating particle layer 140 may include first insulating particles P1 having a first diameter and second insulating particles P2 having a second diameter. In this case, the second diameter may be larger than the first diameter. The first insulating particles P1 may constitute a lower insulating particle layer, and the second insulating particles P2 may constitute an upper insulating particle layer.

이러한 구성에 의하면 직경이 작은 제1절연입자(P1)가 제1홀(W1)에 조밀하게 충진되어 제2누설경로를 효과적으로 차단할 수 있다. 또한, 상대적으로 직경이 큰 제2절연입자(P2)는 발광 구조물(130)의 측면에서 발광된 광을 외부로 방출할 수 있다.According to this configuration, the first insulating particles P1 having a small diameter can be densely packed in the first holes W1 to effectively block the second leakage path. In addition, the second insulating particles P2 having a relatively large diameter may emit light emitted from the side surface of the light emitting structure 130 to the outside.

도 12를 참고하면, 제1절연입자(P1)와 제2절연입자(P2)는 랜덤하게 분산될 수 있다. 이 경우 크기가 상이한 두 종류의 절연입자(P1, P2)가 분산되어 공극률을 줄일 수 있다. 따라서, 제1 내지 제3누설경로를 효과적으로 차단할 수 있다.Referring to FIG. 12, the first insulating particles P1 and the second insulating particles P2 may be randomly dispersed. In this case, two kinds of insulating particles P1 and P2 having different sizes may be dispersed to reduce porosity. Therefore, the first to third leakage paths can be effectively blocked.

도 13은 도 1의 발광 구조물 사이에 재질이 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이고, 도 14는 도 1의 발광 구조물 사이에 형상이 상이한 절연입자가 랜덤하게 배치된 상태를 보여주는 도면이다.FIG. 13 is a view illustrating a state in which insulating particles having different materials are randomly disposed between the light emitting structures of FIG. 1, and FIG. 14 is a view illustrating a state in which insulating particles having different shapes are randomly disposed between the light emitting structures of FIG. 1. to be.

도 13을 참고하면, 재질이 상이한 복수 개의 절연입자(P3, P4)는 SiO2, Si3N4, Al2O3, ZrSiO4, HfSiO4, ZrO2, HfO2, La2O3, Ta2O5, TiO2에서 선택될 수 있다. 따라서, 서로 다른 효과가 있는 절연재질이 혼합될 수 있다. 일 예로, 전기적 절연성이 우수한 SiO2와 반사율이 우수한 Al2O3를 사용하여 전기적 절연성 및 광 추출성을 동시에 향상시킬 수도 있다.Referring to FIG. 13, the plurality of insulating particles P3 and P4 having different materials may be SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , TiO 2 may be selected. Therefore, insulating materials having different effects may be mixed. For example, by using SiO 2 having excellent electrical insulation and Al 2 O 3 having excellent reflectance, electrical insulation and light extraction may be simultaneously improved.

도 14를 참고하면, 절연입자(P3, P4, P5)의 형상은 서로 상이할 수 있다. 절연입자(P3, P4, P5)의 형상은 특별히 한정하지 않는다. 절연입자(P3, P4, P5)의 형상은 구형상(Spherical), 막대형상(rod-like), 삼각형상(polygonal), 큐브형상(polyhedral), 브랜치 형상(branched), 복합형상(complex), 다각 형상 등이 다양하게 적용될 수 있다.Referring to FIG. 14, the shapes of the insulating particles P3, P4, and P5 may be different from each other. The shape of the insulating particles P3, P4, P5 is not particularly limited. The shape of the insulating particles (P3, P4, P5) is spherical, rod-like, polygonal, cube-like (branched), branched, complex, Polygonal shape and the like can be applied in various ways.

도 15는 도 1의 발광 구조물에 표면층이 형성된 상태를 보여주는 도면이고, 도 16은 도 15의 표면 처리된 발광 구조물 사이에 절연입자층이 형성된 상태를 보여주는 도면이다.FIG. 15 is a view illustrating a surface layer formed on the light emitting structure of FIG. 1, and FIG. 16 is a view illustrating a state in which an insulating particle layer is formed between the surface treated light emitting structures of FIG. 15.

도 15 및 도 16을 참고하면, 발광 구조물(130)에 표면층(135)이 더 형성될 수 있다. GaN 반도체는 공기 중에 노출되어 수십 nm 두께의 Ga2O3층을 갖는다. Ga2O3층은 친수성(Hydrophillic)이므로 절연입자와의 인력이 강해진다. 따라서, 절연입자층을 형성하는 경우 대부분의 절연입자가 발광 구조물(130)에 붙게 되어 균일한 도포가 어려워진다. 15 and 16, a surface layer 135 may be further formed on the light emitting structure 130. GaN semiconductors are exposed to air and have tens of nm thick Ga 2 O 3 layers. Since the Ga 2 O 3 layer is hydrophilic (Hydrophillic), the attraction to the insulating particles is stronger. Therefore, when the insulating particle layer is formed, most of the insulating particles are attached to the light emitting structure 130, and thus uniform coating becomes difficult.

발광 구조물(130)에 표면처리물질을 도포하면 표면층(135)은 소수성(Hydrophobic) 성질을 갖게 된다. 따라서, 친수성 표면을 갖는 절연입자(P)와의 인력이 약해져 균일한 절연입자층(140)을 형성할 수 있다. 즉, 절연입자(P)간의 인력이 절연입자(P)와 발광 구조물(130) 사이의 인력보다 커져 균일한 도포가 가능해질 수 있다. When the surface treatment material is applied to the light emitting structure 130, the surface layer 135 has a hydrophobic property. Therefore, the attraction force with the insulating particles P having a hydrophilic surface is weakened to form a uniform insulating particle layer 140. That is, the attraction between the insulating particles (P) is greater than the attraction between the insulating particles (P) and the light emitting structure 130 can be uniformly applied.

표면처리물질은 소수성을 부여할 수 있는 다양한 물질이 선택될 수 있다. 일 예로, 실란계 물질 또는 유무기 실란 화합물을 포함할 수 있다. 표면 처리 물질은 heptadecafluorodecyltrimethoxysilane(PFAS), octadecyldimethylchlorosilane, octadecyltrichlorosilane(OTS), tris(trimethylsiloxy silylethyl-dimethylchlorosilane, octyl dimethylchlorosilane, dimethyldichlorosilane, butyl dimethyl chlorosilane, trimethylchlorosilane 중 선택된 어느 하나 이상의 물질을 포함할 수 있다.The surface treatment material may be selected from various materials that can impart hydrophobicity. For example, it may include a silane-based material or an organic-inorganic silane compound. The surface treatment material may include at least one selected from heptadecafluorodecyltrimethoxysilane (PFAS), octadecyldimethylchlorosilane, octadecyltrichlorosilane (OTS), tris (trimethylsiloxy silylethyl-dimethylchlorosilane, octyl dimethylchlorosilane, dimethyldichlorosilane, butyl dimethyl chlorosilane, and trimethylchlorosilane.

또한, 제1홀(W1)에도 표면층(135)과 동일한 조성인 커버층(S)이 형성되어 절연입자의 균일한 코팅이 가능해 질 수 있다. 그러나, 반드시 이에 한정되는 것은 아니고 제1홀(W1)에 절연입자를 용이하게 삽입하기 위해 절연막(120)은 친수성 표면을 유지할 수도 있다. 절연막이 친수성 표면을 유지하는 방법은 특별히 제한하지 않는다. 예시적으로 마스크를 이용하여 발광 구조물(130)에만 선택적으로 코팅할 수도 있다.In addition, the cover layer S having the same composition as the surface layer 135 may also be formed in the first hole W1, thereby enabling uniform coating of the insulating particles. However, the present invention is not limited thereto, and the insulating film 120 may maintain a hydrophilic surface to easily insert the insulating particles into the first hole W1. The method in which the insulating film maintains the hydrophilic surface is not particularly limited. For example, it may be selectively coated only on the light emitting structure 130 using a mask.

도 17a 내지 도 17f는 본 발명의 일 실시 예에 따른 발광소자 제조방법을 설명하기 위한 도면이다.17A to 17F are views for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention.

도 17a를 참고하면, 기판(110) 상에 도전형 베이스층(131)을 형성한다. 기판(110)은 사파이어(Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP 및 Ge 중 선택된 물질로 형성될 수 있으며, 이에 대해 한정하지는 않는다. Referring to FIG. 17A, a conductive base layer 131 is formed on the substrate 110. The substrate 110 may be formed of a material selected from sapphire (Al 2 O 3), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.

베이스층(131)은 제1반도체 코어와 동일한 조성일 수 있으나 이에 한정하지 않는다. 베이스층(131)은 Si, Ge, Sn, Se, Te와 같은 n형 도펀트가 도핑될 수 있으나 이에 한정하지 않는다.The base layer 131 may have the same composition as the first semiconductor core, but is not limited thereto. The base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.

도 17b를 참고하면, 베이스층(131) 상에 복수 개의 제1홀(W1)을 갖는 절연막(120)을 형성한다. 절연막(120)은 SiO2, Si3N4, Al2O3, ZrSiO4, HfSiO4, ZrO2, HfO2, La2O3, Ta2O5, TiO2의 다양한 절연 재질이 선택될 수 있고, 제1홀(W1)은 0.5㎛ 이상 3㎛이하의 폭으로 제작할 수 있다. Referring to FIG. 17B, an insulating layer 120 having a plurality of first holes W1 is formed on the base layer 131. The insulating layer 120 may be selected from various insulating materials such as SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , TiO 2 . The first hole W1 can be produced in a width of 0.5 µm or more and 3 µm or less.

도 17c를 참고하면, 절연막(120) 상에 복수 개의 발광 구조물(130)은 성장시킨다. 발광 구조물(130)의 성장 방법은 기존의 반도체 성장 방법이 모두 적용될 수 있다. 제1반도체 코어(132)는 베이스층(131)의 표면에서 성장되고, 그 위에 활성층(134) 및 제2반도체층(133)이 형성될 수 있다. 활성층(134)과 제2반도체층(133)은 절연막(120)상에서 성장할 수 있다. 필요에 따라 발광 구조물(130)을 성장시키기 위해 마스크 패턴을 사용할 수도 있다.Referring to FIG. 17C, a plurality of light emitting structures 130 are grown on the insulating film 120. As the growth method of the light emitting structure 130, all conventional semiconductor growth methods may be applied. The first semiconductor core 132 may be grown on the surface of the base layer 131, and an active layer 134 and a second semiconductor layer 133 may be formed thereon. The active layer 134 and the second semiconductor layer 133 may be grown on the insulating layer 120. If necessary, a mask pattern may be used to grow the light emitting structure 130.

도 17d 및 도 17e를 참고하면, 복수 개의 발광 구조물(130) 상에 절연입자(P)가 분산된 용액(solvent)을 코팅할 수 있다. 용액은 특별히 제한되지 않는다. Referring to FIGS. 17D and 17E, a solution in which insulating particles P are dispersed may be coated on the light emitting structures 130. The solution is not particularly limited.

분산 방법은 드롭 코팅(drop-coating), 딥 코팅(dip coating), 스핀코팅(spin coating), 전기 증착(electrophoretic deposition), 자가 조립 방식(self-assembly at the gas/liquid interface), 트랜시퍼 방식(transfer from the gas/liquid to the gas/solid interface), 및 스프레이 코팅(spray coating) 중 어느 하나가 사용될 수 있다. 용액을 이용하는 경우 코팅 후 용액을 휘발시킬 수 있다.Dispersion methods include drop-coating, dip coating, spin coating, electrophoretic deposition, self-assembly at the gas / liquid interface, and transceiver methods. (transfer from the gas / liquid to the gas / solid interface), and spray coating (spray coating) can be used. If a solution is used, the solution may be volatilized after coating.

절연입자(P)의 직경은 150nm 이상 500nm미만일 수 있다. 따라서, 절연입자의 직경은 제1홀(W1)의 직경보다 작을 수 있다. 또한, 절연입자(P)의 재질은 절연막(120)의 재질과 상이할 수 있고, 직경 사이즈도 상이할 수 있다. 이 외에도 전술한 절연입자의 특징이 모두 적용될 수 있도록 절연입자층(140)을 형성할 수 있다.The diameter of the insulating particles P may be 150 nm or more and less than 500 nm. Therefore, the diameter of the insulating particles may be smaller than the diameter of the first hole (W1). In addition, the material of the insulating particles P may be different from the material of the insulating film 120, and the diameter size may be different. In addition, the insulating particle layer 140 may be formed so that all of the aforementioned characteristics of the insulating particle may be applied.

이때, 발광 구조물(130)에는 미리 표면 처리를 수행할 수 있다. 전술한 바와 같이 표면 처리에 의해 발광 구조물의 표면은 소수성을 갖게 되어 절연입자(P)의 균일한 코팅이 가능해질 수 있다. 실란계 물질 또는 유무기 실란 화합물을 발광 구조물(130)에 코팅할 수 있다. In this case, the light emitting structure 130 may be subjected to surface treatment in advance. As described above, the surface of the light emitting structure may be hydrophobic to allow uniform coating of the insulating particles P by surface treatment. The silane-based material or the organic-inorganic silane compound may be coated on the light emitting structure 130.

도 17f를 참고하면, 절연입자층(140) 상에 도전층(150)을 형성하고, 그 위에 충진층(160)을 더 형성할 수 있다. 충진층(160)은 광학적으로 투명한 층이거나 절연층일 수 있다. 일 예로, 충진층(160)은 스핀 온 글래스(spin on glass)를 포함할 수 있다. 충진층(160)의 높이는 발광 구조물(130)의 높이보다 낮게 형성할 수 있다. Referring to FIG. 17F, the conductive layer 150 may be formed on the insulating particle layer 140, and the filling layer 160 may be further formed thereon. Fill layer 160 may be an optically transparent layer or an insulating layer. For example, the filling layer 160 may include spin on glass. The height of the filling layer 160 may be lower than the height of the light emitting structure 130.

충진층(160)의 외측으로 노출된 발광 구조물(130) 상에는 제2전극(172)을 형성하고, 일부 노출된 베이스층(131)상에는 제1전극(171)을 형성할 수 있다.The second electrode 172 may be formed on the light emitting structure 130 exposed to the outside of the filling layer 160, and the first electrode 171 may be formed on the partially exposed base layer 131.

도 18은 본 발명의 다른 실시 예에 따른 발광소자의 개념도이고, 도 19는 종래 발광소자의 사진이고, 도 20은 도 18의 A부분 확대도이고, 도 21은 도 18의 제1반도체층 코어의 사진이고, 도 22는 도 18의 발광 구조물의 사진이다.18 is a conceptual view of a light emitting device according to another embodiment of the present invention, FIG. 19 is a photograph of a conventional light emitting device, FIG. 20 is an enlarged view of a portion A of FIG. 18, and FIG. 21 is a first semiconductor layer core of FIG. 18. 22 is a photograph of the light emitting structure of FIG. 18.

도 18을 참고하면, 실시 예에 따른 발광소자는 기판(110)상에 배치되는 도전성 베이스층(131)과, 도전성 베이스층(131) 상에 배치되고 복수 개의 제1홀(W1)을 포함하는 제1절연층(120), 및 제1홀(W1)을 통해 도전성 베이스층(131)과 전기적으로 연결되는 복수 개의 발광 구조물(130)을 포함한다.Referring to FIG. 18, the light emitting device according to the embodiment includes a conductive base layer 131 disposed on the substrate 110, and a plurality of first holes W1 disposed on the conductive base layer 131. The first insulating layer 120 and a plurality of light emitting structures 130 are electrically connected to the conductive base layer 131 through the first hole W1.

기판(110)은 전도성 기판 또는 절연성 기판을 포함할 수 있다. 기판(110)은 반도체 물질 성장에 적합한 물질이나 캐리어 웨이퍼일 수 있다. 기판(110)은 사파이어(Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP 및 Ge 중 선택된 물질로 형성될 수 있으며, 이에 대해 한정하지는 않는다.The substrate 110 may include a conductive substrate or an insulating substrate. The substrate 110 may be a material or a carrier wafer suitable for growing a semiconductor material. The substrate 110 may be formed of a material selected from sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.

도전성 베이스층(131)은 기판(110) 상에 형성되고 발광 구조물(130)의 성장면을 제공할 수 있다. 또한, 도전성 베이스층(131)은 도전성을 가져 제1전극(171)과 발광 구조물(130)을 전기적으로 연결할 수 있다. The conductive base layer 131 may be formed on the substrate 110 and provide a growth surface of the light emitting structure 130. In addition, the conductive base layer 131 may be electrically connected to the first electrode 171 and the light emitting structure 130.

도전성 베이스층(131)은 제1반도체 코어(132)와 동일한 조성일 수 있으나 이에 한정하지 않는다. 도전성 베이스층(131)은 Si, Ge, Sn, Se, Te와 같은 n형 도펀트가 도핑될 수 있으나 이에 한정하지 않는다.The conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto. The conductive base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.

제1절연층(120)은 도전성 베이스층(131)상에 배치된다. 제1절연층(120)은 도전성 베이스층(131)과 발광 구조물(130)이 전기적으로 연결되는 복수 개의 제1홀(W1)을 포함한다. 복수 개의 제1홀(W1)은 마스크 패턴에 의해 형성될 수 있다. 제1절연층(120)은 SiO2 또는 SiNx와 같은 절연물질을 포함할 수 있으나 이에 한정하지 않는다.The first insulating layer 120 is disposed on the conductive base layer 131. The first insulating layer 120 includes a plurality of first holes W1 through which the conductive base layer 131 and the light emitting structure 130 are electrically connected. The plurality of first holes W1 may be formed by a mask pattern. The first insulating layer 120 may include an insulating material such as SiO 2 or SiNx, but is not limited thereto.

복수 개의 발광 구조물(130)은 제1홀(W1)을 통해 도전성 베이스층(131)과 전기적으로 연결되는 제1반도체 코어(132), 제1반도체 코어(132)상에 형성되는 활성층(134), 활성층(134) 상에 형성되는 제2반도체층(133)을 포함할 수 있다. The plurality of light emitting structures 130 may be formed on the first semiconductor core 132 and the first semiconductor core 132 that are electrically connected to the conductive base layer 131 through the first hole W1. The second semiconductor layer 133 may be formed on the active layer 134.

발광 구조물(130)은 기판(110)상에 실질적으로 수직한 방향으로 성장하며, 나노 사이즈의 크기를 가질 수 있다. 발광 구조물(130)에서 방출된 광은 기판(110) 방향 및/또는 반대 방향으로 방출될 수 있다. The light emitting structure 130 may grow in a substantially vertical direction on the substrate 110 and have a size of nano size. Light emitted from the light emitting structure 130 may be emitted in the direction of the substrate 110 and / or in the opposite direction.

제1반도체 코어(132)는 제1홀(W1)에 의해 노출된 도전성 베이스층(131)의 표면에서 성장할 수 있다. 제1반도체 코어(132)는 나노 로드일 수 있으나 이에 한정하지 않는다. The first semiconductor core 132 may grow on the surface of the conductive base layer 131 exposed by the first hole W1. The first semiconductor core 132 may be a nanorod, but is not limited thereto.

제1반도체 코어(132)는 Ⅲ-Ⅴ족, Ⅱ-Ⅵ족 등의 화합물 반도체일 수 있으며, 제1반도체 코어(132)에 제1도펀트가 도핑될 수 있다. The first semiconductor core 132 may be a compound semiconductor such as a III-V group or a II-VI group, and a first dopant may be doped into the first semiconductor core 132.

제1반도체 코어(132)는 Inx1Aly1Ga1 -x1- y1N(0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1)의 조성식을 갖는 반도체 재료, 예를 들어 GaN, AlGaN, InGaN, InAlGaN 등에서 선택될 수 있다. 제1도펀트는 Si, Ge, Sn, Se, Te와 같은 n형 도펀트일 수 있다. 제1도펀트가 n형 도펀트인 경우, 제1도펀트가 도핑된 제1반도체 코어(132)는 n형 반도체일 수 있다.The first semiconductor core 132 is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0≤x1≤1, 0≤y1≤1, 0≤x1 + y1≤1), for example GaN, AlGaN, InGaN, InAlGaN and the like can be selected. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, Te. When the first dopant is an n-type dopant, the first semiconductor core 132 doped with the first dopant may be an n-type semiconductor.

도 19를 참고하면, 뾰족한 코어에 성장한 활성층은 상부 영역(A)이 일부 무너지는 문제가 발생할 수 있다. 무너진 영역은 제1누설전류 경로를 형성한다. 또한, nGaN과 pGaN의 사이(B)에 존재하는 전위(dislocation)는 제2누설전류 경로를 형성한다.Referring to FIG. 19, the active layer grown on the pointed core may have a problem in which the upper region A is partially collapsed. The collapsed region forms a first leakage current path. In addition, the dislocation present between B and nGaN forms a second leakage current path.

도 20을 참고하면, 실시 예에 따른 제1반도체 코어(132)는 상부에 형성되는 제1평탄면(132a)을 포함할 수 있다. 제1반도체 코어(132)의 상부를 평탄하게 제어하는 방법은 다양할 수 있다. 일 예로, 질소 분위기에서 성장시켜 상부를 평탄하게 제어할 수도 있고, 기계적인 레벨링에 의해 제어할 수도 있다.Referring to FIG. 20, the first semiconductor core 132 according to the embodiment may include a first flat surface 132a formed at an upper portion thereof. The method of controlling the top of the first semiconductor core 132 to be flat may vary. For example, it may be grown in a nitrogen atmosphere to control the top flat, or may be controlled by mechanical leveling.

활성층(134)은 제1반도체 코어(132)상에 배치된다. 따라서, 활성층(134)은 제1반도체 코어(132)의 제1평탄면(132a)상에 형성되는 제2평탄면(134a)을 포함한다. 따라서, 활성층(134)이 제1반도체 코어(132)에 의해 충분히 지지되어 활성층(134)이 무너지는 문제를 개선할 수 있다.The active layer 134 is disposed on the first semiconductor core 132. Accordingly, the active layer 134 includes a second planar surface 134a formed on the first planar surface 132a of the first semiconductor core 132. Therefore, the problem that the active layer 134 is sufficiently supported by the first semiconductor core 132 may collapse.

활성층(134)은 제1반도체 코어(132)를 통해서 주입되는 전자(또는 정공)와 제2반도체층(133)을 통해서 주입되는 정공(또는 전자)이 만나는 층이다. 활성층(134)은 전자와 정공이 재결합함에 따라 낮은 에너지 준위로 천이하며, 그에 상응하는 파장을 가지는 빛을 생성할 수 있다. 본 실시 예에서 발광 파장에는 제한이 없다.The active layer 134 is a layer where electrons (or holes) injected through the first semiconductor core 132 meet holes (or electrons) injected through the second semiconductor layer 133. The active layer 134 transitions to a low energy level as electrons and holes recombine, and may generate light having a corresponding wavelength. There is no restriction on the emission wavelength in this embodiment.

활성층(134)은 단일 우물 구조, 다중 우물 구조, 단일 양자 우물 구조, 다중 양자 우물(Multi Quantum Well; MQW) 구조, 양자점 구조 또는 양자선 구조 중 어느 하나의 구조를 가질 수 있으며, 활성층(134)의 구조는 이에 한정하지 않는다. The active layer 134 may have any one of a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum line structure, and the active layer 134 The structure of is not limited to this.

활성층(134)은 복수 개의 우물층 및 장벽층이 교대로 배치되는 구조를 가질 수 있다. 우물층과 장벽층은 InxAlyGa1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1)의 조성식을 가질 수 있고, 장벽층의 에너지 밴드갭은 우물층의 에너지 밴드갭보다 클 수 있다.The active layer 134 may have a structure in which a plurality of well layers and barrier layers are alternately arranged. The well layer and the barrier layer may have a composition formula of InxAlyGa1-x-yN (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), and the energy bandgap of the barrier layer is the energy of the well layer. It may be larger than the bandgap.

제2반도체층(133)은 활성층(134)상에 배치된다. 제2반도체층(133)은 Ⅲ-Ⅴ족, Ⅱ-Ⅵ족 등의 화합물 반도체로 구현될 수 있으며, 제2반도체층(133)에 제2도펀트가 도핑될 수 있다. The second semiconductor layer 133 is disposed on the active layer 134. The second semiconductor layer 133 may be formed of a compound semiconductor such as a group III-V group or a group II-VI group, and a second dopant may be doped into the second semiconductor layer 133.

제2반도체층(133)은 Inx5Aly2Ga1 -x5- y2N (0≤x5≤1, 0≤y2≤1, 0≤x5+y2≤1)의 조성식을 갖는 반도체 물질 또는 AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP 중 선택된 물질로 형성될 수 있다. 제2도펀트가 Mg, Zn, Ca, Sr, Ba 등과 같은 p형 도펀트인 경우, 제2도펀트가 도핑된 제2반도체층(133)은 p형 반도체일 수 있다.The second semiconductor layer 133 may be formed of a semiconductor material having a composition formula of In x5 Al y2 Ga 1 -x5- y2 N (0≤x5≤1, 0≤y2≤1, 0≤x5 + y2≤1), or AlInN, AlGaAs. It may be formed of a material selected from GaP, GaAs, GaAsP, AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second semiconductor layer 133 doped with the second dopant may be a p-type semiconductor.

활성층(134)과 제2반도체층(133) 사이에는 전자 차단층(EBL)이 배치될 수 있다. 전자 차단층은 Inx1Aly1Ga1 -x1- y1N(0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1)의 조성식을 갖는 반도체 재료, 예를 들어 AlGaN, InGaN, InAlGaN 등에서 선택될 수 있으나 이에 한정하지 않는다.An electron blocking layer EBL may be disposed between the active layer 134 and the second semiconductor layer 133. The electron blocking layer is a semiconductor material having a composition formula of In x1 Al y1 Ga 1 -x1- y1 N (0≤x1≤1, 0≤y1≤1, 0≤x1 + y1≤1), for example AlGaN, InGaN, InAlGaN may be selected from, but is not limited thereto.

제2반도체층(133) 상에는 제2절연층(141)이 배치될 수 있다. 제2절연층(141)은 제1누설전류 경로 및/또는 제2누설전류 경로를 차단할 수 있다. 제2절연층(141)의 높이(h2)는 제2반도체층(133)의 높이(h1)의 1/5 내지 1/2까지 형성될 수 있다. 제2절연층(141)의 높이(h2)가 제2반도체층(133)의 1/5 미만으로 형성된 경우 누설전류 경로를 효과적으로 차단하지 못할 수 있다. 또한, 제2절연층(141)의 높이(h2)가 제2반도체층(133)의 1/2를 초과하여 형성된 경우 발광면적이 과도하게 축소되는 문제가 있다.The second insulating layer 141 may be disposed on the second semiconductor layer 133. The second insulating layer 141 may block the first leakage current path and / or the second leakage current path. The height h2 of the second insulating layer 141 may be formed to 1/5 to 1/2 of the height h1 of the second semiconductor layer 133. When the height h2 of the second insulating layer 141 is less than 1/5 of the second semiconductor layer 133, the leakage current path may not be effectively blocked. In addition, when the height h2 of the second insulating layer 141 is greater than 1/2 of the second semiconductor layer 133, the emission area may be excessively reduced.

도전층(160)은 발광 구조물(130)상에 배치된다. 도전층(160)은 제2전극(172)과 제2반도체층(133)을 전기적을 연결할 수 있다. 또한, 제1전극(171)은 일부 노출된 도전성 베이스층(131)상에 배치되어 제1반도체 코어(132)와 전기적으로 연결될 수 있다.The conductive layer 160 is disposed on the light emitting structure 130. The conductive layer 160 may electrically connect the second electrode 172 and the second semiconductor layer 133. In addition, the first electrode 171 may be disposed on the partially exposed conductive base layer 131 and electrically connected to the first semiconductor core 132.

발광 구조물(130)은 다양한 형상이 모두 적용될 수 있다. 성장 조건에 따라 피라미드 형상, 나노 로드 형상, 및 상단이 평평한 형상을 모두 포함할 수 있다. 도 21를 참고하면 제1반도체 코어(132)의 상부에 제1평탄면(132a)이 형성되어도, 도 22와 같이 최종 발광 구조물(130)은 피라미드 형상을 가질 수 있다.The light emitting structure 130 may be applied to all the various shapes. Depending on the growth conditions, it may include all of the pyramid shape, nano rod shape, and the flat top shape. Referring to FIG. 21, even when the first flat surface 132a is formed on the first semiconductor core 132, the final light emitting structure 130 may have a pyramid shape as shown in FIG. 22.

도 23은 본 발명의 또 다른 실시 예에 따른 발광소자의 개념도다.23 is a conceptual view of a light emitting device according to another embodiment of the present invention.

도 23을 참고하면, 실시 예에 따른 발광소자는 도전성 베이스층(131)과, 도전성 베이스층(131) 상에 배치되고 복수 개의 제1홀(W1)을 포함하는 제1절연층(120), 및 제1홀(W1)을 통해 도전성 베이스층(131)과 연결되는 복수 개의 발광 구조물(130)을 포함한다.Referring to FIG. 23, the light emitting device according to the embodiment may include a conductive base layer 131, a first insulating layer 120 disposed on the conductive base layer 131 and including a plurality of first holes W1, And a plurality of light emitting structures 130 connected to the conductive base layer 131 through the first hole W1.

발광 구조물(130)은 도전성 베이스층(131)과 전기적으로 연결되는 제1반도체 코어(132)와, 제1반도체 코어(132)상에 배치되는 활성층(134), 및 활성층(134)상에 배치되는 제2반도체층(133)을 포함한다. 본 실시 예에서는 제1반도체 코어(132)의 상부(132b)를 제외하고는 전술한 구성이 그대로 적용될 수 있다. 즉, 도전성 베이스층(131), 제1절연층(120), 제2절연층(141), 및 발광구조물의 일반적인 구조는 전술한 구성이 그대로 적용될 수 있다.The light emitting structure 130 is disposed on the first semiconductor core 132 electrically connected to the conductive base layer 131, the active layer 134 disposed on the first semiconductor core 132, and the active layer 134. The second semiconductor layer 133 is included. In the present embodiment, the above-described configuration may be applied as it is except for the upper portion 132b of the first semiconductor core 132. That is, the general structure of the conductive base layer 131, the first insulating layer 120, the second insulating layer 141, and the light emitting structure may be applied as it is.

실시 예에 따른 제1반도체 코어(132)의 상부(132b)는 도전성 베이스층(131)과 도핑 농도가 상이하게 제어될 수 있다. 일 예로, 제1반도체 코어(132)의 상부(132b)는 도핑되지 않은 u-GaN층을 포함할 수 있다.The upper portion 132b of the first semiconductor core 132 according to the embodiment may be controlled to have a different doping concentration from the conductive base layer 131. For example, the upper portion 132b of the first semiconductor core 132 may include an undoped u-GaN layer.

이러한 구성에 의하면, 발광 구조물(130)의 상부가 무너져도 u-GaN층에 의해 제1반도체 코어(132)의 도전 부분과 제2반도체층(133)이 전기적으로 연결되지 않을 수 있다. 즉, 제1반도체 코어(132)의 상부(132b)가 전류누설 경로를 차단할 수 있다. 상부(132b)가 시작되는 높이는 제2반도체층(133)의 1/5 내지 1/2 지점일 수 있다.According to this configuration, even if the upper portion of the light emitting structure 130 collapses, the conductive portion of the first semiconductor core 132 and the second semiconductor layer 133 may not be electrically connected by the u-GaN layer. That is, the upper portion 132b of the first semiconductor core 132 may block the current leakage path. The height at which the upper portion 132b starts may be 1/5 to 1/2 of the second semiconductor layer 133.

도 24a 내지 도 24e는 본 발명의 다른 실시 예에 따른 발광소자 제조방법을 보여주는 순서도이다.24A to 24E are flowcharts illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.

실시 예에 따른 발광소자 제조방법은, 도전성 베이스층(131) 상에 복수 개의 제1홀(W1)을 갖는 제1절연층(120)을 형성하는 단계, 및 제1홀(W1) 상에 제1반도체 코어(132), 활성층(134), 및 제2반도체층(133)을 포함하는 발광 구조물(130)을 성장시키는 단계를 포함한다.The method of manufacturing a light emitting device according to the embodiment may include forming a first insulating layer 120 having a plurality of first holes W1 on the conductive base layer 131, and forming a first insulating layer 120 on the first hole W1. Growing a light emitting structure 130 including a first semiconductor core 132, an active layer 134, and a second semiconductor layer 133.

도 24a를 참고하면, 기판(110) 상에 도전형 도전성 베이스층(131)을 형성한다. 기판(110)은 사파이어(Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP 및 Ge 중 선택된 물질로 형성될 수 있으며, 이에 대해 한정하지는 않는다. Referring to FIG. 24A, a conductive conductive base layer 131 is formed on the substrate 110. The substrate 110 may be formed of a material selected from sapphire (Al 2 O 3), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.

도전성 베이스층(131)은 제1반도체 코어(132)와 동일한 조성일 수 있으나 이에 한정하지 않는다. 도전성 베이스층(131)은 Si, Ge, Sn, Se, Te와 같은 n형 도펀트가 도핑될 수 있으나 이에 한정하지 않는다.The conductive base layer 131 may have the same composition as the first semiconductor core 132, but is not limited thereto. The conductive base layer 131 may be doped with n-type dopants such as Si, Ge, Sn, Se, and Te, but is not limited thereto.

도 24b를 참고하면, 도전성 베이스층(131) 상에 복수 개의 제1홀(W1)을 갖는 제1절연층(120)을 형성한다. 제1절연층(120)은 SiO2, Si3N4, Al2O3, ZrSiO4, HfSiO4, ZrO2, HfO2, La2O3, Ta2O5, TiO2의 다양한 절연 재질이 선택될 수 있고, 제1홀(W1)은 0.5㎛ 이상 3㎛이하의 폭으로 제작할 수 있으나 이에 한정하지 않는다.Referring to FIG. 24B, a first insulating layer 120 having a plurality of first holes W1 is formed on the conductive base layer 131. The first insulating layer 120 may be formed of various insulating materials such as SiO 2 , Si 3 N 4 , Al 2 O 3 , ZrSiO 4 , HfSiO 4 , ZrO 2 , HfO 2 , La 2 O 3 , Ta 2 O 5 , and TiO 2 . The first hole W1 may be manufactured to have a width of 0.5 μm or more and 3 μm or less, but is not limited thereto.

도 24c를 참고하면, 제1절연층(120) 상에 복수 개의 발광 구조물(130)은 성장시킨다. 발광 구조물(130)의 성장 방법은 기존의 반도체 성장 방법이 모두 적용될 수 있다. 예시적으로, MOCVD, HVPE, ALD, PECVD, LPCVD, APCVD 등의 CVD 공정이 모두 적용될 수 있다.Referring to FIG. 24C, a plurality of light emitting structures 130 are grown on the first insulating layer 120. As the growth method of the light emitting structure 130, all conventional semiconductor growth methods may be applied. For example, all CVD processes such as MOCVD, HVPE, ALD, PECVD, LPCVD, and APCVD may be applied.

제1반도체 코어(132)는 도전성 베이스층(131)의 표면에서 성장시킬 수 있다. 이때, 제1반도체 코어(132)는 질소 분위기에서 성장시켜 제1반도체 코어(132)의 상부가 제1평탄면(132a)을 갖도록 성장시킬 수 있다. 수소 및 질소 분위기에서 성장시키는 경우 상부가 뾰족한 구조를 만들 수 있으며, 질소 분위기에서 성장시키는 경우 상부가 평탄한 에피 구조를 제작할 수 있다.The first semiconductor core 132 may be grown on the surface of the conductive base layer 131. In this case, the first semiconductor core 132 may be grown in a nitrogen atmosphere so that the upper portion of the first semiconductor core 132 may have the first flat surface 132a. When grown in a hydrogen and nitrogen atmosphere it can be made of a pointed top structure, when grown in a nitrogen atmosphere it can be produced an epitaxial flat structure.

이후, 활성층(134)과 제2반도체층(133)을 순차적으로 성장시킬 수 있다. 활성층(134)은 제1반도체 코어(132)의 외면을 따라 성장할 수 있다. 따라서, 활성층은 제2평탄면(134)를 갖는다. 제2반도체층(133) 성장시에는 수소 및 질소분위기에서 성장시켜 끝단을 뾰족하게 제어할 수 있다.Thereafter, the active layer 134 and the second semiconductor layer 133 may be sequentially grown. The active layer 134 may grow along the outer surface of the first semiconductor core 132. Thus, the active layer has a second planar surface 134. When the second semiconductor layer 133 is grown, the end may be sharply controlled by growing in a hydrogen and nitrogen atmosphere.

도 24d를 참고하면, 발광 구조물(130) 및 제1절연층(120) 상에 제2절연층(141)을 형성할 수 있다. 제2절연층(141)의 높이는 제2반도체층(133)의 1/5 내지 1/2까지 형성할 수 있다.Referring to FIG. 24D, a second insulating layer 141 may be formed on the light emitting structure 130 and the first insulating layer 120. The height of the second insulating layer 141 may be formed to 1/5 to 1/2 of the second semiconductor layer 133.

도 24e를 참고하면, 발광 구조물(130)을 커버하는 도전층(160)을 형성하고, 제1전극(171) 및 제2전극(172)을 형성할 수 있다.Referring to FIG. 24E, the conductive layer 160 covering the light emitting structure 130 may be formed, and the first electrode 171 and the second electrode 172 may be formed.

도 25는 본 발명의 또 다른 실시 예에 따른 발광소자 제조방법을 보여주는 순서도이다.25 is a flowchart illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.

실시 예에 따른 발광소자 제조방법은, 도전성 베이스층(131) 상에 복수 개의 제1홀을 갖는 제1절연층(120)을 형성하는 단계, 및 제1홀 상에 제1반도체 코어(132), 활성층(134), 및 제2반도체층(133)을 포함하는 발광 구조물(130)을 성장시키는 단계를 포함하는 점에서 전술한 프로세스가 그대로 적용될 수 있다. 이하에서는 특징적인 부분을 중심으로 설명한다. In the light emitting device manufacturing method according to the embodiment, the step of forming a first insulating layer 120 having a plurality of first holes on the conductive base layer 131, and the first semiconductor core 132 on the first hole In this regard, the above-described process may be applied as it is, including growing the light emitting structure 130 including the active layer 134 and the second semiconductor layer 133. Hereinafter, the characteristic part will be described.

도 25b를 참고하면, 제1반도체 코어(132)는 도전성 베이스층(131)의 표면에서 성장시킬 수 있다. 이때, 제1반도체 코어(132)는 상부(132b)에서 도핑 원소 공급을 차단하여 성장시킬 수 있다. 따라서, 제1반도체 코어(132)의 상부(132b)는 u-GaN층을 포함할 수 있다. 그러나, 성장 조건에 따라 미량의 도핑 원소가 도핑될 수도 있다.Referring to FIG. 25B, the first semiconductor core 132 may be grown on the surface of the conductive base layer 131. In this case, the first semiconductor core 132 may be grown by blocking the doping element supply from the upper portion 132b. Thus, the upper portion 132b of the first semiconductor core 132 may include a u-GaN layer. However, trace amounts of doping elements may be doped depending on the growth conditions.

이후, 도 25c과 같이 활성층(134)과 제2반도체층(133)을 순차적으로 성장시킬 수 있다. 활성층(134)은 제1반도체 코어(132)의 외면을 따라 성장할 수 있다. 이러한 구조에 의하면 발광 구조물의 상부가 무너져도 u-GaN층에 의해 제1반도체 코어(132)와 제2반도체층(133)이 전기적으로 연결되지 않을 수 있다. 즉, u-GaN층이 전류누설 경로를 차단할 수 있다.Thereafter, as shown in FIG. 25C, the active layer 134 and the second semiconductor layer 133 may be sequentially grown. The active layer 134 may grow along the outer surface of the first semiconductor core 132. According to this structure, even when the upper portion of the light emitting structure collapses, the first semiconductor core 132 and the second semiconductor layer 133 may not be electrically connected by the u-GaN layer. That is, the u-GaN layer may block the current leakage path.

실시 예의 발광 소자는 도광판, 프리즘 시트, 확산 시트 등의 광학 부재를 더 포함하여 이루어져 백라이트 유닛으로 기능할 수 있다. 또한, 실시 예의 발광 소자는 표시 장치, 조명 장치, 지시 장치에 더 적용될 수 있다.The light emitting device according to the embodiment may further include an optical member such as a light guide plate, a prism sheet, and a diffusion sheet to function as a backlight unit. In addition, the light emitting device of the embodiment may be further applied to a display device, a lighting device, and a pointing device.

이 때, 표시 장치는 바텀 커버, 반사판, 발광 모듈, 도광판, 광학 시트, 디스플레이 패널, 화상 신호 출력 회로 및 컬러 필터를 포함할 수 있다. 바텀 커버, 반사판, 발광 모듈, 도광판 및 광학 시트는 백라이트 유닛(Backlight Unit)을 이룰 수 있다.In this case, the display device may include a bottom cover, a reflector, a light emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter. The bottom cover, the reflector, the light emitting module, the light guide plate, and the optical sheet may form a backlight unit.

반사판은 바텀 커버 상에 배치되고, 발광 모듈은 광을 방출한다. 도광판은 반사판의 전방에 배치되어 발광 모듈에서 발산되는 빛을 전방으로 안내하고, 광학 시트는 프리즘 시트 등을 포함하여 이루어져 도광판의 전방에 배치된다. 디스플레이 패널은 광학 시트 전방에 배치되고, 화상 신호 출력 회로는 디스플레이 패널에 화상 신호를 공급하며, 컬러 필터는 디스플레이 패널의 전방에 배치된다. The reflecting plate is disposed on the bottom cover, and the light emitting module emits light. The light guide plate is disposed in front of the reflective plate to guide light emitted from the light emitting module to the front, and the optical sheet includes a prism sheet or the like and is disposed in front of the light guide plate. The display panel is disposed in front of the optical sheet, the image signal output circuit supplies the image signal to the display panel, and the color filter is disposed in front of the display panel.

그리고, 조명 장치는 기판과 실시 예의 발광 소자를 포함하는 광원 모듈, 광원 모듈의 열을 발산시키는 방열부 및 외부로부터 제공받은 전기적 신호를 처리 또는 변환하여 광원 모듈로 제공하는 전원 제공부를 포함할 수 있다. 더욱이 조명 장치는, 램프, 해드 램프, 또는 가로등 등을 포함할 수 있다.The lighting apparatus may include a light source module including a substrate and a light emitting device according to an embodiment, a heat dissipation unit for dissipating heat of the light source module, and a power supply unit for processing or converting an electrical signal provided from the outside and providing the light source module to the light source module. . Furthermore, the lighting device may include a lamp, a head lamp, a street lamp or the like.

이상에서 설명한 본 발명 실시 예는 상술한 실시 예 및 첨부된 도면에 한정되는 것이 아니고, 실시 예의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명 실시 예가 속하는 기술분야에서 종래의 지식을 가진 자에게 있어 명백할 것이다.The embodiments of the present invention described above are not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the embodiments. It will be apparent to those skilled in the art.

Claims (20)

도전성 베이스층;Conductive base layer; 상기 베이스층 상에 배치되고 복수 개의 제1홀을 포함하는 절연막;An insulating layer disposed on the base layer and including a plurality of first holes; 상기 제1홀을 통해 상기 베이스층과 전기적으로 연결되는 제1반도체 코어와, 상기 제1반도체 코어상에 배치되는 활성층, 및 제2반도체층을 포함하는 복수 개의 발광 구조물;A plurality of light emitting structures including a first semiconductor core electrically connected to the base layer through the first hole, an active layer disposed on the first semiconductor core, and a second semiconductor layer; 상기 복수 개의 발광 구조물의 사이에 채워지는 절연입자를 포함하는 절연입자층; 및An insulating particle layer including insulating particles filled between the plurality of light emitting structures; And 상기 절연입자층 상에 배치되는 제1도전층을 포함하고, A first conductive layer disposed on the insulating particle layer, 상기 절연입자의 직경은 상기 제1홀의 폭보다 작은 발광소자.The diameter of the insulating particles is smaller than the width of the first hole light emitting device. 제1항에 있어서,The method of claim 1, 상기 복수 개의 제1홀 중 적어도 어느 하나에는 상기 절연입자가 충진된 발광소자.A light emitting device in which at least one of the plurality of first holes is filled with the insulating particles. 제1항에 있어서,The method of claim 1, 상기 제1홀의 폭은 0.5㎛ 이상 3㎛ 이하인 발광소자.The first hole has a width of 0.5㎛ 3㎛ less than. 제3항에 있어서,The method of claim 3, 상기 절연입자의 직경은 150nm 이상 500nm이하인 발광소자.The insulating particles have a diameter of 150nm or more and 500nm or less. 제1항에 있어서,The method of claim 1, 상기 절연입자층의 두께는 400nm 이상 1000nm이하인 발광소자.The insulating particle layer has a thickness of 400nm or more and 1000nm or less. 제1항에 있어서,The method of claim 1, 상기 절연막의 재질과 상기 절연입자의 재질은 상이한 발광소자.The light emitting device of which the material of the insulating film and the material of the insulating particle are different. 제1항에 있어서,The method of claim 1, 상기 절연입자는 제1직경을 갖는 제1절연입자 및 제2직경을 갖는 제2절연입자를 포함하고, 상기 제2직경은 상기 제1직경보다 큰 발광소자.The insulating particle includes a first insulating particle having a first diameter and a second insulating particle having a second diameter, wherein the second diameter is larger than the first diameter. 제7항에 있어서,The method of claim 7, wherein 상기 절연입자층은 제1절연입자를 포함하는 하부 절연입자층, 및 상기 제2절연입자를 포함하는 상부 절연입자층을 포함하는 발광소자.The insulating particle layer includes a lower insulating particle layer including a first insulating particle, and an upper insulating particle layer including the second insulating particle. 제8항에 있어서,The method of claim 8, 상기 제1절연입자는 상기 복수 개의 제1홀 중 적어도 어느 하나에 충진되는 발광소자.The first insulating particles are filled in at least one of the plurality of first holes. 제7항에 있어서,The method of claim 7, wherein 상기 절연입자층은 상기 제1절연입자와 제2절연입자가 랜덤하게 분산된 발광소자.The insulating particle layer is a light emitting device in which the first insulating particles and the second insulating particles are randomly dispersed. 제1항에 있어서,The method of claim 1, 상기 발광 구조물은 제2반도체층상에 형성된 표면처리층을 포함하는 발광소자.The light emitting device includes a surface treatment layer formed on the second semiconductor layer. 제1항에 있어서,The method of claim 1, 상기 표면처리층은 소수성 표면을 갖는 발광소자.The surface treatment layer has a hydrophobic surface. 제11항에 있어서,The method of claim 11, 상기 표면처리층은 실란계 물질을 포함하는 발광소자.The surface treatment layer comprises a silane-based material. 제1항에 있어서,The method of claim 1, 상기 복수 개의 절연입자 사이에 형성되는 공극을 포함하는 발광소자.Light emitting device comprising a gap formed between the plurality of insulating particles. 도전성 베이스층; Conductive base layer; 상기 도전성 베이스층 상에 배치되고 복수 개의 제1홀을 포함하는 제1절연층; 및A first insulating layer disposed on the conductive base layer and including a plurality of first holes; And 상기 제1홀을 통해 상기 도전성 베이스층과 전기적으로 연결되는 제1반도체 코어와, 상기 제1반도체 코어상에 배치되는 활성층, 및 상기 활성층상에 배치되는 제2반도체층을 포함하는 복수 개의 발광 구조물을 포함하고,A plurality of light emitting structures including a first semiconductor core electrically connected to the conductive base layer through the first hole, an active layer disposed on the first semiconductor core, and a second semiconductor layer disposed on the active layer Including, 상기 제1반도체 코어의 상부는 제1평탄면을 갖는 발광소자.The upper portion of the first semiconductor core has a first flat surface. 제15항에 있어서,The method of claim 15, 상기 활성층은 상기 제1평탄면상에 배치되는 제2평탄면을 포함하는 발광소자.The active layer includes a second planar surface disposed on the first planar surface. 제16항에 있어서,The method of claim 16, 상기 제2반도체층의 상부는 상기 제1반도체 코어 및 활성층의 상부보다 뾰족한 발광소자.The upper portion of the second semiconductor layer is lighter than the upper portion of the first semiconductor core and the active layer. 제15항에 있어서,The method of claim 15, 상기 제2반도체층의 측면에 배치된 제2절연층을 포함하는 발광소자.A light emitting device comprising a second insulating layer disposed on the side of the second semiconductor layer. 제18항에 있어서,The method of claim 18, 상기 제2절연층은 상기 제2반도체층의 높이의 1/5 내지 1/2까지 배치되는 발광소자.The second insulating layer is a light emitting device disposed to 1/5 to 1/2 of the height of the second semiconductor layer. 복수 개의 발광소자를 포함하는 백라이트 유닛; 및A backlight unit including a plurality of light emitting elements; And 디스플레이 패널을 포함하고,Including a display panel, 상기 발광소자는,The light emitting device, 도전성 베이스층;Conductive base layer; 상기 베이스층 상에 배치되고 복수 개의 제1홀을 포함하는 절연막;An insulating layer disposed on the base layer and including a plurality of first holes; 상기 제1홀을 통해 상기 베이스층과 전기적으로 연결되는 제1반도체 코어와, 상기 제1반도체 코어상에 배치되는 활성층, 및 제2반도체층을 포함하는 복수 개의 발광 구조물;A plurality of light emitting structures including a first semiconductor core electrically connected to the base layer through the first hole, an active layer disposed on the first semiconductor core, and a second semiconductor layer; 상기 복수 개의 발광 구조물의 사이에 채워지는 절연입자를 포함하는 절연입자층; 및An insulating particle layer including insulating particles filled between the plurality of light emitting structures; And 상기 절연입자층 상에 배치되는 제1도전층을 포함하고, A first conductive layer disposed on the insulating particle layer, 상기 절연입자의 직경은 상기 제1홀의 폭보다 작은 표시장치.The diameter of the insulating particles is smaller than the width of the first hole.
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