WO2016180232A1 - Clock planning method and device - Google Patents
Clock planning method and device Download PDFInfo
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- WO2016180232A1 WO2016180232A1 PCT/CN2016/080277 CN2016080277W WO2016180232A1 WO 2016180232 A1 WO2016180232 A1 WO 2016180232A1 CN 2016080277 W CN2016080277 W CN 2016080277W WO 2016180232 A1 WO2016180232 A1 WO 2016180232A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
Definitions
- the present application relates to, but is not limited to, the field of communications technologies, and in particular, to a clock planning method and apparatus.
- clocks are a very important factor and are directly related to the quality of network services.
- the network uses one or more external clock sources to provide a standard clock signal for each node in the network.
- Each node follows an pre-planned clock tracking relationship, tracks an external clock source, and tracks when network conditions change. The switching of the relationship.
- An important principle that the clock tracing relationship needs to satisfy is that the clock tracing relationship cannot be looped at any time. For example, the second tracking node B of the node A and the second tracking node A of the node B will cause the network service to fail.
- network nodes generally have multiple degrees, and the topological relationship between nodes is complex.
- the related manual planning method is difficult to meet the clock planning of the bearer network. Demand, clock planning is more difficult to operate.
- the embodiment of the invention provides a clock planning method and device, which can reduce the operation difficulty of clock planning.
- the embodiment of the invention provides a clock planning method, where the clock planning method includes:
- the network to be planned is split into at least one clock link based on the clock planning instruction, and a clock injection node is set for the split clock link;
- the determining is determined according to a determined planning manner and a clock injection node of the clock link.
- the steps of clock tracking direction of each node on the clock link include:
- connection port of any one of the ring clock link except the clock injection node and a previous node in the clock tracking direction is set as a high priority clock port, and the ring clock chain
- the connection port of any node other than the clock injection node on the road and the next node in the clock tracking direction is set as a low priority clock port.
- the determining according to the determined planning manner and the clock link
- the clock injection node determines the clock tracking direction of each node on the clock link, including:
- the determined planning mode is the ring mode, determining whether the primary clock injection node is adjacent to the standby clock injection node, and if the primary clock injection node is adjacent to the standby clock injection node, Determining, by the clock injection node, the direction of the main clock injection node is a clock tracking direction, and if the main clock injection node is not adjacent to the standby clock injection node, determining a neighboring node of the main clock injection node The node in the middle identifies a larger node, and the direction in which the primary clock is injected into the node to the determined node is set to a clock tracking direction;
- connection port of the ring clock link except the main clock injection node to a node of the previous node in the clock tracking direction as a high priority clock port
- the ring clock A connection port of any node other than the standby clock injection node and the next node of the clock tracking direction is set as a low priority clock port.
- the setting a clock injection node for the split clock link includes:
- each ring clock in the clock domain is sequentially extracted.
- the link acts as a ring clock link to be set;
- the shared node is virtualized as the second clock injection node of the ring clock link to be set, and the shared node is virtualized as the ring clock chain adjacent to the ring clock link to be set and not set.
- the first clock of the path is injected into the node, and the ring clock link to be set is updated to the set ring clock link.
- the clock planning method further includes:
- the standby clock injection node includes a plurality of actual nodes, setting any of the actual nodes included in the standby clock injection node to a connection port of the last actual node in the clock tracking direction as a high priority clock.
- the port is configured to inject the standby clock into any of the actual nodes included in the node and the connection port of the next actual node included in the clock tracking direction and in the clock tracking direction as a low priority clock port.
- the determining is determined according to a determined planning manner and a clock injection node of the clock link.
- the steps of clock tracking direction of each node on the clock link include:
- each node except the clock injection node is sequentially selected along the two sides of the clock injection node;
- connection port of the selected node When the currently selected node is a different node, set the connection port of the selected node to the previous node in the direction to be the high priority clock port, respectively, and select the selected node and its direction.
- the connection port of the next node is set to a low priority clock port, and when the currently selected node is a neighboring node, the step of executing the selected node is stopped;
- the two selected ports of the same node are set as the high priority clock port and the low priority clock port respectively, and the steps of stopping the selected node are stopped according to the preset priority rule. .
- the preset priority rule includes:
- the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
- the clock link is a ring clock link including multiple clock injection nodes
- determining the clock link according to the determined planning manner and the clock injection node of the clock link include:
- connection port of each of the first tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the first tracking nodes under the clock tracking direction
- the connection port of a node is set to a low priority clock port.
- the clock link is a chain clock link
- the steps to track the direction include:
- the clock is injected into the node as a starting point of the chain clock link, and the clock is injected into the node to the direction of other nodes in the chain clock link.
- connection port of each second tracking node and a previous node in the link direction as a clock port, wherein the second tracking node is the clock injection node except the clock injection node Other nodes outside.
- the step of setting each second tracking node and a connection port of a previous node in the link direction as a clock port includes: :
- connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the second tracking nodes under the clock tracking direction
- the connection port of a node is set to a low priority clock port.
- an embodiment of the present invention further provides a clock planning apparatus, where the clock planning apparatus includes:
- the splitting module is configured to: when detecting a clock planning instruction, split the network to be planned into at least one clock link based on the clock planning instruction, and set a clock injection node for the split clock link;
- a determining module configured to: determine, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
- the planning module is configured to: determine a clock tracking direction of each node on the clock link according to the determined planning manner and a clock injection node of the clock link.
- the planning module is configured to: when the clock link is a ring clock link and The ring clock link includes a single clock injection node, and when the determined planning mode is the ring mode, determining a node with a larger node identifier among adjacent nodes of the clock injection node; injecting the clock into the node to Determining the direction of the node as a clock tracking direction; and setting a connection port of any node other than the clock injection node on the ring clock link to a previous node in the clock tracking direction For a high priority clock port, a connection port of any node other than the clock injection node and the next node in the clock tracking direction on the ring clock link is set as a low priority clock port.
- the planning module is configured to: when the clock link is a ring clock link, and the ring clock link includes a primary clock injection node and a backup clock injection node, and the determined planning manner
- the ring mode determining whether the master clock injection node is adjacent to the standby clock injection node, and if the master clock injection node is adjacent to the standby clock injection node, injecting the standby clock into the node to the node
- the direction of the main clock injection node is set to a clock tracking direction. If the main clock injection node is not adjacent to the standby clock injection node, it is determined that the node identifier of the adjacent node of the main clock injection node is larger.
- a node and the direction in which the master clock is injected into the node to the determined node is set to a clock tracking direction; and any node other than the master clock injection node on the ring clock link
- the connection port of the previous node in the clock tracking direction is set as a high priority clock port, and any node other than the standby clock injection node on the ring clock link and the clock tracking side
- the next node is connected to a low-priority port clock port.
- the splitting module includes:
- an extracting unit configured to: when the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, sequentially extracting the clock domain
- Each ring clock link acts as a ring clock link to be set;
- a determining unit configured to: determine, when the extracted ring clock link to be set includes the first clock injection node, whether the ring clock link that is not connected to the ring link to be set includes a second clock Injecting a node, wherein the first clock injection node is a primary clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock The injection node is injected into the node as a master clock;
- An acquiring unit configured to: when the ring clock link that is connected to the to-be-set ring clock link and that is not set includes the second clock injection node, acquire the ring clock link to be set and adjacent And a shared node between the ring clock links that are not set;
- a setting unit configured to: virtualize the shared node as a second clock injection node of the ring clock link to be set, and virtualize the shared node as adjacent to the ring clock link to be set And setting a first clock injection node of the ring clock link, and updating the to-be-set ring clock link to a set ring clock link.
- the planning module is further configured to: when the standby clock injection node includes a plurality of actual nodes, and after determining a clock tracking direction of a node on the clock link, inject the standby clock into the node.
- the connection port of any actual node and the last actual node in the clock tracking direction is set as a high priority clock port, and the standby clock is injected into any node included in the node and the standby clock injection node includes And the connection port of the next actual node in the clock tracking direction is set to a low priority clock port.
- the planning module is configured to: when the clock link is a ring clock link and the ring clock link includes a single clock injection node, and the determined planning mode is the shortest path mode And simultaneously selecting each node except the clock injection node in the direction of both sides of the clock injection node; when the node is selected, determining whether the currently selected node is the same node; when the currently selected node is a different node Set the connection port of the selected node and the previous node in the direction to the high priority clock port respectively, and set the connection port of the selected node and the next node in the direction to the lower priority clock port, respectively.
- the selected node When the selected node is a neighboring node, the selected node is stopped; and when the currently selected node is the same node, the selected two sides of the same node are respectively set as the high priority clock port according to the preset priority rule. And the low priority clock port and stop the selected node.
- the preset priority rule includes:
- the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
- the planning module is configured to: when the clock link is an annular clock link that includes multiple clock injection nodes, and the determined planning mode is the shortest path mode, obtain each first Tracking the number of hops of the node from each clock injection node, wherein the first tracking node is a node other than the clock injection node in the ring clock link; acquiring each of the first tracking nodes Corresponding to a clock injection node corresponding to the minimum hop count in the hop count, and setting a reverse direction of each of the first tracking node to the acquired clock injection node as a clock tracking direction; and each of the first tracking The connection port of the node and the previous node in the clock tracking direction is set as a high priority clock port, and the connection port of each of the first tracking node and the next node in the clock tracking direction is set to be low. Priority clock port.
- the planning module is configured to: when the clock link is a chain clock link, and the determined planning mode is the shortest path mode, the clock is injected into the node as the chain clock link. a starting point and injecting the clock into a node to a direction of other nodes in the chain clock link as a link direction of the chain clock link; and placing each second tracking node with the link
- the connection port of the previous node in the direction is set as a clock port, wherein the second tracking node is a node other than the clock injection node in the chain clock link.
- the planning module is configured to: when the chain clock link includes two clock injection nodes, acquire each second tracking node in a distance from each of the links in each of the links Injecting the number of hops of the node; acquiring a clock injection node corresponding to the minimum number of hops in each hop count of each second tracking node, and setting the reverse direction of each of the second tracking nodes to the acquired clock injection node as a clock tracking direction And setting a connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and each of the second tracking nodes is in the clock tracking direction The connection port of the next node is set to the low priority clock port.
- an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
- the network to be planned is split into a set of a ring clock link and a chain clock link, and each ring clock link and each chain clock link are automatically performed by using a specified planning manner.
- the clock planning operation does not require manual planning in the embodiment of the present invention, thereby reducing the probability of occurrence of errors. Reduce the difficulty of clock planning.
- FIG. 1 is a schematic flowchart of a clock planning method according to a first embodiment of the present invention
- FIG. 2 is a schematic diagram of a topology structure of a clock link in a second embodiment of the present invention
- FIG. 3 is a schematic diagram of a topology structure of a clock link in a third embodiment of the present invention.
- FIG. 4 is a schematic diagram of a topology structure of a clock link in a fourth embodiment of the present invention.
- FIG. 5 is a schematic diagram of a topology structure of a clock link in a fifth embodiment of the present invention.
- FIG. 6 is a schematic diagram of a topology structure of a clock link in a sixth embodiment of the present invention.
- FIG. 7 is a schematic topological structural diagram of a clock link in a seventh embodiment of the present invention.
- FIG. 8 is a schematic topological structural diagram of a clock link in an eighth embodiment of the present invention.
- FIG. 9 is a schematic structural diagram of a function module of a clock planning apparatus according to a first embodiment of the present invention.
- the embodiment of the present invention provides a clock planning method.
- the clock planning method includes the following steps:
- step S10 when the clock planning instruction is detected, the network to be planned is split into at least one clock link based on the clock planning instruction, and a clock injection node is set for the split clock link.
- a complete subnet may be used as a network to be planned in response to a user operation, or a network topology formed by a part of nodes in a subnet may be used as a network to be planned; after the network to be planned is determined, based on the detected
- the clock planning instruction splits the network to be planned into at least one clock link, wherein the split clock link is ring-shaped or chain-shaped, and the clock link is split as follows. Shown as follows:
- Step A1 Find a single chain of all nodes of the planning network, and count the number of super long single chains;
- Step A2 Perform recursive edge processing on all nodes of the planning network
- step A3 the node with the degree 2 in the network to be planned is selected in turn, and a ring is calculated by the looping algorithm with the selected node as a starting point, wherein the degree refers to the number of links connecting other nodes on the node, for example, one node Connected to the other two nodes, the degree of the node is 2;
- Step A4 identifying the number of nodes, rings, and ring numbers on the ring;
- Step A5 removing the judged looped edge
- step A6 the process proceeds to step A3 until all the rings included in the network to be planned are counted.
- the looping algorithm is as follows:
- Step B1 for each node, find the opposite node as its own neighbor node (except the uplink direct neighbor) through the connection, and temporarily store the neighbor node information, and store only one direction neighbor for the first selected node;
- Step B2 selecting a node with a degree of 2 on the access layer to start calculation
- Step B3 Find a neighbor along a connection direction, and generate a neighbor set of the node (the starting node only follows a certain direction);
- Step B4 According to the breadth-first algorithm, each neighbor node of the same level searches for neighbor information according to the connection information, and generates a neighbor node set other than the uplink direct neighbor;
- Step B5 in each of the neighbor sets to find out whether there is a starting node, and if so, proceeds to step B6, and if not, proceeds to step B7;
- step B6 it is determined whether there is any neighbor information. If there is no neighbor information in each direction, the search ends, indicating that the node is the starting point, and there is no loop link, that is, a chain link, and if there is neighbor information, Then proceeds to step B2;
- step B7 if the starting node is found, the calculated path constitutes a ring (the rate of the recording ring, the node on the ring).
- a network can be divided into three levels according to logical relationship, which are a core layer, an aggregation layer, and an access layer.
- the embodiment of the present invention proposes two clock planning scenarios: A network-wide scenario and an incremental network scenario, where the network-wide scenario refers to planning from the core layer, aggregation layer planning, and access layer planning, and an external clock source needs to be specified at the core layer, which is applicable to a newly opened network;
- An incremental network scenario refers to a ring-shaped clock link (or a chain clock link) that specifies an aggregation layer (or access layer), with one of the other clock links in the ring-shaped clock link or
- Two shared nodes inject a clock source into the ring.
- This clock source is an extracted Ethernet clock and is suitable for partially changing (or adding) a clock source network in an already opened network.
- the external clock of the BITS Building Integrated Timing Supply System
- BITS Building Integrated Timing Supply System
- the network to be planned becomes a set of a ring clock link and a chain clock link after being split, and the clock plan for the planned network becomes a target for each ring clock.
- Clock planning for road and chain clock links Each clock link after splitting only needs to track the clock signal of the respective clock injection node, wherein the clock injection node can track an external clock source (such as a BITS external clock), and can also track the clock signals of other clock links ( The Ether Clock is also used to track the clock signal of its internal crystal oscillator.
- the clock injection nodes of each clock link cooperate with each other to form a clock tracking relationship of the entire network, so that the entire network to be planned can be clocked.
- Step S20 determining, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
- two planning modes are provided for the user to select, which are respectively a ring mode and a shortest path mode, where a scenario in which all nodes are required to track the same clock source may be used in a ring mode, and a scenario in which the quality of the clock signal transmission is required may be adopted.
- the shortest path method is provided for the user to select.
- Step S30 Determine a clock tracking direction of each node on the clock link according to the determined planning mode and a clock injection node of the clock link.
- the clock planning operation of the clock link is automatically started to determine the clock tracking direction of the node on the clock link, and then It can accurately track the clock signal of the clock injection node and can switch the clock tracking relationship when the fault occurs.
- the clock planning operation is performed according to the following constraint rules:
- the BITS external clock has the primary and backup points, one master and one standby; in the shortest path mode planning, the BITS external clock has no active/standby points and is the primary clock;
- the BITS external clock can only inject clock signals from the ring clock link of the core layer
- the clock signal can only flow from the upper ring/chain to the lower ring/chain, and the clock signal of the lower ring/chain cannot flow to the upper ring/chain.
- the clock planning method in this embodiment splits the network to be planned into a set of a ring clock link and a chain clock link, and then adopts a specified planning mode for each ring clock link and each chain clock.
- the link automatically performs the clock planning operation.
- the embodiment of the present invention does not require manual planning, reduces the probability of occurrence of errors, and reduces the operational difficulty of clock planning.
- Step S30 when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the foregoing Step S30 includes:
- connection port of any one of the ring clock link except the clock injection node and a previous node in the clock tracking direction is set as a high priority clock port, and the ring clock chain
- the connection port of any node other than the clock injection node on the road and the next node in the clock tracking direction is set as a low priority clock port.
- the node 1 shown in FIG. 2 is a clock injection node, and the planning of the ring clock link is as follows:
- Step 1 If the clock injection of the node 1 is an external clock injection, the connection port of the node 1 and the external clock source is the external clock port, and the priority is the highest (1). If the clock injection of the node 1 is the Ethernet clock injection, then The clock source needs to be planned for node 1, because it has been planned to be completed in the previous ring;
- Step 2 Obtain the node identifiers of the nodes 1 (node 2 and node 6) of the node 1, and set the direction of the nodes with the node 1 to the node identifier as the clock tracking direction (taking node 1 to node 2 as an example, here, The smaller the value of the node identifier is, the larger the node identifier is. However, this application does not limit this;
- Step 3 sequentially select each node except node 1 (in order, node 2, 3, 4, 5, 6) along the clock tracking direction, and select the selected node with the previous node in the clock tracking direction (in order The connection port connected to nodes 1, 2, 3, 4, and 5) is used as the extracted Ethernet clock port with the highest priority (1); the selected node and the next node in the clock tracking direction (in order, node 3, The connection port of 4, 5, 6, and 1) is used as the Ethernet clock port, and the priority is second (2). Repeat step 3 until the clock planning for node 6 is completed.
- each node except the clock injection node on the ring clock link tracks the previous node in the clock tracking direction through the respective high priority clock port.
- the clock signal is such that each node on the ring clock link except the clock injection node is finally synchronized with the clock of the clock injection node, and the clock injection node does not extract the clock from the adjacent node, thereby ensuring the clock When switching, the ring clock link does not form a timing loop.
- a third embodiment is proposed.
- the clock link is a ring clock link and the ring clock link includes a main clock injection node and a standby clock.
- the above step S30 includes:
- the determined planning mode is the ring mode, determining whether the primary clock injection node is adjacent to the standby clock injection node, and if the primary clock injection node is adjacent to the standby clock injection node, Determining, by the clock injection node, the direction of the main clock injection node is a clock tracking direction, and if the main clock injection node is not adjacent to the standby clock injection node, determining a neighboring node of the main clock injection node The node in the middle identifies a larger node, and the direction in which the primary clock is injected into the node to the determined node is set to a clock tracking direction;
- connection port of the ring clock link except the main clock injection node to a node of the previous node in the clock tracking direction as a high priority clock port
- the ring clock A connection port of any node other than the standby clock injection node and the next node of the clock tracking direction is set as a low priority clock port.
- the user is required to specify the primary/secondary clock injection node for the clock link as needed, so that the clock link can perform the switching of the primary and secondary clock sources when needed, thereby improving the stability of the clock synchronization.
- This embodiment is illustrated by the ring clock link shown in FIG. 3, and node 1 and node shown in FIG. 5 respectively, the master clock injection node and the standby clock injection node specified by the user-triggered clock planning instruction, wherein the planning of the ring clock link is as follows:
- Step 1 Identify whether the clock injection of the node 1/node 5 is an external clock injection. If the clock injection of the node 1/node 5 is an external clock injection, the connection port of the node 1/node 5 and the external clock source is used as an external clock port. The highest priority is 1 (1). If the clock injection of the node 1/node 5 is not injected by the external clock, the clock source of the node 1/node 5 need not be planned because it has been planned to be completed in the previous ring;
- step 2 it is determined whether node 1 and node 5 are adjacent. If node 1 is adjacent to node 5, the direction of node 5 to node 1 is set to the clock tracking direction. If node 1 and node 5 are not adjacent, the node is acquired. 1 The node identifier of the adjacent node (node 2 and node 6), the direction of the node with the node 1 to the node identification is set to the clock tracking direction (in this example, node 1 and node 5 are not adjacent, and node 1 to node) 2 directions as an example);
- Step 3 The connection port of any node except the node 1 on the ring clock link and the previous node in the clock tracking direction is used as the extracted Ethernet clock port, and the priority is the highest (1);
- the connection port of any node other than the node 5 on the ring clock link and the next node in the clock tracking direction is taken as the Ethernet clock port, and the priority is second (2).
- the clock tracking direction determined by the above steps can be used as the primary clock tracking direction, and the reverse direction of the clock tracking direction is used as the standby clock tracking direction, so that each node on the ring preferentially passes through the respective The high priority clock port tracks the clock signal and tracks the clock signal through the respective low priority clock ports after clock switching.
- setting a clock injection node for the split clock link in the foregoing step S10 includes:
- each ring clock chain in the clock domain is sequentially extracted.
- the road acts as a ring clock link to be set;
- the first clock injection node is a primary clock injection node
- the second clock injection node is a standby clock injection node
- the first clock injection node is a standby clock injection node
- the second clock injection node is The main clock is injected into the node
- the shared node is virtualized as the second clock injection node of the ring clock link to be set, and the shared node is virtualized as the ring clock chain adjacent to the ring clock link to be set and not set.
- the first clock of the path is injected into the node, and the ring clock link to be set is updated to the set ring clock link.
- the first clock injection node and the second clock injection node described in this embodiment are all external clock injections, and are respectively set as a main clock injection node and a standby clock injection node in response to a user's clock planning instruction.
- the clock domain shown in FIG. 4 is composed of three ring clock links, wherein the node 2 is connected to the first BITS external clock source, and is set as the main clock injection node, where the node 2 is located.
- the ring clock link is abbreviated as the main ring; the node 10 is connected to the second BITS external clock source, and is set as the standby clock injection node, and the ring clock link where the node 10 is located is simply referred to as the backup ring, and the primary ring and the standby are prepared.
- the loops between the loops are referred to as interconnect loops, ie, looped clock links formed by nodes 14, 5, 6, 7, 12, and 13.
- the number of interconnecting rings can be multiple. The following describes the setting of the clock injection node in the clock domain shown in FIG.
- each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the primary ring to the backup ring.
- each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the backup ring to the primary ring.
- the primary ring where the node 1 is located is first extracted as the ring clock chain to be set.
- node 14 and node 5 are virtualized as one node here, and are used as a backup clock of the primary ring to inject the node, and as an interconnection ring (nodes 14, 5, 6). , 7, 12, and 13)
- the main clock is injected into the node, and the main ring is updated to the set ring clock link.
- the interconnecting ring is extracted as a ring clock link to be set, and node 12 and node 7 are virtualized as one node, as a backup clock injection node of the interconnect ring, and as a master clock injection node of the standby ring.
- the interconnect ring is updated to the ring clock link that has been set. At this time, the clock injection node of the ring clock link in the entire clock domain has been set.
- the standby clock injection node when the standby clock injection node includes a plurality of actual nodes, the standby clock is injected into any actual node included in the node and the previous actual direction in the clock tracking direction.
- the connection port of the node is set as a high priority clock port, and the standby clock is injected into any actual node included in the node and the connection port of the next actual node included in the standby clock injection node and in the clock tracking direction. Is a low priority clock port.
- the main clock injection node of the currently planned ring clock link is a virtual node
- the virtual node includes the previous ring clock link.
- the actual node that receives the clock signal firstly is injected into the actual node, and the reverse direction of the direction from the actual node to the other nodes in the virtual node is taken as the clock tracking direction (main clock tracking direction) of the currently planned ring clock link.
- Step S30 when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the foregoing Step S30 includes:
- each node except the clock injection node is sequentially selected along the two sides of the clock injection node;
- connection port of the selected node and the previous node in the direction is set as a high priority clock port, respectively, and the connection port of the selected node and the next node in the direction is set to a low priority clock port, and when the currently selected node is a neighboring node, the step of stopping the selected node is stopped;
- the two selected ports of the same node are set as the high priority clock port and the low priority clock port respectively, and the steps of stopping the selected node are stopped according to the preset priority rule. .
- the node 1 shown in FIG. 5 is a clock injection node connected to the external clock source of the BITS.
- the planning of the ring clock link is as follows:
- Step 1 Set the connection port of the node 1 and the BITS external clock source to the external clock port with the highest priority (1).
- the clock injection of the node 1 is the Ethernet clock injection, it is not necessary to plan the clock source for the node 1. Because it has been planned in the previous ring;
- the two ports (nodes 2, 6) are respectively connected to the next node of the respective direction (here, nodes 3, 5) as the extracted clock port, and the priority is second (2);
- Step 5 the number of hops of the two (next) nodes found is recorded as N+1;
- Step 7 Enter this step to indicate that it is the last node with the same hop count (such as node 4).
- the connection ports on both sides of the ring are used as the extracted Ethernet clock ports.
- the preset priority rules are as follows:
- the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
- a sixth embodiment is provided.
- the foregoing step S30 includes:
- connection port of each of the first tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the first tracking nodes under the clock tracking direction
- the connection port of a node is set to a low priority clock port.
- the node 2, the node 4, and the node 8 shown in FIG. 6 are all clock injection nodes, and the planning of the ring clock link is as follows:
- N(TTL, PORT) TTL and PORT respectively represent the hop count of the node N to the specified clock injection node and the connection port.
- Step 1 sequentially select a clock injection node to identify whether the clock injection of the currently selected clock injection node is an external clock injection. If yes, the clock is injected into the connection port of the node and the external clock source as an external clock port, and the priority is the highest. (1), and the connection port of the clock injection node and the adjacent node is set to the Ethernet clock port, the priority is second (2); if not, the clock source of the clock injection node is not required to be planned. Because it has been planned in the previous ring;
- Step 3 based on X and Y respectively, respectively searching for next hop nodes X' and Y';
- Step 4 determining whether the next hop node X' and Y' are Y and X, and if so, indicating that the currently selected clock injection node is used as the injection source, and the process jumps to step 1, and if not, the jump To step 5;
- Step 5 determining whether the next hop node X' and Y' are the same node, and if so, indicating chasing Go back to the same tail node, record X' (TTL++, PORT), jump to step 1, if not, then X' as X, and Y' as Y, and jump to step 2;
- Step 6 After each clock injection node on the ring clock link is analyzed, compare the TTL values of the same nodes under each clock injection node, and keep the minimum. So far, each node has the highest priority.
- the clock source has been determined, that is, the clock injection node corresponding to the minimum hop count of each node corresponding to the clock injection node is obtained, and each node is set to the opposite direction of the acquired clock injection node. Tracking direction for the clock (main clock tracking direction);
- Step 7 Perform clock planning for each node based on the clock tracking direction determined by each node.
- a normal ring (clock injection is a non-external clock injection) can only have at most two clock injection nodes and does not consider the clock source of the clock injection node;
- step 8 is further included:
- each node on the ring is clock injection nodes, and if so, the two clock injection nodes that are unset are corresponding to the extracted Ethernet clock ports of the separated nodes.
- the highest priority is the external clock injection (1), and the priority 2, 3 is the extracted clock on both sides.
- the external clock injection node is pumped with the Ethernet clock on both sides.
- the priority rules are as follows:
- the highest port rate is 2, and the other is 3.
- the slot number is smaller and the other is 3.
- a seventh embodiment is proposed.
- the foregoing step S30 includes:
- the clock is injected into the node as a starting point of the chain clock link, and the clock is injected into the node to the direction of other nodes in the chain clock link.
- connection port of each second tracking node and a previous node in the link direction as a clock port, wherein the second tracking node is the clock injection node except the clock injection node Other nodes outside.
- the chain clock link shown in FIG. 7 is a clock injection node of the chain clock link (nodes 1, 2, and 3), and the ring clock is located.
- the clock injection node of the link (nodes 1, 4, 5, 6), wherein the planning of the chain clock link where the node 1 is located is as follows:
- connection port of each second tracking node and the previous node in the link direction is set as a clock port, wherein the second tracking node is injected in the chain clock link except the clock Other nodes than nodes.
- the chain clock link in this embodiment is a unidirectional chain, that is, only one side has clock injection, and each second tracking node unidirectionally extracts a clock.
- the two connection ports with the highest priority are selected to set the Ethernet clock, wherein the priority rules are as follows:
- the optical port has a higher priority.
- the port rate is high and the priority is high.
- the port number has a higher priority
- the slot number has a higher priority.
- an eighth embodiment is proposed, in the embodiment, when the chain When the clock link includes two clock injection nodes, the step of setting each second tracking node and the connection port of the previous node in the link direction as a clock port includes:
- connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the second tracking nodes under the clock tracking direction
- the connection port of a node is set to a low priority clock port.
- Step 1 obtaining the hop count of the node 5 and the node 6 from the node 3 and the node 7;
- Step 2 Acquire a clock injection node corresponding to the minimum hop count of the corresponding hop count of the node 5 and the node 6, and set the reverse direction of the node 5 and the node 6 to the acquired clock injection node to the clock tracking direction respectively (node 5 to The hop count of node 3 is the smallest, the clock tracking direction of node 5 is 3 ⁇ 5; the hop count of node 6 to node 7 is the smallest, and the clock tracking direction of node 6 is 7 ⁇ 6);
- Step 3 the node 5 is connected to the previous node (node 3) in the clock tracking direction as the extracted Ethernet clock port, with the highest priority (1), and the node 5 is in the clock tracking direction.
- the connection port of a node (node 6) is used as the extracted Ethernet clock port, and the priority is second (2); the connection port of the node 6 and the previous node (node 7) in the clock tracking direction is used as the extracted Ethernet clock port.
- the highest priority is (1), and the connection port of the node 6 and the next node (node 5) in the clock tracking direction is taken as the Ethernet clock port, and the priority is second (2).
- the clock injection of the node 3/7 is an external clock injection, and when the clock injection of the node 3/7 is an external clock injection, connect the node 3/7 with the respective external clock source.
- the port is set to the external clock port and has the highest priority (1). If the clock injection of the node 3/7 is injected by the Ethernet clock, you do not need to plan the clock source for the node 3/7 because the ring is located in the node 3/7. It has been planned to be completed.
- connection ports of the two clock injection nodes and the adjacent nodes on the chain clock link may be set as the Ethernet clock port, and the priority is lower than the clock source, so that the two ends of the chain
- the clock injection node can switch to its respective low priority clock port for clock tracking when the currently tracked clock source fails.
- connection port acts as a mutual pumping clock.
- the embodiment of the present invention further provides a clock planning apparatus.
- the clock planning apparatus includes:
- the splitting module 100 is configured to: when detecting a clock planning instruction, split the network to be planned into at least one clock link based on the clock planning instruction, and set a clock injection node for the split clock link;
- a complete subnet may be used as a network to be planned in response to a user operation, or a network topology formed by a part of nodes in a subnet may be used as a network to be planned; after the network to be planned is determined, the splitting module 100 is based on The detected clock planning instruction splits the network to be planned into at least one clock link, wherein the split clock link is ring-shaped or chain-shaped, and the clock link is split as follows:
- Step A1 Find a single chain of all nodes of the planning network, and count the number of super long single chains;
- Step A2 Perform recursive edge processing on all nodes of the planning network
- step A3 the node with the degree 2 in the network to be planned is selected in turn, and a ring is calculated by the looping algorithm with the selected node as a starting point, wherein the degree refers to the number of links connecting other nodes on the node, for example, one node Connected to the other two nodes, the degree of the node is 2;
- Step A4 identifying the number of nodes, rings, and ring numbers on the ring;
- Step A5 removing the judged looped edge
- step A6 the process proceeds to step A3 until all the rings included in the network to be planned are counted.
- the looping algorithm is as follows:
- Step B1 for each node, find the opposite node as its own neighbor node (except the uplink direct neighbor) through the connection, and temporarily store the neighbor node information, and store only one direction neighbor for the first selected node;
- Step B2 selecting a node with a degree of 2 on the access layer to start calculation
- Step B3 Find a neighbor along a connection direction, and generate a neighbor set of the node (the starting node only follows a certain direction);
- Step B4 According to the breadth-first algorithm, each neighbor node of the same level searches for neighbor information according to the connection information, and generates a neighbor node set other than the uplink direct neighbor;
- Step B5 in each of the neighbor sets to find out whether there is a starting node, and if so, proceeds to step B6, and if not, proceeds to step B7;
- step B6 it is determined whether there is any neighbor information. If there is no neighbor information in each direction, the search ends, indicating that the node is the starting point, and there is no loop link, that is, a chain link, and if there is neighbor information, Then proceeds to step B2;
- step B7 if the starting node is found, the calculated path constitutes a ring (the rate of the recording ring, the node on the ring).
- a network can be divided into three levels according to logical relationship, which are a core layer, an aggregation layer, and an access layer.
- the embodiments of the present invention provide two clock planning scenarios: a full network scenario and an incremental network scenario, where the network-wide scenario refers to planning from the core layer, convergence layer planning, and access layer planning, and Specify an external clock source at the core layer for a newly opened network; an incremental network scenario refers to a ring clock link (or chain clock link) that specifies an aggregation layer (or access layer) to One or two shared nodes of the ring clock link and other clock links inject a clock source into the ring.
- This clock source is an extracted Ethernet clock, which is suitable for partial change (or new) in the opened network.
- Clock source network is optionally, the external clock of the BITS (Building Integrated Timing Supply System) is used as an external clock source.
- the network to be planned becomes a set of a ring clock link and a chain clock link after being split, and the clock plan of the network to be planned becomes for each ring.
- Clock planning for clock links and chain clock links Each clock link after splitting only needs to track the clock signal of the respective clock injection node, wherein the clock injection node can track an external clock source (such as a BITS external clock), and can also track the clock signals of other clock links ( The Ether Clock is also used to track the clock signal of its internal crystal oscillator.
- the clock injection nodes of each clock link cooperate with each other to form a clock tracking relationship of the entire network, so that the entire network to be planned can be clocked.
- the determining module 200 is configured to: determine, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
- two planning modes are provided for the user to select, which are respectively a ring mode and a shortest path mode, where a scenario in which all nodes are required to track the same clock source may be used in a ring mode, and a scenario in which the quality of the clock signal transmission is required may be adopted.
- the shortest path method is provided for the user to select.
- the planning module 300 is configured to determine a clock tracking direction of each node on the clock link according to the determined planning manner and a clock injection node of the clock link.
- the planning module 300 after determining the planning mode of the clock link and the clock injection node of each clock link, the planning module 300 automatically starts a clock planning operation on the clock link to determine the clock of each node on the clock link. Tracking direction, in turn, can accurately track the clock signal of the clock injection node, and can switch the clock tracking relationship when the fault occurs.
- the planning module 300 performs clock planning operations according to the following constraint rules:
- the BITS external clock has the primary and backup points, one master and one standby; in the shortest path mode planning, the BITS external clock has no active/standby points and is the primary clock;
- the BITS external clock can only inject clock signals from the ring clock link of the core layer
- the clock signal can only flow from the upper ring/chain to the lower ring/chain, and the clock signal of the lower ring/chain cannot flow to the upper ring/chain.
- the clock planning apparatus in this embodiment splits the network to be planned into a set of a ring clock link and a chain clock link, and then adopts a specified planning mode for each ring clock link and each chain clock.
- the link automatically performs the clock planning operation.
- the embodiment of the present invention does not require manual planning, reduces the probability of occurrence of errors, and reduces the operational difficulty of clock planning.
- the planning module 300 is set Determining: a neighboring node of the clock injection node when the clock link is a ring clock link and the ring clock link includes a single clock injection node, and the determined planning mode is a ring mode.
- a node in the middle identifies a larger node; a direction in which the clock is injected into the node to the determined node is set to a clock tracking direction; and any one of the ring clock links except the clock injection node is injected a node and a connection port of a previous node in the clock tracking direction are set as a high priority clock port, and any node other than the clock injection node on the ring clock link is tracked at the clock The connection port of the next node in the direction is set to the low priority clock port.
- the ring clock link shown in FIG. 2 is a clock injection node.
- the planning module 300 plans the ring clock link as follows:
- Step 1 If the clock injection of the node 1 is an external clock injection, the connection port of the node 1 and the external clock source is the external clock port, and the priority is the highest (1). If the clock injection of the node 1 is the Ethernet clock injection, then The clock source needs to be planned for node 1, because it has been planned to be completed in the previous ring;
- Step 2 Obtain a node identifier of a node 1 node (node 2 and node 6), and set a direction of a node 1 to a node with a larger node identifier as a clock tracking direction (taking node 1 to node 2 as an example);
- Step 3 Select each node except the node 1 (nodes 2, 3, 4, 5, and 6 in turn) along the clock tracking direction, and select the selected node with the previous node in the clock tracking direction (in order, the node) 1, 2, 3, 4, 5) connected ports as the extracted Ethernet clock port, and the highest priority (1); the selected node and the next node in the clock tracking direction (in order, nodes 3, 4, The connection port of 5, 6, and 1) is used as the Ethernet clock port, and the priority is second (2). Repeat step 3 until the clock planning for node 6 is completed.
- each node except the clock injection node on the ring clock link tracks the previous node in the clock tracking direction through the respective high priority clock port.
- the clock signal is such that each node on the ring clock link except the clock injection node is finally synchronized with the clock of the clock injection node, and the clock injection node does not extract the clock from the adjacent node, thereby ensuring the clock When switching, the ring clock link does not form a timing loop.
- the planning module 300 is set The master clock is determined when the clock link is a ring clock link and the ring clock link includes a master clock injection node and a backup clock injection node, and the determined planning mode is a ring mode.
- the injection node is adjacent to the standby clock injection node, and if the main clock injection node is adjacent to the standby clock injection node, setting a direction of the standby clock injection node to the main clock injection node as a clock Tracking direction, if the primary clock injection node is not adjacent to the standby clock injection node, determining a node with a larger node identifier in a neighboring node of the primary clock injection node, and injecting the primary clock into the node Determining a direction of the node to be a clock tracking direction; and connecting any node other than the main clock injection node on the ring clock link to a previous node in the clock tracking direction
- the port is set as a high priority clock port, and the connection port of any node other than the standby clock injection node and the next node of the clock tracking direction on the ring clock link is set to Priority clock port.
- the user is required to specify the primary/secondary clock injection node for the clock link as needed, so that the clock link can perform the switching of the primary and secondary clock sources when needed, thereby improving the stability of the clock synchronization.
- the ring clock link shown in FIG. 3 is illustrated by the ring clock link shown in FIG. 3.
- the node 1 and the node 5 shown in FIG. 3 are respectively a master clock injection node and a backup clock injection node specified by a user-triggered clock planning instruction.
- the planning of the ring clock link by module 300 is as follows:
- Step 1 Identify whether the clock injection of the node 1/node 5 is an external clock injection. If yes, the connection port of the node 1/node 5 and the external clock source is used as an external clock port, and the priority is the highest (1). If not, It is not necessary to plan the clock source for node 1/node 5 because it has been planned to be completed in the previous ring;
- Step 2 it is determined whether the node 1 and the node 5 are adjacent, and if so, the direction of the node 5 to the node 1 is set to the clock tracking direction, and if not, the node identifier of the node 1 (node 2 and node 6) of the node 1 is acquired.
- the direction from the node 1 to the node with the node identifier is set to the clock tracking direction (in this example, node 1 and node 5 are not adjacent, and node 1 to node 2 are taken as an example);
- Step 3 The connection port of any node except the node 1 on the ring clock link and the previous node in the clock tracking direction is used as the extracted Ethernet clock port, and the priority is the highest (1);
- the connection port of any node other than the node 5 on the ring clock link and the next node in the clock tracking direction is taken as the Ethernet clock port, and the priority is second (2).
- the clock tracking direction determined by the above steps can be used as the primary clock tracking direction, and the reverse direction of the clock tracking direction is used as the standby clock tracking direction, so that each node on the ring preferentially passes through the respective The high priority clock port tracks the clock signal and tracks the clock signal through the respective low priority clock ports after clock switching.
- the splitting module 100 includes:
- an extracting unit configured to: when the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, sequentially extracting the clock domain
- Each ring clock link acts as a ring clock link to be set;
- a determining unit configured to: determine, when the extracted ring clock link to be set includes the first clock injection node, whether the ring clock link that is not connected to the ring link to be set includes a second clock Injecting a node, wherein the first clock injection node is a primary clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock The injection node is injected into the node as a master clock;
- An acquiring unit configured to: when the ring clock link that is connected to the to-be-set ring clock link and that is not set includes the second clock injection node, obtain the ring clock link to be set and the adjacent And a shared node between the ring clock links that are not set;
- a setting unit configured to: virtualize the shared node as a second clock injection node of the ring clock link to be set, and virtualize the shared node as adjacent to the ring clock link to be set And setting a first clock injection node of the ring clock link, and updating the to-be-set ring clock link to a set ring clock link.
- the first clock injection node and the second clock injection node described in this embodiment are all external clock injections, and are respectively set as a main clock injection node and a standby clock injection node in response to a user's clock planning instruction.
- the clock domain shown in FIG. 4 is composed of three ring clock links, wherein the node 2 is connected to the first BITS external clock source, and is set as the main clock injection node, where the node 2 is located.
- the ring clock link is abbreviated as the main ring; the node 10 is connected to the second BITS external clock source, and is set as the standby clock injection node, and the ring clock link where the node 10 is located is simply referred to as the backup ring, and the primary ring and the standby are prepared.
- the rings between the rings are called interconnecting rings, ie nodes 14, 5, 6, 7, 12 and 13 Looped clock link. In other embodiments, the number of interconnecting rings can be multiple. The following describes the setting of the clock injection node by the split module 100 in the clock domain shown in FIG.
- each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the primary ring to the backup ring.
- each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the backup ring to the primary ring.
- the primary ring where the node 1 is located is first extracted as the ring clock chain to be set.
- node 14 and node 5 are virtualized as one node here, and are used as a backup clock of the primary ring to inject the node, and as an interconnection ring (nodes 14, 5, 6). , 7, 12, and 13)
- the main clock is injected into the node, and the main ring is updated to the set ring clock link.
- the interconnecting ring is extracted as the ring clock link to be set, and the node 12 and the node 7 are virtualized as one node, as the standby clock injection node of the interconnecting ring, and as the primary clock injection node of the standby ring, and the interconnecting ring is updated to have been Set the ring clock link.
- the clock injection node of the ring clock link in the entire clock domain has been set.
- the planning module 300 is further configured to: when the standby clock injection node includes a plurality of actual nodes, and after setting a clock tracking direction, the standby clock injection node includes The connection port of any actual node and the last actual node in the clock tracking direction is set as a high priority clock port, and the standby clock is injected into any node included in the node and the standby clock injection node includes And the connection port of the next actual node in the clock tracking direction is set to a low priority clock port.
- the main clock injection node of the currently planned ring clock link is a virtual node
- the virtual node includes the previous ring clock link.
- the actual node that receives the clock signal firstly is injected into the actual node, and the reverse direction of the direction from the actual node to the other nodes in the virtual node is taken as the clock tracking direction (main clock tracking direction) of the currently planned ring clock link.
- the planning module 300 is configured to: when the clock link is a ring clock link and the ring clock link includes a single clock injection a node, and when the determined planning mode is the shortest path mode, each node except the clock injection node is sequentially selected along the two sides of the clock injection node; when the node is selected, the currently selected node is determined.
- connection port is set to a low priority clock port, and when the currently selected node is a neighboring node, the selected node is stopped; and when the currently selected node is the same node, the selected same according to the preset priority rule
- the connection ports on both sides of the node are set to the high priority clock port and the low priority clock port, respectively, and the selected node is stopped.
- the node 1 shown in FIG. 5 is a clock injection node connected to the external clock source of the BITS, and the planning module 300 plans the ring clock link as follows. Show:
- Step 1 Set the connection port of the node 1 and the BITS external clock source to the external clock port with the highest priority (1).
- the clock injection of the node 1 is the Ethernet clock injection, it is not necessary to plan the clock source for the node 1. Because it has been planned in the previous ring;
- the two ports (nodes 2, 6) are respectively connected to the next node of the respective direction (here, nodes 3, 5) as the extracted clock port, and the priority is second (2);
- Step 5 the number of hops of the two (next) nodes found is recorded as N+1;
- Step 7 Enter this step to indicate that it is the last node with the same hop count (such as node 4).
- the connection ports on both sides of the ring are used as the extracted Ethernet clock ports.
- the preset priority rules are as follows:
- the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
- the planning module 30 is configured to: when the clock link is a ring clock link including multiple clock injection nodes, and determine the location When the planning mode is the shortest path mode, obtain the hop count of each of the first tracking nodes from each clock injection node, where the first tracking node is the clock injection node except the clock injection node.
- the node 2, the node 4, and the node 8 shown in FIG. 6 are both clock injection nodes.
- the planning module 300 plans the ring clock link as follows. Shown as follows:
- N(TTL, PORT) TTL and PORT respectively represent the hop count of the node N to the specified clock injection node and the connection port.
- Step 1 sequentially select a clock injection node to identify whether the clock injection of the currently selected clock injection node is an external clock injection. If yes, the clock is injected into the connection port of the node and the external clock source as an external clock port, and the priority is the highest. (1), and inject the clock into the node with The connection port of the adjacent node is set to the Ethernet clock port, and the priority is second (2); if not, the clock source of the clock injection node is not planned, because it is planned to be completed in the previous ring;
- Step 3 based on X and Y respectively, respectively searching for next hop nodes X' and Y';
- Step 4 determining whether the next hop node X' and Y' are Y and X, and if so, indicating that the currently selected clock injection node is used as the injection source, and the process jumps to step 1, and if not, the jump To step 5;
- Step 5 Determine whether the next hop node X' and Y' are the same node. If yes, the description traces back to the same tail node, and records X' (TTL++, PORT), and jumps to step 1, if not, then Take X' as X, and Y' as Y, and jump to step 2;
- Step 6 After each clock injection node on the ring clock link is analyzed, compare the TTL values of the same nodes under each clock injection node, and keep the minimum. So far, each node has the highest priority.
- the clock source has been determined, that is, the clock injection node corresponding to the minimum hop count of each node corresponding to the clock injection node is obtained, and each node is set to the opposite direction of the acquired clock injection node. Tracking direction for the clock (main clock tracking direction);
- Step 7 Perform clock planning for each node based on the clock tracking direction determined by each node.
- a normal ring (clock injection is a non-external clock injection) can only have at most two clock injection nodes and does not consider the clock source of the clock injection node;
- step 8 is further included:
- each adjacent node of each node on the ring is a clock injection node, and if so, revoke the setting
- the two clock injection nodes are located corresponding to the extracted Ethernet clock ports of their separated nodes.
- the highest priority is the external clock injection (1), and the priority 2, 3 is the extracted clock on both sides.
- the external clock injection node is pumped with the Ethernet clock on both sides.
- the priority rules are as follows:
- the highest port rate is 2, and the other is 3.
- the slot number is smaller and the other is 3.
- the planning module 300 is configured to: when the clock link is a chain clock link, and the determined planning mode is the shortest path mode, Injecting the clock into a node as a starting point of the chain clock link, and injecting the clock into a node to a direction of other nodes in the chain clock link as a link direction of the chain clock link; And setting a connection port of each second tracking node and a previous node in the link direction as a clock port, wherein the second tracking node is the clock injection node in the chain clock link Other nodes than others.
- the chain clock link shown in FIG. 7 is a clock injection node of the chain clock link (nodes 1, 2, and 3), and the ring clock is located The clock injection node of the link (nodes 1, 4, 5, 6), wherein the planning module 300 plans the chain clock link of the node 1 as follows:
- connection port of each second tracking node and the previous node in the link direction is set as a clock port, wherein the second tracking node is injected in the chain clock link except the clock Other nodes than nodes.
- the chain clock link in this embodiment is a unidirectional chain, that is, only one side has clock injection, and each second tracking node unidirectionally extracts a clock.
- the optical port has a higher priority.
- the port rate is high and the priority is high.
- the port number has a higher priority
- the slot number has a higher priority.
- the planning module 300 is configured to: when the chain clock link includes two clock injection nodes, acquire each second tracking node. a hop count from each of the clock injection nodes in each of the link directions; acquiring a clock injection node corresponding to a minimum hop count in each hop count of each second tracking node, and acquiring each second tracking node to obtain The reverse direction of the clock injection node is set to a clock tracking direction; and the connection port of each of the second tracking node and the previous node in the clock tracking direction is set as a high priority clock port, and each The connection port of the second tracking node and the next node in the clock tracking direction is set as a low priority clock port.
- nodes 3, 5, 6, and 7 are clock injection nodes, wherein the planning module 300 links the chain clock.
- the plan is as follows:
- Step 1 obtaining the hop count of the node 5 and the node 6 from the node 3 and the node 7;
- Step 2 Acquire a clock injection node corresponding to the minimum hop count of the corresponding hop count of the node 5 and the node 6, and set the reverse direction of the node 5 and the node 6 to the acquired clock injection node to the clock tracking direction respectively (node 5 to The hop count of node 3 is the smallest, the clock tracking direction of node 5 is 3 ⁇ 5; the hop count of node 6 to node 7 is the smallest, and the clock tracking direction of node 6 is 7 ⁇ 6);
- Step 3 the node 5 is connected to the previous node (node 3) in the clock tracking direction as the extracted Ethernet clock port, with the highest priority (1), and the node 5 is in the clock tracking direction.
- the connection port of a node (node 6) is used as the extracted Ethernet clock port, and the priority is second (2); the connection port of the node 6 and the previous node (node 7) in the clock tracking direction is used as the extracted Ethernet clock port.
- the highest priority is (1), and the connection port of the node 6 and the next node (node 5) in the clock tracking direction is taken as the Ethernet clock port, and the priority is second (2).
- the clock injection of the node 3/7 is an external clock injection, and when the clock injection of the node 3/7 is an external clock injection, connect the node 3/7 with the respective external clock source.
- the port is set to the external clock port and has the highest priority (1). If the clock injection of the node 3/7 is injected by the Ethernet clock, you do not need to plan the clock source for the node 3/7 because the ring is located in the node 3/7. It has been planned to be completed.
- connection ports of the two clock injection nodes and the adjacent nodes on the chain clock link may be set as the Ethernet clock port, and the priority is lower than the clock source, so that the two ends of the chain
- the clock injection node can switch to its respective low priority clock port for clock tracking when the currently tracked clock source fails.
- connection port acts as a mutual pumping clock.
- an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
- each module/unit in the above embodiment may be implemented in the form of hardware, for example, by implementing an integrated circuit to implement its corresponding function, or may be implemented in the form of a software function module, for example, executing a program stored in the memory by a processor. / instruction to achieve its corresponding function.
- This application is not limited to any particular form of hardware and software combination
- the embodiment of the invention provides a clock planning method and device, which does not require manual planning, reduces the probability of occurrence of errors, and reduces the operation difficulty of clock planning.
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Abstract
Description
本申请涉及但不限于通信技术领域,尤其涉及一种时钟规划方法及装置。The present application relates to, but is not limited to, the field of communications technologies, and in particular, to a clock planning method and apparatus.
在通信网络中,时钟是一个非常重要的因素,直接关系到网络业务的质量。通常地,网络采用一个或多个外部时钟源为网络内每个节点提供标准时钟信号,每个节点按照预规划的时钟跟踪关系,跟踪一个外部时钟源,并在网络状况发生变化时,进行跟踪关系的倒换。时钟跟踪关系需要满足的一个重要原则是:在任何时刻时钟跟踪关系不能成环,例如,节点A第二跟踪节点B,而节点B又第二跟踪节点A,将导致网络业务失效。In communication networks, clocks are a very important factor and are directly related to the quality of network services. Typically, the network uses one or more external clock sources to provide a standard clock signal for each node in the network. Each node follows an pre-planned clock tracking relationship, tracks an external clock source, and tracks when network conditions change. The switching of the relationship. An important principle that the clock tracing relationship needs to satisfy is that the clock tracing relationship cannot be looped at any time. For example, the second tracking node B of the node A and the second tracking node A of the node B will cause the network service to fail.
然而,随着网络技术的飞速发展,网络结构日渐复杂,例如,在承载网中,网络节点一般会有多个度,节点间的拓扑关系复杂,相关的人工规划方式难以满足承载网的时钟规划需求,时钟规划的操作难度较高。However, with the rapid development of network technology, the network structure is becoming more and more complex. For example, in a bearer network, network nodes generally have multiple degrees, and the topological relationship between nodes is complex. The related manual planning method is difficult to meet the clock planning of the bearer network. Demand, clock planning is more difficult to operate.
发明内容Summary of the invention
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。The following is an overview of the topics detailed in this document. This Summary is not intended to limit the scope of the claims.
本发明实施例提供一种时钟规划方法及装置,能够降低时钟规划的操作难度。The embodiment of the invention provides a clock planning method and device, which can reduce the operation difficulty of clock planning.
本发明实施例提供一种时钟规划方法,所述时钟规划方法包括:The embodiment of the invention provides a clock planning method, where the clock planning method includes:
在侦测到时钟规划指令时,基于所述时钟规划指令将待规划网络拆分为至少一个时钟链路,并为拆分得到的时钟链路设置时钟注入节点;When the clock planning instruction is detected, the network to be planned is split into at least one clock link based on the clock planning instruction, and a clock injection node is set for the split clock link;
基于所述时钟规划指令确定所述时钟链路的规划方式,其中,所述规划方式为环方式或最短路径方式;Determining, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向。 Determining a clock tracking direction of each node on the clock link according to the determined planning manner and a clock injection node of the clock link.
可选地,当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点时,所述根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向的步骤包括:Optionally, when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the determining is determined according to a determined planning manner and a clock injection node of the clock link. The steps of clock tracking direction of each node on the clock link include:
在确定的所述规划方式为环方式时,确定所述时钟注入节点的相邻节点中的节点标识较大的节点;Determining, in the ring mode, that the planned mode of the clock injection node is a node with a larger node identifier;
将所述时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;Setting the clock injection node to the determined direction of the node as a clock tracking direction;
将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of any one of the ring clock link except the clock injection node and a previous node in the clock tracking direction as a high priority clock port, and the ring clock chain The connection port of any node other than the clock injection node on the road and the next node in the clock tracking direction is set as a low priority clock port.
可选地,当所述时钟链路为环状时钟链路且所述环状时钟链路包括主时钟注入节点和备时钟注入节点时,所述根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向的步骤包括:Optionally, when the clock link is a ring clock link and the ring clock link includes a primary clock injection node and a backup clock injection node, the determining according to the determined planning manner and the clock link The clock injection node determines the clock tracking direction of each node on the clock link, including:
在确定的所述规划方式为环方式时,判断所述主时钟注入节点与所述备时钟注入节点是否相邻,若所述主时钟注入节点与所述备时钟注入节点相邻,则将所述备时钟注入节点至所述主时钟注入节点的方向设为时钟跟踪方向,若所述主时钟注入节点与所述备时钟注入节点不相邻,则确定所述主时钟注入节点的相邻节点中的节点标识较大的节点,并将所述主时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;When the determined planning mode is the ring mode, determining whether the primary clock injection node is adjacent to the standby clock injection node, and if the primary clock injection node is adjacent to the standby clock injection node, Determining, by the clock injection node, the direction of the main clock injection node is a clock tracking direction, and if the main clock injection node is not adjacent to the standby clock injection node, determining a neighboring node of the main clock injection node The node in the middle identifies a larger node, and the direction in which the primary clock is injected into the node to the determined node is set to a clock tracking direction;
将所述环状时钟链路上除所述主时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述备时钟注入节点之外的任一节点与所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of the ring clock link except the main clock injection node to a node of the previous node in the clock tracking direction as a high priority clock port, and the ring clock A connection port of any node other than the standby clock injection node and the next node of the clock tracking direction is set as a low priority clock port.
可选地,在所述时钟链路为多个时,所述为拆分得到的时钟链路设置时钟注入节点包括:Optionally, when the number of the clock links is multiple, the setting a clock injection node for the split clock link includes:
当所述时钟链路为环状时钟链路,且所述环状时钟链路与至少一个其它环状时钟链路相互连通形成时钟域时,依次提取所述时钟域中每个环状时钟 链路作为待设置环状时钟链路;When the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, each ring clock in the clock domain is sequentially extracted. The link acts as a ring clock link to be set;
在提取的待设置环状时钟链路包括第一时钟注入节点时,确定与所述待设置环状链路连通的且未设置的环状时钟链路是否包括第二时钟注入节点,其中,所述第一时钟注入节点为主时钟注入节点,所述第二时钟注入节点为备时钟注入节点,或者所述第一时钟注入节点为备时钟注入节点,所述第二时钟注入节点为主时钟注入节点;Determining, when the extracted ring clock link to be set includes the first clock injection node, whether the ring clock link that is not connected to the ring link to be set includes a second clock injection node, where The first clock injection node is a main clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock injection node is injected into a main clock. node;
在与所述待设置环状时钟链路连通的且未设置的环状时钟链路包括第二时钟注入节点时,获取所述待设置环状时钟链路与相邻的且未设置的环状时钟链路之间的共用节点;Acquiring the ring clock link to be set and the adjacent and unset ring when the ring clock link that is connected to the ring clock link that is to be set and not set includes the second clock injection node a shared node between clock links;
将所述共用节点虚拟为所述待设置环状时钟链路的第二时钟注入节点,将所述共用节点虚拟为所述待设置环状时钟链路相邻的且未设置的环状时钟链路的第一时钟注入节点,以及将所述待设置环状时钟链路更新为已设置环状时钟链路。The shared node is virtualized as the second clock injection node of the ring clock link to be set, and the shared node is virtualized as the ring clock chain adjacent to the ring clock link to be set and not set. The first clock of the path is injected into the node, and the ring clock link to be set is updated to the set ring clock link.
可选地,在确定所述时钟链路上的节点的时钟跟踪方向之后,所述时钟规划方法还包括:Optionally, after determining a clock tracking direction of the node on the clock link, the clock planning method further includes:
当所述备时钟注入节点包括的实际节点为多个时,将所述备时钟注入节点包括的任一实际节点与在所述时钟跟踪方向的上一实际节点的连接端口设为高优先级时钟端口,将所述备时钟注入节点包括的任一实际节点与所述备时钟注入节点包括的且在所述时钟跟踪方向的下一实际节点的连接端口设为低优先级时钟端口。When the standby clock injection node includes a plurality of actual nodes, setting any of the actual nodes included in the standby clock injection node to a connection port of the last actual node in the clock tracking direction as a high priority clock. The port is configured to inject the standby clock into any of the actual nodes included in the node and the connection port of the next actual node included in the clock tracking direction and in the clock tracking direction as a low priority clock port.
可选地,当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点时,所述根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向的步骤包括:Optionally, when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the determining is determined according to a determined planning manner and a clock injection node of the clock link. The steps of clock tracking direction of each node on the clock link include:
在确定的所述规划方式为最短路径方式时,同时沿所述时钟注入节点两侧方向依次选中除所述时钟注入节点之外的每一节点;When the determined planning mode is the shortest path mode, each node except the clock injection node is sequentially selected along the two sides of the clock injection node;
在选中节点时,判断当前选中的节点是否为相同节点;When the node is selected, it is determined whether the currently selected node is the same node;
在当前选中的节点为不同节点时,分别将选中的节点与其所在方向的上一节点的连接端口设为高优先级时钟端口,分别将选中的节点与其所在方向 的下一节点的连接端口设为低优先级时钟端口,并在当前选中的节点为相邻节点时,停止执行选中节点的步骤;When the currently selected node is a different node, set the connection port of the selected node to the previous node in the direction to be the high priority clock port, respectively, and select the selected node and its direction. The connection port of the next node is set to a low priority clock port, and when the currently selected node is a neighboring node, the step of executing the selected node is stopped;
在当前选中的节点为相同节点时,基于预设优先级规则将选中的所述相同节点的两侧连接端口分别设置为高优先级时钟端口和低优先级时钟端口,并停止执行选中节点的步骤。When the currently selected node is the same node, the two selected ports of the same node are set as the high priority clock port and the low priority clock port respectively, and the steps of stopping the selected node are stopped according to the preset priority rule. .
可选地,所述预设优先级规则包括:Optionally, the preset priority rule includes:
若两连接端口的端口类型不同,将光连接端口设为高优先级时钟端口,将电连接端口设为低优先级时钟端口;If the port types of the two ports are different, set the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
若两连接端口的端口类型相同,将端口速率较高的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port types of the two ports are the same, set the port with the higher port rate as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口速率相同,将端口号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port rates of the two ports are the same, set the port with the larger port number as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口号相同,将槽位号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口。If the port numbers of the two ports are the same, set the port with the larger slot number as the high priority clock port and the other port to the lower priority clock port.
可选地,当所述时钟链路为包括多个时钟注入节点的环状时钟链路时,所述根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向的步骤包括:Optionally, when the clock link is a ring clock link including multiple clock injection nodes, determining the clock link according to the determined planning manner and the clock injection node of the clock link. The steps of the clock tracking direction of each node include:
在确定的所述规划方式为最短路径方式时,获取每个第一跟踪节点距离每个时钟注入节点的跳数,其中,所述第一跟踪节点为所述环状时钟链路中除所述时钟注入节点之外的其它节点;And obtaining, in the shortest path mode, the hop count of each of the first tracking nodes from each clock injection node, wherein the first tracking node is the ring clock link except The clock is injected into other nodes than the node;
获取每个所述第一跟踪节点对应跳数中的最小跳数对应的时钟注入节点,并将每个所述第一跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;Obtaining a clock injection node corresponding to a minimum number of hops in the corresponding hop count of each of the first tracking nodes, and setting a reverse direction of each of the first tracking nodes to the acquired clock injection node as a clock tracking direction;
将每个所述第一跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第一跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of each of the first tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the first tracking nodes under the clock tracking direction The connection port of a node is set to a low priority clock port.
可选地,当所述时钟链路为链状时钟链路时,所述根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟 踪方向的步骤包括:Optionally, when the clock link is a chain clock link, determining, according to the determined planning manner and a clock injection node of the clock link, a clock of each node on the clock link. The steps to track the direction include:
当确定的规划方式为最短路径方式时,将所述时钟注入节点作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;When the determined planning mode is the shortest path mode, the clock is injected into the node as a starting point of the chain clock link, and the clock is injected into the node to the direction of other nodes in the chain clock link. The link direction of the chain clock link;
将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Setting a connection port of each second tracking node and a previous node in the link direction as a clock port, wherein the second tracking node is the clock injection node except the clock injection node Other nodes outside.
可选地,当所述链状时钟链路包括两个时钟注入节点时,所述将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口的步骤包括:Optionally, when the chain clock link includes two clock injection nodes, the step of setting each second tracking node and a connection port of a previous node in the link direction as a clock port includes: :
获取每个第二跟踪节点在每个所述链路方向上距离每个所述时钟注入节点的跳数;Obtaining, by each second tracking node, a hop count from each of the clock injection nodes in each of the link directions;
获取每个第二跟踪节点对应跳数中的最小跳数对应的时钟注入节点,将每个第二跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;Obtaining a clock injection node corresponding to a minimum number of hops in each hop count of each second tracking node, and setting a reverse direction of each of the second tracking nodes to the acquired clock injection node as a clock tracking direction;
将每个所述第二跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第二跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the second tracking nodes under the clock tracking direction The connection port of a node is set to a low priority clock port.
此外,本发明实施例还提供一种时钟规划装置,所述时钟规划装置包括:In addition, an embodiment of the present invention further provides a clock planning apparatus, where the clock planning apparatus includes:
拆分模块,设置为:在侦测到时钟规划指令时,基于所述时钟规划指令将待规划网络拆分为至少一个时钟链路,并为拆分得到的时钟链路设置时钟注入节点;The splitting module is configured to: when detecting a clock planning instruction, split the network to be planned into at least one clock link based on the clock planning instruction, and set a clock injection node for the split clock link;
确定模块,设置为:基于所述时钟规划指令确定所述时钟链路的规划方式,其中,所述规划方式为环方式或最短路径方式;a determining module, configured to: determine, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
规划模块,设置为:根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向。The planning module is configured to: determine a clock tracking direction of each node on the clock link according to the determined planning manner and a clock injection node of the clock link.
可选地,所述规划模块是设置为:当所述时钟链路为环状时钟链路且所 述环状时钟链路包括单个时钟注入节点,且确定的所述规划方式为环方式时,确定所述时钟注入节点的相邻节点中的节点标识较大的节点;将所述时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;以及将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, the planning module is configured to: when the clock link is a ring clock link and The ring clock link includes a single clock injection node, and when the determined planning mode is the ring mode, determining a node with a larger node identifier among adjacent nodes of the clock injection node; injecting the clock into the node to Determining the direction of the node as a clock tracking direction; and setting a connection port of any node other than the clock injection node on the ring clock link to a previous node in the clock tracking direction For a high priority clock port, a connection port of any node other than the clock injection node and the next node in the clock tracking direction on the ring clock link is set as a low priority clock port.
可选地,所述规划模块是设置为:当所述时钟链路为环状时钟链路且所述环状时钟链路包括主时钟注入节点和备时钟注入节点,且确定的所述规划方式为环方式时,判断所述主时钟注入节点与所述备时钟注入节点是否相邻,若所述主时钟注入节点与所述备时钟注入节点相邻,则将所述备时钟注入节点至所述主时钟注入节点的方向设为时钟跟踪方向,若所述主时钟注入节点与所述备时钟注入节点不相邻,则确定所述主时钟注入节点的相邻节点中的节点标识较大的节点,并将所述主时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;以及将所述环状时钟链路上除所述主时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述备时钟注入节点之外的任一节点与所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, the planning module is configured to: when the clock link is a ring clock link, and the ring clock link includes a primary clock injection node and a backup clock injection node, and the determined planning manner In the case of the ring mode, determining whether the master clock injection node is adjacent to the standby clock injection node, and if the master clock injection node is adjacent to the standby clock injection node, injecting the standby clock into the node to the node The direction of the main clock injection node is set to a clock tracking direction. If the main clock injection node is not adjacent to the standby clock injection node, it is determined that the node identifier of the adjacent node of the main clock injection node is larger. a node, and the direction in which the master clock is injected into the node to the determined node is set to a clock tracking direction; and any node other than the master clock injection node on the ring clock link The connection port of the previous node in the clock tracking direction is set as a high priority clock port, and any node other than the standby clock injection node on the ring clock link and the clock tracking side The next node is connected to a low-priority port clock port.
可选地,所述拆分模块包括:Optionally, the splitting module includes:
提取单元,设置为:当所述时钟链路为环状时钟链路,且所述环状时钟链路与至少一个其它环状时钟链路相互连通形成时钟域时,依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路;And an extracting unit, configured to: when the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, sequentially extracting the clock domain Each ring clock link acts as a ring clock link to be set;
确定单元,设置为:在提取的待设置环状时钟链路包括第一时钟注入节点时,确定与所述待设置环状链路连通的且未设置的环状时钟链路是否包括第二时钟注入节点,其中,所述第一时钟注入节点为主时钟注入节点,所述第二时钟注入节点为备时钟注入节点,或者所述第一时钟注入节点为备时钟注入节点,所述第二时钟注入节点为主时钟注入节点;a determining unit, configured to: determine, when the extracted ring clock link to be set includes the first clock injection node, whether the ring clock link that is not connected to the ring link to be set includes a second clock Injecting a node, wherein the first clock injection node is a primary clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock The injection node is injected into the node as a master clock;
获取单元,设置为:在与所述待设置环状时钟链路连通的且未设置的环状时钟链路包括第二时钟注入节点时,获取所述待设置环状时钟链路与相邻 的且未设置的环状时钟链路之间的共用节点;An acquiring unit, configured to: when the ring clock link that is connected to the to-be-set ring clock link and that is not set includes the second clock injection node, acquire the ring clock link to be set and adjacent And a shared node between the ring clock links that are not set;
设置单元,设置为:将所述共用节点虚拟为所述待设置环状时钟链路的第二时钟注入节点,将所述共用节点虚拟为所述待设置环状时钟链路相邻的且未设置的环状时钟链路的第一时钟注入节点,以及将所述待设置环状时钟链路更新为已设置环状时钟链路。a setting unit, configured to: virtualize the shared node as a second clock injection node of the ring clock link to be set, and virtualize the shared node as adjacent to the ring clock link to be set And setting a first clock injection node of the ring clock link, and updating the to-be-set ring clock link to a set ring clock link.
可选地,所述规划模块还设置为:当所述备时钟注入节点包括的实际节点为多个,且在确定时钟链路上的节点的时钟跟踪方向之后,将所述备时钟注入节点包括的任一实际节点与在所述时钟跟踪方向的上一实际节点的连接端口设为高优先级时钟端口,将所述备时钟注入节点包括的任一实际节点与所述备时钟注入节点包括的且在所述时钟跟踪方向的下一实际节点的连接端口设为低优先级时钟端口。Optionally, the planning module is further configured to: when the standby clock injection node includes a plurality of actual nodes, and after determining a clock tracking direction of a node on the clock link, inject the standby clock into the node. The connection port of any actual node and the last actual node in the clock tracking direction is set as a high priority clock port, and the standby clock is injected into any node included in the node and the standby clock injection node includes And the connection port of the next actual node in the clock tracking direction is set to a low priority clock port.
可选地,所述规划模块是设置为:当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点,且确定的所述规划方式为最短路径方式时,同时沿所述时钟注入节点两侧方向依次选中除所述时钟注入节点之外的每一节点;在选中节点时,判断当前选中的节点是否为相同节点;在当前选中的节点为不同节点时,分别将选中的节点与其所在方向的上一节点的连接端口设为高优先级时钟端口,分别将选中的节点与其所在方向的下一节点的连接端口设为低优先级时钟端口,并在当前选中的节点为相邻节点时,停止选中节点;以及在当前选中的节点为相同节点时,基于预设优先级规则将选中的所述相同节点的两侧连接端口分别设置为高优先级时钟端口和低优先级时钟端口,并停止选中节点。Optionally, the planning module is configured to: when the clock link is a ring clock link and the ring clock link includes a single clock injection node, and the determined planning mode is the shortest path mode And simultaneously selecting each node except the clock injection node in the direction of both sides of the clock injection node; when the node is selected, determining whether the currently selected node is the same node; when the currently selected node is a different node Set the connection port of the selected node and the previous node in the direction to the high priority clock port respectively, and set the connection port of the selected node and the next node in the direction to the lower priority clock port, respectively. When the selected node is a neighboring node, the selected node is stopped; and when the currently selected node is the same node, the selected two sides of the same node are respectively set as the high priority clock port according to the preset priority rule. And the low priority clock port and stop the selected node.
可选地,所述预设优先级规则包括:Optionally, the preset priority rule includes:
若两连接端口的端口类型不同,将光连接端口设为高优先级时钟端口,将电连接端口设为低优先级时钟端口;If the port types of the two ports are different, set the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
若两连接端口的端口类型相同,将端口速率较高的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port types of the two ports are the same, set the port with the higher port rate as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口速率相同,将端口号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口; If the port rates of the two ports are the same, set the port with the larger port number as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口号相同,将槽位号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口。If the port numbers of the two ports are the same, set the port with the larger slot number as the high priority clock port and the other port to the lower priority clock port.
可选地,所述规划模块是设置为:当所述时钟链路为包括多个时钟注入节点的环状时钟链路,且确定的所述规划方式为最短路径方式时,获取每个第一跟踪节点距离每个时钟注入节点的跳数,其中,所述第一跟踪节点为所述环状时钟链路中除所述时钟注入节点之外的其它节点;获取每个所述第一跟踪节点对应跳数中的最小跳数对应的时钟注入节点,并将每个所述第一跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;以及将每个所述第一跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第一跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, the planning module is configured to: when the clock link is an annular clock link that includes multiple clock injection nodes, and the determined planning mode is the shortest path mode, obtain each first Tracking the number of hops of the node from each clock injection node, wherein the first tracking node is a node other than the clock injection node in the ring clock link; acquiring each of the first tracking nodes Corresponding to a clock injection node corresponding to the minimum hop count in the hop count, and setting a reverse direction of each of the first tracking node to the acquired clock injection node as a clock tracking direction; and each of the first tracking The connection port of the node and the previous node in the clock tracking direction is set as a high priority clock port, and the connection port of each of the first tracking node and the next node in the clock tracking direction is set to be low. Priority clock port.
可选地,所述规划模块是设置为:当所述时钟链路为链状时钟链路,且确定的规划方式为最短路径方式时,将所述时钟注入节点作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;以及将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Optionally, the planning module is configured to: when the clock link is a chain clock link, and the determined planning mode is the shortest path mode, the clock is injected into the node as the chain clock link. a starting point and injecting the clock into a node to a direction of other nodes in the chain clock link as a link direction of the chain clock link; and placing each second tracking node with the link The connection port of the previous node in the direction is set as a clock port, wherein the second tracking node is a node other than the clock injection node in the chain clock link.
可选地,所述规划模块是设置为:当所述链状时钟链路包括两个时钟注入节点时,获取每个第二跟踪节点在每个所述链路方向上距离每个所述时钟注入节点的跳数;获取每个第二跟踪节点对应跳数中的最小跳数对应的时钟注入节点,将每个第二跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;以及将每个所述第二跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第二跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, the planning module is configured to: when the chain clock link includes two clock injection nodes, acquire each second tracking node in a distance from each of the links in each of the links Injecting the number of hops of the node; acquiring a clock injection node corresponding to the minimum number of hops in each hop count of each second tracking node, and setting the reverse direction of each of the second tracking nodes to the acquired clock injection node as a clock tracking direction And setting a connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and each of the second tracking nodes is in the clock tracking direction The connection port of the next node is set to the low priority clock port.
此外,本发明实施例还提供一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令被执行时实现上述时钟规划方法。In addition, an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
本发明实施例通过将待规划网络拆分为环状时钟链路和链状时钟链路的集合,再采用指定的规划方式对每个环状时钟链路和每个链状时钟链路自动进行时钟规划操作,本发明实施例无需人工规划,减少了发生错误的几率, 降低了时钟规划的操作难度。In the embodiment of the present invention, the network to be planned is split into a set of a ring clock link and a chain clock link, and each ring clock link and each chain clock link are automatically performed by using a specified planning manner. The clock planning operation does not require manual planning in the embodiment of the present invention, thereby reducing the probability of occurrence of errors. Reduce the difficulty of clock planning.
在阅读并理解了附图和详细描述后,可以明白其他方面。Other aspects will be apparent upon reading and understanding the drawings and detailed description.
附图概述BRIEF abstract
图1为本发明第一实施例的时钟规划方法的流程示意图;1 is a schematic flowchart of a clock planning method according to a first embodiment of the present invention;
图2为本发明第二实施例中的时钟链路的拓扑结构示意图;2 is a schematic diagram of a topology structure of a clock link in a second embodiment of the present invention;
图3为本发明第三实施例中的时钟链路的拓扑结构示意图;3 is a schematic diagram of a topology structure of a clock link in a third embodiment of the present invention;
图4为本发明第四实施例中的时钟链路的拓扑结构示意图;4 is a schematic diagram of a topology structure of a clock link in a fourth embodiment of the present invention;
图5为本发明第五实施例中的时钟链路的拓扑结构示意图;FIG. 5 is a schematic diagram of a topology structure of a clock link in a fifth embodiment of the present invention; FIG.
图6为本发明第六实施例中的时钟链路的拓扑结构示意图;6 is a schematic diagram of a topology structure of a clock link in a sixth embodiment of the present invention;
图7为本发明第七实施例中的时钟链路的拓扑结构示意图;7 is a schematic topological structural diagram of a clock link in a seventh embodiment of the present invention;
图8为本发明第八实施例中的时钟链路的拓扑结构示意图;8 is a schematic topological structural diagram of a clock link in an eighth embodiment of the present invention;
图9为本发明第一实施例的时钟规划装置的功能模块结构示意图。FIG. 9 is a schematic structural diagram of a function module of a clock planning apparatus according to a first embodiment of the present invention.
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。The implementation, functional features and advantages of the present application will be further described with reference to the accompanying drawings.
应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。It is understood that the specific embodiments described herein are merely illustrative of the application and are not intended to be limiting.
本发明实施例提供一种时钟规划方法,参照图1,在第一实施例中,所述时钟规划方法包括以下步骤:The embodiment of the present invention provides a clock planning method. Referring to FIG. 1, in the first embodiment, the clock planning method includes the following steps:
步骤S10,在侦测到时钟规划指令时,基于所述时钟规划指令将待规划网络拆分为至少一个时钟链路,并为拆分得到的时钟链路设置时钟注入节点;In step S10, when the clock planning instruction is detected, the network to be planned is split into at least one clock link based on the clock planning instruction, and a clock injection node is set for the split clock link.
本实施例中,可以响应用户操作将一个完整的子网作为待规划网络,或者将一个子网中的部分节点构成的网络拓扑作为待规划网络;在待规划网络确定之后,基于侦测到的时钟规划指令将待规划网络拆分为至少一个时钟链路,其中,拆分得到的时钟链路呈环状或呈链状,时钟链路的拆分方法如下 所示:In this embodiment, a complete subnet may be used as a network to be planned in response to a user operation, or a network topology formed by a part of nodes in a subnet may be used as a network to be planned; after the network to be planned is determined, based on the detected The clock planning instruction splits the network to be planned into at least one clock link, wherein the split clock link is ring-shaped or chain-shaped, and the clock link is split as follows. Shown as follows:
步骤A1,对待规划网络所有节点找出单链,统计出超长单链数;Step A1: Find a single chain of all nodes of the planning network, and count the number of super long single chains;
步骤A2,对待规划网络所有节点进行递归去边处理;Step A2: Perform recursive edge processing on all nodes of the planning network;
步骤A3,依次选中待规划网络中度数为2的节点,以选中的节点为起点通过成环算法计算出某个环,其中,度数是指节点上连接其它节点的链路数量,例如,一个节点与其它两个节点相连,则该节点的度数为2;In step A3, the node with the
步骤A4,识别出在环上的节点、环的速率以及环个数信息;Step A4, identifying the number of nodes, rings, and ring numbers on the ring;
步骤A5,拆除已判断的成环的边;Step A5, removing the judged looped edge;
步骤A6,转入步骤A3,直至统计出待规划网络包括的所有环。In step A6, the process proceeds to step A3 until all the rings included in the network to be planned are counted.
可选地,所述成环算法如下所示:Optionally, the looping algorithm is as follows:
步骤B1,对每个节点,通过连接查找对端节点作为自身的邻居节点(除上行直接邻居外),并将邻居节点信息暂存,对第一个选定节点只存储一个方向邻居;Step B1, for each node, find the opposite node as its own neighbor node (except the uplink direct neighbor) through the connection, and temporarily store the neighbor node information, and store only one direction neighbor for the first selected node;
步骤B2,选取接入层上某个度数为2的节点开始计算;Step B2, selecting a node with a degree of 2 on the access layer to start calculation;
步骤B3,沿着某一个连接方向找到某个邻居,生成该节点的邻居集合(起始节点只沿某一个方向);Step B3: Find a neighbor along a connection direction, and generate a neighbor set of the node (the starting node only follows a certain direction);
步骤B4,按广度优先算法,对每个相同层次的邻居节点,根据连接信息查找其邻居信息,生成除了上行直接邻居外的邻居节点集合;Step B4: According to the breadth-first algorithm, each neighbor node of the same level searches for neighbor information according to the connection information, and generates a neighbor node set other than the uplink direct neighbor;
步骤B5,在每个邻居集合中查找是否有起始节点,若是则转入执行步骤B6,若否,则转入执行步骤B7;Step B5, in each of the neighbor sets to find out whether there is a starting node, and if so, proceeds to step B6, and if not, proceeds to step B7;
步骤B6,判断是否还有邻居信息,如果每个方向均没邻居信息,则结束查找,说明以该节点为起始点,没有成环链路,即为链状链路,如果还有邻居信息,则转入步骤B2;In step B6, it is determined whether there is any neighbor information. If there is no neighbor information in each direction, the search ends, indicating that the node is the starting point, and there is no loop link, that is, a chain link, and if there is neighbor information, Then proceeds to step B2;
步骤B7,如果找到起始节点,则计算经过的路径构成一个环(记录环的速率、环上节点)。In step B7, if the starting node is found, the calculated path constitutes a ring (the rate of the recording ring, the node on the ring).
需要说明的是,一个网络可以按逻辑关系化分为三个层次,分别为核心层、汇聚层以及接入层。相应地,本发明实施例提出了两种时钟规划场景: 全网络场景和增量网络场景,其中,全网络场景指的是从核心层开始规划,再汇聚层规划和接入层规划,且需要在核心层指定外部时钟源,适用于全新开通的网络;增量网络场景指的是指定某个汇聚层(或接入层)的环状时钟链路(或链状时钟链路),以该环状时钟链路中与其它时钟链路的某一个或两个共用节点向该环注入时钟源,这个时钟源是抽以太网时钟,适用于在已开通的网络中部分改变(或新增)时钟源网络。可选地,本实施例采用BITS(Building Integrated Timing Supply System,大楼综合定时供给系统)外时钟作为外部时钟源。It should be noted that a network can be divided into three levels according to logical relationship, which are a core layer, an aggregation layer, and an access layer. Correspondingly, the embodiment of the present invention proposes two clock planning scenarios: A network-wide scenario and an incremental network scenario, where the network-wide scenario refers to planning from the core layer, aggregation layer planning, and access layer planning, and an external clock source needs to be specified at the core layer, which is applicable to a newly opened network; An incremental network scenario refers to a ring-shaped clock link (or a chain clock link) that specifies an aggregation layer (or access layer), with one of the other clock links in the ring-shaped clock link or Two shared nodes inject a clock source into the ring. This clock source is an extracted Ethernet clock and is suitable for partially changing (or adding) a clock source network in an already opened network. Optionally, the external clock of the BITS (Building Integrated Timing Supply System) is used as an external clock source.
本领域技术人员可以理解的是,待规划网络经过拆分后变成了环状时钟链路和链状时钟链路的集合,对待规划网络的时钟规划就变成了针对每个环状时钟链路和链状时钟链路的时钟规划。拆分后的每个时钟链路只需跟踪各自时钟注入节点的时钟信号,其中,所述时钟注入节点可以跟踪外部时钟源(如BITS外时钟),也可以跟踪其它时钟链路的时钟信号(抽以太时钟),还可以跟踪自身内部晶振的时钟信号。每个时钟链路的时钟注入节点相互配合,形成全网的时钟跟踪关系,使得整个待规划网络得以时钟同步。It can be understood by those skilled in the art that the network to be planned becomes a set of a ring clock link and a chain clock link after being split, and the clock plan for the planned network becomes a target for each ring clock. Clock planning for road and chain clock links. Each clock link after splitting only needs to track the clock signal of the respective clock injection node, wherein the clock injection node can track an external clock source (such as a BITS external clock), and can also track the clock signals of other clock links ( The Ether Clock is also used to track the clock signal of its internal crystal oscillator. The clock injection nodes of each clock link cooperate with each other to form a clock tracking relationship of the entire network, so that the entire network to be planned can be clocked.
步骤S20,基于所述时钟规划指令确定所述时钟链路的规划方式,其中,所述规划方式为环方式或最短路径方式;Step S20, determining, according to the clock planning instruction, a planning manner of the clock link, where the planning mode is a ring mode or a shortest path mode;
本实施例提供两种规划方式供用户选择,分别为环方式和最短路径方式,其中,对于要求所有节点都跟踪同一时钟源的场景可以采用环方式,对于要求保证时钟信号传输质量的场景可以采用最短路径方式。In this embodiment, two planning modes are provided for the user to select, which are respectively a ring mode and a shortest path mode, where a scenario in which all nodes are required to track the same clock source may be used in a ring mode, and a scenario in which the quality of the clock signal transmission is required may be adopted. The shortest path method.
步骤S30,根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向。Step S30: Determine a clock tracking direction of each node on the clock link according to the determined planning mode and a clock injection node of the clock link.
本实施例中,在确定时钟链路的规划方式以及每个时钟链路的时钟注入节点之后,自动开始对时钟链路的时钟规划操作,以确定时钟链路上的节点的时钟跟踪方向,进而能够准确地跟踪时钟注入节点的时钟信号,以及在故障发生时,能够进行时钟跟踪关系的倒换。其中,时钟规划操作按照如下约束规则进行:In this embodiment, after determining the planning mode of the clock link and the clock injection node of each clock link, the clock planning operation of the clock link is automatically started to determine the clock tracking direction of the node on the clock link, and then It can accurately track the clock signal of the clock injection node and can switch the clock tracking relationship when the fault occurs. The clock planning operation is performed according to the following constraint rules:
(1)、环方式规划时,BITS外时钟有主备之分,一主一备;最短路径方式规划时,BITS外时钟无主备之分,均为主时钟; (1) In the ring mode planning, the BITS external clock has the primary and backup points, one master and one standby; in the shortest path mode planning, the BITS external clock has no active/standby points and is the primary clock;
(2)、BITS外时钟只能从核心层的环状时钟链路注入时钟信号;(2) The BITS external clock can only inject clock signals from the ring clock link of the core layer;
(3)、时钟信号只能从上层环/链流向下层环/链,下层环/链的时钟信号不能流向上层环/链。(3) The clock signal can only flow from the upper ring/chain to the lower ring/chain, and the clock signal of the lower ring/chain cannot flow to the upper ring/chain.
本实施例提出的时钟规划方法,将待规划网络拆分为环状时钟链路和链状时钟链路的集合,再采用指定的规划方式对每个环状时钟链路和每个链状时钟链路自动进行时钟规划操作,本发明实施例无需人工规划,减少了发生错误的几率,降低了时钟规划的操作难度。The clock planning method in this embodiment splits the network to be planned into a set of a ring clock link and a chain clock link, and then adopts a specified planning mode for each ring clock link and each chain clock. The link automatically performs the clock planning operation. The embodiment of the present invention does not require manual planning, reduces the probability of occurrence of errors, and reduces the operational difficulty of clock planning.
可选地,基于第一实施例,提出第二实施例,在本实施例中,当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点时,上述步骤S30包括:Optionally, based on the first embodiment, a second embodiment is provided. In this embodiment, when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the foregoing Step S30 includes:
在确定的所述规划方式为环方式时,确定所述时钟注入节点的相邻节点中的节点标识较大的节点;Determining, in the ring mode, that the planned mode of the clock injection node is a node with a larger node identifier;
将所述时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;Setting the clock injection node to the determined direction of the node as a clock tracking direction;
将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of any one of the ring clock link except the clock injection node and a previous node in the clock tracking direction as a high priority clock port, and the ring clock chain The connection port of any node other than the clock injection node on the road and the next node in the clock tracking direction is set as a low priority clock port.
本实施例以图2所示的环状时钟链路进行说明,图2所示节点1为时钟注入节点,其中,对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 2. The
步骤1,若节点1的时钟注入为外时钟注入,将节点1与外时钟源的连接端口作为外时钟端口,优先级最高(为1),若节点1的时钟注入为以太时钟注入,则不需要为节点1规划时钟源,因为在上一个环中已经规划完成;
步骤2,获取节点1相邻节点(节点2和节点6)的节点标识,将节点1到节点标识较大的节点的方向设为时钟跟踪方向(以节点1到节点2为例,于此,节点标识的数值越小表示节点标识越大,然而,本申请对此并不限定);Step 2: Obtain the node identifiers of the nodes 1 (
步骤3,沿时钟跟踪方向依次选中除节点1之外的每一节点(依次为节点2、3、4、5、6),将选中的节点与在时钟跟踪方向的上一个节点(依次
为节点1、2、3、4、5)相连的连接端口作为抽以太时钟端口,且优先级最高(为1);将选中的节点与在时钟跟踪方向的下一节点(依次为节点3、4、5、6、1)的连接端口作为抽以太时钟端口,优先级次之(为2)。重复步骤3,直至完成对节点6的时钟规划。Step 3: sequentially select each node except node 1 (in order,
本领域技术人员可以理解的是,通过上述技术方案进行时钟规划,环状时钟链路上除时钟注入节点之外的每个节点通过各自的高优先级时钟端口跟踪在时钟跟踪方向的上一节点的时钟信号,以使得该环状时钟链路上除时钟注入节点之外的每个节点最终与时钟注入节点的时钟同步,而且,时钟注入节点不会向相邻的节点抽取时钟,能够确保时钟倒换时,该环状时钟链路不会形成定时环路。It can be understood by those skilled in the art that clock planning is performed by the above technical solution, and each node except the clock injection node on the ring clock link tracks the previous node in the clock tracking direction through the respective high priority clock port. The clock signal is such that each node on the ring clock link except the clock injection node is finally synchronized with the clock of the clock injection node, and the clock injection node does not extract the clock from the adjacent node, thereby ensuring the clock When switching, the ring clock link does not form a timing loop.
可选地,基于第一实施例,提出第三实施例,在本实施例中,当所述时钟链路为环状时钟链路且所述环状时钟链路包括主时钟注入节点和备时钟注入节点时,上述步骤S30包括:Optionally, based on the first embodiment, a third embodiment is proposed. In this embodiment, when the clock link is a ring clock link and the ring clock link includes a main clock injection node and a standby clock. When the node is injected, the above step S30 includes:
在确定的所述规划方式为环方式时,判断所述主时钟注入节点与所述备时钟注入节点是否相邻,若所述主时钟注入节点与所述备时钟注入节点相邻,则将所述备时钟注入节点至所述主时钟注入节点的方向设为时钟跟踪方向,若所述主时钟注入节点与所述备时钟注入节点不相邻,则确定所述主时钟注入节点的相邻节点中的节点标识较大的节点,并将所述主时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;When the determined planning mode is the ring mode, determining whether the primary clock injection node is adjacent to the standby clock injection node, and if the primary clock injection node is adjacent to the standby clock injection node, Determining, by the clock injection node, the direction of the main clock injection node is a clock tracking direction, and if the main clock injection node is not adjacent to the standby clock injection node, determining a neighboring node of the main clock injection node The node in the middle identifies a larger node, and the direction in which the primary clock is injected into the node to the determined node is set to a clock tracking direction;
将所述环状时钟链路上除所述主时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述备时钟注入节点之外的任一节点与所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of the ring clock link except the main clock injection node to a node of the previous node in the clock tracking direction as a high priority clock port, and the ring clock A connection port of any node other than the standby clock injection node and the next node of the clock tracking direction is set as a low priority clock port.
需要说明的是,本实施例支持用户按需为时钟链路指定主/备时钟注入节点,以使得该时钟链路能够在需要时,进行主备时钟源的倒换,提升时钟同步的稳定性。It should be noted that, in this embodiment, the user is required to specify the primary/secondary clock injection node for the clock link as needed, so that the clock link can perform the switching of the primary and secondary clock sources when needed, thereby improving the stability of the clock synchronization.
本实施例以图3所示的环状时钟链路进行说明,图3所示节点1和节点
5分别为基于用户触发的时钟规划指令指定的主时钟注入节点和备时钟注入节点,其中,对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 3, and
步骤1,识别节点1/节点5的时钟注入是否为外时钟注入,若节点1/节点5的时钟注入为外时钟注入,则将节点1/节点5与外时钟源的连接端口作为外时钟端口,优先级最高(为1),若节点1/节点5的时钟注入不为外时钟注入,则不需要为节点1/节点5规划时钟源,因为在上一个环中已经规划完成;Step 1: Identify whether the clock injection of the
步骤2,判断节点1与节点5是否相邻,若节点1与节点5相邻,则将节点5至节点1的方向设为时钟跟踪方向,若节点1与节点5不相邻,则获取节点1相邻节点(节点2和节点6)的节点标识,将节点1到节点标识较大的节点的方向设为时钟跟踪方向(本例中节点1与节点5不相邻,以节点1到节点2方向为例);In
步骤3,将所述环状时钟链路上除节点1之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口作为抽以太时钟端口,且优先级最高(为1);将所述环状时钟链路上除节点5之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口作为抽以太时钟端口,优先级次之(为2)。Step 3: The connection port of any node except the
本领域技术人员可以理解的是,可将上述步骤确定的时钟跟踪方向作为主时钟跟踪方向,并将所述时钟跟踪方向的反方向作为备时钟跟踪方向,以使得环上每个节点优先通过各自的高优先级时钟端口跟踪时钟信号,并在时钟倒换后,通过各自的低优先级时钟端口跟踪时钟信号。It can be understood by those skilled in the art that the clock tracking direction determined by the above steps can be used as the primary clock tracking direction, and the reverse direction of the clock tracking direction is used as the standby clock tracking direction, so that each node on the ring preferentially passes through the respective The high priority clock port tracks the clock signal and tracks the clock signal through the respective low priority clock ports after clock switching.
可选地,基于第三实施例,提出第四实施例,在本实施例中,上述步骤S10中为拆分得到的时钟链路设置时钟注入节点包括:Optionally, based on the third embodiment, a fourth embodiment is provided. In this embodiment, setting a clock injection node for the split clock link in the foregoing step S10 includes:
当所述时钟链路为环状时钟链路,且所述环状时钟链路与至少一个其它环状时钟链路相互连通形成时钟域时,依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路;When the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, each ring clock chain in the clock domain is sequentially extracted. The road acts as a ring clock link to be set;
在提取的待设置环状时钟链路包括第一时钟注入节点时,确定与所述待设置环状链路连通的且未设置的环状时钟链路是否包括第二时钟注入节点, 其中,所述第一时钟注入节点为主时钟注入节点,所述第二时钟注入节点为备时钟注入节点,或者所述第一时钟注入节点为备时钟注入节点,所述第二时钟注入节点为主时钟注入节点;Determining, when the extracted ring clock link to be set includes the first clock injection node, determining whether the ring clock link that is connected to the ring link to be set and not set includes the second clock injection node, The first clock injection node is a primary clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock injection node is The main clock is injected into the node;
在与所述待设置环状时钟链路连通的且未设置的环状时钟链路包括第二时钟注入节点时,获取所述待设置环状时钟链路与相邻的且未设置的环状时钟链路之间的共用节点;Acquiring the ring clock link to be set and the adjacent and unset ring when the ring clock link that is connected to the ring clock link that is to be set and not set includes the second clock injection node a shared node between clock links;
将所述共用节点虚拟为所述待设置环状时钟链路的第二时钟注入节点,将所述共用节点虚拟为所述待设置环状时钟链路相邻的且未设置的环状时钟链路的第一时钟注入节点,以及将所述待设置环状时钟链路更新为已设置环状时钟链路。The shared node is virtualized as the second clock injection node of the ring clock link to be set, and the shared node is virtualized as the ring clock chain adjacent to the ring clock link to be set and not set. The first clock of the path is injected into the node, and the ring clock link to be set is updated to the set ring clock link.
需要说明的是,本实施例所述的第一时钟注入节点和第二时钟注入节点均为外时钟注入,且响应用户的时钟规划指令分别设置为主时钟注入节点和备时钟注入节点。例如,参照图4,如图4所示的时钟域共由3个环状时钟链路组成,其中,节点2连接第一BITS外时钟源,且被设置为主时钟注入节点,将节点2所在的环状时钟链路简称为主环;节点10连接第二BITS外时钟源,且被设置为备时钟注入节点,将节点10所在的环状时钟链路简称为备环,将主环和备环之间的环称为互连环,即节点14、5、6、7、12以及13构成的环状时钟链路。在其他实施例中,互连环的个数可为多个。以下以图4所示的时钟域进行设置时钟注入节点的说明。It should be noted that the first clock injection node and the second clock injection node described in this embodiment are all external clock injections, and are respectively set as a main clock injection node and a standby clock injection node in response to a user's clock planning instruction. For example, referring to FIG. 4, the clock domain shown in FIG. 4 is composed of three ring clock links, wherein the
在为时钟域中每个环状时钟链路设置时钟注入节点时,按主环至备环的连通顺序依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路,或者按备环至主环的连通顺序依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路,本例首先提取节点1所在的主环作为待设置环状时钟链路,本领域技术人员可以理解的是,基于上述技术方案,此处将节点14和节点5虚拟为一个节点,并作为主环的备时钟注入节点,以及作为互连环(节点14、5、6、7、12以及13)的主时钟注入节点,将主环更新为已设置环状时钟链路。When a clock injection node is set for each ring clock link in the clock domain, each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the primary ring to the backup ring. Alternatively, each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the backup ring to the primary ring. In this example, the primary ring where the
然后,提取互连环作为待设置环状时钟链路,将节点12和节点7虚拟为一个节点,作为互连环的备时钟注入节点,以及作为备环的主时钟注入节点,
将互连环更新为已设置环状时钟链路,此时,整个时钟域内环状时钟链路的时钟注入节点已经设置完成。Then, the interconnecting ring is extracted as a ring clock link to be set, and node 12 and
最后,分别对时钟域内每个环状时钟链路进行时钟规划,具体可参照第三实施例,此处不再赘述。Finally, the clock planning is performed on each ring clock link in the clock domain. For details, refer to the third embodiment, and details are not described herein.
可选地,在本实施例中,当所述备时钟注入节点包括的实际节点为多个时,将所述备时钟注入节点包括的任一实际节点与在所述时钟跟踪方向的上一实际节点的连接端口设为高优先级时钟端口,将所述备时钟注入节点包括的任一实际节点与所述备时钟注入节点包括的且在所述时钟跟踪方向的下一实际节点的连接端口设为低优先级时钟端口。Optionally, in this embodiment, when the standby clock injection node includes a plurality of actual nodes, the standby clock is injected into any actual node included in the node and the previous actual direction in the clock tracking direction. The connection port of the node is set as a high priority clock port, and the standby clock is injected into any actual node included in the node and the connection port of the next actual node included in the standby clock injection node and in the clock tracking direction. Is a low priority clock port.
此外,在对时钟域内每个环状时钟链路进行时钟规划时,若当前规划的环状时钟链路的主时钟注入节点为虚拟节点,将虚拟节点包括的且在上一环状时钟链路中先接收到时钟信号的实际节点作为注入实际节点,并将注入实际节点至虚拟节点中其它节点方向的反方向作为当前规划的环状时钟链路的时钟跟踪方向(主时钟跟踪方向)。In addition, when clocking each ring clock link in the clock domain, if the main clock injection node of the currently planned ring clock link is a virtual node, the virtual node includes the previous ring clock link. The actual node that receives the clock signal firstly is injected into the actual node, and the reverse direction of the direction from the actual node to the other nodes in the virtual node is taken as the clock tracking direction (main clock tracking direction) of the currently planned ring clock link.
可选地,基于第一实施例,提出第五实施例,在本实施例中,当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点时,上述步骤S30包括:Optionally, based on the first embodiment, a fifth embodiment is provided. In this embodiment, when the clock link is a ring clock link and the ring clock link includes a single clock injection node, the foregoing Step S30 includes:
在确定的所述规划方式为最短路径方式时,同时沿所述时钟注入节点两侧方向依次选中除所述时钟注入节点之外的每一节点;When the determined planning mode is the shortest path mode, each node except the clock injection node is sequentially selected along the two sides of the clock injection node;
在选中节点时,判断当前选中的节点是否为相同节点;When the node is selected, it is determined whether the currently selected node is the same node;
在当前选中的节点为不同节点时,分别将选中的节点与其所在方向的上一节点的连接端口设为高优先级时钟端口,分别将选中的节点与其所在方向的下一节点的连接端口设为低优先级时钟端口,并在当前选中的节点为相邻节点时,停止执行选中节点的步骤;When the currently selected node is a different node, the connection port of the selected node and the previous node in the direction is set as a high priority clock port, respectively, and the connection port of the selected node and the next node in the direction is set to a low priority clock port, and when the currently selected node is a neighboring node, the step of stopping the selected node is stopped;
在当前选中的节点为相同节点时,基于预设优先级规则将选中的所述相同节点的两侧连接端口分别设置为高优先级时钟端口和低优先级时钟端口,并停止执行选中节点的步骤。 When the currently selected node is the same node, the two selected ports of the same node are set as the high priority clock port and the low priority clock port respectively, and the steps of stopping the selected node are stopped according to the preset priority rule. .
本实施例以图5所示的环状时钟链路进行说明,图5所示节点1为连接BITS外时钟源的时钟注入节点,其中,对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 5. The
步骤1,将节点1与BITS外时钟源的连接端口设为外时钟端口,优先级最高(为1),此外,若节点1的时钟注入为以太时钟注入,则不需要为节点1规划时钟源,因为在上一个环中已经规划完成;Step 1: Set the connection port of the
步骤2,沿节点1的环两侧方向分别寻找下一节点,将两个节点(节点2和节点6)的跳数记录为N(N=1,2,3…);Step 2: Find the next node along the two sides of the ring of the
步骤3,将两个节点(跳数=N,节点2、6)分别与各自方向的上一个节点(此处为节点1)的连接端口作为抽以太时钟端口,优先级最高(为1);将两个节点(节点2、6)分别与各自方向的下一个节点(此处为节点3、5)的连接端口作为抽以太时钟端口,优先级次之(为2);
步骤4,判断分别找到的下一个节点是否互为彼此(跳数=N)节点,若是,则说明该环状时钟链路已规划完成,若否,则跳转至步骤5;
步骤5,找到的两个(下一个)节点跳数记录为N+1;
步骤6,判断这两个节点(跳数N+1)是否为同一个节点(节点名称/IP相同),若是,则跳转至步骤7,若否,则以这两个节点(跳数=N+1)为基础,跳转至步骤2;
步骤7:进入此步,说明是最后一个同跳数节点(如节点4),分别将该节点的环两侧连接端口作为抽以太时钟端口,其中,预设优先级规则为:Step 7: Enter this step to indicate that it is the last node with the same hop count (such as node 4). The connection ports on both sides of the ring are used as the extracted Ethernet clock ports. The preset priority rules are as follows:
若两连接端口的端口类型不同,将光连接端口设为高优先级时钟端口,将电连接端口设为低优先级时钟端口;If the port types of the two ports are different, set the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
若两连接端口的端口类型相同,将端口速率较高的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port types of the two ports are the same, set the port with the higher port rate as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口速率相同,将端口号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port rates of the two ports are the same, set the port with the larger port number as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口号相同,将槽位号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口。 If the port numbers of the two ports are the same, set the port with the larger slot number as the high priority clock port and the other port to the lower priority clock port.
可选地,基于第一实施例,提出第六实施例,在本实施例中,当所述时钟链路为包括多个时钟注入节点的环状时钟链路时,上述步骤S30包括:Optionally, based on the first embodiment, a sixth embodiment is provided. In this embodiment, when the clock link is an annular clock link that includes multiple clock injection nodes, the foregoing step S30 includes:
在确定的所述规划方式为最短路径方式时,获取每个第一跟踪节点距离每个时钟注入节点的跳数,其中,所述第一跟踪节点为所述环状时钟链路中除所述时钟注入节点之外的其它节点;And obtaining, in the shortest path mode, the hop count of each of the first tracking nodes from each clock injection node, wherein the first tracking node is the ring clock link except The clock is injected into other nodes than the node;
获取每个所述第一跟踪节点对应跳数中的最小跳数对应的时钟注入节点,并将每个所述第一跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;Obtaining a clock injection node corresponding to a minimum number of hops in the corresponding hop count of each of the first tracking nodes, and setting a reverse direction of each of the first tracking nodes to the acquired clock injection node as a clock tracking direction;
将每个所述第一跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第一跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of each of the first tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the first tracking nodes under the clock tracking direction The connection port of a node is set to a low priority clock port.
本实施例以图6所示的环状时钟链路进行说明,图6所示节点2、节点4以及节点8均为时钟注入节点,其中,对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 6. The
需要说明的是,N(TTL,PORT):TTL和PORT分别表示节点N到指定时钟注入节点的跳数以及连接端口。It should be noted that N(TTL, PORT): TTL and PORT respectively represent the hop count of the node N to the specified clock injection node and the connection port.
步骤1,依次选中一个时钟注入节点,识别当前选中的时钟注入节点的时钟注入是否为外时钟注入,若是,则将所述时钟注入节点与外时钟源的连接端口作为外时钟端口,优先级最高(为1),以及将所述时钟注入节点与相邻节点的连接端口设为抽以太时钟端口,优先级次之(为2);若否,则不需要为所述时钟注入节点规划时钟源,因为在上一个环中已经规划完成;Step 1: sequentially select a clock injection node to identify whether the clock injection of the currently selected clock injection node is an external clock injection. If yes, the clock is injected into the connection port of the node and the external clock source as an external clock port, and the priority is the highest. (1), and the connection port of the clock injection node and the adjacent node is set to the Ethernet clock port, the priority is second (2); if not, the clock source of the clock injection node is not required to be planned. Because it has been planned in the previous ring;
向该时钟注入节点两侧分别寻找下一跳节点X和Y;Searching for the next hop nodes X and Y on both sides of the clock injection node;
步骤2,找到X和Y与上一跳节点的连接端口,并分别为X和Y记录X(TTL,PORT),Y(TTL,PORT),其中,TTL=1,2,3…;
步骤3,分别以X和Y为基础,各自寻找下一跳节点X’和Y’;
步骤4,判断下一跳节点X’和Y’是否就是Y、X彼此,若是,则说明以当前选中的时钟注入节点作为注入源的计算完毕,跳转至步骤1,若否,则跳转至步骤5;Step 4: determining whether the next hop node X' and Y' are Y and X, and if so, indicating that the currently selected clock injection node is used as the injection source, and the process jumps to step 1, and if not, the jump To
步骤5,判断下一跳节点X’和Y’是否为同一个节点,若是,则说明追
溯到同一个尾节点,则记录X’(TTL++,PORT),跳转到步骤1,若否,则将X’作为X,以及将Y’作为Y,并跳转至步骤2;
步骤6,当环状时钟链路上的每个时钟注入节点均分析完成后,比较每个时钟注入节点下的相同节点的TTL值,保留最小的,到此为止,每个节点优先级最高的时钟源已确定下来,即获取除所述时钟注入节点之外的每个节点对应跳数中的最小跳数对应的时钟注入节点,将每个节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向(为主时钟跟踪方向);
步骤7,分别基于每个节点确定的时钟跟踪方向,对每个节点进行时钟规划。
此外,本实施例在对环状时钟链路进行规划时,在前述技术方案的基础上,还可以通过如下约束规则进行限制:In addition, when planning the ring clock link in this embodiment, on the basis of the foregoing technical solutions, the following constraint rules may also be used to limit:
(1)注入的如果是外时钟,则外时钟优先级最高(为1);(1) If the external clock is injected, the external clock has the highest priority (1);
(2)普通环(时钟注入为非外时钟注入)最多只能有两个时钟注入节点且不考虑时钟注入节点的时钟源;(2) A normal ring (clock injection is a non-external clock injection) can only have at most two clock injection nodes and does not consider the clock source of the clock injection node;
(3)两个时钟注入节点相隔一个节点时(如图6中的节点2和节点4),所述两个时钟注入节点不能向这个相隔节点抽时钟(避免都坏时成环),例如,在上述步骤7之后,还包括步骤8:(3) When two clock injection nodes are separated by one node (such as
识别环上每个节点的相邻节点是否均为时钟注入节点,若是,则撤销设置的两个时钟注入节点对应其相隔节点的抽以太时钟端口。It is identified whether the adjacent nodes of each node on the ring are clock injection nodes, and if so, the two clock injection nodes that are unset are corresponding to the extracted Ethernet clock ports of the separated nodes.
可选地,对于外时钟注入节点,优先级最高的是外时钟注入(为1),优先级2,3的是两侧抽以太时钟,可选地,外时钟注入节点的两侧抽以太时钟优先级规则如下所示:Optionally, for the external clock injection node, the highest priority is the external clock injection (1), and the
以端口速率最高者优先级为2,另一个为3;The highest port rate is 2, and the other is 3.
如果端口速率一致,以端口号小者优先级为2,另一个为3;If the port rates are the same, the port number is smaller and the other is 3;
如果端口号也一致,以槽位号小者优先级为2,另一个为3。If the port numbers are also the same, the slot number is smaller and the other is 3.
可选地,基于第一实施例,提出第七实施例,在本实施例中,当所述时 钟链路为链状时钟链路时,上述步骤S30包括:Optionally, based on the first embodiment, a seventh embodiment is proposed. In this embodiment, when When the clock link is a chain clock link, the foregoing step S30 includes:
当确定的规划方式为最短路径方式时,将所述时钟注入节点作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;When the determined planning mode is the shortest path mode, the clock is injected into the node as a starting point of the chain clock link, and the clock is injected into the node to the direction of other nodes in the chain clock link. The link direction of the chain clock link;
将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Setting a connection port of each second tracking node and a previous node in the link direction as a clock port, wherein the second tracking node is the clock injection node except the clock injection node Other nodes outside.
本实施例以图7所示的链状时钟链路进行说明,图7所示节点1为其所在链状时钟链路(节点1、2、3)的时钟注入节点,为其所在环状时钟链路(节点1、4、5、6)的时钟注入节点,其中,对节点1所在链状时钟链路的规划如下所示:This embodiment is illustrated by the chain clock link shown in FIG. 7. The
首先,识别所述链状时钟链路上的时钟注入节点,将其作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;First, identifying a clock injection node on the chain clock link as a starting point of the chain clock link and injecting the clock into a node to the direction of other nodes in the chain clock link Link direction of the chain clock link;
然后,将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Then, the connection port of each second tracking node and the previous node in the link direction is set as a clock port, wherein the second tracking node is injected in the chain clock link except the clock Other nodes than nodes.
需要说明的是,由于本实施例所述的链状时钟链路为单向链,即只有一侧有时钟注入,每个第二跟踪节点单向抽取时钟。It should be noted that, since the chain clock link in this embodiment is a unidirectional chain, that is, only one side has clock injection, and each second tracking node unidirectionally extracts a clock.
可选地,若节点间有多段连接(如图7所示节点2和节点3),则选取优先级最高的两个连接端口设置抽以太时钟,其中,优先级规则如下所示:Optionally, if there are multiple connections between the nodes (such as
若端口类型不同,光连接端口优先级高;If the port type is different, the optical port has a higher priority.
若端口类型相同,端口速率高的优先级高;If the port types are the same, the port rate is high and the priority is high.
若端口速率相同,端口号大的优先级高;If the port rate is the same, the port number has a higher priority;
若端口号相同,槽位号大的优先级高。If the port numbers are the same, the slot number has a higher priority.
可选地,基于第七实施例,提出第八实施例,在本实施例中,当所述链 状时钟链路包括两个时钟注入节点时,所述将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口的步骤包括:Optionally, based on the seventh embodiment, an eighth embodiment is proposed, in the embodiment, when the chain When the clock link includes two clock injection nodes, the step of setting each second tracking node and the connection port of the previous node in the link direction as a clock port includes:
获取每个第二跟踪节点在每个所述链路方向上距离每个所述时钟注入节点的跳数;Obtaining, by each second tracking node, a hop count from each of the clock injection nodes in each of the link directions;
获取每个第二跟踪节点对应跳数中的最小跳数对应的时钟注入节点,将每个第二跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;Obtaining a clock injection node corresponding to a minimum number of hops in each hop count of each second tracking node, and setting a reverse direction of each of the second tracking nodes to the acquired clock injection node as a clock tracking direction;
将每个所述第二跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第二跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Setting a connection port of each of the second tracking node and a previous node in the clock tracking direction as a high priority clock port, and placing each of the second tracking nodes under the clock tracking direction The connection port of a node is set to a low priority clock port.
本实施例以图8所示的链状时钟链路(节点3、5、6、7)进行说明,节点3和节点7均为时钟注入节点,其中,对该链状时钟链路的规划如下所示:This embodiment is described by the chain clock link (
步骤1,获取节点5以及节点6距离节点3和节点7的跳数;
步骤2,获取节点5以及节点6对应跳数中的最小跳数对应的时钟注入节点,分别将节点5以及节点6至获取的所述时钟注入节点的反方向设置为时钟跟踪方向(节点5至节点3的跳数最小,节点5的时钟跟踪方向为3→5;节点6至节点7的跳数最小,节点6的时钟跟踪方向为7→6);Step 2: Acquire a clock injection node corresponding to the minimum hop count of the corresponding hop count of the
步骤3,将节点5与在所述时钟跟踪方向的上一节点(节点3)的连接端口作为抽以太时钟端口,优先级最高(为1),将节点5与在所述时钟跟踪方向的下一节点(节点6)的连接端口作为抽以太时钟端口,优先级次之(为2);将节点6与在所述时钟跟踪方向的上一节点(节点7)的连接端口作为抽以太时钟端口,优先级最高(为1),将节点6与在所述时钟跟踪方向的下一节点(节点5)的连接端口作为抽以太时钟端口,优先级次之(为2)。
可选地,在开始规划之前,识别节点3/7的时钟注入是否为外时钟注入,当节点3/7的时钟注入均为外时钟注入时,将节点3/7与各自外时钟源的连接端口设为外时钟端口,优先级最高(为1),若节点3/7的时钟注入均为以太时钟注入,则不需要为节点3/7规划时钟源,因为在节点3/7各自所在环中已经规划完成。
Optionally, before starting the planning, identify whether the clock injection of the
本实施例中,还可将所述两个时钟注入节点与各自在所述链状时钟链路上相邻节点的连接端口设为抽以太时钟端口,优先级次于时钟源,使得链两端的时钟注入节点在当前跟踪的时钟源失效时,能够倒换至各自的低优先级时钟端口进行时钟跟踪。In this embodiment, the connection ports of the two clock injection nodes and the adjacent nodes on the chain clock link may be set as the Ethernet clock port, and the priority is lower than the clock source, so that the two ends of the chain The clock injection node can switch to its respective low priority clock port for clock tracking when the currently tracked clock source fails.
可选地,若节点间有多段链路(如图8所示节点5和节点6),由于当前规划的链状时钟链路是双向链,需要选择一个链路并将该链路位于不同节点的连接端口作为互抽时钟,优先级规则如下所示:Optionally, if there are multiple links between nodes (such as
优选链路速率大的链路,如果速率相等,选择链路两端连接端口的端口号和值大的链路,如果端口号和值相等则随机选择一链路进行规划。For a link with a high link rate, if the rates are equal, select the port number of the port connected to the two ends of the link and the link with a large value. If the port number and the value are equal, select a link to plan.
本发明实施例还提供一种时钟规划装置,参照图9,在第一实施例中,所述时钟规划装置包括:The embodiment of the present invention further provides a clock planning apparatus. Referring to FIG. 9, in the first embodiment, the clock planning apparatus includes:
拆分模块100,设置为:在侦测到时钟规划指令时,基于所述时钟规划指令将待规划网络拆分为至少一个时钟链路,并为拆分得到的时钟链路设置时钟注入节点;The
本实施例中,可以响应用户操作将一个完整的子网作为待规划网络,或者将一个子网中的部分节点构成的网络拓扑作为待规划网络;在待规划网络确定之后,拆分模块100基于侦测到的时钟规划指令将待规划网络拆分为至少一个时钟链路,其中,拆分得到的时钟链路呈环状或呈链状,时钟链路的拆分方法如下所示:In this embodiment, a complete subnet may be used as a network to be planned in response to a user operation, or a network topology formed by a part of nodes in a subnet may be used as a network to be planned; after the network to be planned is determined, the
步骤A1,对待规划网络所有节点找出单链,统计出超长单链数;Step A1: Find a single chain of all nodes of the planning network, and count the number of super long single chains;
步骤A2,对待规划网络所有节点进行递归去边处理;Step A2: Perform recursive edge processing on all nodes of the planning network;
步骤A3,依次选中待规划网络中度数为2的节点,以选中的节点为起点通过成环算法计算出某个环,其中,度数是指节点上连接其它节点的链路数量,例如,一个节点与其它两个节点相连,则该节点的度数为2;In step A3, the node with the
步骤A4,识别出在环上的节点、环的速率以及环个数信息;Step A4, identifying the number of nodes, rings, and ring numbers on the ring;
步骤A5,拆除已判断的成环的边;Step A5, removing the judged looped edge;
步骤A6,转入步骤A3,直至统计出待规划网络包括的所有环。 In step A6, the process proceeds to step A3 until all the rings included in the network to be planned are counted.
可选地,所述成环算法如下所示:Optionally, the looping algorithm is as follows:
步骤B1,对每个节点,通过连接查找对端节点作为自身的邻居节点(除上行直接邻居外),并将邻居节点信息暂存,对第一个选定节点只存储一个方向邻居;Step B1, for each node, find the opposite node as its own neighbor node (except the uplink direct neighbor) through the connection, and temporarily store the neighbor node information, and store only one direction neighbor for the first selected node;
步骤B2,选取接入层上某个度数为2的节点开始计算;Step B2, selecting a node with a degree of 2 on the access layer to start calculation;
步骤B3,沿着某一个连接方向找到某个邻居,生成该节点的邻居集合(起始节点只沿某一个方向);Step B3: Find a neighbor along a connection direction, and generate a neighbor set of the node (the starting node only follows a certain direction);
步骤B4,按广度优先算法,对每个相同层次的邻居节点,根据连接信息查找其邻居信息,生成除了上行直接邻居外的邻居节点集合;Step B4: According to the breadth-first algorithm, each neighbor node of the same level searches for neighbor information according to the connection information, and generates a neighbor node set other than the uplink direct neighbor;
步骤B5,在每个邻居集合中查找是否有起始节点,若是,则转入执行步骤B6,若否,则转入执行步骤B7;Step B5, in each of the neighbor sets to find out whether there is a starting node, and if so, proceeds to step B6, and if not, proceeds to step B7;
步骤B6,判断是否还有邻居信息,如果每个方向均没邻居信息,则结束查找,说明以该节点为起始点,没有成环链路,即为链状链路,如果还有邻居信息,则转入步骤B2;In step B6, it is determined whether there is any neighbor information. If there is no neighbor information in each direction, the search ends, indicating that the node is the starting point, and there is no loop link, that is, a chain link, and if there is neighbor information, Then proceeds to step B2;
步骤B7,如果找到起始节点,则计算经过的路径构成一个环(记录环的速率、环上节点)。In step B7, if the starting node is found, the calculated path constitutes a ring (the rate of the recording ring, the node on the ring).
需要说明的是,一个网络可以按逻辑关系化分为三个层次,分别为核心层、汇聚层以及接入层。相应地,本发明实施例提出了两种时钟规划场景:全网络场景和增量网络场景,其中,全网络场景指的是从核心层开始规划,再汇聚层规划和接入层规划,且需要在核心层指定外部时钟源,适用于全新开通的网络;增量网络场景指的是指定某个汇聚层(或接入层)的环状时钟链路(或链状时钟链路),以该环状时钟链路中与其它时钟链路的某一个或两个共用节点向该环注入时钟源,这个时钟源是抽以太网时钟,适用于在已开通的网络中部分改变(或新增)时钟源网络。可选地,本实施例采用BITS(Building Integrated Timing Supply System,大楼综合定时供给系统)外时钟作为外部时钟源。It should be noted that a network can be divided into three levels according to logical relationship, which are a core layer, an aggregation layer, and an access layer. Correspondingly, the embodiments of the present invention provide two clock planning scenarios: a full network scenario and an incremental network scenario, where the network-wide scenario refers to planning from the core layer, convergence layer planning, and access layer planning, and Specify an external clock source at the core layer for a newly opened network; an incremental network scenario refers to a ring clock link (or chain clock link) that specifies an aggregation layer (or access layer) to One or two shared nodes of the ring clock link and other clock links inject a clock source into the ring. This clock source is an extracted Ethernet clock, which is suitable for partial change (or new) in the opened network. Clock source network. Optionally, the external clock of the BITS (Building Integrated Timing Supply System) is used as an external clock source.
本领域技术人员可以理解的是,待规划网络经过拆分后变成了环状时钟链路和链状时钟链路的集合,对待规划网络的时钟规划就变成了针对每个环 状时钟链路和链状时钟链路的时钟规划。拆分后的每个时钟链路只需跟踪各自时钟注入节点的时钟信号,其中,所述时钟注入节点可以跟踪外部时钟源(如BITS外时钟),也可以跟踪其它时钟链路的时钟信号(抽以太时钟),还可以跟踪自身内部晶振的时钟信号。每个时钟链路的时钟注入节点相互配合,形成全网的时钟跟踪关系,使得整个待规划网络得以时钟同步。It can be understood by those skilled in the art that the network to be planned becomes a set of a ring clock link and a chain clock link after being split, and the clock plan of the network to be planned becomes for each ring. Clock planning for clock links and chain clock links. Each clock link after splitting only needs to track the clock signal of the respective clock injection node, wherein the clock injection node can track an external clock source (such as a BITS external clock), and can also track the clock signals of other clock links ( The Ether Clock is also used to track the clock signal of its internal crystal oscillator. The clock injection nodes of each clock link cooperate with each other to form a clock tracking relationship of the entire network, so that the entire network to be planned can be clocked.
确定模块200,设置为:基于所述时钟规划指令确定所述时钟链路的规划方式,其中,所述规划方式为环方式或最短路径方式;The determining
本实施例提供两种规划方式供用户选择,分别为环方式和最短路径方式,其中,对于要求所有节点都跟踪同一时钟源的场景可以采用环方式,对于要求保证时钟信号传输质量的场景可以采用最短路径方式。In this embodiment, two planning modes are provided for the user to select, which are respectively a ring mode and a shortest path mode, where a scenario in which all nodes are required to track the same clock source may be used in a ring mode, and a scenario in which the quality of the clock signal transmission is required may be adopted. The shortest path method.
规划模块300,设置为:根据确定的规划方式以及所述时钟链路的时钟注入节点,确定所述时钟链路上每个节点的时钟跟踪方向。The
本实施例中,在确定时钟链路的规划方式以及每个时钟链路的时钟注入节点之后,规划模块300自动开始对时钟链路的时钟规划操作,以确定时钟链路上每个节点的时钟跟踪方向,进而能够准确地跟踪时钟注入节点的时钟信号,以及在故障发生时,能够进行时钟跟踪关系的倒换。其中,规划模块300进行时钟规划操作按照如下约束规则进行:In this embodiment, after determining the planning mode of the clock link and the clock injection node of each clock link, the
(1)、环方式规划时,BITS外时钟有主备之分,一主一备;最短路径方式规划时,BITS外时钟无主备之分,均为主时钟;(1) In the ring mode planning, the BITS external clock has the primary and backup points, one master and one standby; in the shortest path mode planning, the BITS external clock has no active/standby points and is the primary clock;
(2)、BITS外时钟只能从核心层的环状时钟链路注入时钟信号;(2) The BITS external clock can only inject clock signals from the ring clock link of the core layer;
(3)、时钟信号只能从上层环/链流向下层环/链,下层环/链的时钟信号不能流向上层环/链。(3) The clock signal can only flow from the upper ring/chain to the lower ring/chain, and the clock signal of the lower ring/chain cannot flow to the upper ring/chain.
本实施例提出的时钟规划装置,将待规划网络拆分为环状时钟链路和链状时钟链路的集合,再采用指定的规划方式对每个环状时钟链路和每个链状时钟链路自动进行时钟规划操作,本发明实施例无需人工规划,减少了发生错误的几率,降低了时钟规划的操作难度。The clock planning apparatus in this embodiment splits the network to be planned into a set of a ring clock link and a chain clock link, and then adopts a specified planning mode for each ring clock link and each chain clock. The link automatically performs the clock planning operation. The embodiment of the present invention does not require manual planning, reduces the probability of occurrence of errors, and reduces the operational difficulty of clock planning.
可选地,基于第一实施例,在第二实施例中,所述规划模块300是设置
为:当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点,且确定的所述规划方式为环方式时,确定所述时钟注入节点的相邻节点中的节点标识较大的节点;将所述时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;以及将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述时钟注入节点之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, based on the first embodiment, in the second embodiment, the
本实施例以图2所示的环状时钟链路进行说明,图2所示节点1为时钟注入节点,其中,规划模块300对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 2. The
步骤1,若节点1的时钟注入为外时钟注入,将节点1与外时钟源的连接端口作为外时钟端口,优先级最高(为1),若节点1的时钟注入为以太时钟注入,则不需要为节点1规划时钟源,因为在上一个环中已经规划完成;
步骤2,获取节点1相邻节点(节点2和节点6)的节点标识,将节点1到节点标识较大的节点的方向设为时钟跟踪方向(以节点1到节点2为例);Step 2: Obtain a node identifier of a
步骤3,沿时钟跟踪方向依次选中除节点1之外的每一节点(依次为节点2、3、4、5、6),将选中的节点与在时钟跟踪方向的上一个节点(依次为节点1、2、3、4、5)相连的连接端口作为抽以太时钟端口,且优先级最高(为1);将选中的节点与在时钟跟踪方向的下一节点(依次为节点3、4、5、6、1)的连接端口作为抽以太时钟端口,优先级次之(为2)。重复步骤3,直至完成对节点6的时钟规划。Step 3: Select each node except the node 1 (
本领域技术人员可以理解的是,通过上述技术方案进行时钟规划,环状时钟链路上除时钟注入节点之外的每个节点通过各自的高优先级时钟端口跟踪在时钟跟踪方向的上一节点的时钟信号,以使得该环状时钟链路上除时钟注入节点之外的每个节点最终与时钟注入节点的时钟同步,而且,时钟注入节点不会向相邻的节点抽取时钟,能够确保时钟倒换时,该环状时钟链路不会形成定时环路。It can be understood by those skilled in the art that clock planning is performed by the above technical solution, and each node except the clock injection node on the ring clock link tracks the previous node in the clock tracking direction through the respective high priority clock port. The clock signal is such that each node on the ring clock link except the clock injection node is finally synchronized with the clock of the clock injection node, and the clock injection node does not extract the clock from the adjacent node, thereby ensuring the clock When switching, the ring clock link does not form a timing loop.
可选地,基于第一实施例,在第三实施例中,所述规划模块300是设置
为:当所述时钟链路为环状时钟链路且所述环状时钟链路包括主时钟注入节点和备时钟注入节点,且确定的所述规划方式为环方式时,判断所述主时钟注入节点与所述备时钟注入节点是否相邻,若所述主时钟注入节点与所述备时钟注入节点相邻,则将所述备时钟注入节点至所述主时钟注入节点的方向设为时钟跟踪方向,若所述主时钟注入节点与所述备时钟注入节点不相邻,则确定所述主时钟注入节点的相邻节点中的节点标识较大的节点,并将所述主时钟注入节点至确定的所述节点的方向设为时钟跟踪方向;以及将所述环状时钟链路上除所述主时钟注入节点之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,将所述环状时钟链路上除所述备时钟注入节点之外的任一节点与所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, based on the first embodiment, in the third embodiment, the
需要说明的是,本实施例支持用户按需为时钟链路指定主/备时钟注入节点,以使得该时钟链路能够在需要时,进行主备时钟源的倒换,提升时钟同步的稳定性。It should be noted that, in this embodiment, the user is required to specify the primary/secondary clock injection node for the clock link as needed, so that the clock link can perform the switching of the primary and secondary clock sources when needed, thereby improving the stability of the clock synchronization.
本实施例以图3所示的环状时钟链路进行说明,图3所示节点1和节点5分别为基于用户触发的时钟规划指令指定的主时钟注入节点和备时钟注入节点,其中,规划模块300对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 3. The
步骤1,识别节点1/节点5的时钟注入是否为外时钟注入,若是,则将节点1/节点5与外时钟源的连接端口作为外时钟端口,优先级最高(为1),若否,则不需要为节点1/节点5规划时钟源,因为在上一个环中已经规划完成;Step 1: Identify whether the clock injection of the
步骤2,判断节点1与节点5是否相邻,若是,则将节点5至节点1的方向设为时钟跟踪方向,若否,则获取节点1相邻节点(节点2和节点6)的节点标识,将节点1到节点标识较大的节点的方向设为时钟跟踪方向(本例中节点1与节点5不相邻,以节点1到节点2方向为例);
步骤3,将所述环状时钟链路上除节点1之外的任一节点与在所述时钟跟踪方向的上一节点的连接端口作为抽以太时钟端口,且优先级最高(为1);将所述环状时钟链路上除节点5之外的任一节点与在所述时钟跟踪方向的下一节点的连接端口作为抽以太时钟端口,优先级次之(为2)。
Step 3: The connection port of any node except the
本领域技术人员可以理解的是,可将上述步骤确定的时钟跟踪方向作为主时钟跟踪方向,并将所述时钟跟踪方向的反方向作为备时钟跟踪方向,以使得环上每个节点优先通过各自的高优先级时钟端口跟踪时钟信号,并在时钟倒换后,通过各自的低优先级时钟端口跟踪时钟信号。It can be understood by those skilled in the art that the clock tracking direction determined by the above steps can be used as the primary clock tracking direction, and the reverse direction of the clock tracking direction is used as the standby clock tracking direction, so that each node on the ring preferentially passes through the respective The high priority clock port tracks the clock signal and tracks the clock signal through the respective low priority clock ports after clock switching.
可选地,基于第三实施例,在第四实施例中,所述拆分模块100包括:Optionally, based on the third embodiment, in the fourth embodiment, the
提取单元,设置为:当所述时钟链路为环状时钟链路,且所述环状时钟链路与至少一个其它环状时钟链路相互连通形成时钟域时,依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路;And an extracting unit, configured to: when the clock link is a ring clock link, and the ring clock link and at least one other ring clock link communicate with each other to form a clock domain, sequentially extracting the clock domain Each ring clock link acts as a ring clock link to be set;
确定单元,设置为:在提取的待设置环状时钟链路包括第一时钟注入节点时,确定与所述待设置环状链路连通的且未设置的环状时钟链路是否包括第二时钟注入节点,其中,所述第一时钟注入节点为主时钟注入节点,所述第二时钟注入节点为备时钟注入节点,或者所述第一时钟注入节点为备时钟注入节点,所述第二时钟注入节点为主时钟注入节点;a determining unit, configured to: determine, when the extracted ring clock link to be set includes the first clock injection node, whether the ring clock link that is not connected to the ring link to be set includes a second clock Injecting a node, wherein the first clock injection node is a primary clock injection node, the second clock injection node is a standby clock injection node, or the first clock injection node is a standby clock injection node, and the second clock The injection node is injected into the node as a master clock;
获取单元,设置为:在与所述待设置环状时钟链路连通的且未设置的环状时钟链路包括第二时钟注入节点时,获取所述待设置环状时钟链路与相邻的且未设置的环状时钟链路之间的共用节点;An acquiring unit, configured to: when the ring clock link that is connected to the to-be-set ring clock link and that is not set includes the second clock injection node, obtain the ring clock link to be set and the adjacent And a shared node between the ring clock links that are not set;
设置单元,设置为:将所述共用节点虚拟为所述待设置环状时钟链路的第二时钟注入节点,将所述共用节点虚拟为所述待设置环状时钟链路相邻的且未设置的环状时钟链路的第一时钟注入节点,以及将所述待设置环状时钟链路更新为已设置环状时钟链路。a setting unit, configured to: virtualize the shared node as a second clock injection node of the ring clock link to be set, and virtualize the shared node as adjacent to the ring clock link to be set And setting a first clock injection node of the ring clock link, and updating the to-be-set ring clock link to a set ring clock link.
需要说明的是,本实施例所述的第一时钟注入节点和第二时钟注入节点均为外时钟注入,且响应用户的时钟规划指令分别设置为主时钟注入节点和备时钟注入节点。例如,参照图4,如图4所示的时钟域共由3个环状时钟链路组成,其中,节点2连接第一BITS外时钟源,且被设置为主时钟注入节点,将节点2所在的环状时钟链路简称为主环;节点10连接第二BITS外时钟源,且被设置为备时钟注入节点,将节点10所在的环状时钟链路简称为备环,将主环和备环之间的环称为互连环,即节点14、5、6、7、12以及13构
成的环状时钟链路。在其他实施例中,互连环的个数可为多个。以下以图4所示的时钟域进行拆分模块100设置时钟注入节点的说明。It should be noted that the first clock injection node and the second clock injection node described in this embodiment are all external clock injections, and are respectively set as a main clock injection node and a standby clock injection node in response to a user's clock planning instruction. For example, referring to FIG. 4, the clock domain shown in FIG. 4 is composed of three ring clock links, wherein the
在为时钟域中每个环状时钟链路设置时钟注入节点时,按主环至备环的连通顺序依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路,或者按备环至主环的连通顺序依次提取所述时钟域中每个环状时钟链路作为待设置环状时钟链路,本例首先提取节点1所在的主环作为待设置环状时钟链路,本领域技术人员可以理解的是,基于上述技术方案,此处将节点14和节点5虚拟为一个节点,并作为主环的备时钟注入节点,以及作为互连环(节点14、5、6、7、12以及13)的主时钟注入节点,将主环更新为已设置环状时钟链路。When a clock injection node is set for each ring clock link in the clock domain, each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the primary ring to the backup ring. Alternatively, each ring clock link in the clock domain is sequentially extracted as a ring clock link to be set according to the connection sequence of the backup ring to the primary ring. In this example, the primary ring where the
然后,提取互连环作为待设置环状时钟链路,将节点12和节点7虚拟为一个节点,作为互连环的备时钟注入节点,以及作为备环的主时钟注入节点,将互连环更新为已设置环状时钟链路,此时,整个时钟域内环状时钟链路的时钟注入节点已经设置完成。Then, the interconnecting ring is extracted as the ring clock link to be set, and the node 12 and the
最后,分别对时钟域内每个环状时钟链路进行时钟规划,具体可参照第三实施例,此处不再赘述。Finally, the clock planning is performed on each ring clock link in the clock domain. For details, refer to the third embodiment, and details are not described herein.
可选地,在本实施例中,所述规划模块300还设置为:当所述备时钟注入节点包括的实际节点为多个,且在设置时钟跟踪方向之后,将所述备时钟注入节点包括的任一实际节点与在所述时钟跟踪方向的上一实际节点的连接端口设为高优先级时钟端口,将所述备时钟注入节点包括的任一实际节点与所述备时钟注入节点包括的且在所述时钟跟踪方向的下一实际节点的连接端口设为低优先级时钟端口。Optionally, in this embodiment, the
此外,在对时钟域内每个环状时钟链路进行时钟规划时,若当前规划的环状时钟链路的主时钟注入节点为虚拟节点,将虚拟节点包括的且在上一环状时钟链路中先接收到时钟信号的实际节点作为注入实际节点,并将注入实际节点至虚拟节点中其它节点方向的反方向作为当前规划的环状时钟链路的时钟跟踪方向(主时钟跟踪方向)。 In addition, when clocking each ring clock link in the clock domain, if the main clock injection node of the currently planned ring clock link is a virtual node, the virtual node includes the previous ring clock link. The actual node that receives the clock signal firstly is injected into the actual node, and the reverse direction of the direction from the actual node to the other nodes in the virtual node is taken as the clock tracking direction (main clock tracking direction) of the currently planned ring clock link.
可选地,基于第一实施例,在第五实施例中,所述规划模块300是设置为:当所述时钟链路为环状时钟链路且所述环状时钟链路包括单个时钟注入节点,且确定的所述规划方式为最短路径方式时,同时沿所述时钟注入节点两侧方向依次选中除所述时钟注入节点之外的每一节点;在选中节点时,判断当前选中的节点是否为相同节点;在当前选中的节点为不同节点时,分别将选中的节点与其所在方向的上一节点的连接端口设为高优先级时钟端口,分别将选中的节点与其所在方向的下一节点的连接端口设为低优先级时钟端口,并在当前选中的节点为相邻节点时,停止选中节点;以及在当前选中的节点为相同节点时,基于预设优先级规则将选中的所述相同节点的两侧连接端口分别设置为高优先级时钟端口和低优先级时钟端口,并停止选中节点。Optionally, based on the first embodiment, in the fifth embodiment, the
本实施例以图5所示的环状时钟链路进行说明,图5所示节点1为连接BITS外时钟源的时钟注入节点,其中,规划模块300对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 5. The
步骤1,将节点1与BITS外时钟源的连接端口设为外时钟端口,优先级最高(为1),此外,若节点1的时钟注入为以太时钟注入,则不需要为节点1规划时钟源,因为在上一个环中已经规划完成;Step 1: Set the connection port of the
步骤2,沿节点1的环两侧方向分别寻找下一节点,将两个节点(节点2和节点6)的跳数记录为N(N=1,2,3…);Step 2: Find the next node along the two sides of the ring of the
步骤3,将两个节点(跳数=N,节点2、6)分别与各自方向的上一个节点(此处为节点1)的连接端口作为抽以太时钟端口,优先级最高(为1);将两个节点(节点2、6)分别与各自方向的下一个节点(此处为节点3、5)的连接端口作为抽以太时钟端口,优先级次之(为2);
步骤4,判断分别找到的下一个节点是否互为彼此(跳数=N)节点,若是,则说明该环状时钟链路已规划完成,若否,则跳转至步骤5;
步骤5,找到的两个(下一个)节点跳数记录为N+1;
步骤6,判断这两个节点(跳数N+1)是否为同一个节点(节点名称/IP相同),若是,则跳转至步骤7,若否,则以这两个节点(跳数=N+1)为基础,跳转至步骤2;
步骤7:进入此步,说明是最后一个同跳数节点(如节点4),分别将该节点的环两侧连接端口作为抽以太时钟端口,其中,预设优先级规则为:Step 7: Enter this step to indicate that it is the last node with the same hop count (such as node 4). The connection ports on both sides of the ring are used as the extracted Ethernet clock ports. The preset priority rules are as follows:
若两连接端口的端口类型不同,将光连接端口设为高优先级时钟端口,将电连接端口设为低优先级时钟端口;If the port types of the two ports are different, set the optical port to a high-priority clock port and the electrical port to a low-priority clock port.
若两连接端口的端口类型相同,将端口速率较高的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port types of the two ports are the same, set the port with the higher port rate as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口速率相同,将端口号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口;If the port rates of the two ports are the same, set the port with the larger port number as the high priority clock port and the other port to the lower priority clock port.
若两连接端口的端口号相同,将槽位号较大的连接端口设为高优先级时钟端口,将另一连接端口设为低优先级时钟端口。If the port numbers of the two ports are the same, set the port with the larger slot number as the high priority clock port and the other port to the lower priority clock port.
可选地,基于第一实施例,在第六实施例中,所述规划模块30是设置为:当所述时钟链路为包括多个时钟注入节点的环状时钟链路,且确定的所述规划方式为最短路径方式时,获取每个第一跟踪节点距离每个时钟注入节点的跳数,其中,所述第一跟踪节点为所述环状时钟链路中除所述时钟注入节点之外的其它节点;获取每个所述第一跟踪节点对应跳数中的最小跳数对应的时钟注入节点,并将每个所述第一跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;以及将每个所述第一跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第一跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, based on the first embodiment, in the sixth embodiment, the
本实施例以图6所示的环状时钟链路进行说明,图6所示节点2、节点4以及节点8均为时钟注入节点,其中,规划模块300对该环状时钟链路的规划如下所示:This embodiment is illustrated by the ring clock link shown in FIG. 6. The
需要说明的是,N(TTL,PORT):TTL和PORT分别表示节点N到指定时钟注入节点的跳数以及连接端口。It should be noted that N(TTL, PORT): TTL and PORT respectively represent the hop count of the node N to the specified clock injection node and the connection port.
步骤1,依次选中一个时钟注入节点,识别当前选中的时钟注入节点的时钟注入是否为外时钟注入,若是,则将所述时钟注入节点与外时钟源的连接端口作为外时钟端口,优先级最高(为1),以及将所述时钟注入节点与 相邻节点的连接端口设为抽以太时钟端口,优先级次之(为2);若否,则不需要为所述时钟注入节点规划时钟源,因为在上一个环中已经规划完成;Step 1: sequentially select a clock injection node to identify whether the clock injection of the currently selected clock injection node is an external clock injection. If yes, the clock is injected into the connection port of the node and the external clock source as an external clock port, and the priority is the highest. (1), and inject the clock into the node with The connection port of the adjacent node is set to the Ethernet clock port, and the priority is second (2); if not, the clock source of the clock injection node is not planned, because it is planned to be completed in the previous ring;
向该时钟注入节点两侧分别寻找下一跳节点X和Y;Searching for the next hop nodes X and Y on both sides of the clock injection node;
步骤2,找到X和Y与上一跳节点的连接端口,并分别为X和Y记录X(TTL,PORT),Y(TTL,PORT),TTL=1,2,3…;
步骤3,分别以X和Y为基础,各自寻找下一跳节点X’和Y’;
步骤4,判断下一跳节点X’和Y’是否就是Y、X彼此,若是,则说明以当前选中的时钟注入节点作为注入源的计算完毕,跳转至步骤1,若否,则跳转至步骤5;Step 4: determining whether the next hop node X' and Y' are Y and X, and if so, indicating that the currently selected clock injection node is used as the injection source, and the process jumps to step 1, and if not, the jump To
步骤5,判断下一跳节点X’和Y’是否为同一个节点,若是,则说明追溯到同一个尾节点,则记录X’(TTL++,PORT),跳转到步骤1,若否,则将X’作为X,以及将Y’作为Y,并跳转至步骤2;Step 5: Determine whether the next hop node X' and Y' are the same node. If yes, the description traces back to the same tail node, and records X' (TTL++, PORT), and jumps to step 1, if not, then Take X' as X, and Y' as Y, and jump to step 2;
步骤6,当环状时钟链路上的每个时钟注入节点均分析完成后,比较每个时钟注入节点下的相同节点的TTL值,保留最小的,到此为止,每个节点优先级最高的时钟源已确定下来,即获取除所述时钟注入节点之外的每个节点对应跳数中的最小跳数对应的时钟注入节点,将每个节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向(为主时钟跟踪方向);
步骤7,分别基于每个节点确定的时钟跟踪方向,对每个节点进行时钟规划。
此外,本实施例在对环状时钟链路进行规划时,在前述技术方案的基础上,还可以通过如下约束规则进行限制:In addition, when planning the ring clock link in this embodiment, on the basis of the foregoing technical solutions, the following constraint rules may also be used to limit:
(1)注入的如果是外时钟,则外时钟优先级最高(为1);(1) If the external clock is injected, the external clock has the highest priority (1);
(2)普通环(时钟注入为非外时钟注入)最多只能有两个时钟注入节点且不考虑时钟注入节点的时钟源;(2) A normal ring (clock injection is a non-external clock injection) can only have at most two clock injection nodes and does not consider the clock source of the clock injection node;
(3)两个时钟注入节点相隔一个节点时(如图6中的节点2和节点4),所述两个时钟注入节点不能向这个相隔节点抽时钟(避免都坏时成环),例如,在上述步骤7之后,还包括步骤8:(3) When two clock injection nodes are separated by one node (such as
识别环上每个节点的相邻节点是否均为时钟注入节点,若是,则撤销设 置的两个时钟注入节点对应其相隔节点的抽以太时钟端口。Identify whether each adjacent node of each node on the ring is a clock injection node, and if so, revoke the setting The two clock injection nodes are located corresponding to the extracted Ethernet clock ports of their separated nodes.
可选地,对于外时钟注入节点,优先级最高的是外时钟注入(为1),优先级2,3的是两侧抽以太时钟,可选地,外时钟注入节点的两侧抽以太时钟优先级规则如下所示:Optionally, for the external clock injection node, the highest priority is the external clock injection (1), and the
以端口速率最高者优先级为2,另一个为3;The highest port rate is 2, and the other is 3.
如果端口速率一致,以端口号小者优先级为2,另一个为3;If the port rates are the same, the port number is smaller and the other is 3;
如果端口号也一致,以槽位号小者优先级为2,另一个为3。If the port numbers are also the same, the slot number is smaller and the other is 3.
可选地,基于第一实施例,在第七实施例中,所述规划模块300是设置为:当所述时钟链路为链状时钟链路,且确定的规划方式为最短路径方式时,将所述时钟注入节点作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;以及将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Optionally, based on the first embodiment, in the seventh embodiment, the
本实施例以图7所示的链状时钟链路进行说明,图7所示节点1为其所在链状时钟链路(节点1、2、3)的时钟注入节点,为其所在环状时钟链路(节点1、4、5、6)的时钟注入节点,其中,规划模块300对节点1所在链状时钟链路的规划如下所示:This embodiment is illustrated by the chain clock link shown in FIG. 7. The
首先,识别所述链状时钟链路上的时钟注入节点,将其作为所述链状时钟链路的起点,并将所述时钟注入节点至所述链状时钟链路中其它节点的方向作为所述链状时钟链路的链路方向;First, identifying a clock injection node on the chain clock link as a starting point of the chain clock link and injecting the clock into a node to the direction of other nodes in the chain clock link Link direction of the chain clock link;
然后,将每个第二跟踪节点与在所述链路方向的上一节点的连接端口设为时钟端口,其中,所述第二跟踪节点为所述链状时钟链路中除所述时钟注入节点之外的其它节点。Then, the connection port of each second tracking node and the previous node in the link direction is set as a clock port, wherein the second tracking node is injected in the chain clock link except the clock Other nodes than nodes.
需要说明的是,由于本实施例所述的链状时钟链路为单向链,即只有一侧有时钟注入,每个第二跟踪节点单向抽取时钟。It should be noted that, since the chain clock link in this embodiment is a unidirectional chain, that is, only one side has clock injection, and each second tracking node unidirectionally extracts a clock.
可选地,若节点间有多段连接(如图7所示节点2和节点3),则选取
优先级最高的两个连接端口设置抽以太时钟,其中,优先级规则如下所示:Optionally, if there are multiple connections between nodes (
若端口类型不同,光连接端口优先级高;If the port type is different, the optical port has a higher priority.
若端口类型相同,端口速率高的优先级高;If the port types are the same, the port rate is high and the priority is high.
若端口速率相同,端口号大的优先级高;If the port rate is the same, the port number has a higher priority;
若端口号相同,槽位号大的优先级高。If the port numbers are the same, the slot number has a higher priority.
可选地,基于第七实施例,在第八实施例中,所述规划模块300是设置为:当所述链状时钟链路包括两个时钟注入节点时,获取每个第二跟踪节点在每个所述链路方向上距离每个所述时钟注入节点的跳数;获取每个第二跟踪节点对应跳数中的最小跳数对应的时钟注入节点,将每个第二跟踪节点至获取的所述时钟注入节点的反方向设置为时钟跟踪方向;以及将每个所述第二跟踪节点与在所述时钟跟踪方向的上一节点的连接端口设为高优先级时钟端口,并将每个所述第二跟踪节点与在所述时钟跟踪方向的下一节点的连接端口设为低优先级时钟端口。Optionally, based on the seventh embodiment, in the eighth embodiment, the
本实施例以图8所示的链状时钟链路(节点3、5、6、7)进行说明,节点3和节点7均为时钟注入节点,其中,规划模块300对该链状时钟链路的规划如下所示:This embodiment is illustrated by the chain clock link (
步骤1,获取节点5以及节点6距离节点3和节点7的跳数;
步骤2,获取节点5以及节点6对应跳数中的最小跳数对应的时钟注入节点,分别将节点5以及节点6至获取的所述时钟注入节点的反方向设置为时钟跟踪方向(节点5至节点3的跳数最小,节点5的时钟跟踪方向为3→5;节点6至节点7的跳数最小,节点6的时钟跟踪方向为7→6);Step 2: Acquire a clock injection node corresponding to the minimum hop count of the corresponding hop count of the
步骤3,将节点5与在所述时钟跟踪方向的上一节点(节点3)的连接端口作为抽以太时钟端口,优先级最高(为1),将节点5与在所述时钟跟踪方向的下一节点(节点6)的连接端口作为抽以太时钟端口,优先级次之(为2);将节点6与在所述时钟跟踪方向的上一节点(节点7)的连接端口作为抽以太时钟端口,优先级最高(为1),将节点6与在所述时钟跟踪方向的下一节点(节点5)的连接端口作为抽以太时钟端口,优先级次之(为2)。
可选地,在开始规划之前,识别节点3/7的时钟注入是否为外时钟注入,当节点3/7的时钟注入均为外时钟注入时,将节点3/7与各自外时钟源的连接端口设为外时钟端口,优先级最高(为1),若节点3/7的时钟注入均为以太时钟注入,则不需要为节点3/7规划时钟源,因为在节点3/7各自所在环中已经规划完成。Optionally, before starting the planning, identify whether the clock injection of the
本实施例中,还可将所述两个时钟注入节点与各自在所述链状时钟链路上相邻节点的连接端口设为抽以太时钟端口,优先级次于时钟源,使得链两端的时钟注入节点在当前跟踪的时钟源失效时,能够倒换至各自的低优先级时钟端口进行时钟跟踪。In this embodiment, the connection ports of the two clock injection nodes and the adjacent nodes on the chain clock link may be set as the Ethernet clock port, and the priority is lower than the clock source, so that the two ends of the chain The clock injection node can switch to its respective low priority clock port for clock tracking when the currently tracked clock source fails.
可选地,若节点间有多段链路(如图8所示节点5和节点6),由于当前规划的链状时钟链路是双向链,需要选择一个链路并将该链路位于不同节点的连接端口作为互抽时钟,优先级规则如下所示:Optionally, if there are multiple links between nodes (such as
优选链路速率大的链路,如果速率相等,选择链路两端连接端口的端口号和值大的链路,如果端口号和值相等则随机选择一链路进行规划。For a link with a high link rate, if the rates are equal, select the port number of the port connected to the two ends of the link and the link with a large value. If the port number and the value are equal, select a link to plan.
此外,本发明实施例还提供一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令被执行时实现上述时钟规划方法。In addition, an embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
本领域普通技术人员可以理解上述方法中的全部或部分步骤可通过程序来指令相关硬件(例如处理器)完成,所述程序可以存储于计算机可读存储介质中,如只读存储器、磁盘或光盘等。可选地,上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现。相应地,上述实施例中的各模块/单元可以采用硬件的形式实现,例如通过集成电路来实现其相应功能,也可以采用软件功能模块的形式实现,例如通过处理器执行存储于存储器中的程序/指令来实现其相应功能。本申请不限制于任何特定形式的硬件和软件的结合One of ordinary skill in the art will appreciate that all or a portion of the above steps may be performed by a program to instruct related hardware, such as a processor, which may be stored in a computer readable storage medium, such as a read only memory, disk or optical disk. Wait. Alternatively, all or part of the steps of the above embodiments may also be implemented using one or more integrated circuits. Correspondingly, each module/unit in the above embodiment may be implemented in the form of hardware, for example, by implementing an integrated circuit to implement its corresponding function, or may be implemented in the form of a software function module, for example, executing a program stored in the memory by a processor. / instruction to achieve its corresponding function. This application is not limited to any particular form of hardware and software combination
以上仅为本申请的优选实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。 The above is only a preferred embodiment of the present application, and is not intended to limit the scope of the patent application, and the equivalent structure or equivalent process transformations made by the specification and the drawings of the present application, or directly or indirectly applied to other related technical fields. The same is included in the scope of patent protection of this application.
本发明实施例提供一种时钟规划方法及装置,无需人工规划,减少了发生错误的几率,降低了时钟规划的操作难度。 The embodiment of the invention provides a clock planning method and device, which does not require manual planning, reduces the probability of occurrence of errors, and reduces the operation difficulty of clock planning.
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| US5696800A (en) * | 1995-03-22 | 1997-12-09 | Intel Corporation | Dual tracking differential manchester decoder and clock recovery circuit |
| CN101286835A (en) * | 2007-04-11 | 2008-10-15 | 华为技术有限公司 | A clock tracking method, device and network element equipment |
| CN101309122A (en) * | 2007-05-17 | 2008-11-19 | 华为技术有限公司 | Clock tracking relationship establishment method and clock tracking relationship calculation device |
| CN102201904A (en) * | 2010-03-23 | 2011-09-28 | 华为技术有限公司 | Method, device and system for determining clock tracking ring formation |
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| US7864747B2 (en) * | 2008-03-28 | 2011-01-04 | Embarq Holdings Company, Llc | System and method for communicating timing to a remote node |
| CN105337681B (en) * | 2015-11-20 | 2018-02-02 | 河海大学 | A kind of PRC access network element systems of selection in clock synchronous planning |
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| US5696800A (en) * | 1995-03-22 | 1997-12-09 | Intel Corporation | Dual tracking differential manchester decoder and clock recovery circuit |
| CN101286835A (en) * | 2007-04-11 | 2008-10-15 | 华为技术有限公司 | A clock tracking method, device and network element equipment |
| CN101309122A (en) * | 2007-05-17 | 2008-11-19 | 华为技术有限公司 | Clock tracking relationship establishment method and clock tracking relationship calculation device |
| CN102201904A (en) * | 2010-03-23 | 2011-09-28 | 华为技术有限公司 | Method, device and system for determining clock tracking ring formation |
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