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WO2015143835A1 - 像素补偿电路、阵列基板及显示装置 - Google Patents

像素补偿电路、阵列基板及显示装置 Download PDF

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Publication number
WO2015143835A1
WO2015143835A1 PCT/CN2014/085320 CN2014085320W WO2015143835A1 WO 2015143835 A1 WO2015143835 A1 WO 2015143835A1 CN 2014085320 W CN2014085320 W CN 2014085320W WO 2015143835 A1 WO2015143835 A1 WO 2015143835A1
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WIPO (PCT)
Prior art keywords
switching element
compensation circuit
pixel compensation
circuit according
storage capacitor
Prior art date
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Ceased
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PCT/CN2014/085320
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English (en)
French (fr)
Inventor
马占洁
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US14/436,208 priority Critical patent/US9564081B2/en
Publication of WO2015143835A1 publication Critical patent/WO2015143835A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present disclosure relates to a pixel compensation circuit, an array substrate, and a display device. Background technique
  • AMOLED Active Matrix Organic Light Emitting Diode
  • the thin film transistor has non-uniformity and stability problems in the production process, which not only drives the OLED current.
  • the unevenness of the hook causes a wide voltage offset, and the TFT stability is degraded after the bias is turned on for a long time.
  • the present disclosure provides a pixel compensation circuit, an array substrate, and a display device, which not only have the function of compensating for the threshold voltage offset, but also have the function of compensating for the influence of the signal voltage attenuation on the current, and also greatly Reduces the effects of signals between frames.
  • a pixel compensation circuit including an organic light emitting diode, a driving transistor, first to fifth switching elements, and a storage capacitor, wherein: an anode of the organic light emitting diode and a second of the first switching element are provided The first end of the first switching element is connected to the output end of the driving transistor and the first end of the fifth switching element; the control end of the driving transistor and the second end and the fifth switch of the third switching element The second end of the component is connected to the first end of the storage capacitor; the second end of the storage capacitor is connected to the second end of the fourth switching element and the second end of the second switching element.
  • the pixel compensation circuit may further include: a first driving voltage line, and the driving The input ends of the transistors are connected; the second driving voltage line is connected to the cathode of the organic light emitting diode.
  • the pixel compensation circuit may further include a data write voltage line connected to the first end of the second switching element.
  • the pixel compensation circuit further includes an initialization voltage line connected to the first end of the third switching element and the first end of the fourth switching element.
  • the pixel compensation circuit may further include a write switch signal line connected to the control terminal of the second switching element and the control terminal of the fifth switching element.
  • the pixel compensation circuit described above may further include a reset switch signal line connected to the control terminal of the third switching element.
  • the pixel compensation circuit may further include a driving switch signal line connected to the control terminal of the first switching element and the control terminal of the fourth switching element.
  • the driving transistor, the first to fifth switching elements may all be thin film transistors.
  • an array substrate including any one of the above pixel compensation circuits is provided.
  • a display device comprising any of the above array substrates.
  • the current that ultimately drives the OLED illumination can be made independent of the threshold voltage Vth and the bias voltage V DD .
  • the pixel compensation circuit of the present disclosure not only compensates for the 0LED current deviation caused by the threshold voltage offset, but also has the function of compensating for the influence of the signal voltage attenuation on the current.
  • such a circuit structure also has a reset function of driving the gate potential of the transistor between frames, ensuring that the influence of the upper frame signal on the lower frame signal is minimized, and the influence of the signal between the frame and the frame is greatly reduced.
  • FIG. 1 is a circuit configuration diagram of a pixel compensation circuit in an embodiment of the present disclosure
  • FIG. 2 is a timing chart showing the operation of the pixel compensation circuit in one embodiment of the present disclosure. detailed description
  • Embodiments of the present invention provide a pixel compensation circuit. As shown in Fig. 1, the circuit includes: an organic light emitting diode D1, a driving transistor M1, first to fifth switching elements M2 to M6, and a storage capacitor Cl.
  • the anode of the organic light emitting diode D1 is connected to the second end of the first switching element M2.
  • the first end of the first switching element M2 is connected to the second end (output) of the driving transistor M1 and the first end of the fifth switching element M6.
  • the control terminal of the driving transistor M1 is connected to the second terminal of the third switching element M4, the second terminal of the fifth switching element M6, and the first end of the storage capacitor C1 (point B in FIG. 1);
  • the second end of the storage capacitor C1 is connected to the second end of the fourth switching element M5 and the second end of the second switching element M3 (point A in Fig. 1).
  • the switching element refers to an element that controls whether the first end and the second end are in communication by the control terminal signal, and of course it can be realized by a plurality of specific electrical components.
  • the circuit has the basic configuration and the connection relationship as described above, wherein the driving transistor M1, the first switching element M2 (which can be regarded as a wire when turned on), and the organic light emitting diode D1 constitute a basic OLED driving relationship, and The first to fifth switching elements are each controlled by their respective control terminal signals to be in an on/off state.
  • the circuit also includes:
  • the circuit further includes:
  • a reset switch signal line on which a reset switch signal voltage VRef is loaded, connected to a control end of the third switching element M4;
  • the driving switch signal line is loaded with a driving switch signal voltage VEmi s ion connected to the control end of the first switching element M2 and the control end of the fourth switching element M5.
  • the potential zeros of all bias voltages are connected to the same common terminal, and the potential zeros of all signal voltages are also connected to the same common terminal.
  • the driving transistor, the first to fifth switching elements are all thin film transistors TFT.
  • the first end (input terminal) of the driving transistor, the first ends of the first to fifth switching elements all represent a source
  • the second end (output end) of the driving transistor, the first to The second ends of the fifth switching elements each represent a drain
  • the control terminals of the driving transistors and the control terminals of the first to fifth switching elements each represent a gate.
  • the TFT used in the present embodiment is a P-channel thin film transistor.
  • the pixel compensation circuit of this embodiment includes six TFTs and one capacitor, it can also be called a novel 6T1C pixel compensation circuit according to a naming manner commonly used in the art.
  • Figure 2 shows the operation timing diagram of the circuit.
  • Ga te, Ref, and Emis s ion represent a write switch signal, a reset switch signal, and a drive switch signal, respectively.
  • the operation of this circuit is divided into three phases: reset phase (a-b), data write and threshold voltage latch phase (b-c), and illuminating phase (c-).
  • Ref and Ga te are low. Since Ga te is low, transistors M3 and M6 are turned on. The turn-on of M3 causes the potential of point A of the storage capacitor C1 to become VDa ta; and the turn-on of M6 connects the gate of the driving transistor M1 to the drain, so that M1 forms a diode connection and is in a conducting state. At this time, since Ref is also at a low level, transistor M4 is turned on, and a loop formed by transistors M1, M6, and M4 is formed.
  • the point B of the storage capacitor C1 connected to the loop is controlled by the circuits of M4 and M1, M6. Since the M4 is directly connected to the power signal, the point B signal is controlled by M4. Not controlled by the loops of Ml and M6. Therefore, at this time, the potential at point B is the Vinitial potential, and in the reset phase of each frame, point B is reset to the Vinitial potential.
  • the potential of point A on the other end of the storage capacitor is controlled by M3, and VData is directly loaded at this time. Therefore, in the reset phase, the storage capacitors A and B will be stable at VData and Vinitial respectively.
  • Ref is at a high level, which causes M4 to turn off, and Node B is only controlled by the loops of M1 and M6.
  • Ml is still in the diode connection mode, so the potential at point B is written as the sum of V DD and the threshold voltage Vth, and the potential at point A is directly loaded by V3.
  • the potentials across storage capacitors A and B are VData and V DD +Vth, respectively.
  • K ⁇ K(Vinitial- VData) 2 where K is relatively stable in the same structure and can be considered as a constant here.
  • the current flowing through the organic light emitting diode connected to the drain of the driving transistor M1 is only related to the Vinitial and VData signals, and is independent of Vth and V DD . Since Vinitial does not form a current loop, there is no influence of Vinitial IRDrop (voltage drop, which means voltage attenuation on the signal line as described in the background art). Therefore, the Vth unevenness caused by the manufacturing process of the backplane does not cause the problem that the current flowing through the OLED is not uniform, and thus the problem of uneven illumination is not caused.
  • the potential of the storage capacitor A is always a Vinitial signal when it emits light, and no charge loss occurs, which ensures the potential stability of the node B, so that the current of the M1 is stable, and the organic light emitting diode is stable in illumination.
  • embodiments of the present disclosure also provide an array substrate including any of the above pixel compensation circuits. Since the array substrate provided by the embodiment of the present invention has the same technical features as any of the pixel compensation circuits described above, the same technical problem can be solved, and the same technical effect is produced.
  • embodiments of the present disclosure also provide a display device including any of the above array substrates.
  • the display device can be: electronic paper, 0 LED panel, mobile phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, etc., any product or component having display function.
  • the display device provided by the embodiment of the present disclosure has the same technical features as any of the above array substrates, the same technical problem can be solved, and the same technical effect is produced.
  • the pixel compensation circuit, the array substrate and the display device proposed by the present invention can not only compensate for the 0 LED current deviation caused by the threshold voltage shift, but also have the function of compensating for the influence of the signal voltage attenuation on the current.
  • such a circuit structure also has a reset function for driving the gate potential of the TFT between frames, ensuring that the influence of the upper frame signal on the lower frame signal is minimized, and the influence of the signal between the frame and the frame is greatly reduced.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素补偿电路、阵列基板及显示装置。该像素补偿电路包括：有机发光二极管（D1）、驱动晶体管（M1）、第一至第五开关元件（M2-M6）和存储电容（C1），其中：有机发光二极管（D1）的阳极与第一开关元件（M2）的第二端相连；第一开关元件（M2）的第一端与驱动晶体管（M1）的输出端、第五开关元件（M6）的第一端相连；驱动晶体管（M1）的控制端与第三开关元件（M4）的第二端、第五开关元件（M6）的第二端、以及存储电容（C1）的第一端相连；存储电容（C1）的第二端与第四开关元件（M5）的第二端、第二开关元件（M3）的第二端相连。该像素补偿电路不仅具有补偿阈值电压偏移的功能，还具有补偿信号电压衰减对电流影响的功能，同时还极大地降低了帧与帧之间信号的影响。

Description

像素补偿电路、 阵列基 显示装置 技术领域
本公开涉及一种像素补偿电路、 阵列基板及显示装置。 背景技术
有源矩阵有机发光二极管 ( Act ive Ma t r ix / Organic Light Emi t t ing Diode , AMOLED )显示是一种应用于电视和移动设备中的显示技术， 以其低功 耗， 低成本， 大尺寸的特点在对功耗敏感的便携式电子设备中有着广阔的应 用前景。
目前在 AMOLED显示领域中， 尤其是大尺寸基板设计中， 背板薄膜晶体管 ( Thin Fi lm Trans i s tor , TFT )在生产工艺过程中存在着非均匀性以及稳定 性问题， 不仅会使得驱动 0LED电流的不均勾、 导致阔值电压偏移， 还会在长 时间开启偏压后出现 TFT稳定性下降的问题。
现有技术中，存在有很多只考虑阈值电压偏移这一问题而进行 AMOLED补 偿电路设计， 却忽视了随着 AMOLED尺寸大型化的趋势， 信号线的负载也会越 来越大， 致使信号线上会出现电压的衰减， 从而影响显示区电流的均匀性的 这一问题。 发明内容
针对现有技术的不足， 本公开提供一种像素补偿电路、 阵列基板及显示 装置， 其不仅具有补偿阔值电压偏移的功能， 还具有补偿信号电压衰减对电 流影响的功能， 同时还极大地降低了帧与帧之间信号的影响。
按照本公开的一个方面， 提供一种像素补偿电路， 包括有机发光二极管、 驱动晶体管、 第一至第五开关元件和存储电容， 其中： 所述有机发光二极管 的阳极与第一开关元件的第二端相连； 所述第一开关元件的第一端与驱动晶 体管的输出端、 第五开关元件的第一端相连； 所述驱动晶体管的控制端与第 三开关元件的第二端、 第五开关元件的第二端、 以及存储电容的第一端相连； 所述存储电容的第二端与第四开关元件的第二端、 第二开关元件的第二端相 连。
可替换地， 上述像素补偿电路还可包括： 第一驱动电压线， 与所述驱动 晶体管的输入端相连； 第二驱动电压线， 与所述有机发光二极管的阴极相连。 可替换地， 上述像素补偿电路还可包括数据写入电压线， 与所述第二开 关元件的第一端相连。
可替换地， 上述像素补偿电路还包括初始化电压线， 与第三开关元件的 第一端、 第四开关元件的第一端相连。
可替换地， 上述像素补偿电路还可包括写入开关信号线， 与第二开关元 件的控制端、 第五开关元件的控制端相连。
可替换地， 上述像素补偿电路还可包括复位开关信号线， 与所述第三开 关元件的控制端相连。
可替换地， 上述像素补偿电路还可包括驱动开关信号线， 与第一开关元 件的控制端、 第四开关元件的控制端相连。
示例性地， 所述驱动晶体管、 第一至第五开关元件可均为薄膜晶体管。 按照本公开的另一方面， 提供一种阵列基板， 包括上述任意一种像素补 偿电路。
按照本公开的另一方面， 提供一种显示装置，， 包括上述任意一种阵列基 板。
通过本公开的像素补偿电路结构，能够使得最终驱动 0LED发光的电流与 阔值电压 Vth和偏置电压 VDD无关。本公开的像素补偿电路不但能补偿阔值电 压偏移所造成的 0LED 电流偏差， 还具有补偿信号电压衰减对电流影响的功 h
fj匕。
同时， 这样的电路结构还具有驱动晶体管栅极电位在帧与帧之间的复位 功能， 保证上帧信号对下帧信号的影响最小化， 极大降低了帧与帧之间信号 的影响。
当然， 实施本公开的任一产品或方法并不一定需要同时达到以上所述的 所有优点。 附图说明 图 1是本公开一个实施例中像素补偿电路的电路结构图；
图 2是本公开一个实施例中像素补偿电路的工作时序图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例中的附图， 对本发明实施例中的技术方案进行清楚、 完整地描述， 显然， 所描述的实施例是本发明一部分实施例， 而不是全部的实施例。 基于 本发明中的实施例， 本领域普通技术人员在没有作出创造性劳动前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
实施例 1
本发明实施例提出了一种像素补偿电路。 如图 1所示， 该电路包括： 有 机发光二极管 Dl、 驱动晶体管 Ml、 第一至第五开关元件 M2至 M6， 和存储电 容 Cl。
在图 1所示电路中， 有机发光二极管 D1的阳极与第一开关元件 M2的第 二端相连。 第一开关元件 M2的第一端与驱动晶体管 Ml的第二端 （输出端）、 第五开关元件 M6的第一端相连。
驱动晶体管 Ml的控制端与第三开关元件 M4的第二端、 第五开关元件 M6 的第二端、 以及存储电容 C1的第一端相连（于图 1中的点 B );
存储电容 C1的第二端与第四开关元件 M5的第二端、第二开关元件 M3的 第二端相连（于图 1中的点 A )。
这里，开关元件指由控制端信号控制其第一端与第二端是否连通的元件， 当然其可以由多种具体电器元件实现。
可见， 该电路具有如上所述的基本构成和连接关系， 其中的驱动晶体管 Ml、 第一开关元件 M2 (在导通时可视作导线）、 有机发光二极管 D1构成基本 的 0LED驱动关系，而第一至第五开关元件可分别由其各自的控制端信号控制 开关处于开启 /关闭状态。
进一步地， 为实现该电路的功能， 需要在该电路中施加必要的偏压。 为 此， 该电路还包括：
第一驱动电压线， 上面施加有正向工作偏压 VDD， 与驱动晶体管 Ml的第 一端 （输入端）相连； 第二驱动电压线， 上面施加有负向工作偏压 V4， 与有 机发光二极管 D1的阴极相连；
数据写入电压线，上面施加有设定该电路中 0LED如何发光的数据写入电 压 VDa ta , 与所述第二开关元件 M3的第一端相连；
初始化电压线， 上面施加有恒定的初始化电压 Vini t ia l , 与第三开关元 件 M4的第一端、 第四开关元件 M5的第一端相连。
而且，这里釆用三条信号线分别对每个开关元件的开启或关闭进行控制。 即， 该电路还包括：
写入开关信号线， 上面加载有写入开关信号电压 VGa te， 与第二开关元 件 M3的控制端、 第五开关元件 M6的控制端相连；
复位开关信号线， 上面加载有复位开关信号电压 VRef， 与所述第三开关 元件 M4的控制端相连；
驱动开关信号线， 上面加载有驱动开关信号电压 VEmi s s ion, 与第一开 关元件 M2的控制端、 第四开关元件 M5的控制端相连。
当然， 所有偏置电压的电位零点都连于同一个公共端上， 所有信号电压 的电位零点也都连于同一个公共端上。
可替换地， 所述驱动晶体管、 第一至第五开关元件均为薄膜晶体管 TFT。 对应于该特征， 所述驱动晶体管的第一端（输入端）、 第一至第五开关元 件的第一端均代表源极， 所述驱动晶体管的第二端（输出端）、 第一至第五开 关元件的第二端均代表漏极， 所述驱动晶体管的控制端、 第一至第五开关元 件的控制端均代表栅极。 并且， 本实施例中釆用的 TFT为 P型沟道的薄膜晶 体管。
由于本实施例的像素补偿电路包含了 6个 TFT和 1个电容， 所以也可以 按本领域常用的命名方式而称为新型 6T1C像素补偿电路。
基于上述条件下的电路连接， 可将该电路的工作原理描述如下： 图 2示出该电路的工作时序图。 如图 2所示， Ga te、 Ref、 Emi s s ion分 别代表写入开关信号、 复位开关信号和驱动开关信号。 总体来说， 该电路的 工作分为三个阶段： 复位阶段（a-b)、 数据写入和阔值电压锁存阶段（b-c )、 和发光阶段（c -)。
在复位阶段（a-b)， Ref 和 Ga te为低电平。 因为 Ga te为低电平， 晶体管 M3 , M6开启。 M3的开启使存储电容 C1的 A点电位变成 VDa ta; 而 M6的开启 将驱动晶体管 Ml的栅极与漏极相连，使 Ml形成二极管连接并处于导通状态。 此时由于 Ref 也处于低电平， 晶体管 M4开启， 此时会形成一个由晶体管 Ml， M6和 M4形成的回路。
从而在复位阶段中， 与此回路相连接的存储电容 C1的 B点受 M4和 Ml、 M6的电路控制， 由于 M4直接与电源信号相连接， 使得 B点信号受 M4控制， 而非 Ml和 M6的回路所控制。 因此， 此时 B点电位是 Vinitial电位， 在每帧 的复位阶段中， 都会将 B点复位成 Vinitial电位。 存储电容另外一端的 A点 电位受 M3控制， 此时直接加载 VData。 所以， 在复位阶段中， 存储电容 A， B 端电位会分别稳、定在 VData和 Vinitial。
在数据写入和阔值电压锁存阶段（b-c)中， Ref 处于高电平， 这使得 M4 关闭， 节点 B只受 Ml和 M6的回路控制。 此时 Ml还是处于二极管连接方式， 因此 B点电位写入的是 VDD与阔值电压 Vth之和， 而 A点电位还是由 M3直接 加载 VData。该阶段结束时，存储电容 A， B两端电位分别是 VData和 VDD+Vth。
在发光阶段中， Gate为高电平， 晶体管 M3和 M6关闭。 Emission信号为 低电平， 使晶体管 M5和 M2开启。 M5的开启使存储电容 C1一端 A点电位变 成 Vinitial 。 ^=艮据电容电荷守恒原理， 节点 B 的 电位变成 Vinitial+VDD+Vth-VData, 也就是说使得驱动晶体管 Ml 的栅极信号变成 Vinitial +VDD+V t h-VDa t a， 由于 Ml处于饱和区工作， 根据晶体管饱和区电流 公式可知
IDs= K(VGS-Vth)2 = ^K(Vinitial+ VDD + Vth- VData- VDD - Vth)2
= ^K(Vinitial- VData)2 其中， 相同结构中的 K相对稳定， 在这里可以视为常量。
因此在 0LED发光的过程中， 流经与驱动晶体管 Ml漏极相连接的有机发 光二极管的电流就只与 Vinitial和 VData信号相关， 而与 Vth和 VDD无关。 而 Vinitial由于不会形成一个电流回路， 因此不存在 Vinitial IRDrop (电 压下降， 意即背景技术中所说的信号线上的电压衰减） 的影响。 从而不会因 为背板制造工艺原因所造成的 V t h不均匀而产生流经 0LED的电流大小不均匀 的问题， 从而也不会造成发光不均勾的问题。 同时， 存储电容 A点电位在发 光时一直为 Vinitial信号，不会产生电荷流失，保证了节点 B的电位稳定性， 使得 Ml的电流稳定， 从而有机发光二极管发光稳定。
当然， 以上实施例仅用以说明本公开的原理， 而非对其限制。 尽管参照 前述实施例对本发明进行了详细的说明， 本领域的普通技术人员应当理解： 无论其在具体实施过程中釆用什么样的电压偏置、什么样的信号线控制连接、 或是何种具体的开关、 电容、 晶体管元件， 均可以参照本公开实施例所说明 的工作原理进行实施， 而不脱离本公开各实施例技术方案的精神和范围。
实施例 2
基于相同的发明构思， 本公开实施例还提出了一种阵列基板， 其包括上 述任意一种像素补偿电路。 由于本发明实施例提供的阵列基板与上述任意一 种像素补偿电路具有相同的技术特征， 所以也能解决同样的技术问题， 产生 相同的技术效果。
实施例 3
基于相同的发明构思， 本公开实施例还提出了一种显示装置， 该显示装 置包括上述任意一种阵列基板。 该显示装置可以为： 电子纸、 0LED面板、 手 机、 平板电脑、 电视机、 显示器、 笔记本电脑、 数码相框、 导航仪等任何具 有显示功能的产品或部件。
由于本公开实施例提供的显示装置与上述任意一种阵列基板具有相同的 技术特征， 所以也能解决同样的技术问题， 产生相同的技术效果。
综上所述， 本发明所提出的像素补偿电路、 阵列基板及显示装置不但能 补偿阈值电压偏移所造成的 0LED电流偏差，还具有补偿信号电压衰减对电流 影响的功能。
同时， 这样的电路结构还具有驱动 TFT栅极电位在帧与帧之间的复位功 能， 保证上帧信号对下帧信号的影响最小化， 极大降低了帧与帧之间信号的 影响。
以上实施例仅用以说明本公开的技术方案， 而非对其限制。 尽管参照前 述实施例对本公开实施例进行了详细的说明， 本领域的普通技术人员应当理 解： 可以对前述各实施例所记载的技术方案进行修改， 或者对其中部分技术 特征进行等同替换； 而这些修改或者替换均不脱离由所附权利要求限定的本 发明的精神和范围。
本申请要求于 2014年 3月 24日递交的中国专利申请第 2014101 11760.X 号的优先权，在此全文引用该中国专利申请公开的内容作为本申请的一部分。

Claims

权 利 要 求 书
1、 一种像素补偿电路， 包括有机发光二极管、 驱动晶体管、 第一至第五 开关元件和存储电容， 其中：
所述有机发光二极管的阳极与第一开关元件的第二端相连；
所述第一开关元件的第一端与驱动晶体管的输出端、第五开关元件的第一 端相连；
所述驱动晶体管的控制端与第三开关元件的第二端、第五开关元件的第二 端、 以及存储电容的第一端相连；
所述存储电容的第二端与第四开关元件的第二端、第二开关元件的第二端 相连。
2、 根据权利要求 1所述的像素补偿电路， 其中还包括：
第一驱动电压线， 与所述驱动晶体管的输入端相连；
第二驱动电压线， 与所述有机发光二极管的阴极相连。
3、 根据权利要求 1所述的像素补偿电路， 其中还包括数据写入电压线， 与所述第二开关元件的第一端相连。
4、 根据权利要求 1所述的像素补偿电路， 其中还包括初始化电压线， 与 第三开关元件的第一端、 第四开关元件的第一端相连。
5、 根据权利要求 1所述的像素补偿电路， 其中还包括写入开关信号线， 与第二开关元件的控制端、 第五开关元件的控制端相连。
6、 根据权利要求 1所述的像素补偿电路， 其中还包括复位开关信号线， 与所述第三开关元件的控制端相连。
7、 根据权利要求 1所述的像素补偿电路， 其中还包括驱动开关信号线， 与第一开关元件的控制端、 第四开关元件的控制端相连。
8、 根据权利要求 1至 7中任意一项所述的像素补偿电路， 其中， 所述驱 动晶体管、 第一至第五开关元件均为薄膜晶体管。
9、 一种阵列基板， 包括如权利要求 1至 8中任意一项所述的像素补偿电 路。
10、 一种显示装置， 包括如权利要求 9所述的阵列基板。
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Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103886838B (zh) * 2014-03-24 2016-04-06 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN104167170B (zh) 2014-07-10 2016-08-31 京东方科技集团股份有限公司 像素电路及其驱动方法和显示装置
CN104318894B (zh) * 2014-09-30 2017-02-15 京东方科技集团股份有限公司 一种像素电路的驱动方法
CN104318899B (zh) * 2014-11-17 2017-01-25 京东方科技集团股份有限公司 像素单元驱动电路和方法、像素单元和显示装置
CN104537983B (zh) * 2014-12-30 2017-03-15 合肥鑫晟光电科技有限公司 像素电路及其驱动方法、显示装置
CN104658484B (zh) * 2015-03-18 2018-01-16 上海和辉光电有限公司 显示装置、像素驱动电路及其驱动方法
CN104680980B (zh) * 2015-03-25 2017-02-15 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置
CN104992674A (zh) * 2015-07-24 2015-10-21 上海和辉光电有限公司 一种像素补偿电路
CN107705748B (zh) 2015-10-30 2023-10-27 京东方科技集团股份有限公司 显示基板及其驱动方法以及显示装置
CN107093404A (zh) * 2016-02-17 2017-08-25 上海和辉光电有限公司 像素补偿电路和显示装置
CN106504703B (zh) * 2016-10-18 2019-05-31 深圳市华星光电技术有限公司 Amoled像素驱动电路及驱动方法
CN106935198B (zh) * 2017-04-17 2019-04-26 京东方科技集团股份有限公司 一种像素驱动电路、其驱动方法及有机发光显示面板
CN106940979B (zh) 2017-05-23 2019-01-25 京东方科技集团股份有限公司 像素补偿电路及其驱动方法、显示装置
US10347185B2 (en) 2017-08-24 2019-07-09 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Organic light-emitting diode (OLED) pixel circuits, driving method thereof, and OLED displays
CN107424565B (zh) * 2017-08-24 2019-11-26 武汉华星光电半导体显示技术有限公司 一种oled像素电路及其驱动方法、oled显示器
CN109920374B (zh) 2017-12-13 2020-12-22 京东方科技集团股份有限公司 像素驱动电路及其控制方法、显示面板及电子设备
CN109979394B (zh) 2019-05-17 2024-11-26 京东方科技集团股份有限公司 像素电路及其驱动方法、阵列基板及显示装置
TWI731462B (zh) * 2019-11-05 2021-06-21 友達光電股份有限公司 畫素電路、畫素結構與相關的畫素矩陣
CN112365837A (zh) * 2020-11-24 2021-02-12 北京京东方技术开发有限公司 一种像素电路、其驱动方法及显示装置
US20240233663A9 (en) * 2021-03-03 2024-07-11 Hefei Boe Display Technology Co., Ltd. Method for adjusting signal of display panel, time controller integrated circuit, display panel, and storage medium
WO2023004812A1 (zh) 2021-07-30 2023-02-02 京东方科技集团股份有限公司 像素电路、驱动方法和显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101281723A (zh) * 2008-05-23 2008-10-08 上海广电光电子有限公司 有机发光显示器的像素电路及其驱动方法
CN102646386A (zh) * 2011-05-13 2012-08-22 京东方科技集团股份有限公司 一种像素单元电路、像素阵列、面板及面板驱动方法
CN102819996A (zh) * 2011-06-08 2012-12-12 索尼公司 像素电路、显示装置、电子装置和像素电路驱动方法
CN102930824A (zh) * 2012-11-13 2013-02-13 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置
KR20130132708A (ko) * 2013-11-01 2013-12-05 호서대학교 산학협력단 Vdd 전원 라인 없이 문턱전압과 전압강하를 보상하는 유기발광 다이오드 화소 회로
CN103886838A (zh) * 2014-03-24 2014-06-25 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN203733450U (zh) * 2014-03-24 2014-07-23 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100666640B1 (ko) * 2005-09-15 2007-01-09 삼성에스디아이 주식회사 유기 전계발광 표시장치
US8633873B2 (en) * 2009-11-12 2014-01-21 Ignis Innovation Inc. Stable fast programming scheme for displays
KR101761794B1 (ko) * 2010-09-13 2017-07-27 삼성디스플레이 주식회사 표시 장치 및 그의 구동 방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101281723A (zh) * 2008-05-23 2008-10-08 上海广电光电子有限公司 有机发光显示器的像素电路及其驱动方法
CN102646386A (zh) * 2011-05-13 2012-08-22 京东方科技集团股份有限公司 一种像素单元电路、像素阵列、面板及面板驱动方法
CN102819996A (zh) * 2011-06-08 2012-12-12 索尼公司 像素电路、显示装置、电子装置和像素电路驱动方法
CN102930824A (zh) * 2012-11-13 2013-02-13 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置
KR20130132708A (ko) * 2013-11-01 2013-12-05 호서대학교 산학협력단 Vdd 전원 라인 없이 문턱전압과 전압강하를 보상하는 유기발광 다이오드 화소 회로
CN103886838A (zh) * 2014-03-24 2014-06-25 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN203733450U (zh) * 2014-03-24 2014-07-23 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置

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