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WO2014175682A1 - Structure de dispositif à semi-conducteurs et son procédé de fabrication - Google Patents

Structure de dispositif à semi-conducteurs et son procédé de fabrication Download PDF

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Publication number
WO2014175682A1
WO2014175682A1 PCT/KR2014/003604 KR2014003604W WO2014175682A1 WO 2014175682 A1 WO2014175682 A1 WO 2014175682A1 KR 2014003604 W KR2014003604 W KR 2014003604W WO 2014175682 A1 WO2014175682 A1 WO 2014175682A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
encapsulant
device structure
semiconductor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2014/003604
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English (en)
Korean (ko)
Inventor
김창태
정현민
김석중
신원재
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTLAB Co Ltd
Original Assignee
CTLAB Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020130045692A external-priority patent/KR101476771B1/ko
Priority claimed from KR1020140029459A external-priority patent/KR20150107086A/ko
Application filed by CTLAB Co Ltd filed Critical CTLAB Co Ltd
Publication of WO2014175682A1 publication Critical patent/WO2014175682A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
    • H01L25/0753—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0362—Manufacture or treatment of packages of encapsulations

Definitions

  • the present disclosure relates to a semiconductor device structure and a method for manufacturing a semiconductor device structure as a whole, and more particularly, to a semiconductor device structure and a method for manufacturing a semiconductor device structure, which is simple to manufacture. will be.
  • the semiconductor device includes a semiconductor light emitting device (for example, a laser diode), a semiconductor light receiving device (for example, a photodiode), a pn junction diode electric device, a semiconductor transistor, and the like, and typically includes a group III nitride semiconductor light emitting device.
  • the group III nitride semiconductor light emitting device includes a compound semiconductor layer of Al (x) Ga (y) In (1-xy) N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1). It means a light emitting device such as a light emitting diode, and does not exclude the inclusion of a material or a semiconductor layer of these materials with elements of other groups such as SiC, SiN, SiCN, CN.
  • the semiconductor light emitting device is a substrate 100, a buffer layer 200 on the substrate 100, a first semiconductor layer having a first conductivity ( 300), an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer 500 having a second conductivity different from the first conductivity are sequentially deposited, and translucent thereon for current diffusion thereon.
  • the conductive film 600 and the electrode 700 serving as the bonding pad are formed, and the electrode 800 serving as the bonding pad is formed on the etched and exposed first semiconductor layer 300.
  • the substrate 100 side when the substrate 100 side is placed in the package, it functions as a mounting surface.
  • FIG. 2 is a diagram illustrating another example of a conventional semiconductor light emitting device, wherein the semiconductor light emitting device includes a substrate 100 (eg, a sapphire substrate) and a first semiconductor layer having a first conductivity on the substrate 100. 300; for example, an n-type GaN layer), an active layer 400 for generating light through recombination of electrons and holes; for example, InGaN / (In) GaN MQWs), a second semiconductor layer having a second conductivity different from the first conductivity (500; e.g., p-type GaN layer) are sequentially deposited, and an electrode film 901 (e.g., Ag reflecting film) formed of three layers for reflecting light toward the substrate 100 side thereon; : An Ni diffusion barrier layer and an electrode film 903 (eg, Au bonding layer), and are formed on the first semiconductor layer 300 which is etched and exposed, and serves as a bonding pad 800 (eg, Cr / Ni / Au).
  • a bonding pad 800
  • Laminated metal pads are formed.
  • the electrode film 903 side when the electrode film 903 side is placed in the package, it functions as a mounting surface.
  • a flip chip or junction down type chip shown in FIG. 2 is superior in heat dissipation efficiency to the lateral chip shown in FIG. 1. While the lateral chip must emit heat to the outside through the sapphire substrate 100 having a thickness of 80 to 180 ⁇ m, the flip chip transmits heat through the metal electrodes 901, 902, 903 positioned close to the active layer 400. Because it can release.
  • the semiconductor light emitting device package is a vertical semiconductor light emitting device (in the lead frame 110, 120, mold 130, and cavity 140) 150, a vertical type light-emitting chip is provided, and the cavity 140 is filled with an encapsulant 170 containing the phosphor 160.
  • a lower surface of the vertical semiconductor light emitting device 150 is electrically connected to the lead frame 110, and an upper surface of the vertical semiconductor light emitting device 150 is electrically connected to the lead frame 120 by a wire 180.
  • the mold 130, the encapsulant 170, or the lead frames 110, 120, the mold 130, and the encapsulant 170 carry the vertical semiconductor light emitting element, and thus, a carrier (ie, a carrier ( Carrier)
  • a method of manufacturing a semiconductor device structure comprising: positioning a semiconductor device and a partition on a plate, wherein the semiconductor device is a semiconductor light emitting device. Positioning the electrode of the semiconductor device toward the plate; Covering the semiconductor element and the partition wall with an encapsulant; Separating the plate from the encapsulant, leaving the semiconductor element and the partition wall; And, cutting the encapsulant is provided a method for producing a semiconductor device structure comprising a.
  • an according to another aspect of the present disclosure comprising: an encapsulant; A semiconductor light emitting device surrounded by the encapsulating agent and exposing an electrode under the encapsulating agent, the semiconductor light emitting element being a semiconductor light emitting element; A partition wall coupled to the encapsulant on which the electrode is exposed and being a light reflection film;
  • a semiconductor device structure is provided, including; a side surface formed by an encapsulant and a partition wall.
  • a method of manufacturing a semiconductor device structure comprising: positioning a semiconductor device and a partition on a plate, wherein the semiconductor device is a semiconductor light emitting device
  • the barrier rib is a light reflecting film, and the position of the barrier rib is fixed so that the electrode of the semiconductor element faces the plate; Covering at least an upper portion of the semiconductor device with an encapsulant; Separating the plate from the encapsulant, leaving the semiconductor element and the partition wall; And, at least the step of cutting the partition; there is provided a method of manufacturing a semiconductor device structure comprising a.
  • a semiconductor device structure comprising: a semiconductor device having an electrode exposed to a lower portion thereof, the semiconductor device being a semiconductor light emitting device; A barrier rib provided in contact with a side surface of the semiconductor device, the barrier rib being a light reflection film; And an encapsulant covering at least an upper surface of the semiconductor element.
  • FIG. 1 is a view showing an example of a conventional semiconductor light emitting device (Lateral Chip),
  • FIG. 2 is a view showing another example (flip chip) of a conventional semiconductor light emitting device
  • FIG. 3 illustrates an example of a method of manufacturing a semiconductor device structure according to the present disclosure
  • FIG. 5 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure
  • FIG. 6 is a diagram illustrating an example of a semiconductor device structure according to the present disclosure.
  • FIG. 7 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure
  • FIG. 8 illustrates another example of a semiconductor device structure according to the present disclosure
  • FIG. 10 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure
  • FIG. 11 illustrates another example of a semiconductor device structure according to the present disclosure
  • FIG. 12 illustrates another example of a semiconductor device structure according to the present disclosure
  • FIG. 13 illustrates another example of a semiconductor device structure according to the present disclosure
  • 15 is a view showing an example of a conventional semiconductor light emitting device package or semiconductor light emitting device structure
  • 16 to 18 are diagrams illustrating an example of a method of manufacturing the semiconductor device structure illustrated in FIG. 11;
  • 21 to 23 are diagrams illustrating an example of a method of manufacturing the semiconductor device structure illustrated in FIG. 12;
  • FIG. 30 illustrates another example of a semiconductor device structure according to the present disclosure
  • FIG. 31 is a diagram illustrating an example of a method of manufacturing a semiconductor device structure illustrated in FIG. 30;
  • FIG. 32 is a view showing another example of a method of manufacturing a semiconductor device structure shown in FIG.
  • 35 and 36 illustrate another example of a method of manufacturing a semiconductor device structure according to the present disclosure
  • 38 to 41 illustrate another example of a method of manufacturing the semiconductor device structure illustrated in FIG. 30;
  • 46 to 48 illustrate another example of a semiconductor device structure according to the present disclosure
  • FIG. 50 illustrates another example of a semiconductor device structure according to the present disclosure
  • 51 to 53 are views illustrating still another example of a semiconductor device structure according to the present disclosure.
  • FIG. 56 illustrates another example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • FIG. 3 is a view illustrating an example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • the semiconductor device 2 including the two electrodes 80 and 90 is bonded to the adhesive 3. Fix the position on the plate (1).
  • the encapsulating material (encapsulating material) 4 is used to wrap the semiconductor element 2.
  • the plate 1 and the semiconductor element 2 are separated.
  • the material constituting the plate 1 is not particularly limited, and a material such as sapphire may be used, or a flat structure such as metal or glass may be used. By using a rigid plate such as metal or glass, the process can be stabilized as compared with the use of a plate (plate) having a ductility such as blue tape.
  • the material constituting the adhesive 3 is not particularly limited, and any adhesive may be used as long as the semiconductor element 2 can be fixed to the plate 1.
  • the material of the encapsulant 3 silicone epoxy and silicone resin, which are conventionally used in LED packages, may be used.
  • the semiconductor element 2 and the plate 1 can be separated by applying heat or light that can melt the adhesive 3 or by using a solvent that can melt the adhesive 3. Do. It is also possible to use heat or light with a solvent. It is also possible to use an adhesive tape.
  • the encapsulant 4 may be formed by a conventional method such as dispensing, screen printing, molding, spin coating, stencil, and the like, which is formed by applying light to a photocurable resin (UV curable resin) and then irradiating with light. It is also possible. In the case where a translucent plate such as sapphire is used as the plate 1, it is also possible to irradiate light from the plate 1 side.
  • a translucent plate such as sapphire
  • the process can be performed with the plurality of semiconductor elements 2 placed on the plate 1.
  • the semiconductor element 2 has been described as having two electrodes 80 and 90, the number is not particularly limited. For example, in the case of a transistor, it may have three electrodes.
  • the semiconductor light emitting device includes a substrate 100 (eg, a sapphire substrate), a first semiconductor layer 300 having a first conductivity (eg, an n-type GaN layer), electrons, and holes on the substrate 100.
  • a substrate 100 eg, a sapphire substrate
  • a first semiconductor layer 300 having a first conductivity eg, an n-type GaN layer
  • electrons and holes on the substrate 100.
  • the active layer 400 (eg, InGaN / (In) GaN MQWs) that generates light through recombination of the second semiconductor layer 500 (eg, p-type GaN layer) having a second conductivity different from the first conductivity
  • a three-layer electrode film 901 e.g., Ag reflecting film
  • an electrode film 902 e.g., Ni diffusion barrier film
  • an electrode 800 eg, Cr / Ni / Au laminated metal pad serving as a bonding pad may be formed on the etched and exposed first semiconductor layer 300.
  • the semiconductor device 2 has two electrodes 80 and 90, and the electrode 90 may have the same configuration as the electrodes 901, 902 and 903 of FIG.
  • the electrode 80 and the electrode 90 are electrically insulated by an insulating film 5 such as SiO 2 .
  • the subsequent procedure is the same, and the semiconductor element 2 is wrapped using an encapsulating material (encapsulating material 4). Next, the semiconductor element 2 is separated from the plate 1 and the adhesive agent 3.
  • FIG. 5 shows another example of a method for manufacturing a semiconductor device structure according to the present disclosure, in which a plurality of semiconductor devices 2, 2 are integrally covered with an encapsulant 4 on a plate 1. After removing the plate 1, it becomes easy to package one semiconductor element 2, 2 integrally. The electrical connection method of the semiconductor element 2 and the semiconductor element 2 is mentioned later. It is also possible to separate them into individual semiconductor elements 2 as in FIG. This is possible by separating the plurality of semiconductor elements 2 and 2 from the plate 1 and then individualizing them through a process such as sawing. By using the sealing agent 4 which has softness after hardening, the bond with a flexible circuit board can be heightened further.
  • FIG. 6 is a view illustrating an example of a semiconductor device structure according to the present disclosure, and is formed such that the side surface 4a of the encapsulant 4 is inclined.
  • the encapsulant 4 has various angled outer surfaces, and the light extraction efficiency to the outside of the package is increased.
  • the screen partition wall is formed to be inclined, so that the side surface 4a can be formed, and when sawing, the side surface 4a can be formed by using a pointed cutter.
  • FIG. 7 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • an insulating film 6, such as SiO 2 is formed on the electrode 80 and the electrode 90. It is provided in the state which exposed.
  • the external electrode 81 is connected to the electrode 80, and the external electrode 91 is formed on the electrode 90 to form a structure similar to a conventional package.
  • the external electrodes 81 and 91 may correspond to lead frames of a conventional package.
  • the external electrodes 81 and 91 may be widely spread and deposited so as to function as reflective films.
  • the insulating film 6 may merely serve as an insulating function, or may form an alternate stacked structure of SiO 2 / TiO 2 or form a DBR to reduce light absorption by the external electrodes 81 and 91. As shown in FIG. 4, when the semiconductor device 2 includes the insulating film 5, the insulating film 6 may be omitted.
  • the deposition process and the photolithography process used to form the insulating film 6 and the external electrodes 81 and 91 are common in the semiconductor chip process and are very familiar to those skilled in the art. By providing the external electrodes 81 and 91, mounting to the PCB, COB, etc. can be made easier. If necessary, it is also possible to provide only the insulating film 6 without the external electrodes 81 and 91.
  • the insulating film 6 can be formed of a white material so that the insulating film 6 can function as a reflective film.
  • a white PSR Photo Sloder Regist
  • a white PSR can be screen printed or spin coated and then patterned through a common photolithography process.
  • FIG. 8 is a diagram illustrating another example of a semiconductor device structure according to the present disclosure, and includes a semiconductor device 2A and a semiconductor device 2B electrically connected in series. This configuration is made possible by connecting the negative electrode 80A of the semiconductor element 2A and the positive electrode 90B of the semiconductor element 2B through the external electrode 89.
  • Reference numeral 4 is an encapsulant
  • 6 is an insulating film
  • 90A is a positive electrode of the semiconductor element 2A
  • 80B is a negative electrode of the semiconductor element 2B.
  • This configuration makes it possible to form an electrical connection between the integrated semiconductor elements 2A and 2B through the encapsulant 4 without the use of a monolithic substrate.
  • the structure of the semiconductor element thereon is the same, but according to the method of the present disclosure, the semiconductor element 2A and the semiconductor element 2B need not be elements having the same function. It goes without saying that the semiconductor elements 2A and 2B can be connected in parallel.
  • the side surface 4a of the encapsulant 4 may be formed to be inclined as shown in FIG. 6, and this configuration enables a high-voltage semiconductor light emitting device package or a semiconductor light emitting device structure that could not be previously imagined. .
  • FIG. 9 is a view illustrating an example of the use of a semiconductor device structure according to the present disclosure.
  • a conductive line 7a of the printed circuit board 7 and electrodes 80 and 90 are directly connected to each other.
  • the element 2D is connected through the conductive line 7b and the external electrodes 81 and 91.
  • the printed circuit board 7 may be a flexible circuit board.
  • FIG. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which a semiconductor device 2 as shown in FIG. 2 is provided, and the semiconductor device 2 includes a substrate 100.
  • a first semiconductor layer 300 having a first conductivity, an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer having a second conductivity different from the first conductivity. 500 is grown, and electrodes 80 and 90 are formed.
  • the semiconductor element 2 is attached to the plate 1 with an adhesive 3, and then, prior to covering with the encapsulant 4, the substrate 100 is removed, and preferably a rough surface ( 301 is formed. The subsequent process is the same.
  • the substrate 100 may be removed by a process such as laser lift-off, and the rough surface 301 may be through dry etching such as an inductively coupled plasma (ICP). This enables chip level laser lift off.
  • ICP inductively coupled plasma
  • FIG. 11 is a view showing another example of a semiconductor device structure according to the present disclosure, in which an encapsulant 4 includes phosphors.
  • YAG, Silicate, Nitride phosphors and the like can emit light of a desired color.
  • FIG. 12 is a view showing another example of a semiconductor device structure according to the present disclosure, in which the phosphor layer 8 is formed in the encapsulant 4 or under the encapsulant 4. It is also possible to form the phosphor layer 8 on the encapsulant 4. This can be formed by precipitating the phosphor in the encapsulant 4, or spin coating separately, or by applying a phosphor contained in a volatile liquid, followed by volatilization, leaving only the phosphor and then covering it with the encapsulant 4. If necessary, a plurality of phosphor layers 8 can be formed.
  • FIG. 13 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which the encapsulant 4 is provided with a rough surface or unevenness 4g for increasing light extraction efficiency.
  • the rough surface 4g can be formed by pressing, forming a nanoimprint, or the like.
  • After applying the bead material it is also possible to form through etching, sandblasting and the like.
  • the rough surface 4g may be formed before or after separation of the plate 1.
  • FIG. 14 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which a lens 4c is formed on the encapsulant 4.
  • the lens 4c is formed integrally with the encapsulant.
  • Such an integrated lens 4c can be formed by a compression molding method or the like.
  • 16 to 18 are diagrams illustrating an example of a method of manufacturing the semiconductor device structure shown in FIG. 11, in which the semiconductor devices 2 and 2 are fixed to the plate 1 using the adhesive 3.
  • the sealing agent 4 containing the phosphor that is, the phosphor layer 8 is covered.
  • the plate 1 is removed, and as shown in FIG. 18, the semiconductor elements 2 and 2 are separated from each other.
  • Conformal coating in this manner substitution of the conformal coating through the removal of the encapsulant 4 or the removal of the phosphor layer 8 is largely distinguished from the conformal coating which has been conventionally performed by spin coating or screen printing. do.
  • FIG. 19 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • the semiconductor device 2, 2 manufactured in FIG. 18 is again used on the plate 1 by using an adhesive 3. Put it on, and apply the sealing agent 4 again.
  • easy shape control of the interface between the phosphor layer 8 and the encapsulant 4 is possible.
  • both appearance control of the phosphor layer 8 and appearance control of the encapsulant 4 covering the phosphor layer 8 can be easily performed.
  • the phosphor may be introduced into the external encapsulant 4 and the phosphor may not be introduced into the internal encapsulant 4.
  • the encapsulant 4 constituting the phosphor layer 8 and the encapsulant 4 covering the phosphor layer 8 may be the same material, but may have different properties (refractive index, hardness, light transmittance, curing rate, etc.). It may be a substance.
  • the present embodiment can be extended to a method of manufacturing a semiconductor device structure according to the present disclosure in which two or more same or different encapsulation agents are applied.
  • the semiconductor light emitting element is suitable for application to the semiconductor element, but when the phosphor is not contained, the semiconductor element need not necessarily be the semiconductor light emitting element.
  • FIG. 20 is a view illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • the phosphor layer 8 is formed, and then the phosphor layer is not removed.
  • a part of (8) is removed to form a phosphor layer 8 conformally on each of the semiconductor elements 2 and 2. Thereafter, in the case where the process according to FIG. 19 is in progress, the use of the plate 1 can be reduced once.
  • 21 to 23 are views illustrating an example of a method of manufacturing the semiconductor device structure illustrated in FIG. 12. Unlike the method illustrated in FIG. 20, the phosphor layer 8 is not completely removed and separated. Leave it removed. Next, a semiconductor device structure is manufactured by covering the encapsulant 4 as shown in FIG. 22 and separating the semiconductor devices 2 and 2 as shown in FIG. The encapsulant 4 may have various shapes such as the shape shown in FIG. 13 and the shape shown in FIG. 14.
  • FIG. 24 to 27 show another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which a plate 1 (see FIG. 3) is removed, and then a photosensitive liquid 9 is applied.
  • the photosensitive liquid 9 may be made of a white PSR functioning as the insulating film 6.
  • an exposure operation is required, and as the mask pattern, the electrodes 80 and 90 are used as masks without a separate mask pattern.
  • the light L is irradiated from the upper side of the encapsulant 4 to expose the photosensitive liquid 9, and the regions 80a and 90a corresponding to the electrodes 80 and 90 are formed. Allow to be removed after exposure.
  • FIG. 25 the light L is irradiated from the upper side of the encapsulant 4 to expose the photosensitive liquid 9, and the regions 80a and 90a corresponding to the electrodes 80 and 90 are formed. Allow to be removed after exposure.
  • the phosphor 4 is not contained in the encapsulant 4 so that the light L can be accurately transmitted to the photosensitive liquid 9.
  • the electrodes 80 and 90 as masks, the alignment work required for using a separate mask is not necessary, and more accurate exposure work is possible.
  • the external electrodes 81 and 91 are electrically connected to the electrodes 80 and 90.
  • the photosensitive liquid 9 can function as the insulating film 6 and can function as a light reflecting film. In the case of a semiconductor device as a whole, it should be formed to be transparent.
  • the transparent sapphire substrate, the GaN substrate, and the SiC substrate may be formed of a light transmissive semiconductor.
  • the semiconductor element 2 and the encapsulant 4 in a light-transmissive manner, the light L used for exposure passes through them and can be applied to the photosensitive liquid 9.
  • FIG. 28 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which external electrodes 81 and 91 are formed prior to forming the photosensitive liquid 9 or the insulating film 6.
  • the electrodes 80 and 90 and the external electrodes 81 and 91 can be used as a mask during exposure, and the shape and size of the electrodes 80 and 90 are limited by the size and characteristics of the semiconductor element 2.
  • the external electrodes 81 and 91 are not limited by the semiconductor element 2, the external electrodes 81 and 91 can be freely designed as needed to form a pattern shape of a desired shape.
  • FIG. 29 is a diagram illustrating still another example of a method of manufacturing a semiconductor device structure according to the present disclosure, and illustrates a process of cutting a plurality of semiconductor devices 2 and 2.
  • FIGS. 24 to 27 in the case of manufacturing the semiconductor device structure, when separating the semiconductor devices 2 and 2 based on the cutting line C, the bottom of the external electrodes 81 and 91 is used. The photosensitive liquid 9 to be laid is separated together with the encapsulant 4.
  • FIG. 30 is a view showing another example of a semiconductor device structure according to the present disclosure, in which a light reflecting surface 4b is covered by an insulating film 6.
  • the insulating film 6 can function as a light reflecting film such as a white PSR. In this sense, the insulating film 6 in this embodiment may be referred to as a light reflecting film.
  • the encapsulant 4 is made of a material having a refractive index relatively higher than that of the insulating film 6, it is also possible to protect the light reflecting surface 4b with the insulating film 6 while improving the reflection performance between the two. .
  • the insulating film 6 may be made of a material having a lower refractive index than that of the encapsulant 4, and belongs to the present disclosure, but deviates from the present embodiment. It is also possible to configure the light reflection film 6 as a metal film by depositing a metal (for example, Al, Ag, Au) instead of an insulating material.
  • a metal for example, Al, Ag, Au
  • FIG. 31 is a view showing an example of a method of manufacturing the semiconductor device structure shown in FIG. 30.
  • the plate 1 After covering the semiconductor device 2 which is a semiconductor light emitting device with an encapsulant 4, the plate 1 (see FIG. 3). Remove it.
  • the groove 4m is formed using a blade (not shown) (generally, the groove 4m is formed by removing the sealing agent 4), and the light reflecting surface ( 4b), the light reflecting surface 4b is covered with the insulating film 6, and then the electrodes 80 and 90 are exposed through the insulating film 6 through a photolithography process, and the external electrodes 81 and 91 are exposed. To the electrodes 80 and 90, respectively.
  • the semiconductor elements 2 and 2 are separated based on the cutting line C.
  • FIG. 1 is a view showing an example of a method of manufacturing the semiconductor device structure shown in FIG. 30.
  • FIG. 32 is a diagram illustrating another example of a method of manufacturing the semiconductor device structure illustrated in FIG. 30, in which external electrodes 81 and 90 are first formed on electrodes 80 and 90 by a method such as deposition or plating, The insulating film 6 is formed on the light reflecting surface 4b. Thereafter, the external electrodes 81 and 91 are exposed to the outside of the insulating layer 6 through a photolithography process, and the semiconductor devices 2 and 2 are cut based on the cutting line C.
  • the light reflecting surface forms one inclined surface 4b1
  • the light reflecting surface includes two inclined surfaces ( 4b1, 4b2).
  • the semiconductor elements 2 and 2 may be separated separately, but the plurality of semiconductor elements 2 and 2 may be separated together.
  • 35 and 36 illustrate another example of a method of manufacturing a semiconductor device structure according to the present disclosure.
  • a plate 1 is attached to an encapsulant 4 side.
  • the plate 1 may be attached to the encapsulant 4 in the same manner as illustrated in FIG. 3.
  • the plate 1 may be attached to the encapsulant 4 side before or after separation of the plate 1 attached to the electrode 2 side in FIG. 3.
  • it is important that the plate 1 does not have a bending property like a plate of a soft material.
  • FIG. 36 after the plate 1 shown in FIG.
  • the encapsulant 4 having a height of at most several mm is kept flat.
  • a rigid plate 1 The material of the plate 1 may be ceramic, glass, metal, engineering plastic, and the like, and the thickness may vary depending on the material. However, it is preferable to maintain an appropriate thickness to prevent bending and maintain mechanical stability. In the case of a glass substrate, 1 mm or more is enough, for example.
  • the plate 1 can be removed before or after the cutting of the two semiconductor elements 2, 2.
  • FIG. 37 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which an unbending plate 1 used in the method shown in FIG. 36 is applied to the method shown in FIG. 25.
  • a light-transmissive material for example, glass
  • the partition wall 6a functioning as an insulating film or a light reflecting film is encapsulated.
  • the adhesive 3 is formed on the plate 1 formed.
  • the partition 6a is a white PSR, a black PSR, or an injection used for a polymer composition containing SiO 2 , Al 2 O 3 , TiO 2, or ceramic fine particles thereof, a conventional silicone resin or an epoxy resin composition, or a conventional LED package. It may be made of plastic, metal, and the like, and may be formed by a photolithography process, deposition, injection, screen printing, dotting, stencil, ink jet, or the like.
  • the partition wall 6a has an inclined surface 4b, but the present invention is not limited thereto, and the partition 6a may have various shapes such as a square, a square, a curved surface, and the height and width may be adjusted as necessary.
  • the encapsulant 4 is applied.
  • the plate 1 is removed. Heat and / or light may be applied to the adhesive 3 to separate the plate 1, or the plate 1 may be separated through a suitable removal liquid.
  • external electrodes 81 and 91 are formed and cut
  • the semiconductor element 2 may be fixed to the plate 1 before and after the formation of the partition wall 6a.
  • the additional layer 41 may simply be a layer that reinforces the encapsulant 4, in which case it may be made of the same material as the encapsulant 4.
  • the additional layer 41 can be formed transparent.
  • the additional layer 41 may be made of a material having a refractive index different from that of the encapsulant 4, thereby increasing the light extraction efficiency. It may also be used as a base layer for forming lenses, irregularities, and the like of the additional layer 41.
  • additional layers 41 may be provided as necessary.
  • the lower layer may contain a phosphor
  • the upper layer may contain a light scattering agent.
  • additional layers 41 may of course be applied to semiconductor device structures that are not provided with partition 6a shown in FIG. 38.
  • FIG. 43 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which a lens 4c is formed on the encapsulant 4.
  • one lens 4c corresponds to one semiconductor element 2, but the present disclosure is not limited thereto, and one lens 4c covers a plurality of semiconductor elements, or a plurality of lenses is one. It can be provided in the semiconductor device 2 of the plurality, a plurality of lenses can be provided for a plurality of semiconductor devices, of course.
  • the lens 4c may be formed directly on the encapsulant 4 or on an additional layer 41 shown in FIG. 42.
  • FIG. 44 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which the unevenness 4g is formed in the encapsulant 4.
  • the unevenness 4g may be formed directly in the encapsulant 4 or in the additional layer 41 shown in FIG.
  • the lens 4c and the concave-convex 4g may be formed using a structure having the shape of the lens 4c or the concave-convex 4g prior to the hardening of the encapsulant 4 or the additional layer 42.
  • FIG. 45 is a view illustrating another example of a semiconductor device structure according to the present disclosure.
  • a light scattering layer containing a light scattering agent eg , oxide fine particles such as aluminum oxide, silicon oxide, titanium oxide, etc.
  • the light scattering layer 4y may be formed by the method shown in FIG. 42 and may also be formed by spin coating or the like.
  • FIGS. 46 to 56 show another example of a semiconductor device structure according to the present disclosure, in which examples of the partition wall 6a having a height higher than that of the semiconductor device 2 are illustrated.
  • the partition 6a has a higher height than the semiconductor element 2, but is still located in the encapsulant 4, that is, the partition 6a is covered with the encapsulant 4.
  • the partition 6a is located in an additional layer 41, ie the partition 6a is covered by an additional layer 41.
  • both the encapsulant 4 and the additional layer 41 are located in the partition 6a so that the top of the partition 6a is exposed.
  • the additional layer 41 contains phosphors, and the partition wall 6a can be made transparent.
  • the examples described in FIGS. 46 to 56 may be considered together unless they contradict the above examples.
  • FIG. 49 is a view showing still another example of the semiconductor device structure according to the present disclosure, in which a partition wall 6a is provided in contact with the semiconductor device 2.
  • the partition 6a may be made of, for example, a white silicone resin, and may be formed by a method such as dispensing, spin coating, molding, or the like. Through this configuration, light emitted from the semiconductor element 2 can be emitted to the upper surface of the semiconductor element 2 in a state in which it is possible to reduce the loss of being trapped by the semiconductor element side.
  • the height of the partition wall 6a is shown to be the same as that of the semiconductor device 2, but the height of the partition wall 6a may be lower or higher than that of the semiconductor device 2.
  • FIG. 50 is a view showing another example of a semiconductor device structure according to the present disclosure, and includes an encapsulant 4 and an additional layer 41 to form a barrier rib when the semiconductor device 2 is a semiconductor light emitting device.
  • the encapsulant 4 consists of a transparent layer and the additional layer 41 consists of a phosphor layer, this effect can be better.
  • the height of the encapsulant 4 this effect can be adjusted. It goes without saying that such an effect is also obtained when the encapsulant 4 is composed of a phosphor layer.
  • 51 to 53 are views illustrating still another example of the semiconductor device structure according to the present disclosure, illustrating various configurations of the partition wall 6a in contact with the semiconductor device 2.
  • the semiconductor element 2 is a semiconductor light emitting element
  • the encapsulant 4 in a layer transparent to this control. The same applies to the semiconductor device structure shown in FIGS. 46 to 48.
  • FIG. 54 is a diagram illustrating another example of a semiconductor device structure according to the present disclosure, in which a lens 4c is applied to the structure shown in FIG. 53.
  • the lens 4c when used, the smaller the size of the light source, the easier the design and the higher the light collection efficiency.
  • the barrier rib 6a By forming the barrier rib 6a in contact with the semiconductor element 2, which is a semiconductor light emitting element, and increasing its height, the design of the lens 4c can be facilitated and the efficiency of condensing can be increased.
  • the lens 4c may be applied to the semiconductor device structure shown in FIGS. 46 to 52.
  • FIG. 55 is a view illustrating still another example of the semiconductor device structure according to the present disclosure, and a step 6b (Step) is formed on the partition wall 6a.
  • the step 6b forms the partition 6a and then etches it by a photolithography process, or first, creates the partition 6a as shown in FIG. 51, and then additionally uses a method such as screen printing to form a step or protrusion. It can be made by forming (6b). Instead of the step 6b, it is also possible to form a groove on the partition 6a to increase the bonding force with the additional layer 41.
  • FIG. 56 is a view showing another example of a method for manufacturing a semiconductor device structure according to the present disclosure.
  • the semiconductor device 2 including the two electrodes 80 and 90 is bonded to an adhesive ( 3) is used to fix the position to the plate 1, or to fix the semiconductor element 2 on the adhesive plate (1).
  • the partition 6a is formed.
  • the partition wall 6a may be formed of a white silicone resin through dispensing, and there is no particular limitation on the method of forming the partition wall 6a.
  • the barrier rib 6a may be any material as long as it supports the semiconductor element 2 and reflects light.
  • the encapsulant 4 and / or the additional layer 41 are formed.
  • the plate 1 is removed, and when a plurality of semiconductor elements 2 are formed at one time, they are separated into individual elements.
  • a method of manufacturing a semiconductor device structure comprising: positioning a semiconductor device and a partition on a plate, wherein the semiconductor device is a semiconductor light emitting device, and positioning the electrode of the semiconductor device toward the plate; Covering the semiconductor element and the partition wall with an encapsulant; Separating the plate from the encapsulant, leaving the semiconductor element and the partition wall; And cutting the encapsulant.
  • the additional layer may be formed of the same material as the encapsulant or other material.
  • phosphors, light scattering agents and the like can be formed as a whole, in one layer or with varying concentrations.
  • a semiconductor device structure comprising: an encapsulant; A semiconductor light emitting device surrounded by an encapsulant, wherein the electrode is exposed to the lower part of the encapsulant; A partition wall coupled to the encapsulant on which the electrode is exposed and being a light reflection film; And a side surface formed by the encapsulant and the partition wall, and a cut side surface continuously connected to the semiconductor device structure.
  • a semiconductor device structure comprising a lens on top of the encapsulant.
  • a semiconductor device structure wherein the partition wall is white. It is formed of a white material (white PSR, a white polymer material used in a conventional LED package, etc.) of the partition wall, thereby reducing light absorption by the light reflecting film.
  • a white material white PSR, a white polymer material used in a conventional LED package, etc.
  • a method of manufacturing a semiconductor device structure comprising: positioning a semiconductor device and a partition on a plate, wherein the semiconductor device is a semiconductor light emitting device, the partition is a light reflecting film, and the electrodes of the semiconductor device face the plate. Fixing the position; Covering at least an upper portion of the semiconductor device with an encapsulant; Separating the plate from the encapsulant, leaving the semiconductor element and the partition wall; And cutting at least the partition wall.
  • a method for manufacturing a semiconductor device structure characterized in that the sealing agent is made of a transparent material.
  • (21) A method of manufacturing a semiconductor device structure, characterized in that in the step of positioning, the partition wall is spaced apart from the semiconductor device.
  • (22) A method of manufacturing a semiconductor device structure, wherein the height of the partition wall is higher than that of the semiconductor device.
  • a semiconductor device structure comprising: a semiconductor device having an electrode exposed to the bottom thereof, the semiconductor device being a semiconductor light emitting device; A barrier rib provided in contact with a side surface of the semiconductor device, the barrier rib being a light reflection film; And an encapsulant covering at least an upper surface of the semiconductor element.
  • a semiconductor device characterized in that the height of the partition wall is equal to the height of the semiconductor device structure.
  • a semiconductor element wherein a lens is formed on the partition wall.
  • An encapsulant contains a phosphor, and the additional layer is a transparent layer, and a method of manufacturing the same.
  • the semiconductor device structure According to one semiconductor device structure and a method of manufacturing the semiconductor device structure according to the present disclosure, it is possible to easily manufacture a semiconductor device structure or a package.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)

Abstract

La présente invention concerne une structure de dispositif à semi-conducteurs et son procédé de fabrication, comprenant les étapes suivantes : fixation de la position d'une cloison sur une plaque entre deux dispositifs à semi-conducteurs, les dispositifs à semi-conducteurs étant des diodes électroluminescentes à semi-conducteurs, et fixation de la position d'une électrode des dispositifs à semi-conducteurs de sorte qu'elle soit dirigée vers la plaque ; couverture des dispositifs à semi-conducteurs et de la cloison avec un matériau d'encapsulation ; séparation de la plaque du matériau d'encapsulation tout en laissant derrière les dispositifs à semi-conducteurs et la partition ; et découpe du matériau d'encapsulation.
PCT/KR2014/003604 2013-04-24 2014-04-24 Structure de dispositif à semi-conducteurs et son procédé de fabrication Ceased WO2014175682A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020130045692A KR101476771B1 (ko) 2013-04-24 2013-04-24 반도체 소자 구조물 및 반도체 소자 구조물을 제조하는 방법
KR10-2013-0045692 2013-04-24
KR10-2014-0029459 2014-03-13
KR1020140029459A KR20150107086A (ko) 2014-03-13 2014-03-13 반도체 소자 구조물 및 반도체 소자 구조물을 제조하는 방법

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WO2014175682A1 true WO2014175682A1 (fr) 2014-10-30

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WO (1) WO2014175682A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005119797A1 (fr) * 2004-06-03 2005-12-15 Philips Intellectual Property & Standards Gmbh Ceramique luminescente pour dispositif electroluminescent
JP2007059492A (ja) * 2005-08-22 2007-03-08 Citizen Electronics Co Ltd フレネルレンズ付チップｌｅｄの構造およびその製造方法。
JP2009302160A (ja) * 2008-06-10 2009-12-24 Sharp Corp 半導体装置製造方法および半導体装置
JP2012039013A (ja) * 2010-08-10 2012-02-23 Citizen Electronics Co Ltd 発光装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005119797A1 (fr) * 2004-06-03 2005-12-15 Philips Intellectual Property & Standards Gmbh Ceramique luminescente pour dispositif electroluminescent
JP2007059492A (ja) * 2005-08-22 2007-03-08 Citizen Electronics Co Ltd フレネルレンズ付チップｌｅｄの構造およびその製造方法。
JP2009302160A (ja) * 2008-06-10 2009-12-24 Sharp Corp 半導体装置製造方法および半導体装置
JP2012039013A (ja) * 2010-08-10 2012-02-23 Citizen Electronics Co Ltd 発光装置の製造方法

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