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WO2014010333A1 - METHOD FOR FORMING Cu WIRING, AND COMPUTER-READABLE MEMORY MEDIUM - Google Patents

METHOD FOR FORMING Cu WIRING, AND COMPUTER-READABLE MEMORY MEDIUM Download PDF

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Publication number
WO2014010333A1
WO2014010333A1 PCT/JP2013/065393 JP2013065393W WO2014010333A1 WO 2014010333 A1 WO2014010333 A1 WO 2014010333A1 JP 2013065393 W JP2013065393 W JP 2013065393W WO 2014010333 A1 WO2014010333 A1 WO 2014010333A1
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WIPO (PCT)
Prior art keywords
film
forming
alloy
wiring
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2013/065393
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French (fr)
Japanese (ja)
Inventor
石坂 忠大
五味 淳
鈴木 健二
波多野 達夫
佐久間 隆
敏章 藤里
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Filing date
Publication date
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Publication of WO2014010333A1 publication Critical patent/WO2014010333A1/en
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Ceased legal-status Critical Current

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    • H10W20/425
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/046Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14Metallic material, boron or silicon
    • C23C14/16Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • H10P14/44
    • H10W20/033
    • H10W20/045
    • H10W20/056

Definitions

  • the present invention relates to a Cu wiring forming method for forming a Cu wiring in a recess such as a trench or a hole formed in a substrate, and a computer-readable storage medium.
  • a barrier film made of tantalum metal (Ta), titanium (Ti), tantalum nitride film (TaN), titanium nitride film (TiN), etc. is formed on the entire interlayer insulating film in which trenches and holes are formed. It is formed by PVD plasma sputtering, and a Cu seed film is also formed on the barrier film by plasma sputtering. Further, Cu plating is applied on the barrier film to completely fill trenches and holes.
  • CMP Chemical Mechanical Polishing
  • Non-patent Document 1 a Cu alloy (Cu—Al, Cu—Mn, Cu—Mg, Cu— A wiring formation process using a seed layer of Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, Cu—Ni, Cu—Co, etc. has been proposed (Non-patent Document 1). etc).
  • the width of the trench and the hole diameter are several tens of nanometers.
  • problems such as insufficient embeddability and generation of voids occur.
  • Non-Patent Document 1 can improve electromigration resistance, Cu embedding is used, and thus the problem of embeddability is not essentially solved.
  • the alloy component and impurities in the Cu plating are contained in the wiring, which may increase the wiring resistance.
  • the present invention has been made in view of such circumstances, and when forming a Cu wiring in a recess such as a trench or a hole, an electromigration is prevented without generating a void or the like and suppressing an increase in wiring resistance as much as possible. It is an object of the present invention to provide a Cu wiring forming method capable of obtaining a highly resistant Cu wiring and a computer-readable storage medium storing a program for causing a Cu wiring forming system to execute the Cu wiring forming method.
  • a first aspect of the present invention is a Cu wiring forming method for forming a Cu wiring in a recess having a predetermined pattern formed on a substrate, wherein a barrier film is formed on at least the surface of the recess.
  • a step of forming, and a concave portion in which a Cu alloy film containing an alloy component having an electromigration resistance higher than that of pure Cu and having a resistance value in an allowable range is formed by PVD, and a barrier film is formed on the surface Cu wiring formation comprising: filling the inside with the Cu alloy film; forming a stacked layer on the Cu alloy film; and polishing the entire surface by CMP to form a Cu wiring in the recess.
  • the concentration of the alloy component of the target when performing PVD according to the film forming conditions so that the concentration of the alloy component of the Cu alloy film becomes a predetermined value. It is preferable to further include a step of forming a Ru film after forming the barrier film and before forming the Cu alloy film.
  • the Ru film is preferably formed by CVD.
  • plasma is generated by a plasma generation gas in a processing container in which a substrate is accommodated, and particles are ejected from a target made of the same Cu alloy as the Cu alloy film to be obtained. It is preferably performed by a device that ionizes in plasma and applies a bias power to the substrate to draw ions onto the substrate.
  • the formation of the additional layer can be performed by forming a Cu alloy film or a pure Cu film by PVD. Moreover, it is preferable that the formation of the additional layer is performed by forming the same Cu alloy with the same apparatus after forming the Cu alloy film.
  • the Cu alloy constituting the Cu alloy film is Cu—Al, Cu—Mn, Cu—Mg, Cu—Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, Cu—Ni. , Cu—Co, and Cu—Ti can be used.
  • Cu—Mn and Cu—Al are preferable, and Cu—Mn is particularly preferable.
  • the barrier film is a Ti film, TiN film, Ta film, TaN film, Ta / TaN two-layer film, TaCN film, W film, WN film, WCN film, Zr film, ZrN film, V film, VN film, Nb Those selected from the group consisting of a film and an NbN film can be used.
  • a computer-readable storage medium that operates on a computer and stores a program for controlling a Cu wiring forming system.
  • a computer-readable storage medium that allows a computer to control the Cu wiring forming system so that the Cu wiring forming method according to the aspect is performed.
  • a Cu alloy film containing an alloy component having an electromigration resistance higher than that of pure Cu and a resistance value in an allowable range is formed by PVD, and the Cu alloy film is embedded in the recess.
  • Generation of voids as in the case of embedding by Cu plating can be prevented, and PVD has few impurities, so there is little increase in wiring resistance, high electromigration resistance, and an acceptable resistance value.
  • the Cu alloy film can be formed with high accuracy. For this reason, it is possible to obtain Cu wiring having high electromigration resistance without generating voids or the like and suppressing increase in wiring resistance as much as possible.
  • FIG. 6 is a cross-sectional view showing a Ru film forming apparatus for forming a Ru liner film mounted in the film forming system of FIG. 5.
  • an interlayer insulating film 202 such as a SiO 2 film or a low-k film (SiCO, SiCOH, etc.) is provided on a lower structure 201 (details are omitted), and a trench 203 and a lower layer wiring are provided there.
  • a wafer W is preferably one obtained by removing moisture on the insulating film surface and residues during etching / ashing by a Degas process or a Pre-Clean process.
  • a barrier film 204 is formed by shielding Cu (barrier) over the entire surface including the surfaces of the trench 203 and via (step 2, FIG. 2B).
  • the barrier film 204 preferably has a high barrier property against Cu and low resistance, and a Ti film, a TiN film, a Ta film, a TaN film, and a Ta / TaN two-layer film are preferably used. It can.
  • a TaCN film, W film, WN film, WCN film, Zr film, ZrN film, V film, VN film, Nb film, NbN film, or the like can also be used.
  • the barrier film is preferably formed very thin. From such a viewpoint, the thickness is preferably 1 to 20 nm. More preferably, it is 1 to 10 nm.
  • the barrier film can be formed by ionized PVD (Ionized physical vapor deposition; iPVD), for example, plasma sputtering. Further, it can be formed by other PVD such as normal sputtering, ion plating, etc., and can also be formed by CVD, ALD, or CVD or ALD using plasma.
  • ionized PVD Ionized physical vapor deposition
  • PVD plasma sputtering
  • a Ru liner film 205 is formed on the barrier film 204 (step 3, FIG. 2C).
  • the Ru liner film is preferably formed as thin as 1 to 5 nm, for example, from the viewpoint of increasing the volume of Cu to be embedded and reducing the resistance of the wiring.
  • Ru has high wettability with respect to Cu
  • by forming a Ru liner film on the base of Cu it is possible to ensure good Cu mobility when forming a Cu film by the next iPVD. It is possible to make it difficult to generate an overhang that closes the opening. For this reason, Cu can be reliably embedded without generating voids even in fine trenches or holes.
  • the Ru liner film can be suitably formed by thermal CVD using ruthenium carbonyl (Ru 3 (CO) 12 ) as a film forming material. Thereby, a high-purity and thin Ru film can be formed with high step coverage.
  • the film forming conditions at this time are, for example, a pressure in the processing vessel in the range of 1.3 to 66.5 Pa, and a film forming temperature (wafer temperature) in the range of 150 to 250 ° C.
  • the Ru liner film 205 is a film forming material other than ruthenium carbonyl, such as (cyclopentadienyl) (2,4-dimethylpentadienyl) ruthenium, bis (cyclopentadienyl) (2,4-methylpentadiene).
  • Ruthenium pentadienyl compounds such as (enyl) ruthenium, (2,4-dimethylpentadienyl) (ethylcyclopentadienyl) ruthenium, bis (2,4-methylpentadienyl) (ethylcyclopentadienyl) ruthenium
  • the film can also be formed by the CVD or PVD used.
  • the Ru liner film 205 is not necessarily formed, and a Cu film may be formed directly on the barrier film.
  • a Cu alloy film 206 made of a low purity Cu alloy is formed by PVD, and the trench 203 and a via (not shown) are almost completely embedded (step 4, FIG. 2D).
  • iPVD for example, plasma sputtering.
  • the film can be formed at a high speed by a low temperature process ( ⁇ 50 to 0 ° C.) in which Cu does not migrate.
  • the pressure (process pressure) in the processing container at the time of forming the Cu film is preferably 1 to 100 mTorr (0.133 to 13.3 Pa), and more preferably 35 to 90 mTorr (4.66 to 12.0 Pa).
  • Cu alloys constituting the Cu alloy film 206 include Cu—Al, Cu—Mn, Cu—Mg, Cu—Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, and Cu—. Ni, Cu—Co, Cu—Ti and the like can be mentioned. Among these, Cu—Mn and Cu—Al are preferable, and Cu—Mn is particularly preferable.
  • the concentration (content rate) of the alloy component at this time is set to a value that provides higher resistance to electromigration than pure Cu and provides an allowable resistance value.
  • the presence of the alloy component improves electromigration resistance, but the resistance value decreases, so the alloy component is controlled to an amount that does not increase the resistance value to an unacceptable value while improving electromigration resistance.
  • the value varies depending on the type of alloy component, it is preferable to set the value appropriately according to the alloy component.
  • the Mn concentration is 0.1 at. % Is sufficient, and the preferred range is 0.05 to 1 at. %.
  • the preferred range is 0.05 to 2 at. %.
  • the Cu alloy film 206 is formed by using a target made of Cu alloy to be obtained.
  • the relationship between the alloy composition of the target and the composition of the Cu alloy film to be formed is such as pressure. Since it varies depending on the film forming conditions, it is necessary to adjust the alloy composition of the target so that a desired alloy composition can be obtained under the manufacturing conditions actually employed.
  • the direct current power to the Cu alloy target is preferably 4 to 12 kW, and more preferably 6 to 10 kW.
  • an additional layer 207 is formed on the Cu alloy film 206 in preparation for the subsequent planarization process (step 5, FIG. 2E).
  • the additional layer 207 may be formed by depositing the same Cu alloy film by PVD such as iPVD following the Cu alloy film 206, or a pure Cu film may be formed by PVD or plating.
  • the same Cu alloy film as the Cu alloy film 206 is formed by using the same PVD (iPVD) apparatus as the Cu alloy film 206 is formed.
  • annealing is performed as necessary (step 6, FIG. 2F).
  • the Cu alloy film 206 is stabilized and the alloy component in the Cu alloy film 206 is moved to the upper surface of the film to suppress Cu electromigration.
  • a cap layer 209 made of a dielectric material such as SiCN is formed on the Cu wiring 208 after the CMP polishing (step 8, FIG. 2H).
  • the film formation at this time can be performed by CVD.
  • the Cu alloy film containing an alloy component whose electromigration resistance is higher than that of pure Cu and the resistance value is in an allowable range is embedded in the trench or hole by PVD, it is embedded by Cu plating.
  • PVD since PVD is low in impurities, PVD has a small increase in wiring resistance, high electromigration resistance, and a Cu alloy film having an allowable resistance value. The film can be formed with high accuracy. For this reason, it is possible to obtain Cu wiring having high electromigration resistance without generating voids or the like and suppressing increase in wiring resistance as much as possible.
  • Step 2 for forming the barrier film 204 Step 3 for forming the Ru liner film 205, Step 4 for forming the Cu alloy film 206, and Step 5 for forming the additional layer 207.
  • Step 2 for forming the barrier film 204 Step 3 for forming the Ru liner film 205, Step 4 for forming the Cu alloy film 206, and Step 5 for forming the additional layer 207.
  • Step 5 for forming the additional layer 207 Is preferably formed continuously in a vacuum without exposure to the atmosphere, but may be exposed to the air between any of these.
  • Non-Patent Document 1 a Cu alloy seed is formed on a base and then embedded by Cu plating.
  • the composition of the Cu alloy seed at this time is Cu-0.5 at% Mn and Cu-0.8 at% Mn.
  • FIG. 3A is a diagram showing the relationship between the wiring (trench) width and the Mn concentration in the wiring (Cu—Mn film) when only the wiring (trench) is made of a Cu—Mn alloy.
  • FIG. 3B is a diagram showing the relationship between the wiring width (trench) width and the Mn concentration in the wiring (Cu—Mn film) when the stacked Cu (stacked layer: height 200 nm) is also a Cu—Mn alloy. is there.
  • the Mn concentration of the Cu—Mn alloy seed in the prior art is 0.5 at. %
  • the wiring width to be embedded is smaller than 30 nm
  • about 0.1 at. % Of Mn is required to remain.
  • the relationship between the alloy composition of the target and the composition of the Cu alloy film to be formed varies depending on the film forming conditions such as pressure, and for example, film formation with good Cu fluidity is performed by iPVD. Therefore, it is known that when the pressure is increased to about 90 mTorr, the Mn concentration in the film is about half of the target concentration (see Japanese Patent Application Laid-Open No. 2008-210971), so the Cu—Mn alloy used in the iPVD apparatus As a target, the Mn concentration was 0.2 at. % Can be used.
  • FIG. 5 is a plan view showing an example of a multi-chamber type film forming system suitable for carrying out the Cu wiring forming method according to the embodiment of the present invention.
  • the film forming system 1 includes a first processing unit 2 that forms a barrier film and a Ru liner film, a second processing unit 3 that forms a pure Cu film and a Cu alloy film, and a carry-in / out unit 4.
  • a first processing unit 2 that forms a barrier film and a Ru liner film
  • a second processing unit 3 that forms a pure Cu film and a Cu alloy film
  • a carry-in / out unit 4 In order to form the Cu wiring on the wafer W, the process up to the formation of the additional layer in the above embodiment is performed.
  • the first processing unit 2 includes a first vacuum transfer chamber 11 having a heptagonal planar shape and two barrier films connected to wall portions corresponding to the four sides of the first vacuum transfer chamber 11.
  • the film forming apparatuses 12a and 12b and the two Ru liner film forming apparatuses 14a and 14b are included.
  • the barrier film forming apparatus 12a and the Ru liner film forming apparatus 14a, and the barrier film forming apparatus 12b and the Ru liner film forming apparatus 14b are arranged in line-symmetric positions.
  • Degas chambers 5a and 5b for degassing the wafer W are connected to the wall portions corresponding to the other two sides of the first vacuum transfer chamber 11, respectively. Further, the wafer W is transferred between the first vacuum transfer chamber 11 and a second vacuum transfer chamber 21 described later on the wall portion between the degas chambers 5a and 5b of the first vacuum transfer chamber 11. A delivery chamber 5 is connected.
  • the barrier film forming apparatuses 12a and 12b, the Ru liner film forming apparatuses 14a and 14b, the degas chambers 5a and 5b, and the delivery chamber 5 are connected to each side of the first vacuum transfer chamber 11 via the gate valve G. These are communicated with the first vacuum transfer chamber 11 by opening the corresponding gate valve G, and are disconnected from the first vacuum transfer chamber 11 by closing the corresponding gate valve G.
  • the inside of the first vacuum transfer chamber 11 is maintained in a predetermined vacuum atmosphere.
  • barrier film forming apparatuses 12a and 12b barrier film forming apparatuses 12a and 12b, Ru liner film forming apparatuses 14a and 14b, and a degas chamber 5a. 5b, and a first transfer mechanism 16 that loads and unloads the wafer W with respect to the delivery chamber 5 is provided.
  • the first transfer mechanism 16 is disposed substantially at the center of the first vacuum transfer chamber 11, and has a rotation / extension / contraction part 17 that can rotate and expand / contract, and a wafer is attached to the tip of the rotation / extension / contraction part 17.
  • Two support arms 18a and 18b for supporting W are provided, and these two support arms 18a and 18b are attached to the rotating / extending / contracting portion 17 so as to face opposite directions.
  • the second processing unit 3 includes a Cu alloy connected to a second vacuum transfer chamber 21 having an octagonal plan shape and walls corresponding to two opposing sides of the second vacuum transfer chamber 21.
  • Two Cu alloy film forming apparatuses 22a and 22b for forming a film and two Cu film forming apparatuses 24a and 24b for forming a pure Cu film or a Cu alloy film are provided.
  • the degas chambers 5a and 5b are respectively connected to the wall portions corresponding to the two sides of the second vacuum transfer chamber 21 on the first processing unit 2 side, and the wall portions between the degas chambers 5a and 5b are respectively connected to the wall portions.
  • the delivery chamber 5 is connected. That is, the delivery chamber 5 and the degas chambers 5 a and 5 b are both provided between the first vacuum transfer chamber 11 and the second vacuum transfer chamber 21, and the degas chambers 5 a and 5 b are arranged on both sides of the transfer chamber 5.
  • a load lock chamber 6 capable of atmospheric conveyance and vacuum conveyance is connected to the side on the carry-in / out section 4 side.
  • the Cu alloy film forming apparatuses 22a and 22b, the Cu film forming apparatuses 24a and 24b, the degas chambers 5a and 5b, and the load lock chamber 6 are connected to each side of the second vacuum transfer chamber 21 through a gate valve G. These are communicated with the second vacuum transfer chamber 21 by opening the corresponding gate valve, and are shut off from the second vacuum transfer chamber 21 by closing the corresponding gate valve G.
  • the delivery chamber 5 is connected to the second transfer chamber 21 without a gate valve.
  • the inside of the second vacuum transfer chamber 21 is maintained in a predetermined vacuum atmosphere, among which are Cu alloy film forming apparatuses 22a and 22b, Cu film forming apparatuses 24a and 24b, and a degas chamber 5a. 5b, a second transfer mechanism 26 for carrying the wafer W in and out of the load lock chamber 6 and the delivery chamber 5 is provided.
  • the second transfer mechanism 26 is disposed substantially at the center of the second vacuum transfer chamber 21, and has a rotation / extension / contraction part 27 that can rotate and extend / contract, and a wafer is attached to the tip of the rotation / extension / contraction part 27.
  • Two support arms 28a and 28b for supporting W are provided, and these two support arms 28a and 28b are attached to the rotation / extension / contraction part 27 so as to face opposite directions.
  • the loading / unloading unit 4 is provided on the opposite side to the second processing unit 3 with the load lock chamber 6 interposed therebetween, and has an atmospheric transfer chamber 31 to which the load lock chamber 6 is connected.
  • a gate valve G is provided on the wall portion between the load lock chamber 6 and the atmospheric transfer chamber 31.
  • Two connection ports 32 and 33 for connecting a carrier C that accommodates a wafer W as a substrate to be processed are provided on the wall portion of the atmospheric transfer chamber 31 that faces the wall portion to which the load lock chamber 6 is connected.
  • Each of the connection ports 32 and 33 is provided with a shutter (not shown). A wafer C containing a wafer W or an empty carrier C is directly attached to the connection ports 32 and 33, and the shutter is released at that time.
  • the air communication chamber 31 communicates with the outside air while preventing the outside air from entering.
  • An alignment chamber 34 is provided on the side surface of the atmospheric transfer chamber 31 where the wafer W is aligned.
  • an atmospheric transfer transfer mechanism 36 that loads and unloads the wafer W with respect to the carrier C and loads and unloads the wafer W with respect to the load lock chamber 6 is provided.
  • This atmospheric transfer mechanism 36 has two articulated arms, and can run on the rail 38 along the arrangement direction of the carrier C. The wafer W is placed on the hand 37 at each tip. It is loaded and transported.
  • the film forming system 1 has a control unit 40 for controlling each component of the film forming system 1.
  • the control unit 40 includes a process controller 41 composed of a microprocessor (computer) that executes control of each component, a keyboard on which an operator inputs commands to manage the film forming system 1, and a film forming system. 1, a user interface 42 including a display for visualizing and displaying the operation status of 1, a control program for realizing processing executed by the film forming system 1 under the control of the process controller 41, various data, and processing conditions And a storage unit 43 that stores a program for causing each component of the processing apparatus to execute processing, that is, a recipe. Note that the user interface 42 and the storage unit 43 are connected to the process controller 41.
  • the above recipe is stored in the storage medium 43a in the storage unit 43.
  • the storage medium may be a hard disk or a portable medium such as a CDROM, DVD, or flash memory. Moreover, you may make it transmit a recipe suitably from another apparatus via a dedicated line, for example.
  • an arbitrary recipe is called from the storage unit 43 by an instruction from the user interface 42 and is executed by the process controller 41, so that a desired value in the film forming system 1 is controlled under the control of the process controller 41. Is performed.
  • the wafer W on which a predetermined pattern having trenches and holes is formed is taken out from the carrier C by the atmospheric transfer mechanism 36 and transferred to the load lock chamber 6.
  • the wafer W in the load lock chamber 6 is taken out by the second transfer mechanism 26, and the degas chamber 5 a or 5 b is removed via the second vacuum transfer chamber 21.
  • the wafer W is degassed.
  • the wafer W in the degas chamber 5a (5b) is taken out by the first transfer mechanism 16 and loaded into the barrier film forming apparatus 12a or 12b through the first vacuum transfer chamber 11, and the barrier film as described above is formed.
  • the wafer W is taken out from the barrier film forming apparatus 12a or 12b by the first transport mechanism 16 and loaded into the Ru liner film forming apparatus 14a or 14b, and the Ru liner film as described above is formed. To do. After forming the Ru liner film, the wafer W is taken out from the Ru liner film forming apparatus 14 a or 14 b by the first transfer mechanism 16 and transferred to the delivery chamber 5. Thereafter, the wafer W is taken out by the second transfer mechanism 26 and transferred into the Cu alloy film forming apparatus 22a or 22b through the second vacuum transfer chamber 21, thereby forming the above-described Cu alloy film. Thereafter, a stacked layer is formed on the Cu alloy film.
  • the stacked layer may be formed by continuously forming the Cu alloy film in the same Cu alloy film forming apparatus 22a or 22b.
  • the wafer W is taken out from the Cu alloy film forming apparatus 22a or 22b by the second transport mechanism 26 and loaded into the Cu film forming apparatus 24a or 24b, where a pure Cu film or Cu alloy film is formed to form an additional layer. Also good.
  • the wafer W is transferred to the load lock chamber 6 and the load lock chamber 6 is returned to atmospheric pressure. Then, the wafer W on which the Cu film is formed is taken out by the transfer mechanism 36 for atmospheric transfer, and the carrier C Return to. Such a process is repeated for the number of wafers W in the carrier.
  • the barrier film, the liner film, the Cu alloy film, and the additional layer are formed in vacuum without opening to the atmosphere, so that the oxidation at the interface of each film can be prevented, and the high performance Cu wiring can be obtained.
  • the wafer W is unloaded after the Cu alloy film is formed.
  • FIG. 6 is a cross-sectional view showing an example of a Cu alloy film forming apparatus.
  • ICP Inductively Coupled Plasma
  • iPVD Inductively Coupled Plasma
  • this Cu alloy film forming apparatus 22a has a processing container 51 formed into a cylindrical shape with, for example, aluminum.
  • the processing vessel 51 is grounded, and an exhaust port 53 is provided at the bottom 52, and an exhaust pipe 54 is connected to the exhaust port 53.
  • a throttle valve 55 and a vacuum pump 56 for adjusting pressure are connected to the exhaust pipe 54 so that the inside of the processing container 51 can be evacuated.
  • a gas inlet 57 for introducing a predetermined gas into the processing container 51 is provided at the bottom 52 of the processing container 51.
  • a gas supply pipe 58 is connected to the gas inlet 57 for supplying a rare gas such as Ar gas or other necessary gas such as N 2 gas as the plasma excitation gas.
  • the gas supply source 59 is connected.
  • the gas supply pipe 58 is provided with a gas control unit 60 including a gas flow rate controller and a valve.
  • a mounting mechanism 62 for mounting a wafer W as a substrate to be processed is provided.
  • the mounting mechanism 62 includes a mounting table 63 formed in a disc shape, and a hollow cylindrical column support 64 that supports the mounting table 63 and is grounded.
  • the mounting table 63 is made of a conductive material such as an aluminum alloy, and is grounded via a support column 64.
  • a cooling jacket 65 is provided in the mounting table 63 so as to supply the refrigerant through a refrigerant channel (not shown).
  • a resistance heater 87 covered with an insulating material is embedded on the cooling jacket 65 in the mounting table 63. The resistance heater 87 is supplied with power from a power source (not shown).
  • the mounting table 63 is provided with a thermocouple (not shown), and by controlling the supply of the refrigerant to the cooling jacket 65 and the power supply to the resistance heater 87 based on the temperature detected by the thermocouple.
  • the wafer temperature can be controlled to a predetermined temperature.
  • a thin disk-shaped electrostatic chuck 66 configured by embedding an electrode 66b in a dielectric member 66a such as alumina is provided. It can be held by suction. Further, the lower portion of the support column 64 extends downward through an insertion hole 67 formed at the center of the bottom 52 of the processing vessel 51. The support column 64 can be moved up and down by an elevator mechanism (not shown), whereby the entire mounting mechanism 62 is moved up and down.
  • a bellows-like metal bellows 68 configured to be stretchable is provided so as to surround the support column 64, and the upper end of the metal bellows 68 is airtightly joined to the lower surface of the mounting table 63, and the lower end thereof is a processing container. It is airtightly joined to the upper surface of the bottom part 52 of 51, and the raising / lowering movement of the mounting mechanism 62 can be permitted while maintaining the airtightness in the processing container 51.
  • three support pins 69 are provided upright on the bottom portion 52, and are provided on the mounting table 63 so as to correspond to the support pins 69.
  • An insertion hole 70 is formed. Therefore, when the mounting table 63 is lowered, the wafer W is received by the upper end portion of the support pin 69 penetrating the pin insertion hole 70, and between the transfer arm (not shown) that enters the wafer W from the outside. Can be transferred.
  • a carry-out / inlet 71 is provided in the lower side wall of the processing container 51 in order to allow the transfer arm to enter, and the carry-out / inlet 71 is provided with a gate valve G that can be opened and closed. On the opposite side of the gate valve G, the aforementioned second vacuum transfer chamber 21 is provided.
  • a chuck power source 73 is connected to the electrode 66b of the electrostatic chuck 66 through a power supply line 72. By applying a DC voltage to the electrode 66b from the chuck power source 73, the wafer W is brought into a static state. Adsorbed and held by electric power.
  • a bias high frequency power source 74 is connected to the power supply line 72, and bias high frequency power is supplied to the electrode 66 b of the electrostatic chuck 66 via the power supply line 72, and bias power is applied to the wafer W. It has come to be.
  • the frequency of the high-frequency power is preferably 400 kHz to 60 MHz, for example, 13.56 MHz.
  • a transmission plate 76 that is permeable to high frequencies made of a dielectric material such as alumina, for example, is hermetically provided on the ceiling portion of the processing vessel 51 via a seal member 77 such as an O-ring.
  • a plasma generation source 78 for generating a plasma by generating a rare gas, for example, Ar gas, as a plasma excitation gas in the processing space S in the processing vessel 51 in the upper portion of the transmission plate 76 is provided.
  • a rare gas for example, Ar gas
  • other rare gases such as He, Ne, Kr, etc. may be used instead of Ar.
  • the plasma generation source 78 has an induction coil 80 provided so as to correspond to the transmission plate 76.
  • an induction coil 80 for example, a 13.56 MHz high frequency power source 81 for plasma generation is connected, and the transmission is performed. High frequency power is introduced into the processing space S via the plate 76 to form an induced electric field.
  • a baffle plate 82 made of, for example, aluminum is provided to diffuse the introduced high-frequency power.
  • a target 83 made of an annular (a truncated cone-shell) Cu alloy is provided so as to surround the upper side of the processing space S, for example, with a cross section inclined inward.
  • the target 83 is connected to a target variable voltage DC power supply 84 for applying DC power for attracting Ar ions.
  • An AC power supply may be used instead of the DC power supply.
  • the target 83 is formed of the same kind of Cu alloy as the Cu alloy film.
  • a magnet 85 for applying a magnetic field to the target 83 is provided on the outer peripheral side of the target 83.
  • the target 83 is sputtered by Ar ions in the plasma as Cu metal atoms or metal atomic groups, and is largely ionized when passing through the plasma.
  • a cylindrical protective cover member 86 made of, for example, aluminum or copper is provided below the target 83 so as to surround the processing space S.
  • the protective cover member 86 is grounded, and a lower portion thereof is bent inward and is positioned in the vicinity of the side portion of the mounting table 63. Therefore, the inner end of the protective cover member 86 is provided so as to surround the outer peripheral side of the mounting table 63.
  • each component of the Cu alloy film forming apparatus is also controlled by the control unit 40 described above.
  • the wafer W is loaded into the processing container 51 shown in FIG. 6, and the wafer W is placed on the mounting table 63 and adsorbed by the electrostatic chuck 66.
  • the following operations are performed under the control of the control unit 40.
  • the temperature of the mounting table 63 is controlled by controlling the supply of the refrigerant to the cooling jacket 65 and the power supply to the resistance heater 87 based on the temperature detected by a thermocouple (not shown).
  • the throttle valve 55 is controlled to control the inside of the processing container 51. Is maintained at a predetermined degree of vacuum.
  • DC power is applied from the variable DC power source 84 to the target 83, and further, high frequency power (plasma power) is supplied from the high frequency power source 81 of the plasma generation source 78 to the induction coil 80.
  • predetermined high frequency power for bias is supplied from the high frequency power source 74 for bias to the electrode 66 b of the electrostatic chuck 66.
  • argon plasma is formed by the high-frequency power supplied to the induction coil 80 to generate argon ions, and these ions are attracted to the DC voltage applied to the target 83 and are attracted to the target 83.
  • the target 83 is sputtered and particles are released. At this time, the amount of particles emitted is optimally controlled by the DC voltage applied to the target 83.
  • the particles from the sputtered target 83 are ionized when passing through the plasma.
  • the particles emitted from the target 83 are scattered in a downward direction in a state where ionized particles and electrically neutral atoms are mixed.
  • the ionization rate at this time is controlled by the high frequency power supplied from the high frequency power supply 81.
  • the ions When ions enter the region of an ion sheath having a thickness of about several millimeters formed on the surface of the wafer W by the high frequency power for bias applied from the high frequency power source 74 to the electrode 66b of the electrostatic chuck 66, the ions are strongly directed.
  • the Cu alloy film is formed by being attracted so as to accelerate toward the wafer W and deposited on the wafer W.
  • the wafer temperature is set high (65 to 350 ° C.), and the bias power applied to the electrode 66b of the electrostatic chuck 66 from the bias high-frequency power source 74 is adjusted to form a Cu alloy film and Ar.
  • the etching to improve the fluidity of the Cu alloy, it is possible to embed the Cu alloy with a good embedding property even in the case of a trench or hole having a narrow opening.
  • the pressure in the processing vessel 51 is preferably 1 to 100 mTorr (0.133 to 13.3 Pa), more preferably 35 to 90 mTorr (4.66 to 12.0 Pa).
  • the DC power to the target is preferably 4 to 12 kW, more preferably 6 to 10 kW.
  • the wafer temperature can be set low ( ⁇ 50 to 0 ° C.) and the pressure in the processing vessel 51 can be lowered to form a film. Thereby, the film formation rate can be increased.
  • the wafer temperature can be set low ( ⁇ 50 to 0 ° C.) and the pressure in the processing vessel 51 can be lowered to form a film.
  • the film formation rate can be increased.
  • not only iPVD but also normal PVD such as normal sputtering and ion plating can be used.
  • ⁇ Cu film deposition system> As the Cu film forming apparatus 24a (24b), an apparatus similar to the Cu alloy film forming apparatus 22a (22b) shown in FIG. 6 can be basically used. At this time, the material of the target 83 may be appropriately adjusted according to the film to be obtained. Further, when emphasis is not placed on embedding, not only iPVD but also normal PVD such as normal sputtering and ion plating can be used.
  • the barrier film forming apparatus 12a (12b) can be formed by plasma sputtering using a film forming apparatus having the same configuration as the film forming apparatus shown in FIG. Further, the present invention is not limited to plasma sputtering, but may be other PVD such as normal sputtering, ion plating, CVD (Chemical Vapor Deposition), ALD (Atomic Layer Deposition), or CVD or ALD using plasma. A membrane can also be formed. From the viewpoint of reducing impurities, PVD is preferred.
  • FIG. 7 is a cross-sectional view showing an example of a Ru liner film forming apparatus, in which a Ru film is formed by thermal CVD.
  • this Ru liner film forming apparatus 14a (14b) has a processing container 101 formed in a cylindrical body with, for example, aluminum. Inside the processing vessel 101, a mounting table 102 made of ceramics such as AlN for mounting the wafer W is disposed, and a heater 103 is provided in the mounting table 102. The heater 103 generates heat when supplied with power from a heater power source (not shown).
  • a shower head 104 for introducing a processing gas for forming a Ru film, a purge gas or the like into the processing vessel 101 in a shower shape is provided so as to face the mounting table 102.
  • the shower head 104 has a gas introduction port 105 in the upper portion thereof, a gas diffusion space 106 is formed in the interior thereof, and a number of gas discharge holes 107 are formed in the bottom surface thereof.
  • a gas supply pipe 108 is connected to the gas inlet 105, and a gas supply source 109 for supplying a processing gas, a purge gas, and the like for forming a Ru film is connected to the gas supply pipe 108.
  • the gas supply pipe 108 is provided with a gas control unit 110 including a gas flow rate controller and a valve.
  • ruthenium carbonyl Ru 3 (CO) 12
  • This ruthenium carbonyl can form a Ru film by thermal decomposition.
  • An exhaust port 111 is provided at the bottom of the processing vessel 101, and an exhaust pipe 112 is connected to the exhaust port 111.
  • a throttle valve 113 and a vacuum pump 114 for adjusting pressure are connected to the exhaust pipe 112, and the inside of the processing vessel 101 can be evacuated.
  • three wafer support pins 116 for wafer transfer are provided so as to be able to project and retract with respect to the surface of the mounting table 102, and these wafer support pins 116 are fixed to the support plate 117.
  • the wafer support pins 116 are moved up and down via the support plate 117 by moving the rod 119 up and down by a drive mechanism 118 such as an air cylinder.
  • Reference numeral 120 denotes a bellows.
  • a wafer loading / unloading port 121 is formed on the side wall of the processing chamber 101, and the wafer W is loaded into and unloaded from the first vacuum transfer chamber 11 with the gate valve G opened.
  • the gate valve G is opened, the wafer W is placed on the mounting table 102, the gate valve G is closed, and the inside of the processing chamber 101 is vacuum pumped 114. While the wafer W is heated to a predetermined temperature from the heater 103 via the mounting table 102 while the inside of the processing vessel 101 is adjusted to a predetermined pressure by evacuating the gas from the gas supply source 109 to the gas supply pipe 108 and the shower head 104.
  • a processing gas such as ruthenium carbonyl (Ru 3 (CO) 12 ) gas is introduced into the processing vessel 101 through As a result, the reaction of the processing gas proceeds on the wafer W, and a Ru film is formed on the surface of the wafer W.
  • Ru 3 (CO) 12 ruthenium carbonyl
  • Ru film other film forming materials other than ruthenium carbonyl, for example, a ruthenium pentadienyl compound as described above can be used together with a decomposition gas such as O 2 gas.
  • the Ru film can be formed by PVD.
  • the above-described film forming system 1 can perform formation of additional layers in the above embodiment, but the subsequent annealing process, CMP process, and cap layer film forming process are performed after the wafer W is unloaded from the film forming system 1.
  • an annealing apparatus, a CMP apparatus, and a cap layer film forming apparatus can be used. These apparatuses may have a configuration that is usually used.
  • the film forming system is not limited to the type as shown in FIG. 5, but may be a type in which all film forming apparatuses are connected to one transfer apparatus.
  • the film forming system instead of the multi-chamber type system as shown in FIG. 5, only a part of the barrier film, Ru liner film, pure Cu film (pure Cu seed film), and Cu alloy film is formed by the same film forming system.
  • the film may be formed through exposure to the atmosphere with an apparatus provided with the remaining part, or all may be formed through exposure to the atmosphere with a separate apparatus.
  • the present invention can be applied to a case having only a trench or a case having only a hole. Needless to say. Further, the present invention can be applied to embedding in devices having various structures such as a single damascene structure, a double damascene structure, and a three-dimensional mounting structure.
  • the semiconductor wafer is described as an example of the substrate to be processed.
  • the semiconductor wafer includes not only silicon but also compound semiconductors such as GaAs, SiC, and GaN, and is not limited to the semiconductor wafer.
  • the present invention can also be applied to glass substrates, ceramic substrates, and the like used in FPDs (flat panel displays) such as liquid crystal display devices.

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Abstract

Disclosed is a method for forming Cu wiring in which the Cu wiring is formed in a recess of a predetermined pattern formed on a substrate. This method for forming Cu wiring includes: a step for forming a barrier film on at least the surface of the recess (step 2); a step for forming, by PVD, a Cu alloy film containing an alloy component in an amount such that the electromigration resistance is higher than that of pure Cu and the resistance value is within an allowable range, and embedding the Cu alloy film in the recess having a barrier film formed on the surface (step 4); a step for forming a build-up layer on the Cu alloy film (step 5); and a step for polishing the entire surface by CMP and forming the Cu wiring in the recess (step 7).

Description

Cu配線の形成方法およびコンピュータ読み取り可能な記憶媒体Cu wiring forming method and computer-readable storage medium

 本発明は、基板に形成されたトレンチやホールのような凹部にCu配線を形成するCu配線の形成方法およびコンピュータ読み取り可能な記憶媒体に関する。 The present invention relates to a Cu wiring forming method for forming a Cu wiring in a recess such as a trench or a hole formed in a substrate, and a computer-readable storage medium.

 半導体デバイスの製造においては、半導体ウエハに成膜処理やエッチング処理等の各種の処理を繰り返し行って所望のデバイスを製造するが、近時、半導体デバイスの高速化、配線パターンの微細化、高集積化の要求に対応して、配線の低抵抗化(導電性向上)およびエレクトロマイグレーション耐性の向上が求められている。 In the manufacture of semiconductor devices, various processes such as film formation and etching are repeatedly performed on a semiconductor wafer to manufacture a desired device. Recently, however, the speed of semiconductor devices, the miniaturization of wiring patterns, and the high integration Corresponding to the demand for the reduction of wiring, there is a demand for lower wiring resistance (improvement of conductivity) and improvement of electromigration resistance.

 このような点に対応して、配線材料にアルミニウム(Al)やタングステン(W)よりも導電性が高く(抵抗が低く)かつエレクトロマイグレーション耐性に優れている銅(Cu)が用いられるようになってきている。 Corresponding to these points, copper (Cu) having higher conductivity (lower resistance) and better electromigration resistance than aluminum (Al) and tungsten (W) is used as the wiring material. It is coming.

 Cu配線の形成方法としては、トレンチやホールが形成された層間絶縁膜全体にタンタル金属(Ta)、チタン(Ti)、タンタル窒化膜(TaN)、チタン窒化膜(TiN)などからなるバリア膜をPVDであるプラズマスパッタで形成し、バリア膜の上に同じくプラズマスパッタによりCuシード膜を形成し、さらにその上にCuめっきを施してトレンチやホールを完全に埋め込み、ウエハ表面の余分な銅薄膜およびバリア膜をCMP(Chemical Mechanical Polishing)処理により研磨処理して取り除く技術が提案されている(例えば特許文献1)。 As a method of forming Cu wiring, a barrier film made of tantalum metal (Ta), titanium (Ti), tantalum nitride film (TaN), titanium nitride film (TiN), etc. is formed on the entire interlayer insulating film in which trenches and holes are formed. It is formed by PVD plasma sputtering, and a Cu seed film is also formed on the barrier film by plasma sputtering. Further, Cu plating is applied on the barrier film to completely fill trenches and holes. A technique has been proposed in which the barrier film is removed by polishing by CMP (Chemical Mechanical Polishing) (for example, Patent Document 1).

 しかし、半導体デバイスのデザインルールが一層微細化しており、これによる電流密度の上昇にともなって、配線材料としてCuを用いてもエレクトロマイグレーション耐性が十分ではなくなってきている。このため、エレクトロマイグレーション耐性を向上させて、さらなる配線の信頼性向上を図ることを目的とする技術として、Cuシード膜の代わりにCu合金(Cu-Al、Cu-Mn、Cu-Mg、Cu-Ag、Cu-Sn、Cu-Pb、Cu-Zn、Cu-Pt、Cu-Au、Cu-Ni、Cu-Coなど)をシード層に用いた配線形成プロセスが提案されている(非特許文献1等)。 However, the design rules of semiconductor devices are further miniaturized, and with this increase in current density, even if Cu is used as a wiring material, electromigration resistance has become insufficient. For this reason, as a technique for improving electromigration resistance and further improving the reliability of wiring, a Cu alloy (Cu—Al, Cu—Mn, Cu—Mg, Cu— A wiring formation process using a seed layer of Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, Cu—Ni, Cu—Co, etc. has been proposed (Non-patent Document 1). etc).

特開2006-148075号公報JP 2006-148075 A

Nogami et. al. IEDM2010 pp764-767Nogami et. Al. IEDM2010 pp764-767

 しかしながら、上述したような半導体デバイスのデザインルールの益々の微細化にともない、トレンチの幅やホール径が数十nmとなっており、このような狭いトレンチやホール等の凹部内に、特許文献1のように、プラズマスパッタリングでバリア膜やシード膜を形成した後にCuめっきによりトレンチやホールを埋め込む場合には、埋め込み性が十分ではなくボイドが発生する等の問題が生ずる。 However, as the design rules of semiconductor devices as described above are further miniaturized, the width of the trench and the hole diameter are several tens of nanometers. As described above, when a trench or hole is buried by Cu plating after a barrier film or seed film is formed by plasma sputtering, problems such as insufficient embeddability and generation of voids occur.

 また、上記非特許文献1の技術では、エレクトロマイグレーション耐性の向上を図ることはできるものの、Cuめっきを用いるため、本質的に上記埋め込み性の問題は解決されない。 In addition, although the technique of Non-Patent Document 1 can improve electromigration resistance, Cu embedding is used, and thus the problem of embeddability is not essentially solved.

 さらに、合金成分およびCuめっき中の不純物が配線中に含まれることとなり、配線抵抗が高くなってしまう場合も生じる。 Furthermore, the alloy component and impurities in the Cu plating are contained in the wiring, which may increase the wiring resistance.

 本発明はかかる事情に鑑みてなされたものであって、トレンチやホールのような凹部にCu配線を形成する際に、ボイド等を発生させずにかつ配線抵抗の上昇を極力抑えて、エレクトロマイグレーション耐性の高いCu配線を得ることができるCu配線の形成方法およびそのCu配線の形成方法をCu配線形成システムに実行させるプログラムを記憶したコンピュータ読み取り可能な記憶媒体を提供することを課題とする。 The present invention has been made in view of such circumstances, and when forming a Cu wiring in a recess such as a trench or a hole, an electromigration is prevented without generating a void or the like and suppressing an increase in wiring resistance as much as possible. It is an object of the present invention to provide a Cu wiring forming method capable of obtaining a highly resistant Cu wiring and a computer-readable storage medium storing a program for causing a Cu wiring forming system to execute the Cu wiring forming method.

 上記課題を解決するため、本発明の第1の観点は、基板に形成された所定パターンの凹部内にCu配線を形成するCu配線の形成方法であって、少なくとも前記凹部の表面にバリア膜を形成する工程と、エレクトロマイグレーション耐性が純Cuよりも高く、かつ抵抗値が許容範囲となる程度の合金成分を含有するCu合金膜をPVDにより形成し、前記表面にバリア膜が形成された前記凹部内を前記Cu合金膜により埋め込む工程と、前記Cu合金膜の上に積み増し層を形成する工程と、CMPにより全面を研磨して前記凹部内にCu配線を形成する工程とを有するCu配線の形成方法を提供する。 In order to solve the above-mentioned problems, a first aspect of the present invention is a Cu wiring forming method for forming a Cu wiring in a recess having a predetermined pattern formed on a substrate, wherein a barrier film is formed on at least the surface of the recess. A step of forming, and a concave portion in which a Cu alloy film containing an alloy component having an electromigration resistance higher than that of pure Cu and having a resistance value in an allowable range is formed by PVD, and a barrier film is formed on the surface Cu wiring formation comprising: filling the inside with the Cu alloy film; forming a stacked layer on the Cu alloy film; and polishing the entire surface by CMP to form a Cu wiring in the recess. Provide a method.

 本発明において、前記Cu合金膜の合金成分の濃度が所定値となるように、成膜条件に応じてPVDを行う際のターゲットの合金成分の濃度を決定することが好ましい。前記バリア膜を形成した後、前記Cu合金膜を形成する前に、Ru膜を形成する工程をさらに有することが好ましい。前記Ru膜は、CVDにより形成されることが好ましい。 In the present invention, it is preferable to determine the concentration of the alloy component of the target when performing PVD according to the film forming conditions so that the concentration of the alloy component of the Cu alloy film becomes a predetermined value. It is preferable to further include a step of forming a Ru film after forming the barrier film and before forming the Cu alloy film. The Ru film is preferably formed by CVD.

 前記Cu合金膜の形成は、基板が収容された処理容器内にプラズマ生成ガスによりプラズマを生成し、得ようとするCu合金膜と同じCu合金からなるターゲットから粒子を飛翔させて、粒子を前記プラズマ中でイオン化させ、前記基板にバイアス電力を印加してイオンを基板上に引きこむ装置により行われることが好ましい。 In the formation of the Cu alloy film, plasma is generated by a plasma generation gas in a processing container in which a substrate is accommodated, and particles are ejected from a target made of the same Cu alloy as the Cu alloy film to be obtained. It is preferably performed by a device that ionizes in plasma and applies a bias power to the substrate to draw ions onto the substrate.

 前記積み増し層の形成は、PVDによりCu合金膜または純Cu膜を形成することにより行うことができる。また、前記積み増し層の形成は、前記Cu合金膜を形成した後、同じ装置により同じCu合金を形成することにより行われることが好ましい。 The formation of the additional layer can be performed by forming a Cu alloy film or a pure Cu film by PVD. Moreover, it is preferable that the formation of the additional layer is performed by forming the same Cu alloy with the same apparatus after forming the Cu alloy film.

 前記Cu合金膜を構成するCu合金は、Cu-Al、Cu-Mn、Cu-Mg、Cu-Ag、Cu-Sn、Cu-Pb、Cu-Zn、Cu-Pt、Cu-Au、Cu-Ni、Cu-Co、およびCu-Tiから選択されるものを用いることができる。この中でもCu-MnおよびCu-Alが好ましく、特にCu-Mnが好ましい。 The Cu alloy constituting the Cu alloy film is Cu—Al, Cu—Mn, Cu—Mg, Cu—Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, Cu—Ni. , Cu—Co, and Cu—Ti can be used. Among these, Cu—Mn and Cu—Al are preferable, and Cu—Mn is particularly preferable.

 前記バリア膜は、Ti膜、TiN膜、Ta膜、TaN膜、Ta/TaNの2層膜、TaCN膜、W膜、WN膜、WCN膜、Zr膜、ZrN膜、V膜、VN膜、Nb膜、NbN膜からなる群から選択されるものを用いることができる。 The barrier film is a Ti film, TiN film, Ta film, TaN film, Ta / TaN two-layer film, TaCN film, W film, WN film, WCN film, Zr film, ZrN film, V film, VN film, Nb Those selected from the group consisting of a film and an NbN film can be used.

 本発明の第2の観点は、コンピュータ上で動作し、Cu配線形成システムを制御するためのプログラムが記憶されたコンピュータ読み取り可能な記憶媒体であって、前記プログラムは、実行時に、上記第1の観点に係るCu配線の形成方法が行われるように、コンピュータに前記Cu配線形成システムを制御させるコンピュータ読み取り可能な記憶媒体を提供する。 According to a second aspect of the present invention, there is provided a computer-readable storage medium that operates on a computer and stores a program for controlling a Cu wiring forming system. Provided is a computer-readable storage medium that allows a computer to control the Cu wiring forming system so that the Cu wiring forming method according to the aspect is performed.

 本発明によれば、エレクトロマイグレーション耐性が純Cuよりも高く、かつ抵抗値が許容範囲となる程度の合金成分を含有するCu合金膜をPVDにより形成して凹部内にCu合金膜を埋め込むので、Cuめっきにより埋め込む場合のようなボイドの発生を防止することができ、また、PVDは不純物が少ないので、配線抵抗の上昇が少なく、かつエレクトロマイグレーション耐性が高く、かつ許容される抵抗値を有する組成のCu合金膜を高精度で成膜することができる。このため、ボイド等を発生させずにかつ配線抵抗の上昇を極力抑えて、エレクトロマイグレーション耐性の高いCu配線を得ることができる。 According to the present invention, a Cu alloy film containing an alloy component having an electromigration resistance higher than that of pure Cu and a resistance value in an allowable range is formed by PVD, and the Cu alloy film is embedded in the recess. Generation of voids as in the case of embedding by Cu plating can be prevented, and PVD has few impurities, so there is little increase in wiring resistance, high electromigration resistance, and an acceptable resistance value. The Cu alloy film can be formed with high accuracy. For this reason, it is possible to obtain Cu wiring having high electromigration resistance without generating voids or the like and suppressing increase in wiring resistance as much as possible.

本発明の一実施形態に係るCu配線の形成方法を示すフローチャートである。It is a flowchart which shows the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 本発明の一実施形態に係るCu配線の形成方法を説明するための工程断面図である。It is process sectional drawing for demonstrating the formation method of Cu wiring which concerns on one Embodiment of this invention. 配線内のみをCu-Mn合金とした場合における、配線幅と配線中のMn濃度との関係を示す図である。It is a figure which shows the relationship between wiring width and Mn density | concentration in wiring when only the inside of wiring is made into a Cu-Mn alloy. 積み増しCuもCu-Mn合金とした場合における、配線幅と配線中のMn濃度との関係を示す図である。It is a figure which shows the relationship between wiring width | variety and Mn density | concentration in a wiring in case addition Cu is also made into Cu-Mn alloy. Cu-Mn合金ターゲット(Mn0.2at.%)を用いて、20nm幅の配線の埋め込み実験を行った際における埋め込み状態を示すSEM写真である。It is a SEM photograph which shows the embedding state at the time of performing the embedding experiment of the wiring of 20 nm width using a Cu-Mn alloy target (Mn0.2at.%). 本発明の実施形態に係るCu配線の形成方法の実施に好適なマルチチャンバタイプの成膜システムの一例を示す平面図である。It is a top view which shows an example of the multi-chamber type film-forming system suitable for implementation of the formation method of Cu wiring concerning the embodiment of the present invention. 図5の成膜システムに搭載された、Cu合金膜を形成するためのCu合金膜成膜装置を示す断面図である。It is sectional drawing which shows the Cu alloy film film-forming apparatus for forming Cu alloy film mounted in the film-forming system of FIG. 図5の成膜システムに搭載された、Ruライナー膜を形成するためのRu膜成膜装置を示す断面図である。FIG. 6 is a cross-sectional view showing a Ru film forming apparatus for forming a Ru liner film mounted in the film forming system of FIG. 5.

 以下、添付図面を参照して本発明の実施形態について具体的に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

<Cu配線の形成方法の一実施形態>
 まず、Cu配線の形成方法の一実施形態について図1のフローチャートおよび図2Aから図2Hの工程断面図を参照して説明する。
<One Embodiment of Forming Method of Cu Wiring>
First, an embodiment of a method for forming a Cu wiring will be described with reference to the flowchart of FIG. 1 and the process cross-sectional views of FIGS. 2A to 2H.

 本実施形態では、まず、下部構造201(詳細は省略)の上にSiO膜、Low-k膜(SiCO、SiCOH等)等の層間絶縁膜202を有し、そこにトレンチ203および下層配線への接続のためのビア(図示せず)が所定パターンで形成された半導体ウエハ(以下、単にウエハと記す)Wを準備する(ステップ1、図2A)。このようなウエハWとしては、DegasプロセスやPre-Cleanプロセスによって、絶縁膜表面の水分やエッチング/アッシング時の残渣を除去したものであることが好ましい。 In this embodiment, first, an interlayer insulating film 202 such as a SiO 2 film or a low-k film (SiCO, SiCOH, etc.) is provided on a lower structure 201 (details are omitted), and a trench 203 and a lower layer wiring are provided there. A semiconductor wafer (hereinafter, simply referred to as a wafer) W in which vias (not shown) for connection are formed in a predetermined pattern is prepared (step 1, FIG. 2A). Such a wafer W is preferably one obtained by removing moisture on the insulating film surface and residues during etching / ashing by a Degas process or a Pre-Clean process.

 次に、トレンチ203およびビアの表面を含む全面にCuを遮蔽(バリア)してCuの拡散を抑制するバリア膜204を成膜する(ステップ2、図2B)。 Next, a barrier film 204 is formed by shielding Cu (barrier) over the entire surface including the surfaces of the trench 203 and via (step 2, FIG. 2B).

 バリア膜204としては、Cuに対して高いバリア性を有し、低抵抗を有するものが好ましく、Ti膜、TiN膜、Ta膜、TaN膜、Ta/TaNの2層膜を好適に用いることができる。また、TaCN膜、W膜、WN膜、WCN膜、Zr膜、ZrN膜、V膜、VN膜、Nb膜、NbN膜等を用いることもできる。Cu配線はトレンチまたはホール内に埋め込むCuの体積が大きくなるほど低抵抗になるので、バリア膜は非常に薄く形成することが好ましく、そのような観点からその厚さは1~20nmが好ましい。より好ましくは1~10nmである。バリア膜は、イオン化PVD(Ionized physical vapor deposition;iPVD)、例えばプラズマスパッタにより成膜することができる。また、通常のスパッタ、イオンプレーティング等の他のPVDで成膜することもでき、CVDやALD、プラズマを用いたCVDやALDで成膜することもできる。 The barrier film 204 preferably has a high barrier property against Cu and low resistance, and a Ti film, a TiN film, a Ta film, a TaN film, and a Ta / TaN two-layer film are preferably used. it can. A TaCN film, W film, WN film, WCN film, Zr film, ZrN film, V film, VN film, Nb film, NbN film, or the like can also be used. Since the Cu wiring has a lower resistance as the volume of Cu embedded in the trench or hole increases, the barrier film is preferably formed very thin. From such a viewpoint, the thickness is preferably 1 to 20 nm. More preferably, it is 1 to 10 nm. The barrier film can be formed by ionized PVD (Ionized physical vapor deposition; iPVD), for example, plasma sputtering. Further, it can be formed by other PVD such as normal sputtering, ion plating, etc., and can also be formed by CVD, ALD, or CVD or ALD using plasma.

 次いで、バリア膜204の上にRuライナー膜205を成膜する(ステップ3、図2C)。Ruライナー膜は、埋め込むCuの体積を大きくして配線を低抵抗にする観点から、例えば1~5nmと薄く形成することが好ましい。 Next, a Ru liner film 205 is formed on the barrier film 204 (step 3, FIG. 2C). The Ru liner film is preferably formed as thin as 1 to 5 nm, for example, from the viewpoint of increasing the volume of Cu to be embedded and reducing the resistance of the wiring.

 RuはCuに対する濡れ性が高いため、Cuの下地にRuライナー膜を形成することにより、次のiPVDによるCu膜形成の際に、良好なCuの移動性を確保することができ、トレンチやホールの間口を塞ぐオーバーハングを生じ難くすることができる。このため、微細なトレンチまたはホールにもボイドを発生させずに確実にCuを埋め込むことができる。 Since Ru has high wettability with respect to Cu, by forming a Ru liner film on the base of Cu, it is possible to ensure good Cu mobility when forming a Cu film by the next iPVD. It is possible to make it difficult to generate an overhang that closes the opening. For this reason, Cu can be reliably embedded without generating voids even in fine trenches or holes.

 Ruライナー膜は、ルテニウムカルボニル(Ru(CO)12)を成膜原料として用いて熱CVDにより好適に形成することができる。これにより、高純度で薄いRu膜を高ステップカバレッジで成膜することができる。このときの成膜条件は、例えば処理容器内の圧力が1.3~66.5Paの範囲であり、成膜温度(ウエハ温度)が150~250℃の範囲である。Ruライナー膜205は、ルテニウムカルボニル以外の他の成膜原料、例えば(シクロペンタジエニル)(2,4-ジメチルペンタジエニル)ルテニウム、ビス(シクロペンタジエニル)(2,4-メチルペンタジエニル)ルテニウム、(2,4-ジメチルペンタジエニル)(エチルシクロペンタジエニル)ルテニウム、ビス(2,4-メチルペンタジエニル)(エチルシクロペンタジエニル)ルテニウムのようなルテニウムのペンタジエニル化合物を用いたCVDやPVDで成膜することもできる。 The Ru liner film can be suitably formed by thermal CVD using ruthenium carbonyl (Ru 3 (CO) 12 ) as a film forming material. Thereby, a high-purity and thin Ru film can be formed with high step coverage. The film forming conditions at this time are, for example, a pressure in the processing vessel in the range of 1.3 to 66.5 Pa, and a film forming temperature (wafer temperature) in the range of 150 to 250 ° C. The Ru liner film 205 is a film forming material other than ruthenium carbonyl, such as (cyclopentadienyl) (2,4-dimethylpentadienyl) ruthenium, bis (cyclopentadienyl) (2,4-methylpentadiene). Ruthenium pentadienyl compounds such as (enyl) ruthenium, (2,4-dimethylpentadienyl) (ethylcyclopentadienyl) ruthenium, bis (2,4-methylpentadienyl) (ethylcyclopentadienyl) ruthenium The film can also be formed by the CVD or PVD used.

 なお、トレンチやビアの間口が広く、オーバーハングが生じにくい場合等には、必ずしもRuライナー膜205を形成する必要はなく、バリア膜の上に直接Cu膜を形成してもよい。 In addition, when the opening of a trench or via is wide and it is difficult for overhang to occur, the Ru liner film 205 is not necessarily formed, and a Cu film may be formed directly on the barrier film.

 次いで、PVDにより低純度のCu合金からなるCu合金膜206を形成し、トレンチ203およびビア(図示せず)をほぼ完全に埋め込む(ステップ4、図2D)。この際の成膜は、iPVD、例えばプラズマスパッタを用いることが好ましい。 Next, a Cu alloy film 206 made of a low purity Cu alloy is formed by PVD, and the trench 203 and a via (not shown) are almost completely embedded (step 4, FIG. 2D). In this case, it is preferable to use iPVD, for example, plasma sputtering.

 通常のPVD成膜の場合には、Cuの凝集により、トレンチやホールの間口を塞ぐオーバーハングが生じやすいが、iPVDを用い、ウエハに印加するバイアスパワーを調整して、Cuイオンの成膜作用とプラズマ生成ガスのイオン(Arイオン)によるエッチング作用とを制御することにより、Cuを移動させてオーバーハングの生成を抑制することができ、狭い開口のトレンチやホールであっても良好な埋め込み性を得ることができる。このとき、Cuの流動性を持たせて良好な埋め込み性を得る観点からはCuがマイグレートする高温プロセス(65~350℃)が好ましい。また、上述したように、Cu合金膜206の下地にCuに対する濡れ性が高いRuライナー膜205を設けることにより、Ruライナー膜上でCuが凝集せず流動するので、微細な凹部においてもオーバーハングの生成を抑制することができ、ボイドを発生させずに確実にCuを埋め込むことができる。 In the case of normal PVD film formation, Cu flocculation tends to cause an overhang that blocks the opening of trenches and holes. However, using iPVD, the bias power applied to the wafer is adjusted to form a film of Cu ions. And the etching action by plasma generated gas ions (Ar ions), Cu can be moved to suppress the generation of overhangs, and even a narrow opening trench or hole can be embedded well. Can be obtained. At this time, a high temperature process (65 to 350 ° C.) in which Cu migrates is preferable from the viewpoint of obtaining good embeddability by imparting fluidity of Cu. Further, as described above, by providing the Ru liner film 205 having high wettability to Cu on the base of the Cu alloy film 206, Cu flows on the Ru liner film without agglomeration. Generation can be suppressed, and Cu can be surely embedded without generating voids.

 なお、トレンチやホールの開口幅が大きい場合等、オーバーハングが生成し難い場合には、Cuがマイグレートしない低温プロセス(-50~0℃)により、高速で成膜することができる。 In addition, when it is difficult to generate an overhang such as when the opening width of a trench or a hole is large, the film can be formed at a high speed by a low temperature process (−50 to 0 ° C.) in which Cu does not migrate.

 また、Cu膜成膜時における処理容器内の圧力(プロセス圧力)は、1~100mTorr(0.133~13.3Pa)が好ましく、35~90mTorr(4.66~12.0Pa)がより好ましい。 In addition, the pressure (process pressure) in the processing container at the time of forming the Cu film is preferably 1 to 100 mTorr (0.133 to 13.3 Pa), and more preferably 35 to 90 mTorr (4.66 to 12.0 Pa).

 Cu合金膜206を構成するCu合金としては、Cu-Al、Cu-Mn、Cu-Mg、Cu-Ag、Cu-Sn、Cu-Pb、Cu-Zn、Cu-Pt、Cu-Au、Cu-Ni、Cu-Co、Cu-Tiなどを挙げることができる。この中では、Cu-Mn、Cu-Alが好適であり、特にCu-Mnが好適である。 Cu alloys constituting the Cu alloy film 206 include Cu—Al, Cu—Mn, Cu—Mg, Cu—Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, and Cu—. Ni, Cu—Co, Cu—Ti and the like can be mentioned. Among these, Cu—Mn and Cu—Al are preferable, and Cu—Mn is particularly preferable.

 このときの合金成分の濃度(含有率)は、純Cuよりもエレクトロマイグレーション耐性が高くなり、かつ許容される抵抗値が得られる値とされる。つまり、合金成分が存在することによりエレクトロマイグレーション耐性が向上するが、抵抗値は低下するため、合金成分はエレクトロマイグレーション耐性の向上を図りつつ、抵抗値を許容されない値まで上昇させない量に制御される。ただし、その値は合金成分の種類によって異なるから、合金成分に応じて適宜設定することが好ましい。例えば、Cu-Mnであれば、Mn濃度は0.1at.%程度で十分であり、好ましい範囲は0.05~1at.%である。Cu-Al合金であれば、好ましい範囲は0.05~2at.%である。また、Cu合金膜206は、得ようとするCu合金製のターゲットを用いて成膜するが、その際のターゲットの合金組成と成膜されるCu合金膜の組成との関係は、圧力等の成膜条件により変動するから、実際に採用される製造条件において所望の合金組成が得られるようにターゲットの合金組成を調整する必要がある。なお、Cu合金ターゲットへの直流電力は4~12kWであることが好ましく、6~10kWがより好ましい。 The concentration (content rate) of the alloy component at this time is set to a value that provides higher resistance to electromigration than pure Cu and provides an allowable resistance value. In other words, the presence of the alloy component improves electromigration resistance, but the resistance value decreases, so the alloy component is controlled to an amount that does not increase the resistance value to an unacceptable value while improving electromigration resistance. . However, since the value varies depending on the type of alloy component, it is preferable to set the value appropriately according to the alloy component. For example, in the case of Cu—Mn, the Mn concentration is 0.1 at. % Is sufficient, and the preferred range is 0.05 to 1 at. %. For Cu—Al alloys, the preferred range is 0.05 to 2 at. %. Further, the Cu alloy film 206 is formed by using a target made of Cu alloy to be obtained. The relationship between the alloy composition of the target and the composition of the Cu alloy film to be formed is such as pressure. Since it varies depending on the film forming conditions, it is necessary to adjust the alloy composition of the target so that a desired alloy composition can be obtained under the manufacturing conditions actually employed. The direct current power to the Cu alloy target is preferably 4 to 12 kW, and more preferably 6 to 10 kW.

 このようにトレンチ203およびビア(ホール)内にCu合金を埋め込んだ後は、その後の平坦化処理に備えてCu合金膜206の上に積み増し層207を成膜する(ステップ5、図2E)。 After the Cu alloy is buried in the trench 203 and the via (hole) in this way, an additional layer 207 is formed on the Cu alloy film 206 in preparation for the subsequent planarization process (step 5, FIG. 2E).

 積み増し層207は、Cu合金膜206に引き続いてiPVD等のPVDにより同じCu合金膜を成膜することにより形成してもよいし、純Cu膜をPVDまたはめっきにより形成してもよい。ただし、良好なスループットを得る観点、および装置の簡略化の観点等から、Cu合金膜206を形成したのと同じPVD(iPVD)装置を用いて、Cu合金膜206と同じCu合金膜を形成することにより積み増し層207を形成することが好ましい。積み増し層207は埋め込み性をほとんど考慮する必要はないため、PVDで成膜する際には、Cu合金膜206よりも高い成膜速度で形成することが好ましい。 The additional layer 207 may be formed by depositing the same Cu alloy film by PVD such as iPVD following the Cu alloy film 206, or a pure Cu film may be formed by PVD or plating. However, from the viewpoint of obtaining good throughput and simplifying the apparatus, the same Cu alloy film as the Cu alloy film 206 is formed by using the same PVD (iPVD) apparatus as the Cu alloy film 206 is formed. Thus, it is preferable to form the additional layer 207. Since the additional layer 207 hardly needs to consider the embedding property, it is preferable to form the stacked layer 207 at a deposition rate higher than that of the Cu alloy film 206 when forming the layer by PVD.

 このようにして積み増し層207まで成膜した後、必要に応じてアニール処理を行う(ステップ6、図2F)。このアニール処理により、Cu合金膜206を安定化させるとともに、Cu合金膜206中の合金成分を膜の上面に移動させ、Cuのエレクトロマイグレーションを抑制する。 After forming the stacked layers 207 in this way, annealing is performed as necessary (step 6, FIG. 2F). By this annealing treatment, the Cu alloy film 206 is stabilized and the alloy component in the Cu alloy film 206 is moved to the upper surface of the film to suppress Cu electromigration.

 この後、CMP(Chemical Mechanical Polishing)によりウエハW表面の全面を研磨して、積み増し層207、Ruライナー膜205、バリア膜204を除去して平坦化する(ステップ7、図2G)。これによりトレンチおよびビア(ホール)内にCu配線208が形成される。 Thereafter, the entire surface of the wafer W is polished by CMP (Chemical Mechanical Polishing), and the additional layer 207, the Ru liner film 205, and the barrier film 204 are removed and planarized (Step 7, FIG. 2G). As a result, a Cu wiring 208 is formed in the trench and the via (hole).

 その後、CMP研磨後のCu配線208の上に誘電体、例えばSiCNからなるキャップ層209を成膜する(ステップ8、図2H)。この際の成膜は、CVDで行うことができる。 Thereafter, a cap layer 209 made of a dielectric material such as SiCN is formed on the Cu wiring 208 after the CMP polishing (step 8, FIG. 2H). The film formation at this time can be performed by CVD.

 本実施形態によれば、エレクトロマイグレーション耐性が純Cuよりも高く、かつ抵抗値が許容範囲となる程度の合金成分を含有するCu合金膜をPVDによりトレンチやホールに埋め込むので、Cuめっきにより埋め込む場合のようなボイドの発生を防止することができ、また、PVDは不純物が少ないので、配線抵抗の上昇が少なく、かつエレクトロマイグレーション耐性が高く、かつ許容される抵抗値を有する組成のCu合金膜を高精度で成膜することができる。このため、ボイド等を発生させずにかつ配線抵抗の上昇を極力抑えて、エレクトロマイグレーション耐性の高いCu配線を得ることができる。 According to the present embodiment, since the Cu alloy film containing an alloy component whose electromigration resistance is higher than that of pure Cu and the resistance value is in an allowable range is embedded in the trench or hole by PVD, it is embedded by Cu plating. In addition, since PVD is low in impurities, PVD has a small increase in wiring resistance, high electromigration resistance, and a Cu alloy film having an allowable resistance value. The film can be formed with high accuracy. For this reason, it is possible to obtain Cu wiring having high electromigration resistance without generating voids or the like and suppressing increase in wiring resistance as much as possible.

 なお、上記一連の工程のうち、バリア膜204を成膜するステップ2、Ruライナー膜205を成膜するステップ3、Cu合金膜206を成膜するステップ4、積み増し層207を成膜するステップ5は、真空中で大気暴露を経ずに連続して成膜することが好ましいが、これらのいずれかの間で大気暴露してもよい。 Of the series of steps, Step 2 for forming the barrier film 204, Step 3 for forming the Ru liner film 205, Step 4 for forming the Cu alloy film 206, and Step 5 for forming the additional layer 207. Is preferably formed continuously in a vacuum without exposure to the atmosphere, but may be exposed to the air between any of these.

 <Cu合金膜の形成例>
 次に、Cu合金膜の形成例について説明する。
 上記非特許文献1では、下地の上にCu合金シードを形成した後にCuめっきで埋め込んでいるが、この際のCu合金シードの組成をCu-0.5at%MnとCu-0.8at%Mnとした場合に相当する、トレンチ全体をCu-Mn合金とした場合のMn濃度を求めた。ここでは、Cu-Mn合金シード層を厚さ30nm、ボトムカバレッジが80%、サイドカバレッジが20%で形成し、Cuめっきした後、アニールによってMnが均一に拡散すると仮定して、Mn濃度を求めた。
<Formation example of Cu alloy film>
Next, an example of forming a Cu alloy film will be described.
In Non-Patent Document 1, a Cu alloy seed is formed on a base and then embedded by Cu plating. The composition of the Cu alloy seed at this time is Cu-0.5 at% Mn and Cu-0.8 at% Mn. The Mn concentration in the case where the entire trench is made of a Cu—Mn alloy corresponding to Here, it is assumed that the Cu—Mn alloy seed layer is formed with a thickness of 30 nm, a bottom coverage of 80%, and a side coverage of 20%, Cu plating, and then Mn is uniformly diffused by annealing. It was.

 図3Aは配線(トレンチ)内のみをCu-Mn合金とした場合における、配線(トレンチ)幅と配線(Cu-Mn膜)中のMn濃度との関係を示す図である。また、図3Bは積み増しCu(積み増し層:高さ200nm)もCu-Mn合金とした場合における、配線幅(トレンチ)幅と配線(Cu-Mn膜)中のMn濃度との関係を示す図である。 FIG. 3A is a diagram showing the relationship between the wiring (trench) width and the Mn concentration in the wiring (Cu—Mn film) when only the wiring (trench) is made of a Cu—Mn alloy. FIG. 3B is a diagram showing the relationship between the wiring width (trench) width and the Mn concentration in the wiring (Cu—Mn film) when the stacked Cu (stacked layer: height 200 nm) is also a Cu—Mn alloy. is there.

 例えば、積み増し層までCu-Mn合金としたことを想定した図3Bにおいて、従来技術でのCu-Mn合金シードのMn濃度を0.5at.%とすると、埋め込もうとする配線幅が30nmより小さい場合には、トレンチ内に約0.1at.%のMnが残留していることが必要となる。ここで、上述したように、ターゲットの合金組成と成膜されるCu合金膜の組成との関係は、圧力等の成膜条件により変動し、例えばiPVDによりCuの流動性のよい成膜を行うべく圧力を90mTorr程度に高くした場合には、膜中のMn濃度がターゲット濃度の約半分となることがわかっているから(特開2008-210971号公報参照)、iPVD装置に用いるCu-Mn合金ターゲットとしては、Mn濃度が0.2at.%のものを用いればよいこととなる。 For example, in FIG. 3B assuming that a Cu—Mn alloy is used up to the additional layer, the Mn concentration of the Cu—Mn alloy seed in the prior art is 0.5 at. %, When the wiring width to be embedded is smaller than 30 nm, about 0.1 at. % Of Mn is required to remain. Here, as described above, the relationship between the alloy composition of the target and the composition of the Cu alloy film to be formed varies depending on the film forming conditions such as pressure, and for example, film formation with good Cu fluidity is performed by iPVD. Therefore, it is known that when the pressure is increased to about 90 mTorr, the Mn concentration in the film is about half of the target concentration (see Japanese Patent Application Laid-Open No. 2008-210971), so the Cu—Mn alloy used in the iPVD apparatus As a target, the Mn concentration was 0.2 at. % Can be used.

 <埋め込み性評価>
 次に、Cu-Mn合金ターゲット(Mn0.2at.%)を用いて、20nm幅のトレンチの埋め込み実験を行った。ここでは、iPVDによりTaN下地膜を4nm、CVDによりRuライナー膜を2nmで成膜した後、以下のような条件でiPVDによりCu-Mn合金膜を20nm成膜することにより埋め込みを行った。
  圧力:12Pa
  ターゲット直流電流:7kW
  バイアス高周波電力:4kW
  処理温度:250℃
<Embedment evaluation>
Next, using a Cu—Mn alloy target (Mn 0.2 at.%), A trench filling experiment with a width of 20 nm was performed. Here, a TaN underlayer film was formed at 4 nm by iPVD and a Ru liner film was formed at 2 nm by CVD, and then embedded by forming a Cu—Mn alloy film at 20 nm by iPVD under the following conditions.
Pressure: 12Pa
Target DC current: 7kW
Bias high frequency power: 4kW
Processing temperature: 250 ° C

 その結果、図4の走査型電子顕微鏡(SEM)写真に示すように、20nm幅のトレンチが十分に埋め込まれていることが確認された。 As a result, as shown in the scanning electron microscope (SEM) photograph of FIG. 4, it was confirmed that the 20 nm wide trench was sufficiently embedded.

 <本発明の実施形態の実施に好適な成膜システム>
 次に、本発明の実施形態に係るCu配線の形成方法の実施に好適な成膜システムについて説明する。図5は本発明の実施形態に係るCu配線の形成方法の実施に好適なマルチチャンバタイプの成膜システムの一例を示す平面図である。
<Deposition System Suitable for Implementation of Embodiment of the Present Invention>
Next, a film forming system suitable for carrying out the Cu wiring forming method according to the embodiment of the present invention will be described. FIG. 5 is a plan view showing an example of a multi-chamber type film forming system suitable for carrying out the Cu wiring forming method according to the embodiment of the present invention.

 成膜システム1は、バリア膜およびRuライナー膜を形成する第1の処理部2と、純Cu膜およびCu合金膜を形成する第2の処理部3と、搬入出部4とを有しており、ウエハWに対してCu配線を形成するためのものであり、上記実施形態における積み増し層の形成までを行うものである。 The film forming system 1 includes a first processing unit 2 that forms a barrier film and a Ru liner film, a second processing unit 3 that forms a pure Cu film and a Cu alloy film, and a carry-in / out unit 4. In order to form the Cu wiring on the wafer W, the process up to the formation of the additional layer in the above embodiment is performed.

 第1の処理部2は、平面形状が七角形をなす第1の真空搬送室11と、この第1の真空搬送室11の4つの辺に対応する壁部に接続された、2つのバリア膜成膜装置12a、12bおよび2つのRuライナー膜成膜装置14a、14bとを有している。バリア膜成膜装置12aおよびRuライナー膜成膜装置14aとバリア膜成膜装置12bおよびRuライナー膜成膜装置14bとは線対称の位置に配置されている。 The first processing unit 2 includes a first vacuum transfer chamber 11 having a heptagonal planar shape and two barrier films connected to wall portions corresponding to the four sides of the first vacuum transfer chamber 11. The film forming apparatuses 12a and 12b and the two Ru liner film forming apparatuses 14a and 14b are included. The barrier film forming apparatus 12a and the Ru liner film forming apparatus 14a, and the barrier film forming apparatus 12b and the Ru liner film forming apparatus 14b are arranged in line-symmetric positions.

 第1の真空搬送室11の他の2辺に対応する壁部には、それぞれウエハWのデガス処理を行うデガス室5a、5bが接続されている。また、第1の真空搬送室11のデガス室5aと5bとの間の壁部には、第1の真空搬送室11と後述する第2の真空搬送室21との間でウエハWの受け渡しを行う受け渡し室5が接続されている。 Degas chambers 5a and 5b for degassing the wafer W are connected to the wall portions corresponding to the other two sides of the first vacuum transfer chamber 11, respectively. Further, the wafer W is transferred between the first vacuum transfer chamber 11 and a second vacuum transfer chamber 21 described later on the wall portion between the degas chambers 5a and 5b of the first vacuum transfer chamber 11. A delivery chamber 5 is connected.

 バリア膜成膜装置12a、12b、Ruライナー膜成膜装置14a,14b、デガス室5a、5b、および受け渡し室5は、第1の真空搬送室11の各辺にゲートバルブGを介して接続され、これらは対応するゲートバルブGを開放することにより第1の真空搬送室11と連通され、対応するゲートバルブGを閉じることにより第1の真空搬送室11から遮断される。 The barrier film forming apparatuses 12a and 12b, the Ru liner film forming apparatuses 14a and 14b, the degas chambers 5a and 5b, and the delivery chamber 5 are connected to each side of the first vacuum transfer chamber 11 via the gate valve G. These are communicated with the first vacuum transfer chamber 11 by opening the corresponding gate valve G, and are disconnected from the first vacuum transfer chamber 11 by closing the corresponding gate valve G.

 第1の真空搬送室11内は所定の真空雰囲気に保持されるようになっており、その中には、バリア膜成膜装置12a、12b、Ruライナー膜成膜装置14a、14b、デガス室5a、5b、および受け渡し室5に対してウエハWの搬入出を行う第1の搬送機構16が設けられている。この第1の搬送機構16は、第1の真空搬送室11の略中央に配設されており、回転および伸縮可能な回転・伸縮部17を有し、その回転・伸縮部17の先端にウエハWを支持する2つの支持アーム18a、18bが設けられており、これら2つの支持アーム18a、18bは互いに反対方向を向くように回転・伸縮部17に取り付けられている。 The inside of the first vacuum transfer chamber 11 is maintained in a predetermined vacuum atmosphere. Among them, barrier film forming apparatuses 12a and 12b, Ru liner film forming apparatuses 14a and 14b, and a degas chamber 5a. 5b, and a first transfer mechanism 16 that loads and unloads the wafer W with respect to the delivery chamber 5 is provided. The first transfer mechanism 16 is disposed substantially at the center of the first vacuum transfer chamber 11, and has a rotation / extension / contraction part 17 that can rotate and expand / contract, and a wafer is attached to the tip of the rotation / extension / contraction part 17. Two support arms 18a and 18b for supporting W are provided, and these two support arms 18a and 18b are attached to the rotating / extending / contracting portion 17 so as to face opposite directions.

 第2の処理部3は、平面形状が八角形をなす第2の真空搬送室21と、この第2の真空搬送室21の対向する2つの辺に対応する壁部に接続された、Cu合金膜を成膜するための2つのCu合金膜成膜装置22a、22bと、純Cu膜またはCu合金膜を成膜するための2つのCu膜成膜装置24aおよび24bを有している。 The second processing unit 3 includes a Cu alloy connected to a second vacuum transfer chamber 21 having an octagonal plan shape and walls corresponding to two opposing sides of the second vacuum transfer chamber 21. Two Cu alloy film forming apparatuses 22a and 22b for forming a film and two Cu film forming apparatuses 24a and 24b for forming a pure Cu film or a Cu alloy film are provided.

 第2の真空搬送室21の第1の処理部2側の2辺に対応する壁部には、それぞれ上記デガス室5a、5bが接続され、デガス室5aと5bとの間の壁部には、上記受け渡し室5が接続されている。すなわち、受け渡し室5ならびにデガス室5aおよび5bは、いずれも第1の真空搬送室11と第2の真空搬送室21との間に設けられ、受け渡し室5の両側にデガス室5aおよび5bが配置されている。さらに、搬入出部4側の辺には、大気搬送および真空搬送可能なロードロック室6が接続されている。 The degas chambers 5a and 5b are respectively connected to the wall portions corresponding to the two sides of the second vacuum transfer chamber 21 on the first processing unit 2 side, and the wall portions between the degas chambers 5a and 5b are respectively connected to the wall portions. The delivery chamber 5 is connected. That is, the delivery chamber 5 and the degas chambers 5 a and 5 b are both provided between the first vacuum transfer chamber 11 and the second vacuum transfer chamber 21, and the degas chambers 5 a and 5 b are arranged on both sides of the transfer chamber 5. Has been. Furthermore, a load lock chamber 6 capable of atmospheric conveyance and vacuum conveyance is connected to the side on the carry-in / out section 4 side.

 Cu合金膜成膜装置22a、22b、Cu膜成膜装置24a、24bデガス室5a、5b、およびロードロック室6は、第2の真空搬送室21の各辺にゲートバルブGを介して接続され、これらは対応するゲートバルブを開放することにより第2の真空搬送室21と連通され、対応するゲートバルブGを閉じることにより第2の真空搬送室21から遮断される。また、受け渡し室5はゲートバルブを介さずに第2の搬送室21に接続されている。 The Cu alloy film forming apparatuses 22a and 22b, the Cu film forming apparatuses 24a and 24b, the degas chambers 5a and 5b, and the load lock chamber 6 are connected to each side of the second vacuum transfer chamber 21 through a gate valve G. These are communicated with the second vacuum transfer chamber 21 by opening the corresponding gate valve, and are shut off from the second vacuum transfer chamber 21 by closing the corresponding gate valve G. The delivery chamber 5 is connected to the second transfer chamber 21 without a gate valve.

 第2の真空搬送室21内は所定の真空雰囲気に保持されるようになっており、その中には、Cu合金膜成膜装置22a、22b、Cu膜成膜装置24a、24b、デガス室5a、5b、ロードロック室6および受け渡し室5に対してウエハWの搬入出を行う第2の搬送機構26が設けられている。この第2の搬送機構26は、第2の真空搬送室21の略中央に配設されており、回転および伸縮可能な回転・伸縮部27を有し、その回転・伸縮部27の先端にウエハWを支持する2つの支持アーム28a、28bが設けられており、これら2つの支持アーム28a、28bは互いに反対方向を向くように回転・伸縮部27に取り付けられている。 The inside of the second vacuum transfer chamber 21 is maintained in a predetermined vacuum atmosphere, among which are Cu alloy film forming apparatuses 22a and 22b, Cu film forming apparatuses 24a and 24b, and a degas chamber 5a. 5b, a second transfer mechanism 26 for carrying the wafer W in and out of the load lock chamber 6 and the delivery chamber 5 is provided. The second transfer mechanism 26 is disposed substantially at the center of the second vacuum transfer chamber 21, and has a rotation / extension / contraction part 27 that can rotate and extend / contract, and a wafer is attached to the tip of the rotation / extension / contraction part 27. Two support arms 28a and 28b for supporting W are provided, and these two support arms 28a and 28b are attached to the rotation / extension / contraction part 27 so as to face opposite directions.

 搬入出部4は、上記ロードロック室6を挟んで第2の処理部3と反対側に設けられており、ロードロック室6が接続される大気搬送室31を有している。ロードロック室6と大気搬送室31との間の壁部にはゲートバルブGが設けられている。大気搬送室31のロードロック室6が接続された壁部と対向する壁部には被処理基板としてのウエハWを収容するキャリアCを接続する2つの接続ポート32,33が設けられている。これら接続ポート32,33にはそれぞれ図示しないシャッターが設けられており、これら接続ポート32,33にウエハWを収容した状態の、または空のキャリアCが直接取り付けられ、その際にシャッターが外れて外気の侵入を防止しつつ大気搬送室31と連通するようになっている。また、大気搬送室31の側面にはアライメントチャンバ34が設けられており、そこでウエハWのアライメントが行われる。大気搬送室31内には、キャリアCに対するウエハWの搬入出およびロードロック室6に対するウエハWの搬入出を行う大気搬送用搬送機構36が設けられている。この大気搬送用搬送機構36は、2つの多関節アームを有しており、キャリアCの配列方向に沿ってレール38上を走行可能となっていて、それぞれの先端のハンド37上にウエハWを載せてその搬送を行うようになっている。 The loading / unloading unit 4 is provided on the opposite side to the second processing unit 3 with the load lock chamber 6 interposed therebetween, and has an atmospheric transfer chamber 31 to which the load lock chamber 6 is connected. A gate valve G is provided on the wall portion between the load lock chamber 6 and the atmospheric transfer chamber 31. Two connection ports 32 and 33 for connecting a carrier C that accommodates a wafer W as a substrate to be processed are provided on the wall portion of the atmospheric transfer chamber 31 that faces the wall portion to which the load lock chamber 6 is connected. Each of the connection ports 32 and 33 is provided with a shutter (not shown). A wafer C containing a wafer W or an empty carrier C is directly attached to the connection ports 32 and 33, and the shutter is released at that time. The air communication chamber 31 communicates with the outside air while preventing the outside air from entering. An alignment chamber 34 is provided on the side surface of the atmospheric transfer chamber 31 where the wafer W is aligned. In the atmospheric transfer chamber 31, an atmospheric transfer transfer mechanism 36 that loads and unloads the wafer W with respect to the carrier C and loads and unloads the wafer W with respect to the load lock chamber 6 is provided. This atmospheric transfer mechanism 36 has two articulated arms, and can run on the rail 38 along the arrangement direction of the carrier C. The wafer W is placed on the hand 37 at each tip. It is loaded and transported.

 この成膜システム1は、この成膜システム1の各構成部を制御するための制御部40を有している。この制御部40は、各構成部の制御を実行するマイクロプロセッサ(コンピュータ)からなるプロセスコントローラ41と、オペレータが成膜システム1を管理するためにコマンドの入力操作等を行うキーボードや、成膜システム1の稼働状況を可視化して表示するディスプレイ等からなるユーザーインターフェース42と、成膜システム1で実行される処理をプロセスコントローラ41の制御にて実現するための制御プログラムや、各種データ、および処理条件に応じて処理装置の各構成部に処理を実行させるためのプログラムすなわちレシピが格納された記憶部43とを備えている。なお、ユーザーインターフェース42および記憶部43はプロセスコントローラ41に接続されている。 The film forming system 1 has a control unit 40 for controlling each component of the film forming system 1. The control unit 40 includes a process controller 41 composed of a microprocessor (computer) that executes control of each component, a keyboard on which an operator inputs commands to manage the film forming system 1, and a film forming system. 1, a user interface 42 including a display for visualizing and displaying the operation status of 1, a control program for realizing processing executed by the film forming system 1 under the control of the process controller 41, various data, and processing conditions And a storage unit 43 that stores a program for causing each component of the processing apparatus to execute processing, that is, a recipe. Note that the user interface 42 and the storage unit 43 are connected to the process controller 41.

 上記レシピは記憶部43の中の記憶媒体43aに記憶されている。記憶媒体は、ハードディスクであってもよいし、CDROM、DVD、フラッシュメモリ等の可搬性のものであってもよい。また、他の装置から、例えば専用回線を介してレシピを適宜伝送させるようにしてもよい。 The above recipe is stored in the storage medium 43a in the storage unit 43. The storage medium may be a hard disk or a portable medium such as a CDROM, DVD, or flash memory. Moreover, you may make it transmit a recipe suitably from another apparatus via a dedicated line, for example.

 そして、必要に応じて、ユーザーインターフェース42からの指示等にて任意のレシピを記憶部43から呼び出してプロセスコントローラ41に実行させることで、プロセスコントローラ41の制御下で、成膜システム1での所望の処理が行われる。 Then, if desired, an arbitrary recipe is called from the storage unit 43 by an instruction from the user interface 42 and is executed by the process controller 41, so that a desired value in the film forming system 1 is controlled under the control of the process controller 41. Is performed.

 このような成膜システム1においては、キャリアCから大気搬送用搬送機構36によりトレンチやホールを有する所定パターンが形成されたウエハWを取り出し、ロードロック室6に搬送し、そのロードロック室6を第2の真空搬送室21と同程度の真空度に減圧した後、第2の搬送機構26によりロードロック室6のウエハWを取り出し、第2の真空搬送室21を介してデガス室5aまたは5bに搬送し、ウエハWのデガス処理を行う。その後、第1の搬送機構16によりデガス室5a(5b)のウエハWを取り出し、第1の真空搬送室11を介してバリア膜成膜装置12aまたは12bに搬入し、上述したようなバリア膜を成膜する。バリア膜成膜後、第1の搬送機構16によりバリア膜成膜装置12aまたは12bからウエハWを取り出し、Ruライナー膜成膜装置14aまたは14bに搬入し、上述したようなRuライナー膜を成膜する。Ruライナー膜成膜後、第1の搬送機構16によりRuライナー膜成膜装置14aまたは14bからウエハWを取り出し、受け渡し室5に搬送する。その後、第2の搬送機構26によりウエハWを取り出し、第2の真空搬送室21を介してCu合金膜成膜装置22aまたは22bに搬入し、上述したCu合金膜を形成する。その後、Cu合金膜の上に積み増し層を形成するが、積み増し層の形成は、同じCu合金膜成膜装置22aまたは22b内でCu合金膜を連続して形成することにより行ってもよいし、第2の搬送機構26によりCu合金膜成膜装置22aまたは22bからウエハWを取り出して、Cu膜成膜装置24aまたは24bに搬入し、そこで純Cu膜またはCu合金膜を形成して積み増し層としてもよい。 In such a film forming system 1, the wafer W on which a predetermined pattern having trenches and holes is formed is taken out from the carrier C by the atmospheric transfer mechanism 36 and transferred to the load lock chamber 6. After the pressure is reduced to the same degree as the second vacuum transfer chamber 21, the wafer W in the load lock chamber 6 is taken out by the second transfer mechanism 26, and the degas chamber 5 a or 5 b is removed via the second vacuum transfer chamber 21. The wafer W is degassed. After that, the wafer W in the degas chamber 5a (5b) is taken out by the first transfer mechanism 16 and loaded into the barrier film forming apparatus 12a or 12b through the first vacuum transfer chamber 11, and the barrier film as described above is formed. Form a film. After the barrier film is formed, the wafer W is taken out from the barrier film forming apparatus 12a or 12b by the first transport mechanism 16 and loaded into the Ru liner film forming apparatus 14a or 14b, and the Ru liner film as described above is formed. To do. After forming the Ru liner film, the wafer W is taken out from the Ru liner film forming apparatus 14 a or 14 b by the first transfer mechanism 16 and transferred to the delivery chamber 5. Thereafter, the wafer W is taken out by the second transfer mechanism 26 and transferred into the Cu alloy film forming apparatus 22a or 22b through the second vacuum transfer chamber 21, thereby forming the above-described Cu alloy film. Thereafter, a stacked layer is formed on the Cu alloy film. The stacked layer may be formed by continuously forming the Cu alloy film in the same Cu alloy film forming apparatus 22a or 22b. The wafer W is taken out from the Cu alloy film forming apparatus 22a or 22b by the second transport mechanism 26 and loaded into the Cu film forming apparatus 24a or 24b, where a pure Cu film or Cu alloy film is formed to form an additional layer. Also good.

 積み増し層の形成後、ウエハWをロードロック室6に搬送し、そのロードロック室6を大気圧に戻した後、大気搬送用搬送機構36によりCu膜が形成されたウエハWを取り出し、キャリアCに戻す。このような処理をキャリア内のウエハWの数の分だけ繰り返す。 After forming the additional layer, the wafer W is transferred to the load lock chamber 6 and the load lock chamber 6 is returned to atmospheric pressure. Then, the wafer W on which the Cu film is formed is taken out by the transfer mechanism 36 for atmospheric transfer, and the carrier C Return to. Such a process is repeated for the number of wafers W in the carrier.

 成膜システム1によれば、大気開放することなく真空中でバリア膜、ライナー膜、Cu合金膜、積み増し層を成膜するので、各膜の界面での酸化を防止することができ、高性能のCu配線を得ることができる。 According to the film forming system 1, the barrier film, the liner film, the Cu alloy film, and the additional layer are formed in vacuum without opening to the atmosphere, so that the oxidation at the interface of each film can be prevented, and the high performance Cu wiring can be obtained.

 なお、積み増し層をCuめっきで形成する場合には、Cu合金膜を成膜後、ウエハWを搬出する。 In addition, when forming the additional layer by Cu plating, the wafer W is unloaded after the Cu alloy film is formed.

 <Cu合金膜成膜装置>
 次に、Cu合金膜を形成するCu合金膜成膜装置22a(22b)の好適な例について説明する。
 図6は、Cu合金膜成膜装置の一例を示す断面図である。ここではCu合金膜成膜装置としてiPVDであるICP(Inductively Coupled Plasma)型プラズマスパッタ装置を例にとって説明する。
<Cu alloy film deposition system>
Next, a preferred example of the Cu alloy film forming apparatus 22a (22b) for forming the Cu alloy film will be described.
FIG. 6 is a cross-sectional view showing an example of a Cu alloy film forming apparatus. Here, an ICP (Inductively Coupled Plasma) type plasma sputtering apparatus which is iPVD will be described as an example of the Cu alloy film forming apparatus.

 図6に示すように、このCu合金膜成膜装置22a(22b)は、例えばアルミニウム等により筒体状に成形された処理容器51を有している。この処理容器51は接地され、その底部52には排気口53が設けられており、排気口53には排気管54が接続されている。排気管54には圧力調整を行うスロットルバルブ55および真空ポンプ56が接続されており、処理容器51内が真空引き可能となっている。また処理容器51の底部52には、処理容器51内へ所定のガスを導入するガス導入口57が設けられる。このガス導入口57にはガス供給配管58が接続されており、ガス供給配管58には、プラズマ励起用ガスとして希ガス、例えばArガスや他の必要なガス例えばNガス等を供給するためのガス供給源59が接続されている。また、ガス供給配管58には、ガス流量制御器、バルブ等よりなるガス制御部60が介装されている。 As shown in FIG. 6, this Cu alloy film forming apparatus 22a (22b) has a processing container 51 formed into a cylindrical shape with, for example, aluminum. The processing vessel 51 is grounded, and an exhaust port 53 is provided at the bottom 52, and an exhaust pipe 54 is connected to the exhaust port 53. A throttle valve 55 and a vacuum pump 56 for adjusting pressure are connected to the exhaust pipe 54 so that the inside of the processing container 51 can be evacuated. Further, a gas inlet 57 for introducing a predetermined gas into the processing container 51 is provided at the bottom 52 of the processing container 51. A gas supply pipe 58 is connected to the gas inlet 57 for supplying a rare gas such as Ar gas or other necessary gas such as N 2 gas as the plasma excitation gas. The gas supply source 59 is connected. The gas supply pipe 58 is provided with a gas control unit 60 including a gas flow rate controller and a valve.

 処理容器51内には、被処理基板であるウエハWを載置するための載置機構62が設けられる。この載置機構62は、円板状に成形された載置台63と、この載置台63を支持するとともに接地された中空筒体状の支柱64とを有している。載置台63は、例えばアルミニウム合金等の導電性材料よりなり、支柱64を介して接地されている。載置台63の中には冷却ジャケット65が設けられており、図示しない冷媒流路を介して冷媒を供給するようになっている。また、載置台63内には冷却ジャケット65の上に絶縁材料で被覆された抵抗ヒーター87が埋め込まれている。抵抗ヒーター87は図示しない電源から給電されるようになっている。載置台63には熱電対(図示せず)が設けられており、この熱電対で検出された温度に基づいて、冷却ジャケット65への冷媒の供給および抵抗ヒーター87への給電を制御することにより、ウエハ温度を所定の温度に制御できるようになっている。 In the processing container 51, a mounting mechanism 62 for mounting a wafer W as a substrate to be processed is provided. The mounting mechanism 62 includes a mounting table 63 formed in a disc shape, and a hollow cylindrical column support 64 that supports the mounting table 63 and is grounded. The mounting table 63 is made of a conductive material such as an aluminum alloy, and is grounded via a support column 64. A cooling jacket 65 is provided in the mounting table 63 so as to supply the refrigerant through a refrigerant channel (not shown). A resistance heater 87 covered with an insulating material is embedded on the cooling jacket 65 in the mounting table 63. The resistance heater 87 is supplied with power from a power source (not shown). The mounting table 63 is provided with a thermocouple (not shown), and by controlling the supply of the refrigerant to the cooling jacket 65 and the power supply to the resistance heater 87 based on the temperature detected by the thermocouple. The wafer temperature can be controlled to a predetermined temperature.

 載置台63の上面側には、例えばアルミナ等の誘電体部材66aの中に電極66bが埋め込まれて構成された薄い円板状の静電チャック66が設けられており、ウエハWを静電力により吸着保持できるようになっている。また、支柱64の下部は、処理容器51の底部52の中心部に形成された挿通孔67を貫通して下方へ延びている。支柱64は、図示しない昇降機構により上下移動可能となっており、これにより載置機構62の全体が昇降される。 On the upper surface side of the mounting table 63, for example, a thin disk-shaped electrostatic chuck 66 configured by embedding an electrode 66b in a dielectric member 66a such as alumina is provided. It can be held by suction. Further, the lower portion of the support column 64 extends downward through an insertion hole 67 formed at the center of the bottom 52 of the processing vessel 51. The support column 64 can be moved up and down by an elevator mechanism (not shown), whereby the entire mounting mechanism 62 is moved up and down.

 支柱64を囲むように、伸縮可能に構成された蛇腹状の金属ベローズ68が設けられており、この金属ベローズ68は、その上端が載置台63の下面に気密に接合され、また下端が処理容器51の底部52の上面に気密に接合されており、処理容器51内の気密性を維持しつつ載置機構62の昇降移動を許容できるようになっている。  A bellows-like metal bellows 68 configured to be stretchable is provided so as to surround the support column 64, and the upper end of the metal bellows 68 is airtightly joined to the lower surface of the mounting table 63, and the lower end thereof is a processing container. It is airtightly joined to the upper surface of the bottom part 52 of 51, and the raising / lowering movement of the mounting mechanism 62 can be permitted while maintaining the airtightness in the processing container 51.

 また底部52には、上方に向けて例えば3本(図2では2本のみ示す)の支持ピン69が起立させて設けられており、また、この支持ピン69に対応させて載置台63にピン挿通孔70が形成されている。したがって、載置台63を降下させた際に、ピン挿通孔70を貫通した支持ピン69の上端部でウエハWを受けて、そのウエハWを外部より侵入する搬送アーム(図示せず)との間で移載することができる。このため、処理容器51の下部側壁には、搬送アームを侵入させるために搬出入口71が設けられ、この搬出入口71には、開閉可能になされたゲートバルブGが設けられている。このゲートバルブGの反対側には、前述した第2の真空搬送室21が設けられている。 Further, for example, three support pins 69 (only two are shown in FIG. 2) are provided upright on the bottom portion 52, and are provided on the mounting table 63 so as to correspond to the support pins 69. An insertion hole 70 is formed. Therefore, when the mounting table 63 is lowered, the wafer W is received by the upper end portion of the support pin 69 penetrating the pin insertion hole 70, and between the transfer arm (not shown) that enters the wafer W from the outside. Can be transferred. For this reason, a carry-out / inlet 71 is provided in the lower side wall of the processing container 51 in order to allow the transfer arm to enter, and the carry-out / inlet 71 is provided with a gate valve G that can be opened and closed. On the opposite side of the gate valve G, the aforementioned second vacuum transfer chamber 21 is provided.

 また上述した静電チャック66の電極66bには、給電ライン72を介してチャック用電源73が接続されており、このチャック用電源73から電極66bに直流電圧を印加することにより、ウエハWが静電力により吸着保持される。また給電ライン72にはバイアス用高周波電源74が接続されており、この給電ライン72を介して静電チャック66の電極66bに対してバイアス用の高周波電力を供給し、ウエハWにバイアス電力が印加されるようになっている。この高周波電力の周波数は、400kHz~60MHzが好ましく、例えば13.56MHzが採用される。 In addition, a chuck power source 73 is connected to the electrode 66b of the electrostatic chuck 66 through a power supply line 72. By applying a DC voltage to the electrode 66b from the chuck power source 73, the wafer W is brought into a static state. Adsorbed and held by electric power. A bias high frequency power source 74 is connected to the power supply line 72, and bias high frequency power is supplied to the electrode 66 b of the electrostatic chuck 66 via the power supply line 72, and bias power is applied to the wafer W. It has come to be. The frequency of the high-frequency power is preferably 400 kHz to 60 MHz, for example, 13.56 MHz.

 一方、処理容器51の天井部には、例えばアルミナ等の誘電体よりなる高周波に対して透過性のある透過板76がOリング等のシール部材77を介して気密に設けられている。そして、この透過板76の上部に、処理容器51内の処理空間Sにプラズマ励起用ガスとしての希ガス、例えばArガスをプラズマ化してプラズマを発生するためのプラズマ発生源78が設けられる。なお、このプラズマ励起用ガスとして、Arに代えて他の希ガス、例えばHe、Ne、Kr等を用いてもよい。 On the other hand, a transmission plate 76 that is permeable to high frequencies made of a dielectric material such as alumina, for example, is hermetically provided on the ceiling portion of the processing vessel 51 via a seal member 77 such as an O-ring. A plasma generation source 78 for generating a plasma by generating a rare gas, for example, Ar gas, as a plasma excitation gas in the processing space S in the processing vessel 51 in the upper portion of the transmission plate 76 is provided. As this plasma excitation gas, other rare gases such as He, Ne, Kr, etc. may be used instead of Ar.

 プラズマ発生源78は、透過板76に対応させて設けた誘導コイル80を有しており、この誘導コイル80には、プラズマ発生用の例えば13.56MHzの高周波電源81が接続されて、上記透過板76を介して処理空間Sに高周波電力が導入され誘導電界を形成するようになっている。 The plasma generation source 78 has an induction coil 80 provided so as to correspond to the transmission plate 76. To this induction coil 80, for example, a 13.56 MHz high frequency power source 81 for plasma generation is connected, and the transmission is performed. High frequency power is introduced into the processing space S via the plate 76 to form an induced electric field.

 また透過板76の直下には、導入された高周波電力を拡散させる例えばアルミニウムよりなるバッフルプレート82が設けられる。そして、このバッフルプレート82の下部には、上記処理空間Sの上部側方を囲むようにして例えば断面が内側に向けて傾斜されて環状(截頭円錐殻状)のCu合金からなるターゲット83が設けられており、このターゲット83にはArイオンを引きつけるための直流電力を印加するターゲット用の電圧可変の直流電源84が接続されている。なお、直流電源に代えて交流電源を用いてもよい。ターゲット83は、Cu合金膜と同種のCu合金で形成されている。 Also, immediately below the transmission plate 76, a baffle plate 82 made of, for example, aluminum is provided to diffuse the introduced high-frequency power. At the lower part of the baffle plate 82, for example, a target 83 made of an annular (a truncated cone-shell) Cu alloy is provided so as to surround the upper side of the processing space S, for example, with a cross section inclined inward. The target 83 is connected to a target variable voltage DC power supply 84 for applying DC power for attracting Ar ions. An AC power supply may be used instead of the DC power supply. The target 83 is formed of the same kind of Cu alloy as the Cu alloy film.

 また、ターゲット83の外周側には、これに磁界を付与するための磁石85が設けられている。ターゲット83はプラズマ中のArイオンによりCuの金属原子、あるいは金属原子団としてスパッタされるとともに、プラズマ中を通過する際に多くはイオン化される。 Further, a magnet 85 for applying a magnetic field to the target 83 is provided on the outer peripheral side of the target 83. The target 83 is sputtered by Ar ions in the plasma as Cu metal atoms or metal atomic groups, and is largely ionized when passing through the plasma.

 またこのターゲット83の下部には、上記処理空間Sを囲むようにして例えばアルミニウムや銅よりなる円筒状の保護カバー部材86が設けられている。この保護カバー部材86は接地されるとともに、その下部は内側へ屈曲されて載置台63の側部近傍に位置されている。したがって、保護カバー部材86の内側の端部は、載置台63の外周側を囲むようにして設けられている。 Further, a cylindrical protective cover member 86 made of, for example, aluminum or copper is provided below the target 83 so as to surround the processing space S. The protective cover member 86 is grounded, and a lower portion thereof is bent inward and is positioned in the vicinity of the side portion of the mounting table 63. Therefore, the inner end of the protective cover member 86 is provided so as to surround the outer peripheral side of the mounting table 63.

 なお、Cu合金膜成膜装置の各構成部も、上述の制御部40により制御されるようになっている。 Note that each component of the Cu alloy film forming apparatus is also controlled by the control unit 40 described above.

 このように構成されるCu合金膜成膜装置においては、ウエハWを図6に示す処理容器51内へ搬入し、このウエハWを載置台63上に載置して静電チャック66により吸着し、制御部40の制御下で以下の動作が行われる。このとき、載置台63は、熱電対(図示せず)で検出された温度に基づいて、冷却ジャケット65への冷媒の供給および抵抗ヒーター87への給電を制御することにより温度制御される。 In the Cu alloy film forming apparatus configured as described above, the wafer W is loaded into the processing container 51 shown in FIG. 6, and the wafer W is placed on the mounting table 63 and adsorbed by the electrostatic chuck 66. The following operations are performed under the control of the control unit 40. At this time, the temperature of the mounting table 63 is controlled by controlling the supply of the refrigerant to the cooling jacket 65 and the power supply to the resistance heater 87 based on the temperature detected by a thermocouple (not shown).

 まず、真空ポンプ56を動作させることにより所定の真空状態にされた処理容器51内に、ガス制御部60を操作して所定流量でArガスを流しつつスロットルバルブ55を制御して処理容器51内を所定の真空度に維持する。その後、可変直流電源84から直流電力をターゲット83に印加し、さらにプラズマ発生源78の高周波電源81から誘導コイル80に高周波電力(プラズマ電力)を供給する。一方、バイアス用高周波電源74から静電チャック66の電極66bに対して所定のバイアス用の高周波電力を供給する。 First, by operating the gas control unit 60 and flowing the Ar gas at a predetermined flow rate into the processing container 51 that is brought into a predetermined vacuum state by operating the vacuum pump 56, the throttle valve 55 is controlled to control the inside of the processing container 51. Is maintained at a predetermined degree of vacuum. Thereafter, DC power is applied from the variable DC power source 84 to the target 83, and further, high frequency power (plasma power) is supplied from the high frequency power source 81 of the plasma generation source 78 to the induction coil 80. On the other hand, predetermined high frequency power for bias is supplied from the high frequency power source 74 for bias to the electrode 66 b of the electrostatic chuck 66.

 これにより、処理容器51内においては、誘導コイル80に供給された高周波電力によりアルゴンプラズマが形成されてアルゴンイオンが生成され、これらイオンはターゲット83に印加された直流電圧に引き寄せられてターゲット83に衝突し、このターゲット83がスパッタされて粒子が放出される。この際、ターゲット83に印加する直流電圧により放出される粒子の量が最適に制御される。 Thereby, in the processing container 51, argon plasma is formed by the high-frequency power supplied to the induction coil 80 to generate argon ions, and these ions are attracted to the DC voltage applied to the target 83 and are attracted to the target 83. The target 83 is sputtered and particles are released. At this time, the amount of particles emitted is optimally controlled by the DC voltage applied to the target 83.

 また、スパッタされたターゲット83からの粒子はプラズマ中を通る際に多くはイオン化される。ここでターゲット83から放出される粒子は、イオン化されたものと電気的に中性な中性原子とが混在する状態となって下方向へ飛散して行く。特に、この処理容器51内の圧力をある程度高くし、これによりプラズマ密度を高めることにより、粒子を高効率でイオン化することができる。この時のイオン化率は高周波電源81から供給される高周波電力により制御される。 Further, most of the particles from the sputtered target 83 are ionized when passing through the plasma. Here, the particles emitted from the target 83 are scattered in a downward direction in a state where ionized particles and electrically neutral atoms are mixed. In particular, by increasing the pressure in the processing vessel 51 to some extent and thereby increasing the plasma density, the particles can be ionized with high efficiency. The ionization rate at this time is controlled by the high frequency power supplied from the high frequency power supply 81.

 そして、イオンは、高周波電源74から静電チャック66の電極66bに印加されたバイアス用の高周波電力によりウエハW面上に形成される厚さ数mm程度のイオンシースの領域に入ると、強い指向性をもってウエハW側に加速するように引き付けられてウエハWに堆積してCu合金膜が形成される。 When ions enter the region of an ion sheath having a thickness of about several millimeters formed on the surface of the wafer W by the high frequency power for bias applied from the high frequency power source 74 to the electrode 66b of the electrostatic chuck 66, the ions are strongly directed. The Cu alloy film is formed by being attracted so as to accelerate toward the wafer W and deposited on the wafer W.

 このとき、ウエハ温度を高く(65~350℃)設定するとともに、バイアス用高周波電源74から静電チャック66の電極66bに対して印加されるバイアスパワーを調整してCu合金の成膜とArによるエッチングを調整して、Cu合金の流動性を良好にすることにより、開口が狭いトレンチやホールであっても良好な埋め込み性でCu合金を埋め込むことができる。具体的には、Cu合金成膜量(成膜レート)をT、プラズマ生成用のガスのイオンによるエッチング量(エッチングレート)をTとすると、0≦T/T<1、さらには0<T/T<1となるようにバイアスパワーを調整することが好ましい。 At this time, the wafer temperature is set high (65 to 350 ° C.), and the bias power applied to the electrode 66b of the electrostatic chuck 66 from the bias high-frequency power source 74 is adjusted to form a Cu alloy film and Ar. By adjusting the etching to improve the fluidity of the Cu alloy, it is possible to embed the Cu alloy with a good embedding property even in the case of a trench or hole having a narrow opening. Specifically, Cu alloy deposition amount (film formation rate) and T D, the etching amount of ions of the gas for plasma generation (etching rate) and T E, 0 ≦ T E / T D <1, further Is preferably adjusted so that 0 <T E / T D <1.

 良好な埋め込み性を得る観点から、処理容器51内の圧力(プロセス圧力)は、1~100mTorr(0.133~13.3Pa)、さらには35~90mTorr(4.66~12.0Pa)が好ましく、ターゲットへの直流電力は4~12kW、さらには6~10kWとすることが好ましい。 From the viewpoint of obtaining good embedding properties, the pressure in the processing vessel 51 (process pressure) is preferably 1 to 100 mTorr (0.133 to 13.3 Pa), more preferably 35 to 90 mTorr (4.66 to 12.0 Pa). The DC power to the target is preferably 4 to 12 kW, more preferably 6 to 10 kW.

 なお、トレンチやホールの開口が広い場合等には、ウエハ温度を低く(-50~0℃)設定するとともに、処理容器51内の圧力をより低くして成膜することができる。これにより、成膜レートを高くすることができる。また、このような場合には、iPVDに限らず、通常のスパッタ、イオンプレーティング等の通常のPVDを用いることもできる。 When the trench or hole opening is wide, the wafer temperature can be set low (−50 to 0 ° C.) and the pressure in the processing vessel 51 can be lowered to form a film. Thereby, the film formation rate can be increased. In such a case, not only iPVD but also normal PVD such as normal sputtering and ion plating can be used.

 <Cu膜成膜装置>
 Cu膜成膜装置24a(24b)としては、基本的に、図6に示すCu合金膜成膜装置22a(22b)と同様の装置を用いることができる。このとき、ターゲット83は得ようとする膜に応じて適宜材料を調整すればよい。また、埋め込み性を重視する必要がない場合等には、iPVDに限らず、通常のスパッタ、イオンプレーティング等の通常のPVDを用いることもできる。
<Cu film deposition system>
As the Cu film forming apparatus 24a (24b), an apparatus similar to the Cu alloy film forming apparatus 22a (22b) shown in FIG. 6 can be basically used. At this time, the material of the target 83 may be appropriately adjusted according to the film to be obtained. Further, when emphasis is not placed on embedding, not only iPVD but also normal PVD such as normal sputtering and ion plating can be used.

 <バリア膜成膜装置>
 バリア膜成膜装置12a(12b)としては、ターゲット83を使用する材料に変えるのみで図6の成膜装置と同様の構成の成膜装置を用いてプラズマスパッタにより成膜することができる。また、プラズマスパッタに限定されず、通常のスパッタ、イオンプレーティング等の他のPVDであってもよく、CVD(Chemical Vapor Deposition)やALD(Atomic Layer Deposition)、プラズマを用いたCVDやALDで成膜することもできる。不純物を低減する観点からはPVDが好ましい。
<Barrier film deposition system>
The barrier film forming apparatus 12a (12b) can be formed by plasma sputtering using a film forming apparatus having the same configuration as the film forming apparatus shown in FIG. Further, the present invention is not limited to plasma sputtering, but may be other PVD such as normal sputtering, ion plating, CVD (Chemical Vapor Deposition), ALD (Atomic Layer Deposition), or CVD or ALD using plasma. A membrane can also be formed. From the viewpoint of reducing impurities, PVD is preferred.

 <Ru膜成膜装置>
 次に、Ruライナー膜を形成するためのRuライナー膜成膜装置14a(14b)について説明する。Ruライナー膜は熱CVDにより好適に形成することができる。図7は、Ruライナー膜成膜装置の一例を示す断面図であり、熱CVDによりRu膜を形成するものである。
<Ru film deposition system>
Next, the Ru liner film forming apparatus 14a (14b) for forming the Ru liner film will be described. The Ru liner film can be suitably formed by thermal CVD. FIG. 7 is a cross-sectional view showing an example of a Ru liner film forming apparatus, in which a Ru film is formed by thermal CVD.

 図7に示すように、このRuライナー膜成膜装置14a(14b)は、例えばアルミニウム等により筒体に形成された処理容器101を有している。処理容器101の内部には、ウエハWを載置する例えばAlN等のセラミックスからなる載置台102が配置されており、この載置台102内にはヒーター103が設けられている。このヒーター103はヒーター電源(図示せず)から給電されることにより発熱する。 As shown in FIG. 7, this Ru liner film forming apparatus 14a (14b) has a processing container 101 formed in a cylindrical body with, for example, aluminum. Inside the processing vessel 101, a mounting table 102 made of ceramics such as AlN for mounting the wafer W is disposed, and a heater 103 is provided in the mounting table 102. The heater 103 generates heat when supplied with power from a heater power source (not shown).

 処理容器101の天壁には、Ru膜を形成するための処理ガスやパージガス等を処理容器101内にシャワー状に導入するためのシャワーヘッド104が載置台102と対向するように設けられている。シャワーヘッド104はその上部にガス導入口105を有し、その内部にガス拡散空間106が形成されており、その底面には多数のガス吐出孔107が形成されている。ガス導入口105にはガス供給配管108が接続されており、ガス供給配管108にはRu膜を形成するための処理ガスやパージガス等を供給するためのガス供給源109が接続されている。また、ガス供給配管108には、ガス流量制御器、バルブ等よりなるガス制御部110が介装されている。Ruを成膜するためのガスとしては、上述したように、好適なものとしてルテニウムカルボニル(Ru(CO)12)を挙げることができる。このルテニウムカルボニルは熱分解によりRu膜を形成することができる。 On the top wall of the processing vessel 101, a shower head 104 for introducing a processing gas for forming a Ru film, a purge gas or the like into the processing vessel 101 in a shower shape is provided so as to face the mounting table 102. . The shower head 104 has a gas introduction port 105 in the upper portion thereof, a gas diffusion space 106 is formed in the interior thereof, and a number of gas discharge holes 107 are formed in the bottom surface thereof. A gas supply pipe 108 is connected to the gas inlet 105, and a gas supply source 109 for supplying a processing gas, a purge gas, and the like for forming a Ru film is connected to the gas supply pipe 108. The gas supply pipe 108 is provided with a gas control unit 110 including a gas flow rate controller and a valve. As the gas for forming the Ru film, as described above, ruthenium carbonyl (Ru 3 (CO) 12 ) can be cited as a preferable gas. This ruthenium carbonyl can form a Ru film by thermal decomposition.

 処理容器101の底部には、排気口111が設けられており、この排気口111には排気管112が接続されている。排気管112には圧力調整を行うスロットルバルブ113および真空ポンプ114が接続されており、処理容器101内が真空引き可能となっている。 An exhaust port 111 is provided at the bottom of the processing vessel 101, and an exhaust pipe 112 is connected to the exhaust port 111. A throttle valve 113 and a vacuum pump 114 for adjusting pressure are connected to the exhaust pipe 112, and the inside of the processing vessel 101 can be evacuated.

 載置台102には、ウエハ搬送用の3本(2本のみ図示)のウエハ支持ピン116が載置台102の表面に対して突没可能に設けられ、これらウエハ支持ピン116は支持板117に固定されている。そして、ウエハ支持ピン116は、エアシリンダ等の駆動機構118によりロッド119を昇降することにより、支持板117を介して昇降される。なお、符号120はベローズである。一方、処理容器101の側壁には、ウエハ搬出入口121が形成されており、ゲートバルブGを開けた状態で第1の真空搬送室11との間でウエハWの搬入出が行われる。 On the mounting table 102, three wafer support pins 116 for wafer transfer (only two are shown) are provided so as to be able to project and retract with respect to the surface of the mounting table 102, and these wafer support pins 116 are fixed to the support plate 117. Has been. The wafer support pins 116 are moved up and down via the support plate 117 by moving the rod 119 up and down by a drive mechanism 118 such as an air cylinder. Reference numeral 120 denotes a bellows. On the other hand, a wafer loading / unloading port 121 is formed on the side wall of the processing chamber 101, and the wafer W is loaded into and unloaded from the first vacuum transfer chamber 11 with the gate valve G opened.

 このようなRuライナー膜成膜装置14a(14b)においては、ゲートバルブGを開けて、ウエハWを載置台102上に載置した後、ゲートバルブGを閉じ、処理容器101内を真空ポンプ114により排気して処理容器101内を所定の圧力に調整しつつ、ヒーター103より載置台102を介してウエハWを所定温度に加熱した状態で、ガス供給源109からガス供給配管108およびシャワーヘッド104を介して処理容器101内へルテニウムカルボニル(Ru(CO)12)ガス等の処理ガスを導入する。これにより、ウエハW上で処理ガスの反応が進行し、ウエハWの表面にRu膜が形成される。 In such a Ru liner film forming apparatus 14 a (14 b), the gate valve G is opened, the wafer W is placed on the mounting table 102, the gate valve G is closed, and the inside of the processing chamber 101 is vacuum pumped 114. While the wafer W is heated to a predetermined temperature from the heater 103 via the mounting table 102 while the inside of the processing vessel 101 is adjusted to a predetermined pressure by evacuating the gas from the gas supply source 109 to the gas supply pipe 108 and the shower head 104. A processing gas such as ruthenium carbonyl (Ru 3 (CO) 12 ) gas is introduced into the processing vessel 101 through As a result, the reaction of the processing gas proceeds on the wafer W, and a Ru film is formed on the surface of the wafer W.

 Ru膜の成膜には、ルテニウムカルボニル以外の他の成膜原料、例えば上述したようなルテニウムのペンタジエニル化合物をOガスのような分解ガスとともに用いることができる。またRu膜をPVDで成膜することもできる。ただし、良好なステップカバレッジが得られ、かつ膜の不純物を少なくすることができることからルテニウムカルボニルを用いたCVDで成膜することが好ましい。 For film formation of the Ru film, other film forming materials other than ruthenium carbonyl, for example, a ruthenium pentadienyl compound as described above can be used together with a decomposition gas such as O 2 gas. In addition, the Ru film can be formed by PVD. However, it is preferable to form a film by CVD using ruthenium carbonyl because good step coverage can be obtained and impurities in the film can be reduced.

 <他の工程に用いる装置>
 以上の成膜システム1により上記実施形態における積み増し層の形成までを行うことができるが、それ以降のアニール工程、CMP工程、キャップ層成膜工程は、成膜システム1から搬出した後のウエハWに対し、アニール装置、CMP装置、キャップ層成膜装置を用いて行うことができる。これらの装置は、通常用いられる構成のものでよい。これら装置と成膜システム1とでCu配線形成システムを構成し、制御部40と同じ機能を有する共通の制御部により一括して制御するようにすることにより、上記実施形態に示された方法を一つのレシピにより一括して制御することができる。
<Apparatus used for other processes>
The above-described film forming system 1 can perform formation of additional layers in the above embodiment, but the subsequent annealing process, CMP process, and cap layer film forming process are performed after the wafer W is unloaded from the film forming system 1. In contrast, an annealing apparatus, a CMP apparatus, and a cap layer film forming apparatus can be used. These apparatuses may have a configuration that is usually used. By forming a Cu wiring forming system with these apparatuses and the film forming system 1 and controlling them collectively by a common control unit having the same function as the control unit 40, the method shown in the above embodiment is performed. A single recipe can be used for batch control.

 <他の適用>
 以上、本発明の実施形態について説明したが、本発明は上記実施形態に限定されることなく種々変形可能である。例えば、成膜システムとしては、図5のようなタイプに限らず、一つの搬送装置に全ての成膜装置が接続されているタイプであってもよい。また、図5のようなマルチチャンバタイプのシステムではなく、バリア膜、Ruライナー膜、純Cu膜(純Cuシード膜)、Cu合金膜のうち、一部のみを同一の成膜システムで形成し、残部を別個に設けた装置により大気暴露を経て成膜するようにしてもよいし、全てを別個の装置で大気暴露を経て成膜するようにしてもよい。
<Other applications>
As mentioned above, although embodiment of this invention was described, this invention can be variously deformed, without being limited to the said embodiment. For example, the film forming system is not limited to the type as shown in FIG. 5, but may be a type in which all film forming apparatuses are connected to one transfer apparatus. Further, instead of the multi-chamber type system as shown in FIG. 5, only a part of the barrier film, Ru liner film, pure Cu film (pure Cu seed film), and Cu alloy film is formed by the same film forming system. Alternatively, the film may be formed through exposure to the atmosphere with an apparatus provided with the remaining part, or all may be formed through exposure to the atmosphere with a separate apparatus.

 さらに、上記実施形態では、トレンチとビア(ホール)とを有するウエハに本発明の方法を適用した例を示したが、トレンチのみを有する場合でも、ホールのみを有する場合でも本発明を適用できることはいうまでもない。また、シングルダマシン構造、ダブルダマシン構造、三次元実装構造等、種々の構造のデバイスにおける埋め込みに適用することができる。また、上記実施形態では、被処理基板として半導体ウエハを例にとって説明したが、半導体ウエハにはシリコンのみならず、GaAs、SiC、GaNなどの化合物半導体も含まれ、さらに、半導体ウエハに限定されず、液晶表示装置等のFPD(フラットパネルディスプレイ)に用いるガラス基板や、セラミック基板等にも本発明を適用することができることはもちろんである。  Furthermore, in the above embodiment, an example in which the method of the present invention is applied to a wafer having a trench and a via (hole) has been shown. However, the present invention can be applied to a case having only a trench or a case having only a hole. Needless to say. Further, the present invention can be applied to embedding in devices having various structures such as a single damascene structure, a double damascene structure, and a three-dimensional mounting structure. In the above embodiment, the semiconductor wafer is described as an example of the substrate to be processed. However, the semiconductor wafer includes not only silicon but also compound semiconductors such as GaAs, SiC, and GaN, and is not limited to the semiconductor wafer. Of course, the present invention can also be applied to glass substrates, ceramic substrates, and the like used in FPDs (flat panel displays) such as liquid crystal display devices.

 1;成膜システム、12a、12b;バリア膜成膜装置、14a、14b;Ruライナー膜成膜装置、22a、22b;Cu合金膜成膜装置、24a、24b;Cu膜成膜装置、201;下部構造、202;層間絶縁膜、203;トレンチ、204;バリア膜、205;Ruライナー膜、206;Cu合金膜、207;積み増し層、208;Cu配線、209;キャップ層、W;半導体ウエハ(被処理基板) DESCRIPTION OF SYMBOLS 1; Film-forming system, 12a, 12b; Barrier film-forming apparatus, 14a, 14b; Ru liner film-forming apparatus, 22a, 22b; Cu alloy film-forming apparatus, 24a, 24b; Cu film-forming apparatus, 201; Substructure 202; interlayer insulating film 203; trench 204; barrier film 205; Ru liner film 206; Cu alloy film 207; additional layer 208; Cu wiring 209; cap layer W; semiconductor wafer ( Substrate)

Claims (12)

 基板に形成された所定パターンの凹部内にCu配線を形成するCu配線の形成方法であって、
 少なくとも前記凹部の表面にバリア膜を形成する工程と、
 エレクトロマイグレーション耐性が純Cuよりも高く、かつ抵抗値が許容範囲となる程度の合金成分を含有するCu合金膜をPVDにより形成し、前記表面にバリア膜が形成された前記凹部内を前記Cu合金膜により埋め込む工程と、
 前記Cu合金膜の上に積み増し層を形成する工程と、
 CMPにより全面を研磨して前記凹部内にCu配線を形成する工程と
を有するCu配線の形成方法。
A Cu wiring forming method for forming a Cu wiring in a recess of a predetermined pattern formed on a substrate,
Forming a barrier film on at least the surface of the recess;
A Cu alloy film containing an alloy component having an electromigration resistance higher than that of pure Cu and having a resistance value in an allowable range is formed by PVD, and the Cu alloy is formed in the recess where the barrier film is formed on the surface. Embedding with a film;
Forming a stacked layer on the Cu alloy film;
And forming a Cu wiring in the recess by polishing the entire surface by CMP.
 前記Cu合金膜の合金成分の濃度が所定値となるように、成膜条件に応じてPVDを行う際のターゲットの合金成分の濃度を決定する請求項1に記載のCu配線の形成方法。 The method for forming a Cu wiring according to claim 1, wherein the concentration of the alloy component of the target when performing PVD is determined according to the film forming conditions so that the concentration of the alloy component of the Cu alloy film becomes a predetermined value.  前記バリア膜を形成した後、前記Cu合金膜を形成する前に、Ru膜を形成する工程をさらに有する請求項1に記載のCu配線の形成方法。 The method for forming a Cu wiring according to claim 1, further comprising a step of forming a Ru film after forming the barrier film and before forming the Cu alloy film.  前記Ru膜は、CVDにより形成される請求項3に記載のCu配線の形成方法。 4. The method of forming a Cu wiring according to claim 3, wherein the Ru film is formed by CVD.  前記Cu合金膜の形成は、基板が収容された処理容器内にプラズマ生成ガスによりプラズマを生成し、得ようとするCu合金膜と同じCu合金からなるターゲットから粒子を飛翔させて、粒子を前記プラズマ中でイオン化させ、前記基板にバイアス電力を印加してイオンを基板上に引きこむ装置により行われる請求項1に記載のCu配線の形成方法。 In the formation of the Cu alloy film, plasma is generated by a plasma generation gas in a processing container in which a substrate is accommodated, and particles are ejected from a target made of the same Cu alloy as the Cu alloy film to be obtained. The method for forming a Cu wiring according to claim 1, wherein the Cu wiring is formed by an apparatus that is ionized in plasma and applies a bias power to the substrate to draw ions onto the substrate.  前記積み増し層の形成は、PVDによりCu合金膜または純Cu膜を形成することにより行う請求項1に記載のCu配線の形成方法。 2. The method for forming a Cu wiring according to claim 1, wherein the additional layer is formed by forming a Cu alloy film or a pure Cu film by PVD.  前記積み増し層の形成は、前記Cu合金膜を形成した後、同じ装置により同じCu合金を形成することにより行われる請求項1に記載のCu配線の形成方法。 The method for forming a Cu wiring according to claim 1, wherein the additional layer is formed by forming the same Cu alloy with the same apparatus after forming the Cu alloy film.  前記Cu合金膜を構成するCu合金は、Cu-Al、Cu-Mn、Cu-Mg、Cu-Ag、Cu-Sn、Cu-Pb、Cu-Zn、Cu-Pt、Cu-Au、Cu-Ni、Cu-Co、およびCu-Tiから選択されるものである請求項1に記載のCu配線の形成方法。 The Cu alloy constituting the Cu alloy film is Cu—Al, Cu—Mn, Cu—Mg, Cu—Ag, Cu—Sn, Cu—Pb, Cu—Zn, Cu—Pt, Cu—Au, Cu—Ni. The method for forming a Cu wiring according to claim 1, wherein the method is selected from Cu, Cu-Co, and Cu-Ti.  前記Cu合金膜を構成するCu合金は、Cu-Mnである請求項8に記載のCu配線の形成方法。 The method for forming a Cu wiring according to claim 8, wherein the Cu alloy constituting the Cu alloy film is Cu-Mn.  前記Cu合金膜を構成するCu合金は、Cu-Alである請求項8に記載のCu配線の形成方法。 The method for forming a Cu wiring according to claim 8, wherein the Cu alloy constituting the Cu alloy film is Cu-Al.  前記バリア膜は、Ti膜、TiN膜、Ta膜、TaN膜、Ta/TaNの2層膜、TaCN膜、W膜、WN膜、WCN膜、Zr膜、ZrN膜、V膜、VN膜、Nb膜、NbN膜からなる群から選択される請求項1に記載のCu配線の形成方法。 The barrier film is a Ti film, TiN film, Ta film, TaN film, Ta / TaN two-layer film, TaCN film, W film, WN film, WCN film, Zr film, ZrN film, V film, VN film, Nb The method for forming a Cu wiring according to claim 1, wherein the Cu wiring is selected from the group consisting of a film and an NbN film.  コンピュータ上で動作し、Cu配線形成システムを制御するためのプログラムが記憶されたコンピュータ読み取り可能な記憶媒体であって、前記プログラムは、実行時に、請求項1に記載のCu配線の形成方法が行われるように、コンピュータに前記Cu配線形成システムを制御させるコンピュータ読み取り可能な記憶媒体。 A computer-readable storage medium that operates on a computer and stores a program for controlling a Cu wiring forming system, wherein the program is executed when the Cu wiring forming method according to claim 1 is executed. A computer-readable storage medium that causes a computer to control the Cu wiring formation system.
PCT/JP2013/065393 2012-07-09 2013-06-03 METHOD FOR FORMING Cu WIRING, AND COMPUTER-READABLE MEMORY MEDIUM Ceased WO2014010333A1 (en)

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