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WO2013127189A1 - Pixel unit driving circuit, pixel unit driving method and pixel unit - Google Patents

Pixel unit driving circuit, pixel unit driving method and pixel unit Download PDF

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Publication number
WO2013127189A1
WO2013127189A1 PCT/CN2012/084015 CN2012084015W WO2013127189A1 WO 2013127189 A1 WO2013127189 A1 WO 2013127189A1 CN 2012084015 W CN2012084015 W CN 2012084015W WO 2013127189 A1 WO2013127189 A1 WO 2013127189A1
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WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
driving
oled
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2012/084015
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French (fr)
Chinese (zh)
Inventor
青海刚
祁小敬
高永益
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Publication of WO2013127189A1 publication Critical patent/WO2013127189A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes

Definitions

  • Pixel unit driving circuit Pixel unit driving method, and pixel unit
  • the present invention relates to the field of organic light emitting display, and more particularly to a pixel unit driving circuit, a pixel unit driving method, and a pixel unit. Background technique
  • the AMOLED Active Matrix Organic Light Emitting Diode
  • the AMOLED is capable of emitting light by a current generated when a driving TFT (Thin Film Transistor) is saturated, because different widths are input when the same gray scale voltage is input.
  • the value voltage produces different drive currents, causing current inconsistencies.
  • Vth crystal tube threshold voltage
  • Vth also drifts, so the brightness uniformity of the conventional 2T1C circuit has been poor.
  • the conventional 2T1C pixel unit driving circuit is shown in Figure 1.
  • the circuit contains only two TFTs, T1 is used as a switch, and DTFT is used for pixel driving.
  • the conventional 2T1C pixel unit driving circuit is also relatively simple to operate.
  • the control timing diagram of the 2T1C pixel unit driving circuit is as shown in FIG. 2. When the scanning level Vscan of the scanning line Scan output is low, T1 is turned on, and the data line Data is The upper gray scale voltage charges the capacitor C. When the scan level is high, T1 is turned off, and the capacitor C is used to store the gray scale voltage.
  • the driving current formula of the 2T1C pixel unit driving circuit includes Vth.
  • the Vth of the TFTs at different positions of the manufactured panel is greatly different, resulting in a large difference.
  • the driving current of the OLED is different under the same gray scale voltage, so the brightness of the panel at different positions of the driving scheme may be different, and the brightness uniformity is poor.
  • the OLED material gradually ages, resulting in an increase in the threshold voltage of the OLED, and at the same current, the luminous efficiency of the OLED material decreases, and the brightness of the panel decreases.
  • a main object of the present invention is to provide a pixel unit driving circuit and a pixel unit driving method And the pixel unit can compensate the threshold voltage of the driving thin film transistor while compensating for the driving current drop caused by the rising aging threshold voltage of the OLED material.
  • the present invention provides a pixel unit driving circuit for driving an OLED, including a driving thin film transistor, a first switching element, a storage capacitor, a driving control unit, and a charging control unit, wherein
  • a gate of the driving thin film transistor is connected to the first end of the storage capacitor, and is further connected to a drain of the driving thin film transistor through the charging control unit;
  • a source of the driving thin film transistor is connected to the first end of the OLED, and is connected to the second end of the storage capacitor through the driving control unit;
  • the drain of the driving thin film transistor is connected to the first end of the driving power source through the first switching element;
  • the second end of the storage capacitor Cs is further connected to the first end of the driving power source through the charging control unit;
  • the second end of the OLED is connected to the second end of the driving power source through the driving control unit;
  • the second end of the OLED is connected to the data line through the charging control unit.
  • the driving thin film transistor is a p-type thin film transistor
  • the first end of the OLED is a cathode of the OLED, and the second end of the OLED is the
  • An anode of the OLED, and a source of the driving thin film transistor is connected to a cathode of the OLED; a first end of the driving power source is a low level output end of the driving power source, and a second end of the driving power source is a high level output terminal of the driving power source, and a drain of the driving thin film transistor is connected to a low level output end of the driving power source through the first switching element;
  • the second end of the storage capacitor is connected to the low level output terminal of the driving power source through the charging control unit.
  • the first switching element is a first thin film transistor
  • the driving control unit includes a second thin film transistor and a third thin film transistor
  • the charging control unit includes a fourth thin film transistor, a fifth thin film transistor, and a Six thin film transistors
  • the first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor;
  • the second thin film transistor has a gate connected to the second control line, a source and the driving power source a high level output is connected, and a drain is connected to an anode of the OLED;
  • the third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor;
  • the fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor;
  • the fifth thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor;
  • the sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors, and the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type Thin film transistor.
  • the first switching element is a first thin film transistor
  • the driving control unit includes a second thin film transistor and a third thin film transistor
  • the charging control unit includes a fourth thin film transistor, a fifth thin film transistor, and a sixth thin film transistor
  • the first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor;
  • the second thin film transistor has a gate connected to the second control line, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;
  • the third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor;
  • the fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor;
  • the fifth thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source;
  • the sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors, and the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type Thin film transistor.
  • the driving thin film transistor is an n-type thin film transistor; a first end of the OLED is an anode of the OLED, a second end of the OLED is a cathode of the OLED, and the driving a source of the thin film transistor is connected to an anode of the OLED; a first end of the driving power source is a high level output end of the driving power source, and a second end of the driving power source is a low level of the driving power source An output end, and a drain of the driving thin film transistor is connected to a high level output end of the driving power source through the first switching element;
  • the second end of the storage capacitor is connected to the high-level output terminal of the driving power source through the charging control unit.
  • the first switching element is a first thin film transistor
  • the charging control unit includes a second thin film transistor, a third thin film transistor, and a fourth thin film transistor
  • the driving control unit includes a fifth thin film transistor and a Six thin film transistors
  • the first thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a high level output end of the driving power source;
  • the second thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source;
  • the third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor;
  • the fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;
  • the fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor;
  • the sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;
  • the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors.
  • the first switching element is a first thin film transistor
  • the charging control unit includes a second thin film transistor, a third thin film transistor, and a fourth thin film transistor
  • the driving control unit includes a fifth thin film transistor and a sixth thin film transistor
  • the first thin film transistor has a gate connected to the first control line, and a drain and the driving thin film crystal a drain connection of the body tube, the source being connected to a high level output terminal of the driving power source;
  • the second thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor;
  • the third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor;
  • the fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;
  • the fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor;
  • the sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;
  • the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors.
  • the present invention also provides a pixel unit driving method, which is applied to the above pixel unit driving circuit, and the pixel unit driving method includes the following steps:
  • Pixel charging step the charging control unit first controls the driving of the driving thin film transistor, and controls charging of the storage capacitor until the gate potential of the driving thin film transistor rises to cause the driving thin film transistor to be turned off;
  • Driving the OLED light emitting display step the driving control unit controls the driving thin film transistor to be turned on and the gate thereof is in a floating state to drive the OLED light emitting display and make the gate-source voltage of the driving thin film transistor compensate the threshold value of the driving thin film transistor Voltage.
  • the present invention also provides a pixel unit including an OLED and a pixel unit driving circuit according to the above embodiment;
  • the pixel unit driving circuit includes a source of a driving thin film transistor connected to a cathode of the OLED, and an anode of the OLED is connected to a high level output end of the driving power source through the driving control unit, where the driving thin film transistor is The drain is connected to the low level output of the driving power source through the first switching element.
  • the present invention also provides a pixel unit including an OLED and a pixel unit driving circuit according to another embodiment described above; a source of the driving thin film transistor included in the pixel unit driving circuit is connected to an anode of the OLED, and a cathode of the OLED is connected to a low level output end of the driving power source through the driving control unit, where the driving thin film transistor The drain is connected to the high level output terminal of the driving power source through the first switching unit.
  • the pixel unit driving circuit, the pixel unit driving method and the pixel unit of the present invention are input from the source of the DTFT through the data voltage Vdata, and the self-discharge of the DTFT is used to connect the Vth (the threshold of the DTFT) Voltage), Vdata (data voltage), Vth-oled (the threshold voltage of OLED light) is stored in the storage capacitor Cs, compensating for the threshold voltage of the driving thin film transistor, and using the voltage feedback mechanism to compensate for the wide value caused by aging of the OLED material The drive current caused by the voltage rise drops.
  • Vth the threshold of the DTFT
  • Vdata data voltage
  • Vth-oled the threshold voltage of OLED light
  • 1 is a circuit diagram of a conventional 2T1C pixel unit driving circuit
  • 2 is a control timing chart of the conventional 2T1C pixel unit driving circuit
  • FIG. 3 is a circuit diagram of a pixel unit driving circuit according to a first embodiment of the present invention.
  • FIG. 4 is a circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention.
  • FIG. 5 is a circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention.
  • FIG. 6 is a circuit diagram of a pixel unit driving circuit according to a fourth embodiment of the present invention.
  • FIG. 7 is a circuit diagram of a pixel unit driving circuit according to a fifth embodiment of the present invention.
  • FIG. 8 is a circuit diagram of a pixel unit driving circuit according to a sixth embodiment of the present invention.
  • FIG. 9 is a timing chart of signals when a pixel unit driving circuit according to a second embodiment of the present invention operates.
  • FIG. 10A is an equivalent circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention in a first period of time
  • FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit in the second period of time according to the second embodiment of the present invention.
  • FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit in the third period of time according to the second embodiment of the present invention.
  • 11A is an equivalent circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention in a first period of time
  • 11B is an equivalent circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention in a second period of time
  • 11C is an equivalent circuit diagram of the pixel unit driving circuit in the third period of time according to the third embodiment of the present invention.
  • Fig. 12 is a timing chart showing signals of the pixel unit driving circuit according to the fifth embodiment of the present invention and the pixel unit driving circuit of the sixth embodiment. detailed description
  • the pixel unit driving circuit is configured to drive an OLED, including a driving thin film transistor DTFT, a first switching element 10, a storage capacitor Cs, a driving control unit 11, and a charging control unit 12. , among them,
  • the gate of the driving thin film transistor DTFT is connected to the first end of the storage capacitor Cs, and is also connected to the drain of the driving thin film transistor DTFT through the charging control unit 12;
  • the source of the driving thin film transistor DTFT is connected to the cathode of the OLED, and is connected to the second end of the storage capacitor Cs through the driving control unit 11;
  • the drain of the driving thin film transistor DTFT is connected to the low-level output terminal of the driving power source through the first switching element 10;
  • the second end of the storage capacitor Cs is connected to the low-level output end of the driving power source through the charging control unit 12;
  • the anode of the OLED is connected to the high-level output end of the driving power source through the driving control unit 11, and is also connected to the data line through the charging control unit 12;
  • the driving thin film transistor DTFT is a p-type thin film transistor
  • the data line outputs a data voltage Vdata
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • Point P is a node connected to the second end of the storage capacitor Cs
  • point G is the storage capacitor The node to which the first end of the Cs is connected.
  • the charging control unit 12 turns on the connection between the gate and the drain of the DTFT, and turns on the connection between the second end of the Cs and the low-level output of the driving power source. And conducting a connection between the anode of the OLED and the data line; if the previous stage of the driving transistor DTFT is in an off state, the G point (ie, the node connected to the gate of the DTFT) is in a floating state, and the charging control unit The conduction of 12 will cause the floating G point potential to be seriously pulled down, so that the DTFT is turned on.
  • the DTFT If the DTFT is turned on in the previous stage, it will enter the working state of this stage, the DTFT is in the diode connection state, and the data line passes through the OLED.
  • the first switching element 10 turns on a connection between a drain of the DTFT and a low-level output of the driving power source
  • the driving control unit 11 turns on the source of the DTFT and the second of the Cs.
  • the operating voltage is inconsistent with Vth-oled, and the gate of DTFT is floating, so the voltage of Vg jumps to Vdata-Vth-oled- I Vth
  • -VSS +VDD- Voled ) VSS+Vth_oled+ I Vth
  • the current I flowing through the DTFT has nothing to do with the threshold voltage Vth of the DTFT, so that the uniformity of the current can be improved to achieve uniform brightness; while the current I flowing through the DTFT includes Vth-oled.
  • Vth-oled As the use time prolongs, the aging efficiency of the OLED material decreases, Vth-oled rises, and the rise of Vth-oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.
  • the pixel unit driving circuit according to the second embodiment of the present invention is based on the pixel unit driving circuit according to the first embodiment of the present invention;
  • the first switching element 10 is a first thin film transistor T1
  • the driving control unit 11 includes a second thin film transistor T2 and a third thin film transistor T3
  • the charging control unit 12 includes a fourth thin film transistor T4 and a fifth thin film transistor. ⁇ 5 and sixth thin film transistor ⁇ 6;
  • the first thin film transistor T1 has a gate connected to a first control line outputting the first control signal S1, a drain connected to a low level output end of the driving power source, and a drain of the source and the driving thin film transistor DTFT Pole connection
  • the second thin film transistor T2 has a gate connected to a second control line outputting the second control signal S2, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;
  • the third thin film transistor T3 has a gate connected to the second control line, a source connected to the source of the driving thin film transistor DTFT, and a drain connected to the second end of the storage capacitor Cs;
  • the fourth thin film transistor T4 has a gate connected to the first control line, a drain connected to the first end of the storage capacitor Cs, and a source connected to the drain of the driving thin film transistor DTFT;
  • the fifth thin film transistor T5 has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor Cs;
  • the sixth thin film transistor T6 has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all p-type thin film transistors, and the fourth switching element T4 and the fifth thin film transistor T5 And the sixth thin film transistor T6 is an n-type thin film transistor;
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • Point P is a node connected to the second end of the storage capacitor Cs
  • point G is a node connected to the first end of the storage capacitor Cs.
  • the pixel unit driving circuit according to the third embodiment of the present invention is based on the pixel unit driving circuit according to the first embodiment of the present invention.
  • the first switching element 10 is a first thin film transistor T1
  • the driving control unit 11 includes a second thin film transistor T2 and a third thin film transistor T3
  • the charging control unit 12 includes a fourth thin film transistor T4 and a fifth thin film transistor.
  • the first thin film transistor T1 has a gate connected to a first control line outputting the first control signal S1, a drain connected to a low level output end of the driving power source, a source and the driving thin film transistor
  • the second thin film transistor ⁇ 2 has a gate connected to a second control line outputting the second control signal S2, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;
  • the third thin film transistor ⁇ 3 has a gate connected to the second control line, a source connected to the source of the driving thin film transistor DTFT, and a drain connected to the second end of the storage capacitor Cs;
  • the fourth thin film transistor T4 has a gate connected to the first control line, a drain connected to the first end of the storage capacitor Cs, and a source connected to the drain of the driving thin film transistor DTFT;
  • the fifth thin film transistor T5 has a gate connected to the first control line, a source connected to the second end of the storage capacitor Cs, and a drain connected to the high-level output end of the driving power source;
  • the sixth thin film transistor T6 has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all p-type thin film transistors, the fourth switching element T4, the fifth thin film transistor T5, and the sixth
  • the thin film transistor ⁇ 6 is an n-type thin film transistor
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • the defect is a node connected to the second end of the storage capacitor Cs, and the G point is the storage capacitor The node to which the first end of the Cs is connected.
  • the pixel unit driving circuit is configured to drive an OLED, including a driving thin film transistor DTFT, a first switching element 20, a storage capacitor Cs, a driving control unit 21, and a charging control unit 22. , among them,
  • the gate of the driving thin film transistor DTFT is connected to the first end of the storage capacitor Cs, and is also connected to the drain of the driving thin film transistor DTFT through the charging control unit 22;
  • the source of the driving thin film transistor DTFT is connected to the anode of the OLED, and is connected to the second end of the storage capacitor Cs through the driving control unit 21;
  • the drain of the driving thin film transistor DTFT is connected to the high-level output terminal of the driving power source through the first switching element 20;
  • the second end of the storage capacitor Cs is connected to the high-level output end of the driving power source through the charging control unit 22;
  • the cathode of the OLED is connected to the data line through the charging control unit 22, and is also connected to the low-level output end of the driving power source through the driving control unit 21;
  • the driving thin film transistor DTFT is an n-type thin film transistor
  • the data line outputs a data voltage Vdata
  • the output voltage of the high level output terminal of the driving power source is VDD, and the output voltage of the low level output terminal of the driving power source is VSS.
  • a pixel unit driving circuit according to a fifth embodiment of the present invention is based on a pixel unit driving circuit according to a fourth embodiment of the present invention.
  • the first switching element 20 is a first thin film transistor T1
  • the charging control unit 22 includes a second thin film transistor T2, a third thin film transistor T3, and a fourth thin film transistor T4, and the driving control unit 21 includes a fifth thin film transistor.
  • the first thin film transistor T1 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the high level output end of the driving power source;
  • the second thin film transistor T2 has a gate connected to the first control line, a source connected to the second end of the storage capacitor Cs, and a drain connected to the high level output end of the driving power source;
  • the third thin film transistor T3 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the gate of the driving thin film transistor DTFT; the fourth film Transistor T4, the gate is connected to the first control line, and the source is connected to the data line. a drain connected to a cathode of the OLED;
  • the fifth thin film transistor T5 has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor DTFT;
  • the sixth thin film transistor T6 has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;
  • the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are n-type thin film transistors, and the first thin film transistor T1, the fifth thin film transistor T5, and the sixth thin film transistor T6 a p-type thin film transistor;
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • the defect is a node connected to the second end of the storage capacitor Cs, and the G point is a node connected to the first end of the storage capacitor Cs.
  • the pixel unit driving circuit according to the sixth embodiment of the present invention is based on the pixel unit driving circuit according to the fourth embodiment of the present invention.
  • the first switching element 20 is a first thin film transistor T1
  • the charging control unit 22 includes a second thin film transistor T2, a third thin film transistor T3, and a fourth thin film transistor T4, and the driving control unit 21 includes a fifth thin film transistor.
  • the first thin film transistor T1 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the high level output end of the driving power source;
  • the second thin film transistor ⁇ 2 has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor Cs;
  • the third thin film transistor T3 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the gate of the driving thin film transistor DTFT;
  • the fourth film The transistor T4 has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;
  • the fifth thin film transistor T5 has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor DTFT;
  • the sixth thin film transistor T6 has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;
  • the tube T4 is an n-type thin film transistor
  • the first thin film transistor T1, the fifth thin film transistor T5, and the sixth thin film transistor T6 are p-type thin film transistors
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • the defect is a node connected to the second end of the storage capacitor Cs, and the G point is the storage capacitor
  • the node to which the first end of the Cs is connected is connected.
  • FIG. 10A is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a first period of time
  • FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a second period of time
  • FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a third period of time
  • T1 in the first time period, that is, in the initial stage, T1, ⁇ 2, and ⁇ 3 are all turned off, and ⁇ 4, ⁇ 5, and ⁇ 6 are turned on.
  • the G point ie, The node connected to the gate of the DTFT is in a floating state, and the conduction of T5 will cause the floating G point potential to be seriously pulled down, so that the DTFT is turned on. If the DTFT is turned on in the previous stage, it will enter the work of this stage.
  • T1 is turned on
  • T2, ⁇ 3, ⁇ 4, ⁇ 5, ⁇ 6 are all turned off
  • the DTFT is also turned off, and is in a working stop state to avoid the switch due to switching.
  • T4 in the third period, T4, ⁇ 5, and ⁇ 6 are turned off, and T1, ⁇ 2, and ⁇ 3 are turned on, since the ⁇ point potential is hopped from VSS to VDD-Voled (Voled is the operating voltage of the OLED for this gray scale) , does not coincide with Vth-oled, and the gate of DTFT is floating, so the voltage of Vg jumps to Vdata-Vth- oled- I Vth
  • -VSS +VDD-Voled ) VSS+Vth_oled+ I Vth
  • the current I flowing through the DTFT has nothing to do with the threshold voltage Vth of the DTFT, so that the uniformity of the current can be improved to achieve uniform brightness; while the current I flowing through the DTFT includes Vth-oled.
  • Vth-oled As the use time prolongs, the aging efficiency of the OLED material decreases, Vth-oled rises, and the rise of Vth-oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.
  • 11A is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a first period of time
  • FIG. 11B is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a second period of time
  • Fig. 11C is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in the third period.
  • Vdata In the pixel unit driving circuit according to the second embodiment of the present invention, Vdata must be a negative voltage having a large absolute value to cause the entire circuit to emit light, otherwise the DTFT cannot be turned on, and the pixel according to the third embodiment of the present invention. This limitation is not present in the unit driver circuit. Vdata requires only a small positive voltage to turn the DTFT on and operate normally.
  • the operation timing of the pixel unit driving circuit according to the second embodiment of the present invention is still applicable to the pixel unit driving circuit according to the third embodiment of the present invention, and the operation of the circuit is also completely the same, which is only the third embodiment of the present invention.
  • Pixel unit drive circuit at During the three time period, the P point potential changes from VDD to VDD-Voled (Voled is the operating voltage of the OLED for this gray scale, which is inconsistent with Vth-oled), and the gate of the DTFT is floating), so the G point potential Vg jumps to Vdata-Vth- oled- I Vth
  • - Voled) VDD- Vdata+Vth_oled+ I Vth
  • , Current through the DTFT I K(Vsg- I Vth
  • f
  • I K(VDD- Vdata+Vth oled) 2 ;
  • K is the current coefficient of the DTFT;
  • ⁇ . ⁇ ⁇ ⁇ ⁇ ; ⁇ , C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.
  • the pixel unit driving circuit according to the fifth embodiment of the present invention and the pixel unit driving circuit according to the sixth embodiment of the present invention are in operation, the first control signal S1, the second control signal S2, and the A timing diagram of the output signal Vdata of the data line.
  • the pixel unit driving circuit of the fifth embodiment of the present invention only converts the DTFT into an n-type thin film transistor, and the source of the DTFT and the anode of the OLED. Connection, the working process of the circuit is exactly the same, but the bottom light has a problem of aperture ratio.
  • Vdata In the pixel unit driving circuit of the fifth embodiment of the present invention, Vdata must also be a large positive voltage to turn on the DTFT, and the pixel unit driving circuit according to the sixth embodiment of the present invention overcomes this. Problem, in the pixel unit driving circuit according to the sixth embodiment of the present invention, Vdata only needs a small positive voltage to turn on the DTFT, so that the circuit works normally.
  • Vg jumps to Vdata+Vth_oled+Vth+VSS+ Voled- VDD
  • ⁇ . ⁇ ⁇ ⁇ ⁇ ; ⁇ , C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.
  • Vth oled-VSS Vth oled-VSS 2 ;
  • K is the current coefficient of the DTFT
  • ⁇ . ⁇ ⁇ ⁇ ⁇ ; ⁇ , C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.
  • a pixel unit driving circuit according to a third embodiment of the present invention, a sixth embodiment of the present invention, in comparison with the pixel unit driving circuit of the second embodiment of the present invention, the pixel unit driving circuit according to the fifth embodiment of the present invention
  • the pixel unit driving circuit described in the example reduces the voltage value of the data voltage Vdata, and reduces the power consumption of the pixel unit driving circuit, and also reduces the complexity of the pixel unit driving circuit.
  • the most characteristic feature of the pixel unit driving circuit of the present invention is that the data voltage Vdata is input from the source of the DTFT, and the self-discharge of the DTFT diode is used to connect Vth (the threshold voltage of the DTFT), Vdata (data voltage), Vth_oled (OLED light emission).
  • the threshold voltage is stored in the storage capacitor Cs to compensate the threshold voltage of the driving thin film transistor of the OLED, and the OLED is compensated by the voltage feedback mechanism.
  • the present invention also provides a pixel unit driving method, which is applied to the pixel unit described above. a driving circuit, the pixel unit driving method comprising the following steps:
  • Pixel charging step the charging control unit first controls the driving of the driving thin film transistor, and controls charging of the storage capacitor until the gate potential of the driving thin film transistor is raised to make the driving thin Membrane transistor cutoff;
  • Driving the OLED light emitting display step the driving control unit controls the driving thin film transistor to be turned on and the gate thereof is in a floating state to drive the OLED light emitting display and make the gate-source voltage of the driving thin film transistor compensate the threshold value of the driving thin film transistor Voltage.
  • the present invention also provides a pixel unit including an OLED and the pixel unit driving circuit of the first embodiment, the second embodiment, and the third embodiment;
  • the pixel unit driving circuit includes a source of a driving thin film transistor connected to a cathode of the OLED, and an anode of the OLED is connected to a high level output end of the driving power source through the driving control unit, where the driving thin film transistor is The drain is connected to the low level output of the driving power source through the first switching element.
  • the present invention further provides a pixel unit including an OLED and the pixel unit driving circuit of the fourth embodiment, the fifth embodiment, and the sixth embodiment;
  • a source of the driving thin film transistor included in the pixel unit driving circuit is connected to an anode of the OLED, and a cathode of the OLED is connected to a low level output end of the driving power source through the driving control unit, where the driving thin film transistor The drain is connected to the high level output terminal of the driving power source through the first switching element.
  • the source s and the drain g of the above various thin film transistors are manufactured in the same process, and are interchangeably named. Change the name according to the direction of the voltage.
  • the types of the transistors in the same pixel circuit may be the same or different, and it is only necessary to adjust the timing high and low levels of the corresponding gate-on signal source according to the characteristics of its own threshold voltage.
  • the preferred method is that the types of transistors that require the same gate-on signal source are the same.
  • all of the thin film transistors are of the same type (including a thin film transistor as a switching element, a driving thin film transistor, and a matching thin film transistor), and are both an n-type thin film transistor or a p-type thin film transistor.

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Abstract

A pixel unit driving circuit, a pixel unit driving method and a pixel unit are provided. The pixel unit driving circuit comprises a driving thin film transistor (DTFT), a first switching element (10), a storage capacitor (Cs), a driving control unit (11) and a charging control unit (12). The grid electrode of the driving thin film transistor (DTFT) is connected with the first end of the storage capacitor (Cs), and is further connected with the drain electrode of the driving thin film transistor (DTFT) through the charging control unit (12).The source electrode of the driving thin film transistor (DTFT) is connected with the first end of an OLED, and is connected with the second end of the storage capacitor (Cs) through the driving control unit (11). The drain electrode of the driving thin film transistor (DTFT) is connected with the first end (VDD) of a driving power supply through the first switching element (10). The second end of the storage capacitor (Cs) is connected with the first end (VDD) of the driving power supply through the charging control unit (12). The second end of the OLED is connected with the second end (VSS) of the driving power supply through the driving control unit (11). The second end of the OLED is connected with a date line (Vdata) through the charging control unit (12). The pixel unit driving circuit, the pixel unit driving method and the pixel unit compensate the threshold voltage of the driving thin film transistor (DTFT), and compensate the fall of the driving current due to material aging of the OLED.

Description

像素单元驱动电路、 像素单元驱动方法以及像素单元 技术领域  Pixel unit driving circuit, pixel unit driving method, and pixel unit

本发明涉及有机发光显示领域， 尤其涉及一种像素单元驱动电路、 像 素单元驱动方法以及像素单元。 背景技术  The present invention relates to the field of organic light emitting display, and more particularly to a pixel unit driving circuit, a pixel unit driving method, and a pixel unit. Background technique

AMOLED ( Active Matrix Organic Light Emitting Diode , 有源矩阵有 机发光二极体 )能够发光是由驱动 TFT (薄膜晶体管 )在饱和状态时产生的 电流所驱动， 因为输入相同的灰阶电压时， 不同的阔值电压会产生不同的驱 动电流， 造成电流的不一致性。 LTPS (低温多晶硅）制造工艺上 Vth (晶体 管阔值电压） 的均匀性非常差， 同时 Vth也有漂移， 如此传统的 2T1C电路 亮度均匀性一直很差。  The AMOLED (Active Matrix Organic Light Emitting Diode) is capable of emitting light by a current generated when a driving TFT (Thin Film Transistor) is saturated, because different widths are input when the same gray scale voltage is input. The value voltage produces different drive currents, causing current inconsistencies. In the LTPS (low temperature polysilicon) manufacturing process, the uniformity of Vth (crystal tube threshold voltage) is very poor, and Vth also drifts, so the brightness uniformity of the conventional 2T1C circuit has been poor.

传统的 2T1C像素单元驱动电路如图 1所示， 电路只含有两个 TFT, T1 用作开关， DTFT用于像素驱动。传统的 2T1C像素单元驱动电路操作也比较 简单，对该 2T1C像素单元驱动电路的控制时序图如图 2所示，当扫描线 Scan 输出的扫描电平 Vscan为低时， T1导通，数据线 Data上的灰阶电压对电容 C 充电， 当扫描电平为高时， T1截止， 电容 C用来保存灰阶电压。 由于 VDD (驱动电源高电平输出端输出的电压）较高，因此 DTFT处于饱和状态， OLED 的驱动电流 I=K(Vsg- | Vth |)2 = K(VDD- Vdata- | Vth |)2 , Vsg是 DTFT的源极 和栅极之间的电压差值， Vdata为数据线 Data上的灰阶电压， K是一个与晶 体管尺寸和载流子迁移率有关的常数， 一旦 TFT尺寸和工艺确定， K确定。 该 2T1C像素单元驱动电路的驱动电流公式中包含了 Vth, 如前所述， 由于 LTPS 工艺的不成熟， 即便是同样的工艺参数， 制造出来的面板不同位置的 TFT的 Vth也有较大差异，导致了同一灰阶电压下 OLED的驱动电流不一样， 因此该驱动方案下的面板不同位置亮度会有差异， 亮度均一性差。 同时随着 OLED面板使用的延长， OLED材料逐渐老化， 导致 OLED发光的阔值电压 上升， 同样的电流下， OLED材料发光效率下降， 面板亮度降低。 发明内容 The conventional 2T1C pixel unit driving circuit is shown in Figure 1. The circuit contains only two TFTs, T1 is used as a switch, and DTFT is used for pixel driving. The conventional 2T1C pixel unit driving circuit is also relatively simple to operate. The control timing diagram of the 2T1C pixel unit driving circuit is as shown in FIG. 2. When the scanning level Vscan of the scanning line Scan output is low, T1 is turned on, and the data line Data is The upper gray scale voltage charges the capacitor C. When the scan level is high, T1 is turned off, and the capacitor C is used to store the gray scale voltage. Since VDD (the voltage output from the high-level output of the driving power supply) is high, the DTFT is saturated, and the driving current of the OLED is I=K(Vsg- | Vth |) 2 = K(VDD- Vdata- | Vth |) 2 Vsg is the voltage difference between the source and the gate of the DTFT, Vdata is the grayscale voltage on the data line Data, and K is a constant related to the transistor size and carrier mobility, once the TFT size and process are determined , K is ok. The driving current formula of the 2T1C pixel unit driving circuit includes Vth. As described above, due to the immaturity of the LTPS process, even with the same process parameters, the Vth of the TFTs at different positions of the manufactured panel is greatly different, resulting in a large difference. The driving current of the OLED is different under the same gray scale voltage, so the brightness of the panel at different positions of the driving scheme may be different, and the brightness uniformity is poor. At the same time, with the extension of the use of the OLED panel, the OLED material gradually ages, resulting in an increase in the threshold voltage of the OLED, and at the same current, the luminous efficiency of the OLED material decreases, and the brightness of the panel decreases. Summary of the invention

本发明的主要目的在于提供一种像素单元驱动电路、 像素单元驱动方法 以及像素单元， 可以补偿驱动薄膜晶体管的阔值电压， 同时补偿 OLED材料 老化阈值电压上升导致的驱动电流下降。 A main object of the present invention is to provide a pixel unit driving circuit and a pixel unit driving method And the pixel unit can compensate the threshold voltage of the driving thin film transistor while compensating for the driving current drop caused by the rising aging threshold voltage of the OLED material.

为了达到上述目的， 本发明提供了一种像素单元驱动电路， 用于驱动 OLED, 包括驱动薄膜晶体管、 第一开关元件、 存储电容、 驱动控制单元和充 电控制单元， 其中，  In order to achieve the above object, the present invention provides a pixel unit driving circuit for driving an OLED, including a driving thin film transistor, a first switching element, a storage capacitor, a driving control unit, and a charging control unit, wherein

所述驱动薄膜晶体管的栅极， 与所述存储电容的第一端连接， 还通过所 述充电控制单元与所述驱动薄膜晶体管的漏极连接；  a gate of the driving thin film transistor is connected to the first end of the storage capacitor, and is further connected to a drain of the driving thin film transistor through the charging control unit;

所述驱动薄膜晶体管的源极， 与所述 OLED的第一端连接， 并通过所述 驱动控制单元与所述存储电容的第二端连接；  a source of the driving thin film transistor is connected to the first end of the OLED, and is connected to the second end of the storage capacitor through the driving control unit;

所述驱动薄膜晶体管的漏极， 通过所述第一开关元件与驱动电源的第一 端连接；  The drain of the driving thin film transistor is connected to the first end of the driving power source through the first switching element;

所述存储电容 Cs的第二端，还通过所述充电控制单元与所述驱动电源的 第一端连接；  The second end of the storage capacitor Cs is further connected to the first end of the driving power source through the charging control unit;

所述 OLED的第二端通过所述驱动控制单元与所述驱动电源的第二端连 接；  The second end of the OLED is connected to the second end of the driving power source through the driving control unit;

所述 OLED的第二端通过所述充电控制单元与数据线连接。  The second end of the OLED is connected to the data line through the charging control unit.

在一个实施例中， 所述驱动薄膜晶体管是 p型薄膜晶体管；  In one embodiment, the driving thin film transistor is a p-type thin film transistor;

所述 OLED的第一端为所述 OLED的阴极，所述 OLED的第二端为所述 The first end of the OLED is a cathode of the OLED, and the second end of the OLED is the

OLED的阳极， 并且所述驱动薄膜晶体管的源极与所述 OLED的阴极连接； 所述驱动电源的第一端为所述驱动电源的低电平输出端， 所述驱动电源 的第二端为所述驱动电源的高电平输出端， 并且所述驱动薄膜晶体管的漏极 通过所述第一开关元件与驱动电源的低电平输出端连接； An anode of the OLED, and a source of the driving thin film transistor is connected to a cathode of the OLED; a first end of the driving power source is a low level output end of the driving power source, and a second end of the driving power source is a high level output terminal of the driving power source, and a drain of the driving thin film transistor is connected to a low level output end of the driving power source through the first switching element;

所述存储电容的第二端通过所述充电控制单元与所述驱动电源的低电平 输出端连接。  The second end of the storage capacitor is connected to the low level output terminal of the driving power source through the charging control unit.

在一个示例中， 所述第一开关元件为第一薄膜晶体管， 所述驱动控制单 元包括第二薄膜晶体管和第三薄膜晶体管， 所述充电控制单元包括第四薄膜 晶体管、 第五薄膜晶体管和第六薄膜晶体管；  In one example, the first switching element is a first thin film transistor, the driving control unit includes a second thin film transistor and a third thin film transistor, and the charging control unit includes a fourth thin film transistor, a fifth thin film transistor, and a Six thin film transistors;

所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动电源的 低电平输出端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor;

所述第二薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动电源的 高电平输出端连接， 漏极与所述 OLED的阳极连接； The second thin film transistor has a gate connected to the second control line, a source and the driving power source a high level output is connected, and a drain is connected to an anode of the OLED;

所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动薄膜晶 体管的源极连接， 漏极与所述存储电容的第二端连接；  The third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor;

所述第四薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第一端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor;

所述第五薄膜晶体管， 栅极与第一控制线连接， 源极与所述驱动电源的 低电平输出端连接， 漏极与所述存储电容的第二端连接；  The fifth thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor;

所述第六薄膜晶体管， 栅极与第一控制线连接， 源极与所述 OLED的阳 极连接， 漏极与数据线连接；  The sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;

所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p 型薄膜晶体管， 所述第四开关元件、 所述第五薄膜晶体管和所述第六薄膜 晶体管是 n型薄膜晶体管。  The first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors, and the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type Thin film transistor.

在另一示例中， 所述第一开关元件为第一薄膜晶体管， 所述驱动控制单 元包括第二薄膜晶体管和第三薄膜晶体管， 所述充电控制单元包括第四薄膜 晶体管、 第五薄膜晶体管和第六薄膜晶体管；  In another example, the first switching element is a first thin film transistor, the driving control unit includes a second thin film transistor and a third thin film transistor, and the charging control unit includes a fourth thin film transistor, a fifth thin film transistor, and a sixth thin film transistor;

所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动电源的 低电平输出端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor;

所述第二薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动电源的 高电平输出端连接， 漏极与所述 OLED的阳极连接；  The second thin film transistor has a gate connected to the second control line, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;

所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动薄膜晶 体管的源极连接， 漏极与所述存储电容的第二端连接；  The third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor;

所述第四薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第一端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor;

所述第五薄膜晶体管， 栅极与第一控制线连接， 源极与所述存储电容的 第二端连接， 漏极与驱动电源的高电平输出端连接；  The fifth thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source;

所述第六薄膜晶体管， 栅极与第一控制线连接， 源极与所述 OLED的阳 极连接， 漏极与数据线连接；  The sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;

所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p 型薄膜晶体管， 所述第四开关元件、 所述第五薄膜晶体管和所述第六薄膜 晶体管是 n型薄膜晶体管。 在另一实施例中， 所述驱动薄膜晶体管是 n型薄膜晶体管； 所述 OLED的第一端为所述 OLED的阳极，所述 OLED的第二端为所述 OLED的阴极， 并且所述驱动薄膜晶体管的源极与所述 OLED的阳极连接； 所述驱动电源的第一端为所述驱动电源的高电平输出端， 所述驱动电源 的第二端为所述驱动电源的低电平输出端， 并且所述驱动薄膜晶体管的漏极 通过所述第一开关元件与驱动电源的高电平输出端连接； The first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors, and the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type Thin film transistor. In another embodiment, the driving thin film transistor is an n-type thin film transistor; a first end of the OLED is an anode of the OLED, a second end of the OLED is a cathode of the OLED, and the driving a source of the thin film transistor is connected to an anode of the OLED; a first end of the driving power source is a high level output end of the driving power source, and a second end of the driving power source is a low level of the driving power source An output end, and a drain of the driving thin film transistor is connected to a high level output end of the driving power source through the first switching element;

所述存储电容的第二端通过所述充电控制单元与所述驱动电源的高电平 输出端连接。  The second end of the storage capacitor is connected to the high-level output terminal of the driving power source through the charging control unit.

在一个示例中， 所述第一开关元件为第一薄膜晶体管， 所述充电控制单 元包括第二薄膜晶体管、 第三薄膜晶体管和第四薄膜晶体管， 所述驱动控制 单元包括第五薄膜晶体管和第六薄膜晶体管；  In one example, the first switching element is a first thin film transistor, the charging control unit includes a second thin film transistor, a third thin film transistor, and a fourth thin film transistor, and the driving control unit includes a fifth thin film transistor and a Six thin film transistors;

所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与驱动电源的高电平输出端连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a high level output end of the driving power source;

所述第二薄膜晶体管， 栅极与第一控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动电源的高电平输出端连接；  The second thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source;

所述第三薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与所述驱动薄膜晶体管的栅极连接；  The third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor;

所述第四薄膜晶体管， 栅极与第一控制线连接， 源极与数据线连接， 漏 极与所述 OLED的阴极连接；  The fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;

所述第五薄膜晶体管， 栅极与第二控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动薄膜晶体管的源极连接；  The fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor;

所述第六薄膜晶体管， 栅极与第二控制线连接， 源极与所述 OLED的阴 极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;

所述第二薄膜晶体管、 所述第三薄膜晶体管和所述第四薄膜晶体管为 n 型薄膜晶体管， 所述第一薄膜晶体管、 第五薄膜晶体管和所述第六薄膜晶体 管为 p型薄膜晶体管。  The second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors.

在另一示例中， 所述第一开关元件为第一薄膜晶体管， 所述充电控制单 元包括第二薄膜晶体管、 第三薄膜晶体管和第四薄膜晶体管， 所述驱动控制 单元包括第五薄膜晶体管和第六薄膜晶体管；  In another example, the first switching element is a first thin film transistor, the charging control unit includes a second thin film transistor, a third thin film transistor, and a fourth thin film transistor, and the driving control unit includes a fifth thin film transistor and a sixth thin film transistor;

所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与驱动电源的高电平输出端连接； The first thin film transistor has a gate connected to the first control line, and a drain and the driving thin film crystal a drain connection of the body tube, the source being connected to a high level output terminal of the driving power source;

所述第二薄膜晶体管， 栅极与第一控制线连接， 源极与所述驱动电源的 低电平输出端连接， 漏极与所述存储电容的第二端连接；  The second thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor;

所述第三薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与所述驱动薄膜晶体管的栅极连接；  The third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor;

所述第四薄膜晶体管， 栅极与第一控制线连接， 源极与数据线连接， 漏 极与所述 OLED的阴极连接；  The fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;

所述第五薄膜晶体管， 栅极与第二控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动薄膜晶体管的源极连接；  The fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor;

所述第六薄膜晶体管， 栅极与第二控制线连接， 源极与所述 OLED的阴 极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;

所述第二薄膜晶体管、 所述第三薄膜晶体管和所述第四薄膜晶体管为 n 型薄膜晶体管， 所述第一薄膜晶体管、 第五薄膜晶体管和所述第六薄膜晶体 管为 p型薄膜晶体管。  The second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors.

本发明还提供了一种像素单元驱动方法， 其应用于上述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：  The present invention also provides a pixel unit driving method, which is applied to the above pixel unit driving circuit, and the pixel unit driving method includes the following steps:

像素充电步骤： 充电控制单元首先控制驱动薄膜晶体管导通， 并控制对 存储电容进行充电， 直至驱动薄膜晶体管的栅极电位升高至使得所述驱动薄 膜晶体管截止；  Pixel charging step: the charging control unit first controls the driving of the driving thin film transistor, and controls charging of the storage capacitor until the gate potential of the driving thin film transistor rises to cause the driving thin film transistor to be turned off;

驱动 OLED发光显示步骤： 驱动控制单元控制所述驱动薄膜晶体管导通 并且其栅极处于悬空状态， 以驱动 OLED发光显示并使得所述驱动薄膜晶体 管的栅源电压补偿所述驱动薄膜晶体管的阔值电压。  Driving the OLED light emitting display step: the driving control unit controls the driving thin film transistor to be turned on and the gate thereof is in a floating state to drive the OLED light emitting display and make the gate-source voltage of the driving thin film transistor compensate the threshold value of the driving thin film transistor Voltage.

本发明还提供了一种像素单元， 包括 OLED和根据上述实施例的像素单 元驱动电路；  The present invention also provides a pixel unit including an OLED and a pixel unit driving circuit according to the above embodiment;

所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阴 极连接， 所述 OLED的阳极通过所述驱动控制单元与驱动电源的高电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关元件与所述驱动电源 的低电平输出端连接。  The pixel unit driving circuit includes a source of a driving thin film transistor connected to a cathode of the OLED, and an anode of the OLED is connected to a high level output end of the driving power source through the driving control unit, where the driving thin film transistor is The drain is connected to the low level output of the driving power source through the first switching element.

本发明还提供了一种像素单元， 包括 OLED和根据上述另一实施例的像 素单元驱动电路； 所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阳 极连接， 所述 OLED的阴极通过所述驱动控制单元与驱动电源的低电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关单元与所述驱动电源 的高电平输出端连接。 The present invention also provides a pixel unit including an OLED and a pixel unit driving circuit according to another embodiment described above; a source of the driving thin film transistor included in the pixel unit driving circuit is connected to an anode of the OLED, and a cathode of the OLED is connected to a low level output end of the driving power source through the driving control unit, where the driving thin film transistor The drain is connected to the high level output terminal of the driving power source through the first switching unit.

与现有技术相比， 本发明所述的像素单元驱动电路、 像素单元驱动方法 以及像素单元， 通过数据电压 Vdata从 DTFT的源极输入， 利用 DTFT的二 极管连接自放电将 Vth ( DTFT 的阔值电压）， Vdata (数据电压）， Vth— oled(OLED发光的阔值电压)存入存储电容 Cs中， 补偿驱动薄膜晶体管 的阔值电压， 同时利用电压回授机制补偿 OLED材料老化所引起阔值电压上 升而导致的驱动电流下降。 附图说明  Compared with the prior art, the pixel unit driving circuit, the pixel unit driving method and the pixel unit of the present invention are input from the source of the DTFT through the data voltage Vdata, and the self-discharge of the DTFT is used to connect the Vth (the threshold of the DTFT) Voltage), Vdata (data voltage), Vth-oled (the threshold voltage of OLED light) is stored in the storage capacitor Cs, compensating for the threshold voltage of the driving thin film transistor, and using the voltage feedback mechanism to compensate for the wide value caused by aging of the OLED material The drive current caused by the voltage rise drops. DRAWINGS

图 1是传统的 2T1C像素单元驱动电路的电路图；  1 is a circuit diagram of a conventional 2T1C pixel unit driving circuit;

图 2是对该传统的 2T1C像素单元驱动电路的控制时序图；  2 is a control timing chart of the conventional 2T1C pixel unit driving circuit;

图 3是本发明第一实施例所述的像素单元驱动电路的电路图；  3 is a circuit diagram of a pixel unit driving circuit according to a first embodiment of the present invention;

图 4是本发明第二实施例所述的像素单元驱动电路的电路图；  4 is a circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention;

图 5是本发明第三实施例所述的像素单元驱动电路的电路图；  FIG. 5 is a circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention; FIG.

图 6是本发明第四实施例所述的像素单元驱动电路的电路图；  6 is a circuit diagram of a pixel unit driving circuit according to a fourth embodiment of the present invention;

图 7是本发明第五实施例所述的像素单元驱动电路的电路图；  7 is a circuit diagram of a pixel unit driving circuit according to a fifth embodiment of the present invention;

图 8是本发明第六实施例所述的像素单元驱动电路的电路图；  8 is a circuit diagram of a pixel unit driving circuit according to a sixth embodiment of the present invention;

图 9是本发明第二实施例所述的像素单元驱动电路工作时各信号的时序 图；  9 is a timing chart of signals when a pixel unit driving circuit according to a second embodiment of the present invention operates;

图 10A是本发明第二实施例所述的像素单元驱动电路在第一时间段的等 效电路图；  FIG. 10A is an equivalent circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention in a first period of time; FIG.

图 10B是本发明第二实施例所述的像素单元驱动电路在第二时间段的等 效电路图；  FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit in the second period of time according to the second embodiment of the present invention; FIG.

图 10C是本发明第二实施例所述的像素单元驱动电路在第三时间段的等 效电路图；  FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit in the third period of time according to the second embodiment of the present invention; FIG.

图 11 A是本发明第三实施例所述的像素单元驱动电路在第一时间段的等 效电路图； 图 11B是本发明第三实施例所述的像素单元驱动电路在第二时间段的等 效电路图； 11A is an equivalent circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention in a first period of time; 11B is an equivalent circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention in a second period of time;

图 11C是本发明第三实施例所述的像素单元驱动电路在第三时间段的等 效电路图；  11C is an equivalent circuit diagram of the pixel unit driving circuit in the third period of time according to the third embodiment of the present invention;

图 12 是本发明第五实施例所述的像素单元驱动电路和第六实施例所述 的像素单元驱动电路工作时各信号的时序图。 具体实施方式  Fig. 12 is a timing chart showing signals of the pixel unit driving circuit according to the fifth embodiment of the present invention and the pixel unit driving circuit of the sixth embodiment. detailed description

下面将结合本发明实施例中的附图， 对本发明实施例中的技术方案进行 清楚、 完整地描述， 显然， 所描述的实施例仅仅是本发明一部分实施例， 而 不是全部的实施例。 基于本发明中的实施例， 本领域普通技术人员在没有作 出创造性劳动前提下所获得的所有其他实施例 , 都属于本发明保护的范围。  The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

如图 3 所示， 本发明第一实施例所述的像素单元驱动电路， 用于驱动 OLED, 包括驱动薄膜晶体管 DTFT、 第一开关元件 10、 存储电容 Cs、 驱动 控制单元 11和充电控制单元 12, 其中，  As shown in FIG. 3, the pixel unit driving circuit according to the first embodiment of the present invention is configured to drive an OLED, including a driving thin film transistor DTFT, a first switching element 10, a storage capacitor Cs, a driving control unit 11, and a charging control unit 12. , among them,

所述驱动薄膜晶体管 DTFT的栅极， 与所述存储电容 Cs的第一端连接， 还通过所述充电控制单元 12与所述驱动薄膜晶体管 DTFT的漏极连接；  The gate of the driving thin film transistor DTFT is connected to the first end of the storage capacitor Cs, and is also connected to the drain of the driving thin film transistor DTFT through the charging control unit 12;

所述驱动薄膜晶体管 DTFT的源极， 与所述 OLED的阴极连接， 并通过 所述驱动控制单元 11与所述存储电容 Cs的第二端连接；  The source of the driving thin film transistor DTFT is connected to the cathode of the OLED, and is connected to the second end of the storage capacitor Cs through the driving control unit 11;

所述驱动薄膜晶体管 DTFT的漏极，通过所述第一开关元件 10与驱动电 源的低电平输出端连接；  The drain of the driving thin film transistor DTFT is connected to the low-level output terminal of the driving power source through the first switching element 10;

所述存储电容 Cs的第二端， 通过所述充电控制单元 12与所述驱动电源 的低电平输出端连接；  The second end of the storage capacitor Cs is connected to the low-level output end of the driving power source through the charging control unit 12;

所述 OLED的阳极，通过所述驱动控制单元 11与所述驱动电源的高电平 输出端连接， 还通过所述充电控制单元 12与数据线连接；  The anode of the OLED is connected to the high-level output end of the driving power source through the driving control unit 11, and is also connected to the data line through the charging control unit 12;

所述驱动薄膜晶体管 DTFT是 p型薄膜晶体管；  The driving thin film transistor DTFT is a p-type thin film transistor;

所述数据线输出数据电压 Vdata;  The data line outputs a data voltage Vdata;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;  The output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;

P点是与所述存储电容 Cs的第二端连接的节点， G点是与所述存储电容 Cs的第一端连接的节点。 Point P is a node connected to the second end of the storage capacitor Cs, and point G is the storage capacitor The node to which the first end of the Cs is connected.

本发明第一实施例所述的像素单元驱动电路在工作时：  The pixel unit driving circuit according to the first embodiment of the present invention is in operation:

在第一时间段， 即开始阶段， 所述充电控制单元 12导通 DTFT的栅极与 漏极之间的连接， 导通 Cs的第二端与驱动电源的低电平输出端之间的连接， 并导通 OLED的阳极与数据线之间的连接； 如果此前一阶段驱动管 DTFT为 截止状态， 则 G点 （即与 DTFT的栅极连接的节点）处于悬空状态， 而所述 充电控制单元 12的导通， 将会使悬空的 G点电位严重下拉， 使得 DTFT导 通， 如果 DTFT 此前一阶段本身导通， 则会进入本阶段的工作状态， DTFT 处于二极管连接状态， 数据线通过 OLED、 DTFT和所述充电控制单元 12对 存储电容 Cs 充电， 使得 G 点的电位逐渐升高， 直到 G 点电位 Vg=Vdata-Vth_oled- I Vth | , 则 DTFT截止， P点 （即与所述存储电容的第 二端连接的节点） 电位 Vp=VSS , 存储电容 Cs 两端的电压差 Vc=Vg-Vp= Vdata-Vth oled- I Vth | -VSS, 其中， Vth— oled是 OLED发光的阔值电压， Vth是 DTFT的阔值电压；  In the first period, that is, the initial stage, the charging control unit 12 turns on the connection between the gate and the drain of the DTFT, and turns on the connection between the second end of the Cs and the low-level output of the driving power source. And conducting a connection between the anode of the OLED and the data line; if the previous stage of the driving transistor DTFT is in an off state, the G point (ie, the node connected to the gate of the DTFT) is in a floating state, and the charging control unit The conduction of 12 will cause the floating G point potential to be seriously pulled down, so that the DTFT is turned on. If the DTFT is turned on in the previous stage, it will enter the working state of this stage, the DTFT is in the diode connection state, and the data line passes through the OLED. The DTFT and the charging control unit 12 charge the storage capacitor Cs such that the potential of the G point gradually rises until the G point potential Vg=Vdata-Vth_oled-I Vth | , and the DTFT is turned off, and the P point (ie, the storage capacitor) The second terminal connected to the node) potential Vp = VSS, the voltage difference across the storage capacitor Cs Vc = Vg - Vp = Vdata - Vth oled - I Vth | - VSS, where Vth - oled is the threshold voltage of the OLED illumination Vth is the threshold voltage of DTFT;

在第二时间段， 即緩冲阶段， 所述第一开关元件 10导通 DTFT的漏极与 驱动电源的低电平输出端之间的连接， DTFT 仍截止， 处于工作停止状态， 以避免因为开关的切换产生不必要的干扰信号， P点和 G点处于悬空状态， 存储电容 Cs两端的电压 Vc依然不变， Vc=Vg-Vp= Vdata-Vth oled- I Vth | -VSS;  In the second period of time, that is, the buffering phase, the first switching element 10 turns on the connection between the drain of the DTFT and the low-level output terminal of the driving power supply, and the DTFT is still turned off, and is in a working stop state to avoid Switching of the switch generates unnecessary interference signals, P point and G point are in a floating state, and the voltage Vc across the storage capacitor Cs remains unchanged, Vc=Vg-Vp=Vdata-Vth oled- I Vth | -VSS;

在第三时间段，所述第一开关元件 10导通 DTFT的漏极与驱动电源的低 电平输出端之间的连接， 所述驱动控制单元 11导通 DTFT的源极与 Cs的第 二端之间的连接并导通所述 OLED的阳极与所述驱动电源的高电平输出端之 间的连接；由于 P点电位由 VSS跳变至 VDD-Voled( Voled为此灰阶下 OLED 的工作电压， 与 Vth— oled并不一致）， 而 DTFT的栅极处于悬空状态， 因此 Vg的电压跳变为 Vdata- Vth— oled- I Vth | -VSS +VDD- Voled, 此时 DTFT的 源 极 和 栅 极之 间 的 电 压 差 值 Vsg=VDD- Voled- Vg=VDD-Voled- ( Vdata-Vth oled- I Vth | -VSS +VDD- Voled ) =VSS+Vth_oled+ I Vth | -Vdata; DTFT导通，流过 DTFT的电流 I=K(Vsg- I Vth | )2=K(VSS+Vth_oled+ I Vth I -Vdata- I Vth | )2 =K(VSS+ Vth— oled- Vdata) 2 , OLED开始发光， 直到 下一帧； 其中， K为 DTFT的电流系数； Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度； In a third period of time, the first switching element 10 turns on a connection between a drain of the DTFT and a low-level output of the driving power source, and the driving control unit 11 turns on the source of the DTFT and the second of the Cs. a connection between the terminals and conducting a connection between the anode of the OLED and a high level output of the driving power supply; since the potential of the P point is hopped from VSS to VDD-Voled (Voled for this gray scale OLED The operating voltage is inconsistent with Vth-oled, and the gate of DTFT is floating, so the voltage of Vg jumps to Vdata-Vth-oled- I Vth | -VSS +VDD- Voled, at which point the source of DTFT Voltage difference between gates Vsg=VDD- Voled- Vg=VDD-Voled- ( Vdata-Vth oled- I Vth | -VSS +VDD- Voled ) =VSS+Vth_oled+ I Vth | -Vdata; DTFT is turned on, The current flowing through the DTFT is I=K(Vsg- I Vth | ) 2 =K(VSS+Vth_oled+ I Vth I -Vdata- I Vth | ) 2 =K(VSS+ Vth- oled- Vdata) 2 , the OLED starts to emit light until Next frame; where K is the current coefficient of the DTFT; Κ =. Οχ Χ μ Χ ; μ, C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length;

可以发现流过 DTFT的电流 I和 DTFT的阔值电压 Vth没有关系了 , 如此 可以改善电流的均匀性 , 达到亮度的均匀； 而同时流过 DTFT的电流 I的计 算公式中包含了 Vth— oled, 随着使用时间的延长， OLED材料老化发光效率 下降， Vth— oled会上升， 而 Vth— oled的上升使工作电流相应增大， 如此改善 了材料老化导致的面板亮度降低。  It can be found that the current I flowing through the DTFT has nothing to do with the threshold voltage Vth of the DTFT, so that the uniformity of the current can be improved to achieve uniform brightness; while the current I flowing through the DTFT includes Vth-oled. As the use time prolongs, the aging efficiency of the OLED material decreases, Vth-oled rises, and the rise of Vth-oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.

如图 4所示， 本发明第二实施例所述的像素单元驱动电路基于本发明第 一实施例所述的像素单元驱动电路； 在本发明第二实施例所述的像素单元驱 动电路中， 所述第一开关元件 10为第一薄膜晶体管 T1 , 所述驱动控制单元 11包括第二薄膜晶体管 T2和第三薄膜晶体管 T3 ,所述充电控制单元 12包括 第四薄膜晶体管 T4、 第五薄膜晶体管 Τ5和第六薄膜晶体管 Τ6; As shown in FIG. 4, the pixel unit driving circuit according to the second embodiment of the present invention is based on the pixel unit driving circuit according to the first embodiment of the present invention; The first switching element 10 is a first thin film transistor T1, the driving control unit 11 includes a second thin film transistor T2 and a third thin film transistor T3, and the charging control unit 12 includes a fourth thin film transistor T4 and a fifth thin film transistor. Τ5 and sixth thin film transistor Τ6;

所述第一薄膜晶体管 T1 , 栅极与输出第一控制信号 S1的第一控制线连 接， 漏极与所述驱动电源的低电平输出端连接， 源极与所述驱动薄膜晶体管 DTFT的漏极连接；  The first thin film transistor T1 has a gate connected to a first control line outputting the first control signal S1, a drain connected to a low level output end of the driving power source, and a drain of the source and the driving thin film transistor DTFT Pole connection

所述第二薄膜晶体管 T2 , 栅极与输出第二控制信号 S2的第二控制线连 接， 源极与所述驱动电源的高电平输出端连接， 漏极与所述 OLED的阳极连 接；  The second thin film transistor T2 has a gate connected to a second control line outputting the second control signal S2, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;

所述第三薄膜晶体管 T3 , 栅极与第二控制线连接， 源极与所述驱动薄膜 晶体管 DTFT的源极连接， 漏极与所述存储电容 Cs的第二端连接；  The third thin film transistor T3 has a gate connected to the second control line, a source connected to the source of the driving thin film transistor DTFT, and a drain connected to the second end of the storage capacitor Cs;

所述第四薄膜晶体管 T4 , 栅极与第一控制线连接， 漏极与所述存储电容 Cs的第一端连接， 源极与所述驱动薄膜晶体管 DTFT的漏极连接；  The fourth thin film transistor T4 has a gate connected to the first control line, a drain connected to the first end of the storage capacitor Cs, and a source connected to the drain of the driving thin film transistor DTFT;

所述第五薄膜晶体管 T5 , 栅极与第一控制线连接， 源极与所述驱动电源 的低电平输出端连接， 漏极与所述存储电容 Cs的第二端连接；  The fifth thin film transistor T5 has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor Cs;

所述第六薄膜晶体管 T6 , 栅极与第一控制线连接， 源极与所述 OLED的 阳极连接， 漏极与数据线连接；  The sixth thin film transistor T6 has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;

所述第一薄膜晶体管 Tl、 所述第二薄膜晶体管 Τ2和所述第三薄膜晶体 管 Τ3都是 ρ型薄膜晶体管， 所述第四开关元件 Τ4、 所述第五薄膜晶体管 Τ5 和所述第六薄膜晶体管 T6是 n型薄膜晶体管； The first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all p-type thin film transistors, and the fourth switching element T4 and the fifth thin film transistor T5 And the sixth thin film transistor T6 is an n-type thin film transistor;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;  The output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;

P点是与所述存储电容 Cs的第二端连接的节点， G点是与所述存储电容 Cs的第一端连接的节点。  Point P is a node connected to the second end of the storage capacitor Cs, and point G is a node connected to the first end of the storage capacitor Cs.

如图 5所示， 本发明第三实施例所述的像素单元驱动电路基于本发明第 一实施例所述的像素单元驱动电路； 在本发明第三实施例所述的像素单元驱 动电路中， 所述第一开关元件 10为第一薄膜晶体管 T1 , 所述驱动控制单元 11包括第二薄膜晶体管 T2和第三薄膜晶体管 T3 ,所述充电控制单元 12包括 第四薄膜晶体管 T4、 第五薄膜晶体管 Τ5和第六薄膜晶体管 Τ6;  As shown in FIG. 5, the pixel unit driving circuit according to the third embodiment of the present invention is based on the pixel unit driving circuit according to the first embodiment of the present invention. The first switching element 10 is a first thin film transistor T1, the driving control unit 11 includes a second thin film transistor T2 and a third thin film transistor T3, and the charging control unit 12 includes a fourth thin film transistor T4 and a fifth thin film transistor. Τ5 and sixth thin film transistor Τ6;

所述第一薄膜晶体管 T1 , 栅极与输出第一控制信号 S1的第一控制线连 接， 漏极与所述驱动电源的低电平输出端连接， 源极与所述驱动薄膜晶体管 The first thin film transistor T1 has a gate connected to a first control line outputting the first control signal S1, a drain connected to a low level output end of the driving power source, a source and the driving thin film transistor

DTFT的漏极连接； The drain connection of the DTFT;

所述第二薄膜晶体管 Τ2, 栅极与输出第二控制信号 S2的第二控制线连 接， 源极与所述驱动电源的高电平输出端连接， 漏极与所述 OLED的阳极连 接；  The second thin film transistor Τ2 has a gate connected to a second control line outputting the second control signal S2, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED;

所述第三薄膜晶体管 Τ3 , 栅极与第二控制线连接， 源极与所述驱动薄膜 晶体管 DTFT的源极连接， 漏极与所述存储电容 Cs的第二端连接；  The third thin film transistor Τ3 has a gate connected to the second control line, a source connected to the source of the driving thin film transistor DTFT, and a drain connected to the second end of the storage capacitor Cs;

所述第四薄膜晶体管 T4, 栅极与第一控制线连接， 漏极与所述存储电容 Cs的第一端连接， 源极与所述驱动薄膜晶体管 DTFT的漏极连接；  The fourth thin film transistor T4 has a gate connected to the first control line, a drain connected to the first end of the storage capacitor Cs, and a source connected to the drain of the driving thin film transistor DTFT;

所述第五薄膜晶体管 T5 , 栅极与第一控制线连接， 源极与所述存储电容 Cs的第二端连接， 漏极与驱动电源的高电平输出端连接；  The fifth thin film transistor T5 has a gate connected to the first control line, a source connected to the second end of the storage capacitor Cs, and a drain connected to the high-level output end of the driving power source;

所述第六薄膜晶体管 T6, 栅极与第一控制线连接， 源极与所述 OLED的 阳极连接， 漏极与数据线连接；  The sixth thin film transistor T6 has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line;

所述第一薄膜晶体管 Tl、 所述第二薄膜晶体管 Τ2和所述第三薄膜晶体 管 Τ3都是 ρ型薄膜晶体管， 所述第四开关元件 Τ4、 所述第五薄膜晶体管 Τ5 和所述第六薄膜晶体管 Τ6是 η型薄膜晶体管；  The first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all p-type thin film transistors, the fourth switching element T4, the fifth thin film transistor T5, and the sixth The thin film transistor Τ6 is an n-type thin film transistor;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;  The output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;

Ρ点是与所述存储电容 Cs的第二端连接的节点， G点是与所述存储电容 Cs的第一端连接的节点。 The defect is a node connected to the second end of the storage capacitor Cs, and the G point is the storage capacitor The node to which the first end of the Cs is connected.

如图 6 所示， 本发明第四实施例所述的像素单元驱动电路， 用于驱动 OLED, 包括驱动薄膜晶体管 DTFT、 第一开关元件 20、 存储电容 Cs、 驱动 控制单元 21和充电控制单元 22, 其中，  As shown in FIG. 6, the pixel unit driving circuit according to the fourth embodiment of the present invention is configured to drive an OLED, including a driving thin film transistor DTFT, a first switching element 20, a storage capacitor Cs, a driving control unit 21, and a charging control unit 22. , among them,

所述驱动薄膜晶体管 DTFT的栅极， 与所述存储电容 Cs的第一端连接， 还通过所述充电控制单元 22与所述驱动薄膜晶体管 DTFT的漏极连接；  The gate of the driving thin film transistor DTFT is connected to the first end of the storage capacitor Cs, and is also connected to the drain of the driving thin film transistor DTFT through the charging control unit 22;

所述驱动薄膜晶体管 DTFT的源极， 与所述 OLED的阳极连接， 并通过 所述驱动控制单元 21与所述存储电容 Cs的第二端连接；  The source of the driving thin film transistor DTFT is connected to the anode of the OLED, and is connected to the second end of the storage capacitor Cs through the driving control unit 21;

所述驱动薄膜晶体管 DTFT的漏极，通过所述第一开关元件 20与驱动电 源的高电平输出端连接；  The drain of the driving thin film transistor DTFT is connected to the high-level output terminal of the driving power source through the first switching element 20;

所述存储电容 Cs的第二端， 通过所述充电控制单元 22与所述驱动电源 的高电平输出端连接；  The second end of the storage capacitor Cs is connected to the high-level output end of the driving power source through the charging control unit 22;

所述 OLED的阴极，通过所述充电控制单元 22与数据线连接，还通过所 述驱动控制单元 21与所述驱动电源的低电平输出端连接；  The cathode of the OLED is connected to the data line through the charging control unit 22, and is also connected to the low-level output end of the driving power source through the driving control unit 21;

所述驱动薄膜晶体管 DTFT是 n型薄膜晶体管；  The driving thin film transistor DTFT is an n-type thin film transistor;

所述数据线输出数据电压 Vdata;  The data line outputs a data voltage Vdata;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS。  The output voltage of the high level output terminal of the driving power source is VDD, and the output voltage of the low level output terminal of the driving power source is VSS.

如图 7所示， 本发明第五实施例所述的像素单元驱动电路基于本发明第 四实施例所述的像素单元驱动电路； 在本发明第五实施例所述的像素单元驱 动电路中， 所述第一开关元件 20为第一薄膜晶体管 T1 , 所述充电控制单元 22包括第二薄膜晶体管 T2、第三薄膜晶体管 Τ3和第四薄膜晶体管 Τ4, 所述 驱动控制单元 21包括第五薄膜晶体管 Τ5和第六薄膜晶体管 Τ6;  As shown in FIG. 7, a pixel unit driving circuit according to a fifth embodiment of the present invention is based on a pixel unit driving circuit according to a fourth embodiment of the present invention. The first switching element 20 is a first thin film transistor T1, the charging control unit 22 includes a second thin film transistor T2, a third thin film transistor T3, and a fourth thin film transistor T4, and the driving control unit 21 includes a fifth thin film transistor. Τ5 and sixth thin film transistor Τ6;

所述第一薄膜晶体管 T1 , 栅极与第一控制线连接， 漏极与所述驱动薄膜 晶体管 DTFT的漏极连接， 源极与驱动电源的高电平输出端连接；  The first thin film transistor T1 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the high level output end of the driving power source;

所述第二薄膜晶体管 T2, 栅极与第一控制线连接， 源极与所述存储电容 Cs的第二端连接， 漏极与所述驱动电源的高电平输出端连接；  The second thin film transistor T2 has a gate connected to the first control line, a source connected to the second end of the storage capacitor Cs, and a drain connected to the high level output end of the driving power source;

所述第三薄膜晶体管 T3 , 栅极与第一控制线连接， 漏极与所述驱动薄膜 晶体管 DTFT的漏极连接， 源极与所述驱动薄膜晶体管 DTFT的栅极连接； 所述第四薄膜晶体管 T4, 栅极与第一控制线连接， 源极与数据线连接， 漏极与所述 OLED的阴极连接； The third thin film transistor T3 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the gate of the driving thin film transistor DTFT; the fourth film Transistor T4, the gate is connected to the first control line, and the source is connected to the data line. a drain connected to a cathode of the OLED;

所述第五薄膜晶体管 T5, 栅极与第二控制线连接， 源极与所述存储电容 的第二端连接， 漏极与所述驱动薄膜晶体管 DTFT的源极连接；  The fifth thin film transistor T5 has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor DTFT;

所述第六薄膜晶体管 T6, 栅极与第二控制线连接， 源极与所述 OLED的 阴极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor T6 has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;

所述第二薄膜晶体管 T2、 所述第三薄膜晶体管 Τ3和所述第四薄膜晶体 管 Τ4为 η型薄膜晶体管， 所述第一薄膜晶体管 Tl、第五薄膜晶体管 Τ5和所 述第六薄膜晶体管 Τ6为 ρ型薄膜晶体管；  The second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are n-type thin film transistors, and the first thin film transistor T1, the fifth thin film transistor T5, and the sixth thin film transistor T6 a p-type thin film transistor;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;  The output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;

Ρ点是与所述存储电容 Cs的第二端连接的节点， G点是与所述存储电容 Cs的第一端连接的节点。  The defect is a node connected to the second end of the storage capacitor Cs, and the G point is a node connected to the first end of the storage capacitor Cs.

如图 8所示， 本发明第六实施例所述的像素单元驱动电路基于本发明第 四实施例所述的像素单元驱动电路； 在本发明第六实施例所述的像素单元驱 动电路中， 所述第一开关元件 20为第一薄膜晶体管 T1 , 所述充电控制单元 22包括第二薄膜晶体管 T2、第三薄膜晶体管 Τ3和第四薄膜晶体管 Τ4, 所述 驱动控制单元 21包括第五薄膜晶体管 Τ5和第六薄膜晶体管 Τ6;  As shown in FIG. 8, the pixel unit driving circuit according to the sixth embodiment of the present invention is based on the pixel unit driving circuit according to the fourth embodiment of the present invention. The first switching element 20 is a first thin film transistor T1, the charging control unit 22 includes a second thin film transistor T2, a third thin film transistor T3, and a fourth thin film transistor T4, and the driving control unit 21 includes a fifth thin film transistor. Τ5 and sixth thin film transistor Τ6;

所述第一薄膜晶体管 T1 , 栅极与第一控制线连接， 漏极与所述驱动薄膜 晶体管 DTFT的漏极连接， 源极与驱动电源的高电平输出端连接；  The first thin film transistor T1 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the high level output end of the driving power source;

所述第二薄膜晶体管 Τ2, 栅极与第一控制线连接， 源极与所述驱动电源 的低电平输出端连接， 漏极与所述存储电容 Cs的第二端连接；  The second thin film transistor Τ2 has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor Cs;

所述第三薄膜晶体管 T3 , 栅极与第一控制线连接， 漏极与所述驱动薄膜 晶体管 DTFT的漏极连接， 源极与所述驱动薄膜晶体管 DTFT的栅极连接； 所述第四薄膜晶体管 T4, 栅极与第一控制线连接， 源极与数据线连接， 漏极与所述 OLED的阴极连接；  The third thin film transistor T3 has a gate connected to the first control line, a drain connected to the drain of the driving thin film transistor DTFT, and a source connected to the gate of the driving thin film transistor DTFT; the fourth film The transistor T4 has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED;

所述第五薄膜晶体管 T5, 栅极与第二控制线连接， 源极与所述存储电容 的第二端连接， 漏极与所述驱动薄膜晶体管 DTFT的源极连接；  The fifth thin film transistor T5 has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor DTFT;

所述第六薄膜晶体管 T6, 栅极与第二控制线连接， 源极与所述 OLED的 阴极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor T6 has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source;

所述第二薄膜晶体管 T2、 所述第三薄膜晶体管 Τ3和所述第四薄膜晶体 管 T4为 η型薄膜晶体管， 所述第一薄膜晶体管 Tl、第五薄膜晶体管 Τ5和所 述第六薄膜晶体管 Τ6为 ρ型薄膜晶体管； The second thin film transistor T2, the third thin film transistor T3, and the fourth thin film crystal The tube T4 is an n-type thin film transistor, and the first thin film transistor T1, the fifth thin film transistor T5, and the sixth thin film transistor T6 are p-type thin film transistors;

所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;  The output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;

Ρ点是与所述存储电容 Cs的第二端连接的节点， G点是与所述存储电容 The defect is a node connected to the second end of the storage capacitor Cs, and the G point is the storage capacitor

Cs的第一端连接的节点。 The node to which the first end of the Cs is connected.

下面结合如图 4所示的本发明第二实施例所述的像素单元驱动电路对其 工作过程进行介绍：  The working process of the pixel unit driving circuit according to the second embodiment of the present invention as shown in FIG. 4 is described below:

如图 9所示， 该第二实施例所述的像素单元驱动电路工作时， 第一控制 信号 Sl、 第二控制信号 S2和所述数据线的输出信号 Vdata的时序图；  As shown in FIG. 9, when the pixel unit driving circuit of the second embodiment operates, a timing chart of the first control signal S1, the second control signal S2, and the output signal Vdata of the data line;

图 10A是该第二实施例所述的像素单元驱动电路在第一时间段的等效电 路图；  FIG. 10A is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a first period of time; FIG.

图 10B是该第二实施例所述的像素单元驱动电路在第二时间段的等效电 路图；  FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a second period of time; FIG.

图 10C是该第二实施例所述的像素单元驱动电路在第三时间段的等效电 路图；  FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit of the second embodiment in a third period of time; FIG.

如图 10A所示， 在第一时间段， 即开始阶段， Tl、 Τ2、 Τ3均截止， Τ4、 Τ5、 Τ6为导通， 如果此前一阶段驱动管 DTFT为截止状态， 则 G点 (即与 DTFT的栅极连接的节点）处于悬空状态， 而 T5的导通， 将会使悬空的 G点 电位严重下拉， 使得 DTFT导通， 如果 DTFT此前一阶段本身导通， 则会进 入本阶段的工作状态， 由于 T4的截止， DTFT处于二极管连接状态， 数据线 通过 OLED、 DTFT和 T4对存储电容 Cs充电， 使得 G点的电位逐渐升高， 直到 G点电位 Vg= Vdata- Vth— oled- I Vth | , 则 DTFT截止， P点（即与所述 存储电容的第二端连接的节点）电位 Vp=VSS, 存储电容 Cs两端的电压差为 Vc=Vg-Vp= Vdata- Vth— oled- I Vth | -VSS, 其中， Vth— oled是 OLED发光的 阔值电压， Vth是 DTFT的阔值电压；  As shown in FIG. 10A, in the first time period, that is, in the initial stage, T1, Τ2, and Τ3 are all turned off, and Τ4, Τ5, and Τ6 are turned on. If the previous stage of the driving tube DTFT is turned off, the G point (ie, The node connected to the gate of the DTFT is in a floating state, and the conduction of T5 will cause the floating G point potential to be seriously pulled down, so that the DTFT is turned on. If the DTFT is turned on in the previous stage, it will enter the work of this stage. State, due to the cutoff of T4, the DTFT is in a diode-connected state, and the data line charges the storage capacitor Cs through the OLED, DTFT, and T4, so that the potential of the G point is gradually increased until the potential of the G point Vg = Vdata - Vth - oled - I Vth , DTFT is turned off, P point (ie, the node connected to the second end of the storage capacitor) potential Vp = VSS, the voltage difference across the storage capacitor Cs is Vc = Vg - Vp = Vdata - Vth - oled - I Vth | -VSS, where Vth-oled is the threshold voltage of OLED illumination, and Vth is the threshold voltage of DTFT;

如图 10B所示， 在第二时间段， 即緩冲阶段， T1导通， T2、 Τ3、 Τ4、 Τ5、 Τ6 均截止， DTFT也截止， 处于工作停止状态， 以避免因为开关的切 换产生不必要的干扰信号， P点和 G点处于悬空状态，存储电容 Cs两端的电 压 Vc依然不变， Vc=Vg-Vp= Vdata- Vth— oled- I Vth | -VSS; 如图 10C所示， 在第三时间段， T4、 Τ5、 Τ6截止， Tl、 Τ2、 Τ3导通， 由于 Ρ点电位由 VSS跳变至 VDD-Voled ( Voled为此灰阶下 OLED的工作电 压， 与 Vth— oled并不一致）， 而 DTFT的栅极处于悬空状态， 因此 Vg的电压 跳变为 Vdata-Vth— oled- I Vth | -VSS +VDD- Voled, 此时 DTFT的源极和栅极 之间的电压差值 Vsg=VDD- Voled- Vg= VDD-Voled- ( Vdata-Vth oled- I Vth | -VSS +VDD-Voled ) =VSS+Vth_oled+ I Vth | -Vdata; DTFT导通， 流过 DTFT 的电流 I=K(Vsg- I Vth I )2=K(VSS+Vth_oled+ I Vth | -Vdata- I Vth | f =K(VSS+Vth_oled- Vdata) 2 , OLED开始发光， 直到下一帧； 其中， K为 DTFT 的电流系数； As shown in FIG. 10B, in the second time period, that is, the buffering phase, T1 is turned on, T2, Τ3, Τ4, Τ5, Τ6 are all turned off, and the DTFT is also turned off, and is in a working stop state to avoid the switch due to switching. The necessary interference signal, P point and G point are in a floating state, and the voltage Vc across the storage capacitor Cs remains unchanged, Vc=Vg-Vp=Vdata- Vth_ oled- I Vth | -VSS; As shown in FIG. 10C, in the third period, T4, Τ5, and Τ6 are turned off, and T1, Τ2, and Τ3 are turned on, since the Ρ point potential is hopped from VSS to VDD-Voled (Voled is the operating voltage of the OLED for this gray scale) , does not coincide with Vth-oled, and the gate of DTFT is floating, so the voltage of Vg jumps to Vdata-Vth- oled- I Vth | -VSS +VDD- Voled, at this time the source and gate of DTFT Voltage difference Vsg=VDD- Voled- Vg= VDD-Voled- ( Vdata-Vth oled- I Vth | -VSS +VDD-Voled ) =VSS+Vth_oled+ I Vth | -Vdata; DTFT is turned on, flowing through DTFT current I=K(Vsg- I Vth I ) 2 =K(VSS+Vth_oled+ I Vth | -Vdata- I Vth | f =K(VSS+Vth_oled- Vdata) 2 , OLED starts to emit light until the next frame; Where K is the current coefficient of the DTFT;

w  w

Κ =。。χ Χ μχ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度； Κ =. . χ Χ μχ ; μ, C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length;

可以发现流过 DTFT的电流 I和 DTFT的阔值电压 Vth没有关系了 , 如此 可以改善电流的均匀性 , 达到亮度的均匀； 而同时流过 DTFT的电流 I的计 算公式中包含了 Vth— oled, 随着使用时间的延长， OLED材料老化发光效率 下降， Vth— oled会上升， 而 Vth— oled的上升使工作电流相应增大， 如此改善 了材料老化导致的面板亮度降低。  It can be found that the current I flowing through the DTFT has nothing to do with the threshold voltage Vth of the DTFT, so that the uniformity of the current can be improved to achieve uniform brightness; while the current I flowing through the DTFT includes Vth-oled. As the use time prolongs, the aging efficiency of the OLED material decreases, Vth-oled rises, and the rise of Vth-oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.

图 11A是该第三实施例所述的像素单元驱动电路在第一时间段的等效电 路图；  11A is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a first period of time;

图 11B是该第三实施例所述的像素单元驱动电路在第二时间段的等效电 路图；  FIG. 11B is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a second period of time; FIG.

图 11C是该第三实施例所述的像素单元驱动电路在第三时间段的等效电 路图。  Fig. 11C is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in the third period.

在本发明第二实施例所述的像素单元驱动电路中， Vdata必须是绝对值较 大的负电压才能使整个电路发光， 否则 DTFT无法导通， 而在本发明第三实 施例所述的像素单元驱动电路中则没有该限制， Vdata 只需要较小的正电压 就可以使 DTFT开启并正常工作。 本发明第二实施例所述的像素单元驱动电 路的操作时序仍然适用于本发明第三实施例所述的像素单元驱动电路， 电路 的操作也是完全一样， 只是本发明第三实施例所述的像素单元驱动电路在第 三时间段时， P点电位由 VDD跳变为 VDD-Voled (Voled为此灰阶下 OLED 的工作电压，与 Vth— oled并不一致），而 DTFT的栅极处于悬空状态)， 因此 G 点电位 Vg跳变为 Vdata-Vth— oled- I Vth | -Voled, 从而 DTFT的源极和栅极 之间的电压差值 Vsg=Vs-Vg=VDD- Voled-( Vdata-Vth oled- I Vth | -Voled)= VDD- Vdata+Vth_oled+ I Vth | , 流过 DTFT 的电流 I=K(Vsg- I Vth | f=In the pixel unit driving circuit according to the second embodiment of the present invention, Vdata must be a negative voltage having a large absolute value to cause the entire circuit to emit light, otherwise the DTFT cannot be turned on, and the pixel according to the third embodiment of the present invention. This limitation is not present in the unit driver circuit. Vdata requires only a small positive voltage to turn the DTFT on and operate normally. The operation timing of the pixel unit driving circuit according to the second embodiment of the present invention is still applicable to the pixel unit driving circuit according to the third embodiment of the present invention, and the operation of the circuit is also completely the same, which is only the third embodiment of the present invention. Pixel unit drive circuit at During the three time period, the P point potential changes from VDD to VDD-Voled (Voled is the operating voltage of the OLED for this gray scale, which is inconsistent with Vth-oled), and the gate of the DTFT is floating), so the G point potential Vg jumps to Vdata-Vth- oled- I Vth | -Voled, so the voltage difference between the source and the gate of the DTFT is Vsg=Vs-Vg=VDD- Voled-( Vdata-Vth oled- I Vth | - Voled)= VDD- Vdata+Vth_oled+ I Vth | , Current through the DTFT I=K(Vsg- I Vth | f=

I=K(VDD- Vdata+Vth oled) 2; K为 DTFT的电流系数； I=K(VDD- Vdata+Vth oled) 2 ; K is the current coefficient of the DTFT;

W  W

Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度。 Κ =. Οχ Χ μ Χ ; μ, C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.

如图 12所示，本发明第五实施例所述的像素单元驱动电路和本发明第六 实施例所述的像素单元驱动电路在工作时， 第一控制信号 Sl、 第二控制信号 S2和所述数据线的输出信号 Vdata的时序图。  As shown in FIG. 12, the pixel unit driving circuit according to the fifth embodiment of the present invention and the pixel unit driving circuit according to the sixth embodiment of the present invention are in operation, the first control signal S1, the second control signal S2, and the A timing diagram of the output signal Vdata of the data line.

本发明第五实施例所述的像素单元驱动电路与本发明第二实施例所述的 像素单元驱动电路相比， 只是将 DTFT变为 n型薄膜晶体管， 并将 DTFT的 源极与 OLED的阳极连接， 电路的工作过程也是完全一样， 但是底发光会有 开口率的问题。  Compared with the pixel unit driving circuit according to the second embodiment of the present invention, the pixel unit driving circuit of the fifth embodiment of the present invention only converts the DTFT into an n-type thin film transistor, and the source of the DTFT and the anode of the OLED. Connection, the working process of the circuit is exactly the same, but the bottom light has a problem of aperture ratio.

在本发明第五实施例所述的像素单元驱动电路中， Vdata也必须要为较大 的正电压才能将 DTFT导通， 而本发明第六实施例所述的像素单元驱动电路 则克服了这个问题， 在本发明第六实施例所述的像素单元驱动电路中， Vdata 只需要较小的正电压就可以将 DTFT开启， 使电路正常工作。  In the pixel unit driving circuit of the fifth embodiment of the present invention, Vdata must also be a large positive voltage to turn on the DTFT, and the pixel unit driving circuit according to the sixth embodiment of the present invention overcomes this. Problem, in the pixel unit driving circuit according to the sixth embodiment of the present invention, Vdata only needs a small positive voltage to turn on the DTFT, so that the circuit works normally.

本发明电路第五实施例所述的像素单元驱动电路的操作过程如下： 在第一时间段， T2、 Τ3、 Τ4 导通， Tl、 Τ5、 Τ6 截止， Vg=Vdata+ Vth oled+Vth;  The operation process of the pixel unit driving circuit according to the fifth embodiment of the present invention is as follows: In the first time period, T2, Τ3, Τ4 are turned on, Tl, Τ5, Τ6 are turned off, Vg=Vdata+Vth oled+Vth;

在第二时间段， Τ2、 Τ3、 Τ4、 Τ5、 Τ6截止， Τ1导通 ， 电路緩冲； 在第三时间段， Tl、 Τ5、 Τ6导通， Τ2、 Τ3、 Τ4截止， Vp由 VDD跳变 为 VSS+ Voled, Vg跳变为 Vdata+ Vth— oled+Vth+VSS+ Voled- VDD , DTFT的 源极电位 Vs=VSS+ Voled,从而 DTFT的源极和 DTFT的栅极之间的电压差值 Vsg=Vdata+ Vth_oled+ Vth- VDD ,流过驱动薄膜晶体管 DTFT的电流 I=K(Vsg- I Vth I )2=K(Vdata+ Vth oled-VDD) 2; 其中， K为 DTFT的电流系数； w In the second time period, Τ2, Τ3, Τ4, Τ5, Τ6 are turned off, Τ1 is turned on, and the circuit is buffered; in the third time period, Tl, Τ5, Τ6 are turned on, Τ2, Τ3, Τ4 are turned off, and Vp is jumped by VDD. Change to VSS+ Voled, Vg jumps to Vdata+Vth_oled+Vth+VSS+ Voled- VDD , the source potential of DTFT is Vs=VSS+ Voled, so the voltage difference between the source of DTFT and the gate of DTFT is Vsg=Vdata+ Vth_oled+ Vth- VDD , current flowing through the driving thin film transistor DTFT I=K(Vsg− I Vth I ) 2 =K(Vdata+ Vth oled-VDD) 2 ; where K is the current coefficient of the DTFT; w

Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度。 Κ =. Οχ Χ μ Χ ; μ, C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.

本发明电路第六实施例所述的像素单元驱动电路的操作过程如下： 在第一时间段， T2、 Τ3、 Τ4 导通， Tl、 Τ5、 Τ6 截止， Vg=Vdata+ The operation process of the pixel unit driving circuit according to the sixth embodiment of the circuit of the present invention is as follows: In the first time period, T2, Τ3, Τ4 are turned on, Tl, Τ5, Τ6 are turned off, Vg=Vdata+

Vth oled+Vth; Vth oled+Vth;

在第二时间段， Τ2、 Τ3、 Τ4、 Τ5、 Τ6截止， Τ1导通， 电路緩冲； 在第三时间段， Tl、 Τ5、 Τ6导通， Τ2、 Τ3、 Τ4截止， Vp由 VSS跳变 为 VSS+Voled, Vg跳变为 Vdata+Vth— oled+Vth+Voled, Vs=VSS+Voled, Vgs = Vdata+Vth— oled+Vth- VSS ,流过 DTFT的电流 I=K(Vgs- I Vth | )2=K(Vdata+In the second time period, Τ2, Τ3, Τ4, Τ5, Τ6 are turned off, Τ1 is turned on, and the circuit is buffered; in the third time period, Tl, Τ5, Τ6 are turned on, Τ2, Τ3, Τ4 are turned off, and Vp is jumped by VSS. Change to VSS+Voled, Vg jumps to Vdata+Vth- oled+Vth+Voled, Vs=VSS+Voled, Vgs = Vdata+Vth- oled+Vth- VSS , current flowing through DTFT I=K (Vgs- I Vth | ) 2 =K(Vdata+

Vth oled-VSS) 2 ； 其中， K为 DTFT的电流系数； Vth oled-VSS) 2 ; where K is the current coefficient of the DTFT;

W  W

Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度。 Κ =. Οχ Χ μ Χ ; μ, C ox , W . J are the carrier mobility of the DTFT, the capacitance per unit area of the gate insulating layer, the channel width, and the channel length.

相比于本发明第二实施例所述的像素单元驱动电路、 本发明第五实施例 所述的像素单元驱动电路， 本发明第三实施例所述的像素单元驱动电路、 本 发明第六实施例所述的像素单元驱动电路降低了数据电压 Vdata的电压值， 在降低了像素单元驱动电路功耗的同时， 也降低了像素单元驱动电路的复杂 程度。  a pixel unit driving circuit according to a third embodiment of the present invention, a sixth embodiment of the present invention, in comparison with the pixel unit driving circuit of the second embodiment of the present invention, the pixel unit driving circuit according to the fifth embodiment of the present invention The pixel unit driving circuit described in the example reduces the voltage value of the data voltage Vdata, and reduces the power consumption of the pixel unit driving circuit, and also reduces the complexity of the pixel unit driving circuit.

本发明所述的像素单元驱动电路的最大特点是数据电压 Vdata从 DTFT 的源极输入， 利用 DTFT的二极管连接自放电将 Vth ( DTFT的阔值电压 ), Vdata (数据电压）， Vth_oled(OLED发光的阔值电压)存入存储电容 Cs 中， 补偿 OLED的驱动薄膜晶体管的阔值电压，同时利用电压回授机制补偿 OLED 本发明还提供了一种像素单元驱动方法， 其应用于上述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：  The most characteristic feature of the pixel unit driving circuit of the present invention is that the data voltage Vdata is input from the source of the DTFT, and the self-discharge of the DTFT diode is used to connect Vth (the threshold voltage of the DTFT), Vdata (data voltage), Vth_oled (OLED light emission). The threshold voltage is stored in the storage capacitor Cs to compensate the threshold voltage of the driving thin film transistor of the OLED, and the OLED is compensated by the voltage feedback mechanism. The present invention also provides a pixel unit driving method, which is applied to the pixel unit described above. a driving circuit, the pixel unit driving method comprising the following steps:

像素充电步骤： 充电控制单元首先控制驱动薄膜晶体管导通， 并控制对 存储电容进行充电， 直至驱动薄膜晶体管的栅极电位升高至使得所述驱动薄 膜晶体管截止； Pixel charging step: the charging control unit first controls the driving of the driving thin film transistor, and controls charging of the storage capacitor until the gate potential of the driving thin film transistor is raised to make the driving thin Membrane transistor cutoff;

驱动 OLED发光显示步骤： 驱动控制单元控制所述驱动薄膜晶体管导通 并且其栅极处于悬空状态， 以驱动 OLED发光显示并使得所述驱动薄膜晶体 管的栅源电压补偿所述驱动薄膜晶体管的阔值电压。  Driving the OLED light emitting display step: the driving control unit controls the driving thin film transistor to be turned on and the gate thereof is in a floating state to drive the OLED light emitting display and make the gate-source voltage of the driving thin film transistor compensate the threshold value of the driving thin film transistor Voltage.

本发明还提供了一种像素单元， 包括 OLED和该第一实施例、 该第二实 施例和该第三实施例所述的像素单元驱动电路；  The present invention also provides a pixel unit including an OLED and the pixel unit driving circuit of the first embodiment, the second embodiment, and the third embodiment;

所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阴 极连接， 所述 OLED的阳极通过所述驱动控制单元与驱动电源的高电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关元件与所述驱动电源 的低电平输出端连接。  The pixel unit driving circuit includes a source of a driving thin film transistor connected to a cathode of the OLED, and an anode of the OLED is connected to a high level output end of the driving power source through the driving control unit, where the driving thin film transistor is The drain is connected to the low level output of the driving power source through the first switching element.

本发明还提供了一种像素单元， 包括 OLED和该第四实施例、 该第五实 施例和该第六实施例所述的像素单元驱动电路；  The present invention further provides a pixel unit including an OLED and the pixel unit driving circuit of the fourth embodiment, the fifth embodiment, and the sixth embodiment;

所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阳 极连接， 所述 OLED的阴极通过所述驱动控制单元与驱动电源的低电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关元件与所述驱动电源 的高电平输出端连接。  a source of the driving thin film transistor included in the pixel unit driving circuit is connected to an anode of the OLED, and a cathode of the OLED is connected to a low level output end of the driving power source through the driving control unit, where the driving thin film transistor The drain is connected to the high level output terminal of the driving power source through the first switching element.

需要说明的是， 上述各种薄膜晶体管（包括作为开关元件的薄膜晶体管、 驱动薄膜晶体管以及匹配薄膜晶体管） 的源极 s和漏极 g的制作工艺相同， 名称上是可以互换的， 其可根据电压的方向在名称上改变。 而且， 同一像素 电路中各个晶体管的类型可以相同， 也可以不同， 只需根据其自身阔值电压 的特点， 调整相应的栅极开启信号源的时序高低电平即可。 当然， 优选的方 式为， 需要相同栅极开启信号源的晶体管的类型相同。 更为优选的， 同一像 素电路中， 所有薄膜晶体管的类型相同 （包括作为开关元件的薄膜晶体管、 驱动薄膜晶体管以及匹配薄膜晶体管），均为 n型薄膜晶体管或 p型薄膜晶体 管。  It should be noted that the source s and the drain g of the above various thin film transistors (including a thin film transistor as a switching element, a driving thin film transistor, and a matching thin film transistor) are manufactured in the same process, and are interchangeably named. Change the name according to the direction of the voltage. Moreover, the types of the transistors in the same pixel circuit may be the same or different, and it is only necessary to adjust the timing high and low levels of the corresponding gate-on signal source according to the characteristics of its own threshold voltage. Of course, the preferred method is that the types of transistors that require the same gate-on signal source are the same. More preferably, in the same pixel circuit, all of the thin film transistors are of the same type (including a thin film transistor as a switching element, a driving thin film transistor, and a matching thin film transistor), and are both an n-type thin film transistor or a p-type thin film transistor.

以上说明对本发明而言只是说明性的， 而非限制性的， 本领域普通技术 人员理解， 在不脱离所附权利要求所限定的精神和范围的情况下， 可做出许 多修改、 变化或等效， 但都将落入本发明的保护范围内。  The above description is intended to be illustrative, and not restrictive, and many modifications, variations, etc. may be made without departing from the spirit and scope of the appended claims. Effective, but all fall within the scope of protection of the present invention.

Claims

权 利 要 求 书 Claim 1、 一种像素单元驱动电路， 用于驱动 OLED, 其包括驱动薄膜晶体管、 第一开关元件、 存储电容、 驱动控制单元和充电控制单元， 其中， A pixel unit driving circuit for driving an OLED, comprising: a driving thin film transistor, a first switching element, a storage capacitor, a driving control unit, and a charging control unit, wherein 所述驱动薄膜晶体管的栅极， 与所述存储电容的第一端连接， 还通过所 述充电控制单元与所述驱动薄膜晶体管的漏极连接；  a gate of the driving thin film transistor is connected to the first end of the storage capacitor, and is further connected to a drain of the driving thin film transistor through the charging control unit; 所述驱动薄膜晶体管的源极， 与所述 OLED的第一端连接， 并通过所述 驱动控制单元与所述存储电容的第二端连接；  a source of the driving thin film transistor is connected to the first end of the OLED, and is connected to the second end of the storage capacitor through the driving control unit; 所述驱动薄膜晶体管的漏极， 通过所述第一开关元件与驱动电源的第一 端连接；  The drain of the driving thin film transistor is connected to the first end of the driving power source through the first switching element; 所述存储电容 Cs的第二端，还通过所述充电控制单元与所述驱动电源的 第一端连接；  The second end of the storage capacitor Cs is further connected to the first end of the driving power source through the charging control unit; 所述 OLED的第二端通过所述驱动控制单元与所述驱动电源的第二端连 接；  The second end of the OLED is connected to the second end of the driving power source through the driving control unit; 所述 OLED的第二端通过所述充电控制单元与数据线连接。  The second end of the OLED is connected to the data line through the charging control unit. 2、 如权利要求 1所述的像素单元驱动电路， 其中，  2. The pixel unit driving circuit according to claim 1, wherein 所述驱动薄膜晶体管是 p型薄膜晶体管；  The driving thin film transistor is a p-type thin film transistor; 所述 OLED的第一端为所述 OLED的阴极，所述 OLED的第二端为所述 OLED的阳极， 并且所述驱动薄膜晶体管的源极与所述 OLED的阴极连接； 所述驱动电源的第一端为所述驱动电源的低电平输出端， 所述驱动电源 的第二端为所述驱动电源的高电平输出端， 并且所述驱动薄膜晶体管的漏极 通过所述第一开关元件与驱动电源的低电平输出端连接；  a first end of the OLED is a cathode of the OLED, a second end of the OLED is an anode of the OLED, and a source of the driving thin film transistor is connected to a cathode of the OLED; The first end is a low level output end of the driving power source, the second end of the driving power source is a high level output end of the driving power source, and a drain of the driving thin film transistor passes the first switch The component is connected to a low level output of the driving power source; 所述存储电容的第二端通过所述充电控制单元与所述驱动电源的低电平 输出端连接。  The second end of the storage capacitor is connected to the low level output terminal of the driving power source through the charging control unit. 3、 如权利要求 2所述的像素单元驱动电路， 其中，  3. The pixel unit driving circuit according to claim 2, wherein 所述第一开关元件为第一薄膜晶体管， 所述驱动控制单元包括第二薄膜 晶体管和第三薄膜晶体管， 所述充电控制单元包括第四薄膜晶体管、 第五薄 膜晶体管和第六薄膜晶体管；  The first switching element is a first thin film transistor, the driving control unit comprises a second thin film transistor and a third thin film transistor, and the charging control unit comprises a fourth thin film transistor, a fifth thin film transistor and a sixth thin film transistor; 所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动电源的 低电平输出端连接， 源极与所述驱动薄膜晶体管的漏极连接； 所述第二薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动电源的 高电平输出端连接， 漏极与所述 OLED的阳极连接； The first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor; The second thin film transistor has a gate connected to the second control line, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED; 所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动薄膜晶 体管的源极连接， 漏极与所述存储电容的第二端连接；  The third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor; 所述第四薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第一端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor; 所述第五薄膜晶体管， 栅极与第一控制线连接， 源极与所述驱动电源的 低电平输出端连接， 漏极与所述存储电容的第二端连接；  The fifth thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor; 所述第六薄膜晶体管， 栅极与第一控制线连接， 源极与所述 OLED的阳 极连接， 漏极与数据线连接；  The sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line; 所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p 型薄膜晶体管， 所述第四开关元件、 所述第五薄膜晶体管和所述第六薄膜 晶体管是 n型薄膜晶体管。  The first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors, and the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type Thin film transistor. 4、 如权利要求 2所述的像素单元驱动电路， 其中，  4. The pixel unit driving circuit according to claim 2, wherein 所述第一开关元件为第一薄膜晶体管， 所述驱动控制单元包括第二薄膜 晶体管和第三薄膜晶体管， 所述充电控制单元包括第四薄膜晶体管、 第五薄 膜晶体管和第六薄膜晶体管；  The first switching element is a first thin film transistor, the driving control unit comprises a second thin film transistor and a third thin film transistor, and the charging control unit comprises a fourth thin film transistor, a fifth thin film transistor and a sixth thin film transistor; 所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动电源的 低电平输出端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to the low level output end of the driving power source, and a source connected to the drain of the driving thin film transistor; 所述第二薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动电源的 高电平输出端连接， 漏极与所述 OLED的阳极连接；  The second thin film transistor has a gate connected to the second control line, a source connected to the high level output end of the driving power source, and a drain connected to the anode of the OLED; 所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与所述驱动薄膜晶 体管的源极连接， 漏极与所述存储电容的第二端连接；  The third thin film transistor has a gate connected to the second control line, a source connected to the source of the driving thin film transistor, and a drain connected to the second end of the storage capacitor; 所述第四薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第一端连接， 源极与所述驱动薄膜晶体管的漏极连接；  The fourth thin film transistor has a gate connected to the first control line, a drain connected to the first end of the storage capacitor, and a source connected to the drain of the driving thin film transistor; 所述第五薄膜晶体管， 栅极与第一控制线连接， 源极与所述存储电容的 第二端连接， 漏极与驱动电源的高电平输出端连接；  The fifth thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source; 所述第六薄膜晶体管， 栅极与第一控制线连接， 源极与所述 OLED的阳 极连接， 漏极与数据线连接；  The sixth thin film transistor has a gate connected to the first control line, a source connected to the anode of the OLED, and a drain connected to the data line; 所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p 型薄膜晶体管， 所述第四开关元件、 所述第五薄膜晶体管和所述第六薄膜 晶体管是 n型薄膜晶体管。 The first thin film transistor, the second thin film transistor, and the third thin film transistor are both The p-type thin film transistor, the fourth switching element, the fifth thin film transistor, and the sixth thin film transistor are n-type thin film transistors. 5、 如权利要求 1所述的像素单元驱动电路， 其中，  5. The pixel unit driving circuit according to claim 1, wherein 所述驱动薄膜晶体管是 n型薄膜晶体管；  The driving thin film transistor is an n-type thin film transistor; 所述 OLED的第一端为所述 OLED的阳极，所述 OLED的第二端为所述 The first end of the OLED is an anode of the OLED, and the second end of the OLED is the OLED的阴极， 并且所述驱动薄膜晶体管的源极与所述 OLED的阳极连接； 所述驱动电源的第一端为所述驱动电源的高电平输出端， 所述驱动电源 的第二端为所述驱动电源的低电平输出端， 并且所述驱动薄膜晶体管的漏极 通过所述第一开关元件与驱动电源的高电平输出端连接； a cathode of the OLED, and a source of the driving thin film transistor is connected to an anode of the OLED; a first end of the driving power source is a high level output end of the driving power source, and a second end of the driving power source is a low level output terminal of the driving power source, and a drain of the driving thin film transistor is connected to a high level output end of the driving power source through the first switching element; 所述存储电容的第二端通过所述充电控制单元与所述驱动电源的高电平 输出端连接。  The second end of the storage capacitor is connected to the high-level output terminal of the driving power source through the charging control unit. 6、 如权利要求 5所述的像素单元驱动电路， 其中，  6. The pixel unit driving circuit according to claim 5, wherein 所述第一开关元件为第一薄膜晶体管， 所述充电控制单元包括第二薄膜 晶体管、 第三薄膜晶体管和第四薄膜晶体管， 所述驱动控制单元包括第五薄 膜晶体管和第六薄膜晶体管；  The first switching element is a first thin film transistor, the charging control unit comprises a second thin film transistor, a third thin film transistor and a fourth thin film transistor, and the driving control unit comprises a fifth thin film transistor and a sixth thin film transistor; 所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与驱动电源的高电平输出端连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a high level output end of the driving power source; 所述第二薄膜晶体管， 栅极与第一控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动电源的高电平输出端连接；  The second thin film transistor has a gate connected to the first control line, a source connected to the second end of the storage capacitor, and a drain connected to the high level output end of the driving power source; 所述第三薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与所述驱动薄膜晶体管的栅极连接；  The third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor; 所述第四薄膜晶体管， 栅极与第一控制线连接， 源极与数据线连接， 漏 极与所述 OLED的阴极连接；  The fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED; 所述第五薄膜晶体管， 栅极与第二控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动薄膜晶体管的源极连接；  The fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor; 所述第六薄膜晶体管， 栅极与第二控制线连接， 源极与所述 OLED的阴 极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source; 所述第二薄膜晶体管、 所述第三薄膜晶体管和所述第四薄膜晶体管为 n 型薄膜晶体管， 所述第一薄膜晶体管、 第五薄膜晶体管和所述第六薄膜晶体 管为 p型薄膜晶体管。 The second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors. 7、 如权利要求 5所述的像素单元驱动电路， 其中， 7. The pixel unit driving circuit according to claim 5, wherein 所述第一开关元件为第一薄膜晶体管， 所述充电控制单元包括第二薄膜 晶体管、 第三薄膜晶体管和第四薄膜晶体管， 所述驱动控制单元包括第五薄 膜晶体管和第六薄膜晶体管；  The first switching element is a first thin film transistor, the charging control unit comprises a second thin film transistor, a third thin film transistor and a fourth thin film transistor, and the driving control unit comprises a fifth thin film transistor and a sixth thin film transistor; 所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与驱动电源的高电平输出端连接；  The first thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a high level output end of the driving power source; 所述第二薄膜晶体管， 栅极与第一控制线连接， 源极与所述驱动电源的 低电平输出端连接， 漏极与所述存储电容的第二端连接；  The second thin film transistor has a gate connected to the first control line, a source connected to the low level output end of the driving power source, and a drain connected to the second end of the storage capacitor; 所述第三薄膜晶体管， 栅极与第一控制线连接， 漏极与所述驱动薄膜晶 体管的漏极连接， 源极与所述驱动薄膜晶体管的栅极连接；  The third thin film transistor has a gate connected to the first control line, a drain connected to a drain of the driving thin film transistor, and a source connected to a gate of the driving thin film transistor; 所述第四薄膜晶体管， 栅极与第一控制线连接， 源极与数据线连接， 漏 极与所述 OLED的阴极连接；  The fourth thin film transistor has a gate connected to the first control line, a source connected to the data line, and a drain connected to the cathode of the OLED; 所述第五薄膜晶体管， 栅极与第二控制线连接， 源极与所述存储电容的 第二端连接， 漏极与所述驱动薄膜晶体管的源极连接；  The fifth thin film transistor has a gate connected to the second control line, a source connected to the second end of the storage capacitor, and a drain connected to the source of the driving thin film transistor; 所述第六薄膜晶体管， 栅极与第二控制线连接， 源极与所述 OLED的阴 极连接， 漏极与所述驱动电源的低电平输出端连接；  The sixth thin film transistor has a gate connected to the second control line, a source connected to the cathode of the OLED, and a drain connected to the low level output end of the driving power source; 所述第二薄膜晶体管、 所述第三薄膜晶体管和所述第四薄膜晶体管为 n 型薄膜晶体管， 所述第一薄膜晶体管、 第五薄膜晶体管和所述第六薄膜晶体 管为 p型薄膜晶体管。  The second thin film transistor, the third thin film transistor, and the fourth thin film transistor are n-type thin film transistors, and the first thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are p-type thin film transistors. 8、 一种像素单元驱动方法， 其应用于如权利要求 1所述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：  8. A pixel unit driving method applied to the pixel unit driving circuit according to claim 1, wherein the pixel unit driving method comprises the following steps: 像素充电步骤： 充电控制单元首先控制驱动薄膜晶体管导通， 并控制对 存储电容进行充电， 直至驱动薄膜晶体管的栅极电位升高至使得所述驱动薄 膜晶体管截止；  Pixel charging step: the charging control unit first controls the driving of the driving thin film transistor, and controls charging of the storage capacitor until the gate potential of the driving thin film transistor rises to cause the driving thin film transistor to be turned off; 驱动 OLED发光显示步骤： 驱动控制单元控制所述驱动薄膜晶体管导通 并且其栅极处于悬空状态， 以驱动 OLED发光显示并使得所述驱动薄膜晶体 管的栅源电压补偿所述驱动薄膜晶体管的阔值电压。  Driving the OLED light emitting display step: the driving control unit controls the driving thin film transistor to be turned on and the gate thereof is in a floating state to drive the OLED light emitting display and make the gate-source voltage of the driving thin film transistor compensate the threshold value of the driving thin film transistor Voltage. 9、一种像素单元， 包括 OLED和如权利要求 1至 4中任一权利要求所述 的像素单元驱动电路， 其中，  A pixel unit comprising an OLED and a pixel unit driving circuit according to any one of claims 1 to 4, wherein 所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阴 极连接， 所述 OLED的阳极通过所述驱动控制单元与驱动电源的高电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关元件与所述驱动电源 的低电平输出端连接。 The pixel unit driving circuit includes a source of the driving thin film transistor and a cathode of the OLED a pole connection, wherein an anode of the OLED is connected to a high level output end of the driving power source through the driving control unit, and a drain of the driving thin film transistor passes through a low level output of the first switching element and the driving power source End connection. 10、 一种像素单元， 包括 OLED和如权利要求 1、 5、 6或 7所述的像素 单元驱动电路， 其中，  A pixel unit comprising an OLED and the pixel unit driving circuit according to claim 1, 5, 6 or 7, wherein 所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阳 极连接， 所述 OLED的阴极通过所述驱动控制单元与驱动电源的低电平输出 端连接， 所述驱动薄膜晶体管的漏极通过所述第一开关元件与所述驱动电源 的高电平输出端连接。  a source of the driving thin film transistor included in the pixel unit driving circuit is connected to an anode of the OLED, and a cathode of the OLED is connected to a low level output end of the driving power source through the driving control unit, where the driving thin film transistor The drain is connected to the high level output terminal of the driving power source through the first switching element.
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