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WO2013114398A3 - Fpga system for usb bridge implementation - Google Patents

Fpga system for usb bridge implementation Download PDF

Info

Publication number
WO2013114398A3
WO2013114398A3 PCT/IN2013/000031 IN2013000031W WO2013114398A3 WO 2013114398 A3 WO2013114398 A3 WO 2013114398A3 IN 2013000031 W IN2013000031 W IN 2013000031W WO 2013114398 A3 WO2013114398 A3 WO 2013114398A3
Authority
WO
WIPO (PCT)
Prior art keywords
usb
host
phy
fpga
mass storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IN2013/000031
Other languages
French (fr)
Other versions
WO2013114398A2 (en
Inventor
Raghukul Dikshit
Akanksha Jain
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tata Power Co Ltd
Original Assignee
Tata Power Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tata Power Co Ltd filed Critical Tata Power Co Ltd
Publication of WO2013114398A2 publication Critical patent/WO2013114398A2/en
Publication of WO2013114398A3 publication Critical patent/WO2013114398A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Storage Device Security (AREA)

Abstract

A Field Programmable Gate Array (FPGA) based USB bridge implementation for communication of data between a USB Host and a USB mass storage device overcomes drawbacks known in the art including lack of security due to software based encryption implementation and driver and OS dependency. The USB bridge comprises a Host PHY operating in a Device mode and a Device PHY operating in a Host mode, connected to the USB Host and the USB mass storage device respectively via a bidirectional USB link. The FPGA is connected to each of the Host PHY and the Device PHY via a bidirectional ULPI link respectively. Data from the USB Host is written into the FPGA of the USB bridge through the Host PHY. This data in parallel form is then stored internally and subsequently communicated to the USB mass storage device through the Device PHY over the Device ULPI Interface.
PCT/IN2013/000031 2012-01-30 2013-01-17 Fpga system for usb bridge implementation Ceased WO2013114398A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN274MU2012 2012-01-30
IN274/MUM/2012 2012-01-30

Publications (2)

Publication Number Publication Date
WO2013114398A2 WO2013114398A2 (en) 2013-08-08
WO2013114398A3 true WO2013114398A3 (en) 2013-10-10

Family

ID=48905984

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IN2013/000031 Ceased WO2013114398A2 (en) 2012-01-30 2013-01-17 Fpga system for usb bridge implementation

Country Status (1)

Country Link
WO (1) WO2013114398A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103559159A (en) * 2013-10-25 2014-02-05 华为技术有限公司 Information processing method and electronic device
US10165130B2 (en) 2014-02-13 2018-12-25 Emerge Print Management, Llc System and method for the passive monitoring and reporting of printer-related data on USB cables
US20150229791A1 (en) * 2014-02-13 2015-08-13 Marvin Scaff System and Method for the Passive Monitoring and Reporting of Printer-Related Data on USB Cables
CN109889268A (en) * 2019-01-28 2019-06-14 山东超越数控电子股份有限公司 A kind of USB distance transmission system and method based on FPGA
CN110233740A (en) * 2019-07-17 2019-09-13 上海创远仪器技术股份有限公司 High-speed data switching card device and corresponding method based on FPGA
WO2025078039A1 (en) * 2023-10-09 2025-04-17 Valutis Technologies GmbH Data backup and/or provision device and method for data backup and/or data provision

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020026528A1 (en) * 2000-08-24 2002-02-28 Lo Kwoktung B. System and method for selectively bridging and routing data packets between multiple networks
US6711162B1 (en) * 1995-09-08 2004-03-23 3Com Corporation Method and apparatus for providing proxy service, route selection, and protocol conversion for service endpoints within data networks
US20080005409A1 (en) * 2006-03-31 2008-01-03 Cypress Semiconductor Corporation USB mass storage locking via a secondary interface
US20080147931A1 (en) * 2006-10-17 2008-06-19 Smart Modular Technologies, Inc. Data striping to flash memory
US20110191499A1 (en) * 2010-02-01 2011-08-04 Jonathan Andersson USB to SD Bridge
US8055919B2 (en) * 2009-02-06 2011-11-08 Standard Microsystems Corporation Port power controller for USB hubs with legacy battery charge support

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6711162B1 (en) * 1995-09-08 2004-03-23 3Com Corporation Method and apparatus for providing proxy service, route selection, and protocol conversion for service endpoints within data networks
US20020026528A1 (en) * 2000-08-24 2002-02-28 Lo Kwoktung B. System and method for selectively bridging and routing data packets between multiple networks
US20080005409A1 (en) * 2006-03-31 2008-01-03 Cypress Semiconductor Corporation USB mass storage locking via a secondary interface
US20080147931A1 (en) * 2006-10-17 2008-06-19 Smart Modular Technologies, Inc. Data striping to flash memory
US8055919B2 (en) * 2009-02-06 2011-11-08 Standard Microsystems Corporation Port power controller for USB hubs with legacy battery charge support
US20110191499A1 (en) * 2010-02-01 2011-08-04 Jonathan Andersson USB to SD Bridge

Also Published As

Publication number Publication date
WO2013114398A2 (en) 2013-08-08

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