WO2013143295A1 - Array substrate of x-ray detection device and manufacturing method thereof - Google Patents
Array substrate of x-ray detection device and manufacturing method thereof Download PDFInfo
- Publication number
- WO2013143295A1 WO2013143295A1 PCT/CN2012/084607 CN2012084607W WO2013143295A1 WO 2013143295 A1 WO2013143295 A1 WO 2013143295A1 CN 2012084607 W CN2012084607 W CN 2012084607W WO 2013143295 A1 WO2013143295 A1 WO 2013143295A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- pattern
- forming
- photodiode
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
- H10F39/026—Wafer-level processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
Definitions
- Embodiments of the present invention relate to an array substrate of an X-ray detecting apparatus and a method of fabricating the same. Background technique
- X-ray inspection is mainly for plane inspection.
- X-ray imaging has used film to record optical images.
- the concept of digital medical X-ray imaging has been proposed as early as the early 1970s.
- digital medical image transmission and image storage transmission systems With the revolutionary development of digital medical image transmission and image storage transmission systems, the application of digital X-ray imaging technology has made great progress.
- CCD Charge Coupled Device
- CMOS Complementary Metal Oxide Semiconductor
- the digital X-ray imaging system saves up to four times the processing time compared to traditional computer imaging systems, and with high-resolution display panels, it also improves efficiency, diagnostic accuracy, and a film-free medical environment.
- the active matrix planar detector can be applied to non-destructive testing, and the physical or mechanical properties of the object to be tested can be detected in time without damaging the sample to be tested. It is easy to detect cracks, holes and micros such as 50 microns. Defects are therefore widely used, especially in the electronics, aerospace and automotive industries.
- each pixel region of the array substrate of the conventional X-ray detector generally includes a photodiode sensor device 200 and a thin film transistor device 300.
- the main function of the photodiode sensor device is to receive light and convert the optical signal into an electrical signal through the photovoltaic effect
- the main function of the thin film transistor device is to control the switch and transmit the electrical signal generated by the photovoltaic effect.
- the existing X-ray detector operates on the principle that when the X-ray 101 is bombarded on the phosphor 102 disposed before the array substrate, the phosphor 102 generates visible light which is incident on the photodiode sensor device 200 of the array substrate.
- the photodiode sensor device 200 converts the optical signal into an electrical signal by a photovoltaic effect, and the electrical signal is input to the control circuit of the X-ray detector through the switching control of the thin film transistor device 300.
- Step 101 forming a gate electrode 11 on the base substrate 10 by a first mask process
- Step 102 depositing a gate insulating layer 12 on the substrate on which the step 101 is completed, and forming an active layer 13 on the array substrate by a second mask process;
- Step 103 forming a channel barrier layer 14 by a third mask process on the substrate on which step 102 is completed;
- Step 104 depositing an ohmic contact layer 29 and a source/drain electrode metal layer on the substrate on which step 103 is completed, and forming a source electrode 15, a drain electrode 16 and a light reflecting layer 17 through a fourth mask process;
- Step 105 forming a N-type semiconductor 18, an I-type semiconductor 19, a P-type semiconductor 20 (ie, a portion of the PIN-type photodiode sensor device) and a transparent electrode 21 through a fifth mask process on the substrate on which the step 104 is completed;
- Step 106 depositing a first passivation layer 22 on the substrate on which step 105 is completed, and forming a first via 23 and a second via 25 on the first passivation layer 22 through a sixth mask process;
- Step 107 forming a pattern of the photomask 27, the bias electrode 24 and the signal line 26 through the seventh mask process on the substrate on which the step 106 is completed;
- Step 108 depositing a second passivation layer 28 on the substrate on which the step 107 is completed, and forming a passivation layer via hole of the signal guiding region by an eighth mask process (not shown);
- Step 109 forming a transparent electrode (not shown) of the signal guiding region through the ninth mask process on the substrate on which the step 108 is completed.
- the above technique has a drawback in that in order to avoid affecting the uniformity of the active layer channel of the formed thin film transistor device when forming the photodiode sensing device, it is necessary to form over the active layer by a single mask process (step 103).
- a channel barrier layer which undoubtedly increases the complexity of the manufacturing process of the array substrate, makes the production capacity difficult to increase.
- the technology in order to reduce the influence of channel leakage current of the thin film transistor device, the technology also needs to add a metal mask to block the light generated by the X-ray bombardment of the phosphor, which also makes the manufacturing cost cannot be further reduced. Summary of the invention
- An embodiment of the present invention provides an array substrate of an X-ray detecting device and a manufacturing method thereof, which are used to solve the problem that the X-ray detecting device array substrate existing in the prior art needs to use another mask process to form a channel block. Layer, which makes the manufacturing process cumbersome, costly, and difficult to upgrade Problems.
- An array substrate of an X-ray detecting apparatus includes: a thin film transistor device and a photodiode sensor device connected to the thin film transistor device.
- the thin film transistor device includes: a source and a drain formed over a base substrate; an ohmic layer formed over the source and the drain; an active layer formed over the ohmic layer, the active layer being located The portion between the source and the drain constitutes a channel; a gate insulating layer formed over the active layer and covering the entire substrate; a gate formed over the gate insulating layer and above the active layer.
- the gate material is preferably a heavy metal or a heavy metal alloy.
- the photodiode sensor device includes: a light reflecting layer formed on the gate insulating layer and connected to the drain; a photodiode formed on the light reflecting layer; and a transparent formed on the photodiode An electrode; a bias electrode connected to the transparent electrode above the transparent electrode.
- the photodiode is a PIN type photodiode.
- the array substrate of the X-ray detecting apparatus of this embodiment may further include: a first passivation layer formed on the gate electrode and the transparent electrode and covering the entire substrate; formed in the first passivation layer a connection electrode on the first passivation layer; a first via hole connecting the bias electrode and the transparent electrode; a second via hole connecting the connection electrode and the drain; and a connection connecting the electrode and the reflective layer Three vias.
- the method of manufacturing the X-ray detecting device array substrate of the present embodiment includes the steps of forming a thin film transistor device and a photodiode sensor device.
- Forming a thin film transistor device includes: forming a pattern of a source, a drain, and an ohmic layer by a mask process on a substrate; forming an active layer by a mask process on a substrate forming a pattern of a source, a drain, and an ohmic layer a pattern; a gate insulating layer is formed on the substrate on which the pattern of the active layer is formed; and a pattern of the gate is formed by a mask process on the substrate on which the gate insulating layer is formed.
- forming the photodiode sensor device includes: forming a pattern of the light reflecting layer by the same mask process while forming a pattern of the gate electrode; forming a photodiode by a mask process on the substrate on which the pattern of the light reflecting layer is formed And a pattern of transparent electrodes.
- a pattern for forming a photodiode and a transparent electrode includes: depositing an N-type semiconductor layer on the light-reflecting layer; depositing an I-type semiconductor layer on the N-type semiconductor layer; depositing a P-type semiconductor on the I-type semiconductor layer a layer; depositing a transparent electrode layer on the P-type semiconductor layer; forming a pattern of the photodiode and the transparent electrode by a mask process.
- the manufacturing method includes the steps of: forming a pattern of the gate and a pattern of the photodiode and the transparent electrode: covering the entire passivation layer on the entire substrate, forming a bias electrode for connecting by using a mask process a first via hole of the transparent electrode and a second via hole and a third via hole for connecting the drain and the light reflecting layer; a pattern of the bias electrode formed by the mask process and a pattern of the connection electrode connecting the drain and the light reflecting layer .
- the gate can be The channel is effectively protected from being affected, eliminating the masking process of the prior art channel barrier layer, simplifying the manufacturing process of the array substrate, and improving the productivity; in addition, the top gate type thin film transistor The gate of the device can effectively block the light that is irradiated to the channel, so that the leakage current of the channel is greatly reduced, so that no additional mask is needed, which simplifies the production process and further reduces the production cost.
- FIG. 1 is a schematic cross-sectional structural view of an array substrate of a prior art X-ray detecting device
- FIG. 2 is a schematic structural view of a prior art X-ray detecting device detecting principle
- FIG. 3 is a schematic cross-sectional structural view of an array substrate of an X-ray detecting device of the present invention.
- FIG. 4 is a top view of the first masking process of the present invention after exposure and development;
- Figure 5 is a cross-sectional view showing the first masking process of the present invention after exposure and development
- FIG. 6 is a top view of the first mask process after etching according to the present invention.
- FIG. 7 is a cross-sectional view taken along line A-A of FIG. 6 after etching for the first mask process of the present invention
- FIG. 8 is a plan view of the second mask process after etching according to the present invention
- FIG. 9 is a cross-sectional view taken along line A-A of FIG. 8 after etching of the second mask process of the present invention.
- FIG. 10 is a plan view of the third mask process after etching according to the present invention.
- FIG. 11 is a cross-sectional view taken along line A-A of FIG. 10 after etching of the third mask process of the present invention
- FIG. 12 is a plan view of the fourth mask process after etching according to the present invention
- Figure 13 is a cross-sectional view taken along line BB of Figure 12 after etching of the fourth mask process of the present invention
- Figure 14 is a top plan view of the fifth mask process after etching according to the present invention
- Figure 15 is a top plan view of the sixth mask process after etching according to the present invention.
- 16 is a cross-sectional view showing the seventh mask process (signal guiding region connecting data line vias) after etching according to the present invention
- 17 is a cross-sectional view showing the seventh mask process (signal guiding region connecting gate line via) after etching according to the present invention.
- FIG. 18 is a cross-sectional view showing an eighth mask process (a transparent electrode connected to a signal guiding region and a data line) after etching according to the present invention
- Figure 19 is a cross-sectional view showing the eighth masking process (transparent electrode in which the signal guiding region is connected to the gate line) of the present invention.
- the embodiment of the present invention An array substrate of an X-ray detecting device and a method of manufacturing the same are provided.
- the array substrate of the embodiment of the present invention includes a plurality of gate lines and a plurality of data lines, the gate lines and the data lines crossing each other thereby defining a plurality of pixel units arranged in a matrix, each of the pixel units including a thin film transistor as a switching element
- the device and the photodiode sensor device connected to the thin film transistor device.
- the gate of the thin film transistor of each pixel is electrically connected or integrally formed with the corresponding gate line
- the source is electrically connected or integrally formed with the corresponding data line
- the drain is connected to the corresponding photodiode sensor device.
- the following description is mainly made for a single or a plurality of pixel units, but other pixel units may be formed identically.
- each pixel unit of the array substrate of the X-ray detecting apparatus of the embodiment of the present invention includes a thin film transistor device 300 and a photodiode sensor device 200 connected to the thin film transistor device.
- the thin film transistor device 300 includes: a source 55 and a drain 56 formed over the base substrate 50; an ohmic contact layer 29 formed over the source 55 and the drain 56; formed in the ohmic contact layer An active layer 53 over 29; a gate insulating layer 52 formed over the active layer 53 and covering the entire substrate; a gate 51 formed over the gate insulating layer 52 and above the active layer 53.
- the base substrate 50 may be a glass substrate, a plastic substrate, or another substrate. A portion of the active layer 53 between the source 55 and the drain 56 constitutes a channel of the thin film transistor.
- the gate electrode 51 is preferably made of a heavy metal or a heavy metal alloy which is difficult to penetrate by X-rays, such as copper, lead or copper-lead alloy.
- the photodiode sensor device 200 includes: a light reflecting layer 57 formed on the gate insulating layer 52 and connected to the drain electrode 56 of the thin film transistor; and a photodiode formed on the light reflecting layer 57.
- the light reflecting layer 57 formed on the gate insulating layer 52 is made of the same material as the gate electrode 51 and formed in the same mask patterning process as the gate electrode 51.
- the photodiode may be a MIS type photodiode or a PIN type photodiode, etc., preferably a PIN type photodiode.
- a PIN type photodiode (P-type semiconductor 60, I-type semiconductor 59, N-type semiconductor 58) is a PN junction between two semiconductors, or a region adjacent to a junction between a semiconductor and a metal, in the P region and the N region
- a type I photodetector that generates a type I (intrinsic) layer and absorbs light radiation to generate a photocurrent.
- PIN type photodiodes have the advantages of small junction capacitance, short transit time, and high sensitivity.
- the array substrate of the embodiment shown in Fig. 3 further includes a first passivation layer 62 and a second passivation layer 68.
- the first passivation layer 62 is formed over the gate electrode 51 and the transparent electrode 61 and covers the entire substrate.
- a first via 63 connecting the bias electrode 64 and the transparent electrode 61, a second via 65 connecting the connection electrode 71 and the drain 56, and a connection connection electrode 71 and a light reflecting layer 57 are opened in the first passivation layer 62.
- the third via 70 That is, the connection electrode 71 formed over the first passivation layer 62 connects the drain 56 and the light-reflecting layer 57 through the second via 65 and the third via 70.
- a second passivation layer 68 is formed over the first passivation layer 62 and covers the entire array substrate.
- the transparent electrode 61a of the peripheral signal guiding region of the array substrate is connected to the data line 5556a through the via hole penetrating through the first passivation layer 62, the second passivation layer 68 and the gate insulating layer 52, and passes through the first passivation layer 62.
- a via penetrating through the second passivation layer 68 is connected to the gate line 51a.
- the passivation layer can be prepared by using an inorganic insulating film such as silicon nitride or the like, or an organic insulating film such as a resin material.
- a phosphor is disposed, and the phosphor emits fluorescence when irradiated with X-rays, and the fluorescence can be photoelectrically emitted by the corresponding pixel unit in the array substrate.
- the diode photosensitive element is detected and recorded.
- the thin film transistor device has a top gate structure and the channel is located under the gate, the gate can effectively block the light that is irradiated to the channel, so that the channel leakage current is greatly reduced.
- the present embodiment further reduces the production cost while simplifying the production process.
- the array substrate of the X-ray detecting apparatus of the present embodiment can be formed by using eight mask production processes in total, and the main implementation process includes the following steps.
- Step 201 sequentially depositing a source/drain electrode metal layer 5556 and an ohmic layer (before etching) 690 on the base substrate; then, forming a pattern of the source 55, the drain 56, and the ohmic layer 69 by a first masking process. As shown in Figure 4-7.
- the source-drain electrode metal layer 5556 can be deposited by magnetron sputtering, and can be an aluminum-niobium alloy (AlNd), aluminum (A1), copper (Cu), molybdenum (Mo), molybdenum-tungsten alloy (MoW) or chromium (The single layer film of Cr) may also be a composite film composed of any combination of these metal materials.
- the ohmic layer 690 ⁇ is deposited by chemical vapor deposition and may be made of a doped semiconductor (n+a-Si). In the etching, the ohmic layer (before etching) 690 is dry etched, and then the source and drain electrode metal layer 5556 is wet etched.
- the metal layer it is usually deposited by physical vapor deposition (e.g., magnetron sputtering), and the pattern is formed by wet etching.
- the non-metal layer it is usually deposited by chemical vapor deposition, and patterned by dry etching.
- Each mask process includes, for example, substrate cleaning, photoresist coating, exposure and development, etching, photoresist stripping, and the like, which will not be described below.
- Step 202 forming a pattern of the active layer 53 and its channel by a second mask process on the substrate on which step 201 is completed, as shown in FIGS.
- the material of the active layer is, for example, amorphous silicon, which is formed by wet etching after deposition by a chemical weather deposition method.
- Step 203 sequentially depositing a gate insulating layer 52 and a gate metal layer on the substrate on which the step 202 is completed and forming a pattern of the gate electrode 51 and the light reflecting layer 57 by a third mask process, as shown in FIGS.
- the material of the gate insulating layer 52 is, for example, silicon nitride; the gate electrode 51 and the light reflecting layer 57 are formed of the same material and formed in the same masking process, and the material thereof may be a heavy metal or a heavy metal alloy such as copper-lead alloy.
- Step 204 sequentially deposit an N-type semiconductor layer (n+a-Si), an I-type semiconductor layer (a-Si), a P-type semiconductor layer (p+a-Si), and a transparent electrode layer on the substrate on which step 203 is completed.
- the mask process forms a pattern of a PIN type photodiode (P-type semiconductor 60, I-type semiconductor 59, N-type semiconductor 58) and a transparent electrode 61 as shown in FIGS. 12-13.
- the material of the transparent electrode layer may be indium tin oxide (ITO) or the like.
- Step 205 depositing a first passivation layer 62 on the substrate on which the step 204 is completed, and forming a first via 63 for connecting the bias electrode 64 and the transparent electrode 61 by a fifth mask process and for connecting the drain
- the pattern of the second via 65 and the third via 70 of the pole 56 and the light reflecting layer 57 is as shown in FIG.
- Step 206 depositing a bias electrode metal on the substrate on which step 205 is completed, forming a pattern of the bias electrode 64 by the sixth mask process, and having the same material as the bias electrode 64, connecting the drain electrode 56 and the light reflecting layer 57.
- the pattern of the connection electrode 71 is as shown in FIG.
- Step 207 deposit a second passivation layer 68 on the substrate on which the step 206 is completed, and signal the periphery of the panel through the seventh mask process; 1: the early contact region is formed to connect the transparent electrode 61 with the gate line 51a and the data line 5556a.
- the pattern of the signal guiding area vias is shown in Figure 16-17.
- Step 208 forming a pattern of the transparent electrode 61a of the signal guiding region (covering the signal guiding region via hole) through the eighth mask process on the substrate on which the step 207 is completed, to protect the metal at the via from corrosion, as shown in FIG. - Figure 19 is shown.
- the channel is located under the gate, and the gate can effectively block the light, and therefore, the photoelectric is performed.
- the gate can effectively protect the channel from being affected. Therefore, the present embodiment omits the mask process formation process of the channel barrier layer in the prior art, and the mask process can be used eight times in total, which simplifies the manufacturing process of the array substrate and improves the production performance.
- the gate of the fabricated top-gate thin film transistor device can effectively block light, the channel leakage current is greatly reduced, and there is no need to additionally provide a photomask, which further reduces the production cost while simplifying the production process.
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Measurement Of Radiation (AREA)
Description
X射线检测装置的阵列基板及其制造方法 技术领域 Array substrate of X-ray detecting device and manufacturing method thereof
本发明的实施例涉及一种 X射线检测装置的阵列基板及其制造方法。 背景技术 Embodiments of the present invention relate to an array substrate of an X-ray detecting apparatus and a method of fabricating the same. Background technique
薄膜晶体管技术的快速发展, 带动了有源矩阵 X射线检测技术的应用。 X射线检测主要是平面检测,近百年来 X射线摄像都是使用软片记录光影像。 早在 20世纪 70年代初期数字医学 X射线摄像的概念已经被提出。 随着数字 医学影像传输与影像储存传输系统的革命性发展,数字 X射线摄像技术的应 用得到很大的进步。 有别于电荷耦合元件( Charge Coupled device, CCD )与 互^卜金属 匕物半导体 ( Complementary Metal Oxide Semiconductors, CMOS ) 的数字 X射线摄像, 平面影像检测器提供大面积化检测与不占空间的优势, 有效缩短传统 X射线检测费时的流程。数字 X射线影像系统足足比传统计算 机造影系统节省 4倍的处理时间, 同时如果搭配高分辨率显示器面板, 则还 可以增进效率、 诊断精确性, 以及实现无底片的医疗环境。 有源矩阵平面检 测器可应用于非破坏性测试, 在不破坏被检测样品的情况下, 及时检测出待 测物的物理或机械性质, 可以轻易检测出如 50微米左右的裂痕, 孔洞,微缺 陷, 因此特别是在电子、 宇航和汽车工业上得到广泛的应用。 The rapid development of thin film transistor technology has led to the application of active matrix X-ray inspection technology. X-ray inspection is mainly for plane inspection. For nearly a century, X-ray imaging has used film to record optical images. The concept of digital medical X-ray imaging has been proposed as early as the early 1970s. With the revolutionary development of digital medical image transmission and image storage transmission systems, the application of digital X-ray imaging technology has made great progress. Unlike digital X-ray imaging with Charge Coupled Device (CCD) and Complementary Metal Oxide Semiconductor (CMOS), planar image detectors provide the advantage of large area detection and no space. , effectively shorten the time-consuming process of traditional X-ray inspection. The digital X-ray imaging system saves up to four times the processing time compared to traditional computer imaging systems, and with high-resolution display panels, it also improves efficiency, diagnostic accuracy, and a film-free medical environment. The active matrix planar detector can be applied to non-destructive testing, and the physical or mechanical properties of the object to be tested can be detected in time without damaging the sample to be tested. It is easy to detect cracks, holes and micros such as 50 microns. Defects are therefore widely used, especially in the electronics, aerospace and automotive industries.
如图 1和图 2所示,现有 X射线检测器的阵列基板的每个像素区通常包 括光电二极管传感器件 200和薄膜晶体管器件 300。 光电二极管传感器件的 主要作用是接收光, 并通过光伏效应把光信号转换成电信号, 而薄膜晶体管 器件的主要作用是作为控制开关和传递光伏效应产生的电信号。 As shown in Figs. 1 and 2, each pixel region of the array substrate of the conventional X-ray detector generally includes a photodiode sensor device 200 and a thin film transistor device 300. The main function of the photodiode sensor device is to receive light and convert the optical signal into an electrical signal through the photovoltaic effect, and the main function of the thin film transistor device is to control the switch and transmit the electrical signal generated by the photovoltaic effect.
现有 X射线检测器的工作原理为:当 X射线 101轰击在设置在阵列基板 之前的荧光粉 102上时, 荧光粉 102产生可见光线, 该可见光入射到阵列基 板的光电二极管传感器件 200上。 光电二极管传感器件 200通过光伏效应, 将光信号转换为电信号, 而电信号通过薄膜晶体管器件 300的开关控制输入 到 X射线检测器的控制电路。 The existing X-ray detector operates on the principle that when the X-ray 101 is bombarded on the phosphor 102 disposed before the array substrate, the phosphor 102 generates visible light which is incident on the photodiode sensor device 200 of the array substrate. The photodiode sensor device 200 converts the optical signal into an electrical signal by a photovoltaic effect, and the electrical signal is input to the control circuit of the X-ray detector through the switching control of the thin film transistor device 300.
现有技术釆用 9次掩模完成上述 X射线检测器的阵列基板的制备,其主 要工艺步骤如下。 In the prior art, the preparation of the array substrate of the above X-ray detector is completed by using 9 masks, and the main The process steps are as follows.
步骤 101 , 在衬底基板 10上通过第一次掩模工艺形成栅极 11; Step 101, forming a gate electrode 11 on the base substrate 10 by a first mask process;
步骤 102, 在完成步骤 101的基板上沉积栅极绝缘层 12, 并通过第二次 掩模工艺在阵列基板上形成有源层 13; Step 102, depositing a gate insulating layer 12 on the substrate on which the step 101 is completed, and forming an active layer 13 on the array substrate by a second mask process;
步骤 103, 在完成步骤 102的基板上通过第三次掩模工艺形成沟道阻挡 层 14; Step 103, forming a channel barrier layer 14 by a third mask process on the substrate on which step 102 is completed;
步骤 104,在完成步骤 103的基板上沉积欧姆接触层 29和源漏电极金属 层, 并通过第四次掩模工艺形成源极 15、 漏极 16和反光层 17; Step 104, depositing an ohmic contact layer 29 and a source/drain electrode metal layer on the substrate on which step 103 is completed, and forming a source electrode 15, a drain electrode 16 and a light reflecting layer 17 through a fourth mask process;
步骤 105, 在完成步骤 104的基板上通过第五次掩模工艺形成 N型半导 体 18、 I型半导体 19、 P型半导体 20 (即 PIN型光电二极管传感器件的一部 分)和透明电极 21 ; Step 105, forming a N-type semiconductor 18, an I-type semiconductor 19, a P-type semiconductor 20 (ie, a portion of the PIN-type photodiode sensor device) and a transparent electrode 21 through a fifth mask process on the substrate on which the step 104 is completed;
步骤 106, 在完成步骤 105的基板上沉积第一钝化层 22, 并通过第六次 掩模工艺形成第一钝化层 22上的第一过孔 23和第二过孔 25; Step 106, depositing a first passivation layer 22 on the substrate on which step 105 is completed, and forming a first via 23 and a second via 25 on the first passivation layer 22 through a sixth mask process;
步骤 107, 在完成步骤 106的基板上通过第七次掩模工艺形成光罩 27、 偏压电极 24和信号线 26的图形; Step 107, forming a pattern of the photomask 27, the bias electrode 24 and the signal line 26 through the seventh mask process on the substrate on which the step 106 is completed;
步骤 108, 在完成步骤 107的基板上沉积第二钝化层 28, 并通过第八次 掩模工艺形成信号引导区的钝化层过孔(图中未示出) ; Step 108, depositing a second passivation layer 28 on the substrate on which the step 107 is completed, and forming a passivation layer via hole of the signal guiding region by an eighth mask process (not shown);
步骤 109, 在完成步骤 108的基板上通过第九次掩模工艺形成信号引导 区的透明电极(图中未示出) 。 Step 109, forming a transparent electrode (not shown) of the signal guiding region through the ninth mask process on the substrate on which the step 108 is completed.
上述技术存在的缺陷在于, 为避免在形成光电二极管传感器件时影响到 已形成的薄膜晶体管器件有源层沟道的均匀性, 需要经一次掩模工艺 (步骤 103 )在有源层的上方形成一沟道阻挡层,这无疑增加了阵列基板的制造工艺 的复杂性, 使得产能较难提升。 另外, 为减少薄膜晶体管器件沟道漏电流的 影响,该技术还需要增加一金属光罩把 X射线轰击荧光粉产生的光遮挡起来, 这也使得制造成本无法进一步降低。 发明内容 The above technique has a drawback in that in order to avoid affecting the uniformity of the active layer channel of the formed thin film transistor device when forming the photodiode sensing device, it is necessary to form over the active layer by a single mask process (step 103). A channel barrier layer, which undoubtedly increases the complexity of the manufacturing process of the array substrate, makes the production capacity difficult to increase. In addition, in order to reduce the influence of channel leakage current of the thin film transistor device, the technology also needs to add a metal mask to block the light generated by the X-ray bombardment of the phosphor, which also makes the manufacturing cost cannot be further reduced. Summary of the invention
本发明的实施例提供了一种 X射线检测装置的阵列基板及其制造方法, 用以解决现有技术中存在的 X射线检测装置阵列基板尚需另外釆用一次掩模 工艺去形成沟道阻挡层, 使得制造工艺繁瑣、 成本较高, 产能较难提升的技 术问题。 An embodiment of the present invention provides an array substrate of an X-ray detecting device and a manufacturing method thereof, which are used to solve the problem that the X-ray detecting device array substrate existing in the prior art needs to use another mask process to form a channel block. Layer, which makes the manufacturing process cumbersome, costly, and difficult to upgrade Problems.
本发明的实施例 X射线检测装置的阵列基板包括: 薄膜晶体管器件和与 薄膜晶体管器件相连的光电二极管传感器件。 所述薄膜晶体管器件包括: 形 成于衬底基板之上的源极和漏极; 形成于源极和漏极之上的欧姆层; 形成于 欧姆层之上的有源层, 该有源层位于该源极和漏极之间的部分构成沟道; 形 成于有源层之上并覆盖整个基板的栅极绝缘层; 形成于栅极绝缘层之上, 并 位于有源层上方的栅极。 Embodiments of the Invention An array substrate of an X-ray detecting apparatus includes: a thin film transistor device and a photodiode sensor device connected to the thin film transistor device. The thin film transistor device includes: a source and a drain formed over a base substrate; an ohmic layer formed over the source and the drain; an active layer formed over the ohmic layer, the active layer being located The portion between the source and the drain constitutes a channel; a gate insulating layer formed over the active layer and covering the entire substrate; a gate formed over the gate insulating layer and above the active layer.
对于该阵列基板, 例如, 所述栅极材料优选为重金属或重金属合金。 对于该阵列基板, 例如, 所述光电二极管传感器件包括: 形成于栅极绝 缘层之上并与漏极连接的反光层; 形成于反光层之上的光电二极管; 形成于 光电二极管之上的透明电极;在透明电极的上方与透明电极连接的偏压电极。 For the array substrate, for example, the gate material is preferably a heavy metal or a heavy metal alloy. For the array substrate, for example, the photodiode sensor device includes: a light reflecting layer formed on the gate insulating layer and connected to the drain; a photodiode formed on the light reflecting layer; and a transparent formed on the photodiode An electrode; a bias electrode connected to the transparent electrode above the transparent electrode.
对于该阵列基板, 例如, 所述光电二极管为 PIN型光电二极管。 For the array substrate, for example, the photodiode is a PIN type photodiode.
在一个示例中, 本实施例的 X射线检测装置的阵列基板可进一步包括: 形成于栅极和透明电极之上并覆盖整个基板的第一钝化层; 形成在所述第一 钝化层之上的连接电极; 在所述第一钝化层上开设的连接偏压电极和透明电 极的第一过孔、 连接连接电极和漏极的第二过孔及连接连接电极和反光层的 第三过孔。 In an example, the array substrate of the X-ray detecting apparatus of this embodiment may further include: a first passivation layer formed on the gate electrode and the transparent electrode and covering the entire substrate; formed in the first passivation layer a connection electrode on the first passivation layer; a first via hole connecting the bias electrode and the transparent electrode; a second via hole connecting the connection electrode and the drain; and a connection connecting the electrode and the reflective layer Three vias.
本实施例的 X射线检测装置阵列基板的制造方法包括: 形成薄膜晶体管 器件和光电二极管传感器件的步骤。 形成薄膜晶体管器件包括: 在衬底基板 上通过掩模工艺形成源极、 漏极和欧姆层的图形; 在形成源极、 漏极和欧姆 层的图形的基板上通过掩模工艺形成有源层的图形; 在形成有源层的图形的 基板上形成栅极绝缘层; 在形成栅极绝缘层的基板上通过掩模工艺形成栅极 的图形。 The method of manufacturing the X-ray detecting device array substrate of the present embodiment includes the steps of forming a thin film transistor device and a photodiode sensor device. Forming a thin film transistor device includes: forming a pattern of a source, a drain, and an ohmic layer by a mask process on a substrate; forming an active layer by a mask process on a substrate forming a pattern of a source, a drain, and an ohmic layer a pattern; a gate insulating layer is formed on the substrate on which the pattern of the active layer is formed; and a pattern of the gate is formed by a mask process on the substrate on which the gate insulating layer is formed.
对于该制造方法, 例如, 形成光电二极管传感器件包括: 在形成栅极的 图形的同时通过同一次掩模工艺形成反光层的图形; 在形成反光层的图形的 基板上通过掩模工艺形成光电二极管和透明电极的图形。 For the manufacturing method, for example, forming the photodiode sensor device includes: forming a pattern of the light reflecting layer by the same mask process while forming a pattern of the gate electrode; forming a photodiode by a mask process on the substrate on which the pattern of the light reflecting layer is formed And a pattern of transparent electrodes.
对于该制造方法, 例如, 在形成光电二极管和透明电极的图形包括: 在 反光层上沉积 N型半导体层; 在 N型半导体层上沉积 I型半导体层; 在 I型 半导体层上沉积 P型半导体层; 在 P型半导体层上沉积透明电极层; 通过掩 模工艺形成光电二极管和透明电极的图形。 在一个示例中, 该制造方法在形成栅极的图形和光电二极管、 透明电极 的图形后包括步骤: 在整个基板上覆盖第一钝化层, 通过掩模工艺形成用于 连接偏压电极和透明电极的第一过孔和用于连接漏极和反光层的第二过孔和 第三过孔; 通过掩模工艺形成偏压电极的图形和连接漏极和反光层的连接电 极的图形。 For the manufacturing method, for example, a pattern for forming a photodiode and a transparent electrode includes: depositing an N-type semiconductor layer on the light-reflecting layer; depositing an I-type semiconductor layer on the N-type semiconductor layer; depositing a P-type semiconductor on the I-type semiconductor layer a layer; depositing a transparent electrode layer on the P-type semiconductor layer; forming a pattern of the photodiode and the transparent electrode by a mask process. In one example, the manufacturing method includes the steps of: forming a pattern of the gate and a pattern of the photodiode and the transparent electrode: covering the entire passivation layer on the entire substrate, forming a bias electrode for connecting by using a mask process a first via hole of the transparent electrode and a second via hole and a third via hole for connecting the drain and the light reflecting layer; a pattern of the bias electrode formed by the mask process and a pattern of the connection electrode connecting the drain and the light reflecting layer .
在本发明实施例的 X射线检测装置的阵列基板中, 由于薄膜晶体管器件 为顶栅型结构, 沟道位于栅极下方, 因此, 在进行光电二极管和透明电极的 刻蚀时, 栅极可使沟道受到有效保护而不受影响, 省去了现有技术中沟道阻 挡层的掩模工艺形成过程, 简化了阵列基板的制造工艺,提高了产能; 另夕卜, 由于顶栅型薄膜晶体管器件的栅极可有效遮挡照射到沟道的光线, 使得沟道 的漏电流大大减少, 从而无需再另外设置光罩, 这在简化生产工艺的同时, 进一步降低了生产成本。 附图说明 In the array substrate of the X-ray detecting apparatus of the embodiment of the invention, since the thin film transistor device has a top gate structure and the channel is located under the gate, when the photodiode and the transparent electrode are etched, the gate can be The channel is effectively protected from being affected, eliminating the masking process of the prior art channel barrier layer, simplifying the manufacturing process of the array substrate, and improving the productivity; in addition, the top gate type thin film transistor The gate of the device can effectively block the light that is irradiated to the channel, so that the leakage current of the channel is greatly reduced, so that no additional mask is needed, which simplifies the production process and further reduces the production cost. DRAWINGS
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。 In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly described below. It is obvious that the drawings in the following description relate only to some embodiments of the present invention, and are not intended to limit the present invention. .
图 1为现有技术 X射线检测装置阵列基板剖面结构示意图; 1 is a schematic cross-sectional structural view of an array substrate of a prior art X-ray detecting device;
图 2为现有技术 X射线检测装置检测原理结构示意图; 2 is a schematic structural view of a prior art X-ray detecting device detecting principle;
图 3为本发明 X射线检测装置阵列基板剖面结构示意图; 3 is a schematic cross-sectional structural view of an array substrate of an X-ray detecting device of the present invention;
图 4为本发明第一次掩模工艺曝光显影后俯视图; 4 is a top view of the first masking process of the present invention after exposure and development;
图 5为本发明第一次掩模工艺曝光显影后截面图; Figure 5 is a cross-sectional view showing the first masking process of the present invention after exposure and development;
图 6为本发明第一次掩模工艺刻蚀后俯视图; 6 is a top view of the first mask process after etching according to the present invention;
图 7为本发明第一次掩模工艺刻蚀后沿图 6中线 A-A的截面图; 图 8为本发明第二次掩模工艺刻蚀后俯视图; 7 is a cross-sectional view taken along line A-A of FIG. 6 after etching for the first mask process of the present invention; FIG. 8 is a plan view of the second mask process after etching according to the present invention;
图 9为本发明第二次掩模工艺刻蚀后沿图 8中线 A-A的截面图; 图 10为本发明第三次掩模工艺刻蚀后俯视图; 9 is a cross-sectional view taken along line A-A of FIG. 8 after etching of the second mask process of the present invention; FIG. 10 is a plan view of the third mask process after etching according to the present invention;
图 11为本发明第三次掩模工艺刻蚀后沿图 10中线 A-A的截面图; 图 12为本发明第四次掩模工艺刻蚀后俯视图; 11 is a cross-sectional view taken along line A-A of FIG. 10 after etching of the third mask process of the present invention; FIG. 12 is a plan view of the fourth mask process after etching according to the present invention;
图 13为本发明第四次掩模工艺刻蚀后沿图 12中线 B-B的截面图; 图 14为本发明第五次掩模工艺刻蚀后俯视图; Figure 13 is a cross-sectional view taken along line BB of Figure 12 after etching of the fourth mask process of the present invention; Figure 14 is a top plan view of the fifth mask process after etching according to the present invention;
图 15为本发明第六次掩模工艺刻蚀后俯视图; Figure 15 is a top plan view of the sixth mask process after etching according to the present invention;
图 16为本发明第七次掩模工艺(信号引导区连接数据线过孔)刻蚀后截 面图; 16 is a cross-sectional view showing the seventh mask process (signal guiding region connecting data line vias) after etching according to the present invention;
图 17为本发明第七次掩模工艺(信号引导区连接栅线过孔)刻蚀后截面 图; 17 is a cross-sectional view showing the seventh mask process (signal guiding region connecting gate line via) after etching according to the present invention;
图 18为本发明第八次掩模工艺 (信号引导区与数据线连接的透明电极) 刻蚀后截面图; 18 is a cross-sectional view showing an eighth mask process (a transparent electrode connected to a signal guiding region and a data line) after etching according to the present invention;
图 19为本发明第八次掩模工艺(信号引导区与栅线连接的透明电极)刻 蚀后截面图。 Figure 19 is a cross-sectional view showing the eighth masking process (transparent electrode in which the signal guiding region is connected to the gate line) of the present invention.
附图标记说明: Description of the reference signs:
10 衬底基板 11 栅极 12 栅极绝缘层 10 base substrate 11 gate 12 gate insulation
13 有源层 14 沟道阻挡层 15 源极 13 active layer 14 channel barrier 15 source
16 漏极 17 反光层 18 N型半导体 16 Drain 17 Reflective layer 18 N-type semiconductor
19 I型半导体 20 P型半导体 21 透明电极 19 I type semiconductor 20 P type semiconductor 21 transparent electrode
22 第一钝化层 23 第一过孔 24 偏压电极 22 first passivation layer 23 first via 24 bias electrode
25 第二过孔 26 信号线 27 光罩 25 second via 26 signal line 27 mask
28 第二钝化层 29 欧姆接触层 101 X光线 28 second passivation layer 29 ohmic contact layer 101 X-ray
102 荧光粉 200 光电二极管传感器件 300 薄膜晶体管器件 102 Phosphor 200 Photodiode Sensors 300 Thin Film Transistors
50 衬底基板 51 栅极 52 栅极绝缘层 50 base substrate 51 gate 52 gate insulation
53 有源层 69 欧姆层 55 源极 53 active layer 69 ohm layer 55 source
56 漏极 57 反光层 58 N型半导体 56 Drain 57 Reflective layer 58 N-type semiconductor
59 I型半导体 60 P型半导体 61 透明电极 59 I-type semiconductor 60 P-type semiconductor 61 transparent electrode
62 第一钝化层 63 第一过孔 64 偏压电极 62 first passivation layer 63 first via hole 64 bias electrode
65 第二过孔 70 第三过孔 71 连接电极 65 second via 70 third via 71 connecting electrode
68 第二钝化层 51a 栅线 5556a数据线 68 second passivation layer 51a gate line 5556a data line
信号引导区的透明电极 5556 源漏电极金属层 Transparent electrode of signal guiding area 5556 source/drain electrode metal layer
光刻胶 690 欧姆层(刻蚀前) 具体实施方式 为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图,对本发明实施例的技术方案进行清楚、 完整地描述。显然, 所描述的实施例是本发明的一部分实施例, 而不是全部的实施例。 基于所描 述的本发明的实施例, 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例, 都属于本发明保护的范围。 Photoresist 690 ohm layer (before etching) The technical solutions of the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings. It is apparent that the described embodiments are part of the embodiments of the invention, rather than all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the described embodiments of the present invention without departing from the scope of the invention are within the scope of the invention.
除非另作定义, 此处使用的技术术语或者科学术语应当为本发明所属领 域内具有一般技能的人士所理解的通常意义。 本发明专利申请说明书以及权 利要求书中使用的 "第一" 、 "第二" 以及类似的词语并不表示任何顺序、 数量或者重要性,而只是用来区分不同的组成部分。同样, "一个 "或者 "一" 等类似词语也不表示数量限制, 而是表示存在至少一个。 "包括" 或者 "包 含" 等类似的词语意指出现在 "包括" 或者 "包含" 前面的元件或者物件涵 盖出现在 "包括" 或者 "包含" 后面列举的元件或者物件及其等同, 并不排 除其他元件或者物件。 "连接" 或者 "相连" 等类似的词语并非限定于物理 的或者机械的连接, 而是可以包括电性的连接, 不管是直接的还是间接的。 "上" 、 "下" 、 "左" 、 "右" 等仅用于表示相对位置关系, 当被描述对 象的绝对位置改变后, 则该相对位置关系也可能相应地改变。 Unless otherwise defined, technical terms or scientific terms used herein shall be of the ordinary meaning understood by those of ordinary skill in the art to which the invention pertains. The words "first", "second" and similar terms used in the specification and claims of the present invention do not denote any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the words "a" or "an" do not denote a quantity limitation, but rather mean that there is at least one. The words "including" or "comprising", etc., are intended to mean that the elements or objects preceding "including" or "comprising" are intended to encompass the elements or Component or object. Words such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "Down", "Left", "Right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationship may also change accordingly.
为了解决现有技术中存在的 X射线检测装置阵列基板需另外釆用一次掩 模工艺去形成沟道阻挡层, 制造工艺繁瑣、 成本较高, 产能较难提升的技术 问题,本发明的实施例提供了一种 X射线检测装置的阵列基板及其制造方法。 In order to solve the technical problem that the X-ray detecting device array substrate existing in the prior art needs to use another mask process to form the channel barrier layer, the manufacturing process is cumbersome, the cost is high, and the productivity is difficult to be improved, the embodiment of the present invention An array substrate of an X-ray detecting device and a method of manufacturing the same are provided.
本发明实施例的阵列基板包括多条栅线和多条数据线, 这些栅线和数据 线彼此交叉由此限定了排列为矩阵的多个像素单元, 每个像素单元包括作为 开关元件的薄膜晶体管器件和与薄膜晶体管器件相连的光电二极管传感器 件。 例如, 每个像素的薄膜晶体管的栅极与相应的栅线电连接或一体形成, 源极与相应的数据线电连接或一体形成, 漏极与相应的光电二极管传感器件 连接。 下面的描述主要针对单个或多个像素单元进行, 但是其他像素单元可 以相同地形成。 The array substrate of the embodiment of the present invention includes a plurality of gate lines and a plurality of data lines, the gate lines and the data lines crossing each other thereby defining a plurality of pixel units arranged in a matrix, each of the pixel units including a thin film transistor as a switching element The device and the photodiode sensor device connected to the thin film transistor device. For example, the gate of the thin film transistor of each pixel is electrically connected or integrally formed with the corresponding gate line, the source is electrically connected or integrally formed with the corresponding data line, and the drain is connected to the corresponding photodiode sensor device. The following description is mainly made for a single or a plurality of pixel units, but other pixel units may be formed identically.
如图 3所示,本发明实施例的 X射线检测装置的阵列基板的每个像素单 元包括薄膜晶体管器件 300和与薄膜晶体管器件相连的光电二极管传感器件 200。所述薄膜晶体管器件 300包括:形成于衬底基板 50之上的源极 55和漏 极 56; 形成于源极 55和漏极 56之上的欧姆接触层 29; 形成于欧姆接触层 29之上的有源层 53;形成于有源层 53之上并覆盖整个基板的栅极绝缘层 52; 形成于栅极绝缘层 52之上, 并位于有源层 53上方的栅极 51。 衬底基板 50 可以为玻璃基板、塑料基板或其他基板。有源层 53在源极 55和漏极 56之间 的部分构成该薄膜晶体管的沟道。 As shown in FIG. 3, each pixel unit of the array substrate of the X-ray detecting apparatus of the embodiment of the present invention includes a thin film transistor device 300 and a photodiode sensor device 200 connected to the thin film transistor device. The thin film transistor device 300 includes: a source 55 and a drain 56 formed over the base substrate 50; an ohmic contact layer 29 formed over the source 55 and the drain 56; formed in the ohmic contact layer An active layer 53 over 29; a gate insulating layer 52 formed over the active layer 53 and covering the entire substrate; a gate 51 formed over the gate insulating layer 52 and above the active layer 53. The base substrate 50 may be a glass substrate, a plastic substrate, or another substrate. A portion of the active layer 53 between the source 55 and the drain 56 constitutes a channel of the thin film transistor.
栅极 51优选釆用 X射线较难穿透的重金属或重金属合金制备,例如铜、 铅或铜铅合金等。 The gate electrode 51 is preferably made of a heavy metal or a heavy metal alloy which is difficult to penetrate by X-rays, such as copper, lead or copper-lead alloy.
在图 3所示的实施例中, 光电二极管传感器件 200包括: 形成于栅极绝 缘层 52之上并与薄膜晶体管的漏极 56连接的反光层 57; 形成于反光层 57 之上的光电二极管; 形成于光电二极管之上的透明电极 61 ; 在透明电极 61 的上方与透明电极 61连接的偏压电极 64。 In the embodiment shown in FIG. 3, the photodiode sensor device 200 includes: a light reflecting layer 57 formed on the gate insulating layer 52 and connected to the drain electrode 56 of the thin film transistor; and a photodiode formed on the light reflecting layer 57. A transparent electrode 61 formed on the photodiode; a bias electrode 64 connected to the transparent electrode 61 above the transparent electrode 61.
形成于栅极绝缘层 52之上的反光层 57与栅极 51材质相同并与栅极 51 在同一次掩模构图工艺中形成。 光电二极管可以为 MIS型光电二极管或 PIN 型光电二极管等, 优选 PIN型光电二极管。 PIN型光电二极管 (P型半导体 60、 I型半导体 59、 N型半导体 58 )是在两种半导体之间的 PN结, 或者半 导体与金属之间的结的邻近区域, 在 P区与 N区之间生成 I型 (本征)层, 吸收光辐射而产生光电流的一种光检测器。 PIN型光电二极管具有结电容小、 渡越时间短、 灵敏度高等优点。 The light reflecting layer 57 formed on the gate insulating layer 52 is made of the same material as the gate electrode 51 and formed in the same mask patterning process as the gate electrode 51. The photodiode may be a MIS type photodiode or a PIN type photodiode, etc., preferably a PIN type photodiode. A PIN type photodiode (P-type semiconductor 60, I-type semiconductor 59, N-type semiconductor 58) is a PN junction between two semiconductors, or a region adjacent to a junction between a semiconductor and a metal, in the P region and the N region A type I photodetector that generates a type I (intrinsic) layer and absorbs light radiation to generate a photocurrent. PIN type photodiodes have the advantages of small junction capacitance, short transit time, and high sensitivity.
在图 3所示的实施例的阵列基板还包括第一钝化层 62和第二钝化层 68。 第一钝化层 62形成于栅极 51和透明电极 61之上并覆盖整个基板。在第一钝 化层 62中开设有连接偏压电极 64和透明电极 61的第一过孔 63、 连接连接 电极 71和漏极 56的第二过孔 65及连接连接电极 71和反光层 57的第三过孔 70。 即,形成在第一钝化层 62之上的连接电极 71通过第二过孔 65和第三过 孔 70将漏极 56和反光层 57相连。第二钝化层 68形成于第一钝化层 62之上 并覆盖整个阵列基板。 该阵列基板的周边信号引导区的透明电极 61a通过第 一钝化层 62、 第二钝化层 68和栅极绝缘层 52上贯通的过孔与数据线 5556a 连接, 通过第一钝化层 62和第二钝化层 68上贯通的过孔与栅线 51a连接。 该钝化层可以釆用无机绝缘膜制备, 例如氮化硅等, 或有机绝缘膜, 例如树 脂材料等。 The array substrate of the embodiment shown in Fig. 3 further includes a first passivation layer 62 and a second passivation layer 68. The first passivation layer 62 is formed over the gate electrode 51 and the transparent electrode 61 and covers the entire substrate. A first via 63 connecting the bias electrode 64 and the transparent electrode 61, a second via 65 connecting the connection electrode 71 and the drain 56, and a connection connection electrode 71 and a light reflecting layer 57 are opened in the first passivation layer 62. The third via 70. That is, the connection electrode 71 formed over the first passivation layer 62 connects the drain 56 and the light-reflecting layer 57 through the second via 65 and the third via 70. A second passivation layer 68 is formed over the first passivation layer 62 and covers the entire array substrate. The transparent electrode 61a of the peripheral signal guiding region of the array substrate is connected to the data line 5556a through the via hole penetrating through the first passivation layer 62, the second passivation layer 68 and the gate insulating layer 52, and passes through the first passivation layer 62. A via penetrating through the second passivation layer 68 is connected to the gate line 51a. The passivation layer can be prepared by using an inorganic insulating film such as silicon nitride or the like, or an organic insulating film such as a resin material.
在本实施例的 X射线检测装置的阵列基板上方例如设置荧光粉,该荧光 粉被 X射线照射时发射荧光,该荧光可以被阵列基板中相应像素单元的光电 二极管感光元件检测并记录。 Above the array substrate of the X-ray detecting device of the embodiment, for example, a phosphor is disposed, and the phosphor emits fluorescence when irradiated with X-rays, and the fluorescence can be photoelectrically emitted by the corresponding pixel unit in the array substrate. The diode photosensitive element is detected and recorded.
在本实施例的 X射线检测装置的阵列基板中, 由于薄膜晶体管器件为顶 栅型结构, 沟道位于栅极下方, 栅极可有效遮挡照射到沟道的光线, 使得沟 道漏电流大大减少, 从而无需再另外设置形成阻挡层的光掩模。 因此, 本实 施例在简化生产工艺的同时, 进一步降低了生产成本。 In the array substrate of the X-ray detecting device of the embodiment, since the thin film transistor device has a top gate structure and the channel is located under the gate, the gate can effectively block the light that is irradiated to the channel, so that the channel leakage current is greatly reduced. Thus, there is no need to additionally provide a photomask forming a barrier layer. Therefore, the present embodiment further reduces the production cost while simplifying the production process.
如图 4至图 19所示, 本实施例的 X射线检测装置的阵列基板可共釆用 八次掩模生产工艺形成, 其主要实施过程包括如下步骤。 As shown in FIG. 4 to FIG. 19, the array substrate of the X-ray detecting apparatus of the present embodiment can be formed by using eight mask production processes in total, and the main implementation process includes the following steps.
步骤 201 : 在衬底基板上依次沉积源漏电极金属层 5556和欧姆层 (刻蚀 前 ) 690; 然后, 通过第一次掩模工艺形成源极 55、 漏极 56和欧姆层 69的 图形。 如图 4-图 7所示。 Step 201: sequentially depositing a source/drain electrode metal layer 5556 and an ohmic layer (before etching) 690 on the base substrate; then, forming a pattern of the source 55, the drain 56, and the ohmic layer 69 by a first masking process. As shown in Figure 4-7.
源漏电极金属层 5556 可以釆用磁控溅射的方法沉积, 可以为铝钕合金 ( AlNd )、 铝(A1 )、 铜(Cu )、 钼(Mo )、 钼钨合金( MoW )或铬( Cr ) 的单层膜, 也可以为这些金属材料任意组合所构成的复合膜。 欧姆层 690釆 用化学气相沉积的方法沉积, 其材质可以为掺杂质半导体(n+a-Si ) 。 在刻 蚀时, 先对欧姆层(刻蚀前) 690 进行干法刻蚀, 然后再对源漏电极金属层 5556进行湿法刻蚀。 The source-drain electrode metal layer 5556 can be deposited by magnetron sputtering, and can be an aluminum-niobium alloy (AlNd), aluminum (A1), copper (Cu), molybdenum (Mo), molybdenum-tungsten alloy (MoW) or chromium ( The single layer film of Cr) may also be a composite film composed of any combination of these metal materials. The ohmic layer 690 沉积 is deposited by chemical vapor deposition and may be made of a doped semiconductor (n+a-Si). In the etching, the ohmic layer (before etching) 690 is dry etched, and then the source and drain electrode metal layer 5556 is wet etched.
对于金属层通常釆用物理气相沉积方式(例如磁控溅射法)沉积, 通过 湿法刻蚀形成图形; 而对于非金属层通常釆用化学气相沉积方式沉积, 通过 干法刻蚀形成图形。 每一次掩模工艺例如包括基板清洗、 光刻胶涂覆、 曝光 和显影、 刻蚀、 光刻胶剥离等, 以下不再赘述。 For the metal layer, it is usually deposited by physical vapor deposition (e.g., magnetron sputtering), and the pattern is formed by wet etching. For the non-metal layer, it is usually deposited by chemical vapor deposition, and patterned by dry etching. Each mask process includes, for example, substrate cleaning, photoresist coating, exposure and development, etching, photoresist stripping, and the like, which will not be described below.
步骤 202: 在完成步骤 201的基板上通过第二次掩模工艺形成有源层 53 及其沟道的图形, 如图 8-图 9所示。 该有源层的材质例如为非晶硅, 在釆用 化学气象沉积的方法沉积后通过湿法刻蚀形成。 Step 202: forming a pattern of the active layer 53 and its channel by a second mask process on the substrate on which step 201 is completed, as shown in FIGS. The material of the active layer is, for example, amorphous silicon, which is formed by wet etching after deposition by a chemical weather deposition method.
步骤 203:在完成步骤 202的基板上依次沉积栅极绝缘层 52和栅极金属 层并通过第三次掩模工艺形成栅极 51和反光层 57的图形, 如图 10-图 11所 示。栅极绝缘层 52的材料例如为氮化硅;栅极 51与反光层 57釆用同一材质 并在同一次掩模工艺中形成, 其材质可为重金属或重金属合金, 例如铜铅合 金。 Step 203: sequentially depositing a gate insulating layer 52 and a gate metal layer on the substrate on which the step 202 is completed and forming a pattern of the gate electrode 51 and the light reflecting layer 57 by a third mask process, as shown in FIGS. The material of the gate insulating layer 52 is, for example, silicon nitride; the gate electrode 51 and the light reflecting layer 57 are formed of the same material and formed in the same masking process, and the material thereof may be a heavy metal or a heavy metal alloy such as copper-lead alloy.
步骤 204: 在完成步骤 203的基板上依次沉积 N型半导体层(n+a-Si ) 、 I型半导体层(a-Si ) 、 P型半导体层(p+a-Si )和透明电极层并通过第四次 掩模工艺形成 PIN型光电二极管 (P型半导体 60、 I型半导体 59、 N型半导 体 58 )和透明电极 61的图形, 如图 12-图 13所示。 透明电极层的材质可以 为氧化铟锡(ITO )等。 Step 204: sequentially deposit an N-type semiconductor layer (n+a-Si), an I-type semiconductor layer (a-Si), a P-type semiconductor layer (p+a-Si), and a transparent electrode layer on the substrate on which step 203 is completed. Through the fourth time The mask process forms a pattern of a PIN type photodiode (P-type semiconductor 60, I-type semiconductor 59, N-type semiconductor 58) and a transparent electrode 61 as shown in FIGS. 12-13. The material of the transparent electrode layer may be indium tin oxide (ITO) or the like.
步骤 205: 在完成步骤 204的基板上沉积第一钝化层 62, 并通过第五次 掩模工艺形成用于连接偏压电极 64和透明电极 61的第一过孔 63和用于连接 漏极 56和反光层 57的第二过孔 65和第三过孔 70的图形, 如图 14所示。 Step 205: depositing a first passivation layer 62 on the substrate on which the step 204 is completed, and forming a first via 63 for connecting the bias electrode 64 and the transparent electrode 61 by a fifth mask process and for connecting the drain The pattern of the second via 65 and the third via 70 of the pole 56 and the light reflecting layer 57 is as shown in FIG.
步骤 206: 在完成步骤 205的基板上沉积偏压电极金属, 通过第六次掩 模工艺形成偏压电极 64的图形及与偏压电极 64材质相同、连接漏极 56和反 光层 57的连接电极 71的图形, 如图 15所示。 Step 206: depositing a bias electrode metal on the substrate on which step 205 is completed, forming a pattern of the bias electrode 64 by the sixth mask process, and having the same material as the bias electrode 64, connecting the drain electrode 56 and the light reflecting layer 57. The pattern of the connection electrode 71 is as shown in FIG.
步骤 207: 在完成步骤 206的基板上沉积第二钝化层 68, 通过第七次掩 模工艺在面板周边信号; 1:早接区域形成用于连接透明电极 61与栅线 51a、数据 线 5556a的信号引导区过孔的图形, 如图 16-图 17所示。 Step 207: deposit a second passivation layer 68 on the substrate on which the step 206 is completed, and signal the periphery of the panel through the seventh mask process; 1: the early contact region is formed to connect the transparent electrode 61 with the gate line 51a and the data line 5556a. The pattern of the signal guiding area vias is shown in Figure 16-17.
步骤 208: 在完成步骤 207的基板上通过第八次掩模工艺形成信号引导 区的透明电极 61a的图形 (覆盖信号引导区过孔) , 以保护过孔处的金属不 受腐蚀, 如图 18-图 19所示。 Step 208: forming a pattern of the transparent electrode 61a of the signal guiding region (covering the signal guiding region via hole) through the eighth mask process on the substrate on which the step 207 is completed, to protect the metal at the via from corrosion, as shown in FIG. - Figure 19 is shown.
从本实施例的 X射线检测装置的阵列基板的生产工艺过程可以看出, 由 于薄膜晶体管器件釆用顶栅型结构, 沟道位于栅极下方, 栅极可有效遮挡光 线, 因此, 在进行光电二极管和透明电极的刻蚀时, 栅极可使沟道受到有效 保护而不受影响。 因此, 本实施例省去了现有技术中沟道阻挡层的掩模工艺 形成过程, 可共釆用八次掩模工艺, 简化了阵列基板的制造流程, 提高了产 能。 另外, 由于制造的顶栅型薄膜晶体管器件的栅极可有效遮挡光线, 使得 沟道漏电流大大减少, 而且无需再另外设置光罩, 在简化生产工艺的同时, 进一步降低了生产成本。 It can be seen from the production process of the array substrate of the X-ray detecting device of the embodiment that since the thin film transistor device uses a top gate structure, the channel is located under the gate, and the gate can effectively block the light, and therefore, the photoelectric is performed. When the diode and the transparent electrode are etched, the gate can effectively protect the channel from being affected. Therefore, the present embodiment omits the mask process formation process of the channel barrier layer in the prior art, and the mask process can be used eight times in total, which simplifies the manufacturing process of the array substrate and improves the production performance. In addition, since the gate of the fabricated top-gate thin film transistor device can effectively block light, the channel leakage current is greatly reduced, and there is no need to additionally provide a photomask, which further reduces the production cost while simplifying the production process.
显然, 上面的描述仅为描述目的而非对于本发明的保护范围的限制, 本 发明的保护范围应由所附的权利要求来限定。 It is apparent that the above description is only for the purpose of description and not for the scope of the invention, and the scope of the invention is defined by the appended claims.
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210084693.8 | 2012-03-27 | ||
| CN2012100846938A CN102629610A (en) | 2012-03-27 | 2012-03-27 | Array substrate of X-ray detection device and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2013143295A1 true WO2013143295A1 (en) | 2013-10-03 |
Family
ID=46587833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2012/084607 Ceased WO2013143295A1 (en) | 2012-03-27 | 2012-11-14 | Array substrate of x-ray detection device and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102629610A (en) |
| WO (1) | WO2013143295A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170236857A1 (en) * | 2015-06-30 | 2017-08-17 | Boe Technology Group Co., Ltd. | Photoelectric conversion array substrate, its manufacturing method, and photoelectric conversion device |
| TWI912010B (en) | 2024-11-14 | 2026-01-11 | 達擎股份有限公司 | X-ray sensor and forming method thereof |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102629610A (en) * | 2012-03-27 | 2012-08-08 | 北京京东方光电科技有限公司 | Array substrate of X-ray detection device and manufacturing method thereof |
| CN102832222B (en) | 2012-07-26 | 2014-12-10 | 北京京东方光电科技有限公司 | Sensor and manufacture method thereof |
| CN102800750B (en) * | 2012-07-26 | 2015-07-01 | 北京京东方光电科技有限公司 | Manufacturing method of sensor |
| CN102856441B (en) * | 2012-09-14 | 2015-03-11 | 京东方科技集团股份有限公司 | Manufacture methods of X-ray detector back panel and PIN photodiode |
| KR102012854B1 (en) * | 2012-11-12 | 2019-10-22 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display and method for fabricating the same |
| CN103137641B (en) * | 2013-01-25 | 2015-10-21 | 北京京东方光电科技有限公司 | A kind of array base palte and preparation method thereof, X-ray flat panel detector |
| CN104124277B (en) | 2013-04-24 | 2018-02-09 | 北京京东方光电科技有限公司 | A kind of thin film transistor (TFT) and preparation method thereof and array base palte |
| CN105097860B (en) * | 2015-06-18 | 2018-06-29 | 京东方科技集团股份有限公司 | Detect substrate and its manufacturing method, detector |
| CN106816410B (en) * | 2017-03-22 | 2019-05-31 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and manufacturing method thereof |
| TWI613804B (en) | 2017-09-04 | 2018-02-01 | 友達光電股份有限公司 | Light sensing device |
| CN109671729B (en) * | 2017-10-17 | 2021-04-09 | 京东方科技集团股份有限公司 | Detection unit and method of making the same, flat panel detector |
| CN108318907B (en) | 2018-02-01 | 2019-10-01 | 北京京东方光电科技有限公司 | X-ray detection panel and its manufacturing method and X-ray detection device |
| CN108428747B (en) * | 2018-03-22 | 2020-06-02 | 京东方科技集团股份有限公司 | A detection substrate, preparation method thereof, and X-ray detector |
| TWI689090B (en) | 2018-05-29 | 2020-03-21 | 友達光電股份有限公司 | Photo sensor and manufacturing method thereof |
| CN109411335B (en) * | 2018-08-13 | 2021-01-19 | 上海奕瑞光电子科技股份有限公司 | Pixel structure and manufacturing method thereof |
| CN109417080A (en) * | 2018-09-26 | 2019-03-01 | 深圳市汇顶科技股份有限公司 | Optical image acquisition unit, optical image acquisition device and electronic equipment |
| KR102760852B1 (en) * | 2019-12-13 | 2025-01-24 | 엘지디스플레이 주식회사 | Thin film transistor array substrate for digital x-ray detector and the digital x-ray detector including the same and manufacturing method thereof |
| CN113795920B (en) * | 2020-02-28 | 2024-03-19 | 京东方科技集团股份有限公司 | Detection substrate, manufacturing method thereof and flat panel detector |
| CN114447002A (en) * | 2020-11-05 | 2022-05-06 | 睿生光电股份有限公司 | Optical detection device |
| CN114566510B (en) * | 2020-11-27 | 2024-07-30 | 京东方科技集团股份有限公司 | Detection panel and preparation method thereof and flat panel detector |
| CN115472635B (en) * | 2021-06-11 | 2025-04-22 | 和鑫光电股份有限公司 | Light sensing device with biased gate electrode and light sensing panel using the same |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030189175A1 (en) * | 2002-04-03 | 2003-10-09 | Lee Ji Ung | Imaging array and methods for fabricating same |
| CN1748315A (en) * | 2003-02-14 | 2006-03-15 | 佳能株式会社 | Radiation imaging equipment |
| US20080079005A1 (en) * | 2006-09-29 | 2008-04-03 | Tpo Displays Corp. | System for displaying images and method for fabricating the same |
| CN202305447U (en) * | 2011-09-27 | 2012-07-04 | 北京京东方光电科技有限公司 | Digital X-ray image inspection device |
| CN102629610A (en) * | 2012-03-27 | 2012-08-08 | 北京京东方光电科技有限公司 | Array substrate of X-ray detection device and manufacturing method thereof |
-
2012
- 2012-03-27 CN CN2012100846938A patent/CN102629610A/en active Pending
- 2012-11-14 WO PCT/CN2012/084607 patent/WO2013143295A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030189175A1 (en) * | 2002-04-03 | 2003-10-09 | Lee Ji Ung | Imaging array and methods for fabricating same |
| CN1748315A (en) * | 2003-02-14 | 2006-03-15 | 佳能株式会社 | Radiation imaging equipment |
| US20080079005A1 (en) * | 2006-09-29 | 2008-04-03 | Tpo Displays Corp. | System for displaying images and method for fabricating the same |
| CN202305447U (en) * | 2011-09-27 | 2012-07-04 | 北京京东方光电科技有限公司 | Digital X-ray image inspection device |
| CN102629610A (en) * | 2012-03-27 | 2012-08-08 | 北京京东方光电科技有限公司 | Array substrate of X-ray detection device and manufacturing method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170236857A1 (en) * | 2015-06-30 | 2017-08-17 | Boe Technology Group Co., Ltd. | Photoelectric conversion array substrate, its manufacturing method, and photoelectric conversion device |
| TWI912010B (en) | 2024-11-14 | 2026-01-11 | 達擎股份有限公司 | X-ray sensor and forming method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102629610A (en) | 2012-08-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2013143295A1 (en) | Array substrate of x-ray detection device and manufacturing method thereof | |
| CN102664184B (en) | Array substrate of X ray detection device and manufacturing method thereof | |
| TWI515881B (en) | Radiation image detecting device | |
| CN102790067B (en) | Sensor and manufacturing method thereof | |
| US9735183B2 (en) | TFT flat sensor and manufacturing method therefor | |
| CN102141630B (en) | Radiation detector | |
| US9786711B2 (en) | Array substrate of X-ray sensor and method for manufacturing the same | |
| CN110286796A (en) | Electronic substrate, manufacturing method thereof, and display panel | |
| US20130264485A1 (en) | Method of manufacturing radiation detection apparatus, radiation detection apparatus, and radiation imaging system | |
| US20130048861A1 (en) | Radiation detector, radiation detector fabrication method, and radiographic image capture device | |
| US11209557B2 (en) | Array substrate for digital X-ray detector, digital X-ray detector including the same, and method for manufacturing the same | |
| CN102790069B (en) | Sensor and manufacturing method thereof | |
| US9318629B2 (en) | Method for fabricating sensor using multiple patterning processes | |
| US11133345B2 (en) | Active matrix substrate, X-ray imaging panel with the same, and method of manufacturing the same | |
| US8962371B2 (en) | Method for fabricating sensor | |
| CN102790064B (en) | Sensor and manufacturing method thereof | |
| US9024320B2 (en) | Sensor and method for manufacturing the same | |
| CN109308470B (en) | Fingerprint sensing device and manufacturing method thereof | |
| CN111863912A (en) | OLED display panel with fingerprint recognition function, display device and preparation method | |
| JP6053929B2 (en) | Sensor manufacturing method | |
| JP6053928B2 (en) | Sensor manufacturing method | |
| CN102832222B (en) | Sensor and manufacture method thereof | |
| KR101307421B1 (en) | Image sensor for e-beam and method of manufacturing the same | |
| CN117790580A (en) | A detection substrate, its manufacturing method and flat panel detector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 12872808 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 12872808 Country of ref document: EP Kind code of ref document: A1 |