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WO2012171320A1 - A new contact smart card packaging method - Google Patents

A new contact smart card packaging method Download PDF

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Publication number
WO2012171320A1
WO2012171320A1 PCT/CN2012/000113 CN2012000113W WO2012171320A1 WO 2012171320 A1 WO2012171320 A1 WO 2012171320A1 CN 2012000113 W CN2012000113 W CN 2012000113W WO 2012171320 A1 WO2012171320 A1 WO 2012171320A1
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WO
WIPO (PCT)
Prior art keywords
smart card
contact smart
carrier
carrier tape
card chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2012/000113
Other languages
French (fr)
Chinese (zh)
Inventor
王海泉
姜凤明
顾万水
王李琰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of WO2012171320A1 publication Critical patent/WO2012171320A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743External electrical contacts

Definitions

  • the invention relates to the field of contact smart card production, wherein the contact smart card comprises a contact part of a dual interface smart card, and the dual interface smart card means that the smart card has both a contact interface and a non-contact interface, specifically a new one.
  • the packaging method of the contact smart card In particular, a new production process and method used in the process of packaging contact smart card chip wafers in a smart card circuit board, which is generally referred to in the industry as a carrier tape or carrier. Background technique
  • the contact smart card chip wafer (die) will package the contact smart card chip wafer (die) onto the carrier tape or carrier before packaging into a finished contact smart card, and then tape A carrier tape or carrier with contact smart card chip wafers, the back of the carrier tape or carrier is embedded into the card of the contact smart card that has been washed with the corresponding size by hot melt adhesive or other adhesive.
  • the front side (contact surface) of the carrier tape or carrier is a large gold-plated metal surface for contact smart cards to communicate with the outside, and the back side of the carrier tape or carrier is connected to the contact smart card chip wafer (die).
  • the circuit, the contact smart card chip wafer die (die) mounting area and the surrounding vacant area, the vacant area can be used to apply hot melt adhesive or other adhesive and embedded in the card base of the smart card.
  • the process of packaging a contact smart card chip wafer (die) onto a carrier tape or carrier is generally referred to as a tape carrier package.
  • An important requirement of the tape carrier package is that the packaged chip is in a wafer grain state. This is not a concept with the usual chip packaging in the electronics industry. Generally speaking, the chip package refers to the chip package.
  • One method is to use a wire bonding process to first thin the contact smart card chip wafer and then Contact smart card chip wafer dicing to obtain a number of contact smart card chip wafers, followed by die bonding or mounting, the so-called die bond is the use of a binder Or the solder bonds the back side of the contact smart card chip wafer die to the die bond, and then uses the wire bonding process, usually using a wire bond, and finally using Thermal curing or UV irradiation curing (UV) protects the contact smart card chip wafers and bonding wires.
  • the process is as follows:
  • thermosetting is the curing of the protective adhesive by heating, and UV is cured by UV irradiation.
  • FC0S a smart card chip packaging method patented by Infineon, Flip Chip on Substrate, on-board flip chip
  • FC0S flip chip technology
  • Flip-chip technology is not a new process. It refers to the process of connecting semiconductor chip particles directly to the carrier tape. This process begins with a useful solder joint (PAD) gold ball or other conductive bump for each contact smart card chip wafer on a contact smart card chip wafer, and then contacts The smart card chip wafer is flipped so that its solder joint (PAD) faces the carrier tape.
  • the solder joint (PAD) on the tape carrier circuit has a one-to-one correspondence with the solder joint (PAD) position of the contact smart card chip die of the long bump, between the two (ie, the contact smart card chip wafer particle)
  • the solder joint (PAD) between the (die) and the carrier tape can be mechanically bonded together by an anisotropic conductive adhesive.
  • FC0S packaging process After a long period of research and development, Infineon successfully cooperated with German smart card manufacturer Giesecke & Devrient (G&D) to launch the innovative FC0S packaging process, which is the first time to apply flip chip technology to smart card packaging.
  • the FC0S technology encapsulates the contact smart card chip wafers (die) in a smart card module (a circuit board with a smart card chip) in a flip-chip package.
  • the functional lining of the contact smart card chip wafer (die) is directly connected to the board by flip chip bonding, eliminating the need for traditional gold wire and protective glue (UV glue) packaging, saving the cost of packaging both.
  • FCXS contact smart card has stronger mechanical stability and optical visual effects, smaller and thinner module size, stronger corrosion resistance and toughness, it uses Non-halogen materials, in line with green environmental requirements.
  • FC0S The disadvantage of FC0S is that the equipment investment of the flip-chip bonding process is too high, and there are special requirements for the plating metal of the carrier tape. It is necessary to ensure that the plating metal of the circuit on the back side of the carrier tape must be soldered to the solder material on the bumps of the wafer, if the carrier tape Gold plating, its thickness must be limited to 1 2Um to limit the formation of fragile gold-tin compounds, so its overall production cost is high. Summary of the invention
  • the present invention aims to provide a new method for packaging a contact smart card, which aims to solve the problem of thin and small size of the package while meeting the requirements of low cost and high reliability.
  • a new contact smart card packaging method is characterized in that the specific steps are as follows: Step (1) processing a contact smart card chip wafer particle to be processed to obtain a processed contact smart card chip wafer particle: the required package
  • the contact smart card chip wafer particle 101 is provided with a plurality of original solder joints 102, and the contact smart card chip wafer particles 101 to be packaged are processed by a CSP or WLCSP process, and the original solder joint 102 is disposed correspondingly.
  • a new solder joint 202 is added, and then the original solder joint 102 and the new solder joint 202 are connected in a corresponding manner by the internal connecting line 203, in order to increase the area of the original solder joint 102 and increase the spacing between the original solder joints 102.
  • the gap between the solder joints 202 is at least 0.2 mm, and the diameter of the new solder joints 202 is at least 0.11.
  • the chip solder joint starting point identifier 204 is set on the contact smart card chip wafer particles 101 to be packaged. , obtaining processed contact smart card chip wafer particles 205;
  • Step (2) Designing and processing the carrier tape or carrier to be matched with it: According to the chip size and corresponding solder joint data of the processed contact smart card chip wafer particles 205 obtained by CSP or WLCSP processing, the corresponding load is designed and produced.
  • the tape or carrier is such that the conductive connection points of the carrier tape or carrier are identical in size and structure to the newly added solder joints 202 on the processed contact smart card chip wafer particles 205;
  • Step (3) attaching the processed contact smart card chip wafer particles to the carrier tape or carrier adapted thereto: the processed contact smart card chip obtained by the step (1) by using a conventional SMT chip process
  • the particles 205 are attached to the respective positions of the carrier tape or the carrier sheet obtained in the step (2).
  • the contact smart card chip wafer particles 101 that need to be packaged are obtained by dicing the wafer Wafer of the smart card chip.
  • the thickness of the wafer 205 of the contact-type smart card chip is not higher than 0. 60 mm.
  • the specific processing method of the carrier tape or the carrier is as follows: (1) a double-sided copper-clad PCB substrate having a thickness of less than or equal to 0.35 mm is used.
  • the well-known PCB production process after etching, punching, and sinking copper to form a circuit board circuit and a contact surface, and then performing gold plating or immersion gold to form a carrier tape or carrier with a conductive connection point suitable for a contact smart card package.
  • the position and size of the conductive connection points on the carrier tape or carrier are adapted to the size of the processed contact smart card chip wafer particles 205 and the new solder joints 202 generated in step (1).
  • solder resist is covered around the conductive connection points on the carrier tape or the carrier, on the line, and at the via points, wherein the solder resist oil is filled with the via holes on the carrier tape or the carrier.
  • the carrier tape or the carrier sheet obtained in the step (2) is provided with a conductive connection point 401 corresponding to the position of the newly added solder joint 202 on the back surface thereof.
  • a plurality of front surface (contact surface) metal faces 502 are formed on the front surface (contact surface) through a plurality of dividing lines 503,
  • the front surface is provided with an internal connection line connection point 501, and the conductive connection point 401 and the internal connection line connection point 501 are connected by a carrier tape or a carrier internal connection line 403.
  • the method for packaging the new contact smart card according to the present invention has the advantages that: the existing wire bonding process or the FC0S process has high requirements on the carrier tape or the carrier film, and no company in the country can do well, basically by France. FCI monopolizes, so the cost is also high.
  • the invention adopts different generation methods, adopts the mature SMT patch process in the mounting process, the processing reliability is greatly improved, and the production control requirements of the carrier tape or the carrier sheet are more relaxed, and the carrier tape or the carrier tape is more relaxed.
  • the form is more flexible (can be sheet-like), so the production cost is greatly reduced and the reliability is greatly improved.
  • Figure 1 Contact particle array structure of smart card chip.
  • Figure 2 Wafer structure diagram of the processed contact smart card chip.
  • Figure 3 is a plan view of the surface of the processed smart card chip wafer.
  • Figure 4 Schematic diagram of the circuit structure of the carrier tape or the back of the carrier.
  • Figure 5 Schematic diagram of the circuit structure of the front side (contact surface) of the carrier tape or carrier.
  • Figure 6 Schematic diagram of the solder resist oil coverage of the carrier tape or carrier.
  • Figure 7 shows the second example of the solder resist oil coverage of the carrier tape or carrier.
  • Figure 8 Carrier or carrier via fill map.
  • the new contact smart card packaging method of the present invention can be applied to a carrier tape or a carrier, and can also be used for ordinary circuit board materials (and bulk materials).
  • the method for packaging a new contact smart card according to the present invention includes at least three important steps, namely:
  • the contact smart card chip wafer particles that need to be packaged are processed into contacted smart card chip wafer particles (using CSP or WLCSP process), and the design process is adapted to (refer to the processed contact smart card chip wafer particles)
  • the carrier tape or carrier that can be used for the patch, and the processed contact smart card chip wafer particles are attached to the carrier tape or carrier to which it is adapted (using the SMT chip process).
  • the CSP Chip Scale Package
  • the WLCSP Wafer Level Chip Scale Package
  • WL wafer level
  • CSP the SMT (Surface Mounted Technology) is used for paste Sheet surface assembly technology (surface mount technology).
  • the ISSI 55160 smart card chip of ISSI is taken as an example to describe the packaging method of the new contact smart card according to the present invention.
  • the ISSI55160 smart card chip shown in Figure 1 is a contact smart card chip wafer particle 101 that needs to be packaged.
  • the contact smart card chip wafer particle 101 to be packaged is obtained by dicing the wafer wafer Wafer of the smart card chip.
  • the packaged contact smart card chip wafer particles 101 are provided with a plurality of original solder joints 102.
  • Encapsulating the ISSI 55160 smart card chip by using the packaging method of the present invention includes the following steps: Step (1), processing the contact smart card chip wafer particles that need to be packaged to obtain the processed contact smart card chip wafer particles:
  • the contact smart card chip wafer particles 101 to be packaged are processed, a new solder joint 202 corresponding to the original solder joint 102 is set, and then the original solder joint 102 is used to connect the original solder joint 102, new 2mm ⁇
  • the distance between the new solder joints 202 is at least 0. 2mm, the distance between the new solder joints 202 is at least 0.
  • the solder joint 202 has a diameter of at least 0.1 ⁇ , and at the same time, a chip solder joint starting point identifier 204 is set on the contact smart card chip wafer particle 101 to be packaged, and the processed contact smart card chip wafer granule is obtained ( Contact smart card chip wafers 205 processed by CSP or WLCSP process; as shown in FIG. 2, the number of new solder joints 202 may be more than the original solder joints 102, and the additional new solder joints 202 are not needed.
  • the internal connection line 203 is connected;
  • the thickness of the wafer 205 of the contact smart card chip after the processing is not higher than (not exceeding) 0. 60mm; Step (2) Designing and processing the carrier tape or carrier to be matched with it: The chip size of the processed contact smart card chip wafer particle 205 obtained by CSP or WLCSP processing, corresponding solder joint (refer to the new solder joint 202) Data, quantity, spacing, etc.) to design and produce the corresponding carrier tape or carrier such that the conductive connection points of the carrier tape or carrier and the new solder joints 202 on the processed contact smart card chip wafer particles 205 are The size and structure are consistent.
  • the specific processing method of the carrier tape or the carrier is as follows:
  • the position and size of the conductive connection points on the carrier tape or carrier are adapted to the size of the processed contact smart card chip wafer particles 205 and the new solder joints 202 generated in step (1).
  • the solder resist oil is covered around the conductive connection points on the carrier tape or the carrier, on the line, and at the via points, wherein the solder resist oil is filled with the via holes on the carrier tape or the carrier.
  • Step (3) attaching the processed contact smart card chip wafer particles to the carrier tape or carrier adapted thereto: the processed contact smart card chip obtained by the step (1) by using a conventional SMT chip process
  • the particles 205 are attached to the respective positions of the carrier tape or the carrier sheet obtained in the step (2). As shown in FIG. 4 and FIG.
  • the carrier tape or the carrier sheet obtained in the step (2) is provided with a conductive connection point 401 corresponding to the position of the newly added solder joint 202 on the back surface thereof, and the conductive connection point 401 and the newly added solder joint.
  • 202 is the corresponding solder joint relationship, the size, position and size of the two must be exactly the same to ensure that the new solder joint 202 can be soldered to the position of the conductive connection point 401 using the SMT chip process, and the processed contact smart card
  • the size of the chip wafer 205 may not exceed 0. 60mm.
  • the front surface is provided with an internal connection line connection point 501, and the conductive connection point 401 and the internal connection line connection point 501 are connected by a carrier tape or a carrier internal connection line 403.
  • the carrier tape or carrier internal connection line 403 is disposed on the back side of the carrier tape or carrier.
  • the WLCSP package is taken as an example, and the present invention is further described in detail.
  • CSP Chip Size Packaging
  • WLCSP Wafer Level Chip Sized Packaging
  • the advantages of CSP combining and flip chip technology and surface mount technology are that it has a package size close to the chip size and a thin package body.
  • flexible substrate CSP hard substrate CSP
  • lead frame CSP wafer level CSP
  • laminated CSP For wafer level CSP package, it is generally called WLCSP, which is different from traditional chip packaging.
  • the chip size can be ultra-thin and ultra-small, which is impossible with conventional chip molding technology.
  • the minimum thickness can be less than 0.25 mm, which is much lower than the current minimum thickness of 0.5 mm, and can effectively achieve economies of scale to reduce costs.
  • the chip package using this technology has low cost and high yield. Reduce the characteristics of board occupancy. It has become increasingly popular on the packaging of non-smart card industry chips. But no one in the smart card industry has used it, because the traditional tape carrier packaging line does not support this production process.
  • the present invention utilizes this technology to implement a new method for packaging a contact smart card, including the following steps: First, the contact smart card chip wafer (Wafer) is processed into a thickness of not more than 0.40 mm by the WLCSP process. Chip for patch (SMT). In this embodiment, the WLCSP processing of Changjiang Electronics Technology Co., Ltd. is selected, and the size of the single contact smart card chip wafer (wafer) on the contact smart card chip wafer (wafer) is 2013xl692um, and the single piece after processing is completed.
  • the size of the chip is 2013xl692um
  • the specific process can be as follows: (1) The packaging process of the wafer-level CSP for making the contactor on the wafer: the wafer-secondary wiring, the thinning, the contactor, the contactor, the plating, the test, the screening, the dicing, the laser marking ⁇ SMT patch one test
  • a carrier tape or a carrier which can be directly soldered (PAD) according to this process is designed, as shown in Figs. 1 to 5, so that the new solder joint 202 and the conductive connection point 401 are matched in size and structure.
  • the WLCSP packaged chip is then soldered to the carrier tape or carrier using an automated solder placement machine that meets the requirements.
  • the PCB of the traditional patch is generally covered with solder resist oil except for the patch solder joint.
  • the steel mesh is first scraped on the solder joint of the PCB board, and then the paste is pasted.
  • the chip machine attaches the chip or other device to the corresponding position on the PCB board, and then heats the PCB board to which the chip or device is pasted by the heating furnace to melt the solder paste and connect it to the corresponding pin of the chip or device, and finally removes the heating furnace.
  • the tin is naturally cured at room temperature to complete the patch.
  • the thickness of the PCB board of the patch used in the present invention is thinner than that of the general PCB board, generally between 0.08 mm and 0.25 mm, and the area of the PCB board is large, if the conventional method is used, that is, the patch is removed.
  • the soldering oil is covered in other places outside the solder joint.
  • the invention solves the problem that the soldering oil and the other components of the PCB board have different thermal expansion and contraction coefficients by using a method of covering the soldering oil in a small area around the solder joint of the PCB board to cause the PCB board to be heated and then returned to the normal temperature to bend, Uneven problems.
  • the range of solder mask oil is based on the surrounding of all the solder joints:
  • Method 1 The area covered by these solder resist oils can be monolithic. As shown in Fig. 6, all the areas of the full protection area 604 are implemented according to the traditional circuit board solder resist oil process, and the solder resist oil is butt welded. Points, lines, and via points are all protected, where:
  • solder resist oil protects the solder joint 602, and the solder joint 602 is the aforementioned conductive connection point 401;
  • the via point 601 is used to lay the carrier tape or the carrier internal connection line 403. After the entire package processing process is completed, the via connection point 501 becomes the internal connection line connection point 501;
  • Method 2 The area covered by the solder resist oil may also cover only the line, the via point and the periphery of the solder joint. As shown in Fig. 7, the soldering oil is only applied to the line laying and via point area 701 and the solder joint area 702. Coverage (specifically how the solder resist is applied, how the pad portion avoids coating is a well-known technique for circuit board technology and will not be described in detail herein).
  • the other part is the substrate of the PCB. Since the solder joints are protected around the solder joints, the wires and the via holes, the solder bridge will not be generated in the production.
  • other PCB substrates without solder resist oil have good acid and alkali resistance, insulation properties and other electrical properties. Therefore, the partial solder resist oil shown in Figure 6 and Figure 7 is used. The process does not affect the quality and reliability of the product, including salt spray resistance, while at the same time solving the warpage caused by the traditional covering process.
  • the general PCB double-panel vias (vias 601) are leaky, even if some of the PCB vias are covered with solder resist, but the vias are not completely covered.
  • the PCB board (carrier tape or carrier) used in the present invention is generally a double-sided board, and the circuits on both sides need to be connected to the circuit through a via (via point 601), since the smart card card needs to be used in the packaging process.
  • the glue is used to fix and bond the smart card chip module and the card base. If the PCB board has a gap in the via hole of the smart card chip module, the hot melt adhesive may overflow to the front side (contact surface) of the smart card during the smart card card packaging process. This will cause some trouble in the production process and use.
  • the invention fills the over-hole by brushing the soldering oil on the PCB board when the solder resist oil is applied to the PCB board, so as to ensure that the hot-melt glue used in the smart card card packaging process does not overflow to the smart card.
  • the front side contact surface.
  • the range of solder resist oil is based on the inclusion of all vias. As shown in Figure 8, the via 801 is protected and filled with solder resist 802.
  • the contact smart card chip package packaged in this process is very similar to the smart card package film packaged by FC0S and gold wire bonding method, but in fact each process step is different, and the smart card chip processed for CSP or WLCSP is used.
  • the contact smart card circuit board carrier tape or carrier
  • the smart card circuit board required by the FC0S needs the flip chip bonding requirement for the FC0S process, the gold wire.
  • the board used in the bonding method needs to be suitable for gold wire (or aluminum wire) wire bond requirements.
  • the CSP or WLCSP process or the SMT chip process used in the packaging method of this new contact smart card chip is mature, but requires special design and processing in the production process of the carrier tape or carrier, which makes this
  • the technology of the new contact smart card chip packaging method enables high-efficiency production, low overall processing cost, high reliability, and great economic value.
  • the contents not described in detail in the present specification belong to the prior art well known to those skilled in the art.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A contact smart card packaging method is provided, comprising the following steps: (1) using CSP (Chip Scale Package) or WLCSP (Wafer Level Chip Scale Package) techniques, processing the contact smart card chip wafer die which need to be packaged, and the thickness of the processed contact smart card chip wafer die can not be more than 0.60 mm; (2) designing and manufacturing the corresponding carrier tape or carrier sheet, according to the data of the chip size, the corresponding welding spot, etc. of the processed contact smart card chip wafer die obtained with CSP or WLCSP processing; (3) using traditional SMT (Surface mounted technology) techniques, pasting the processed contact smart card chip wafer die obtained in the step (1) on the corresponding position of the carrier tape or carrier sheet obtained in the step (2). The packaging method uses the mature SMT techniques in the pasting process, the reliability of processing is greatly improved, at the same time, the carrier tape production control requirements are more relaxed, the form of the carrier tape or the carrier sheet is more diversified (which can be flaky), therefore, the production costs are greatly reduced, reliability is greatly improved.

Description

说 明 书  Description

一种新的接触式智能卡的封装方法  A new contact smart card packaging method

技术领域 Technical field

本发明涉及接触式智能卡生产领域,所述接触式智能卡包含双界 面智能卡的接触式部分,所述双界面智能卡是指该智能卡既有接触式 界面又有非接触式界面, 具体说是一种新的接触式智能卡的封装方 法。 尤指在把接触式智能卡芯片晶圆颗粒 (die ) 封装在智能卡电路 板过程中使用的一种新的生产流程及方法,该智能卡电路板在行业一 般称之为载带或载片。 背景技术  The invention relates to the field of contact smart card production, wherein the contact smart card comprises a contact part of a dual interface smart card, and the dual interface smart card means that the smart card has both a contact interface and a non-contact interface, specifically a new one. The packaging method of the contact smart card. In particular, a new production process and method used in the process of packaging contact smart card chip wafers in a smart card circuit board, which is generally referred to in the industry as a carrier tape or carrier. Background technique

按照现有的生产工艺, 接触式智能卡芯片晶圆颗粒 (die ) 在封 装成成品接触式智能卡前, 都会将接触式智能卡芯片晶圆颗粒(die ) 封装到载带或载片上, 然后再将带有接触式智能卡芯片晶圆颗粒 ( die ) 的载带或载片, 通过热熔胶或其他粘合剂将载带或载片的背 面嵌入到已洗好对应大小的槽的接触式智能卡的卡基上。载带或载片 的正面(接触面)是大片的镀金金属面, 用于接触式智能卡与外部进 行通讯, 载带或载片的背面则是和接触式智能卡芯片晶圆颗粒(die ) 相连接的电路、 接触式智能卡芯片晶圆颗粒 (die ) 贴装区域以及四 周的空余区域, 该空余区域可用于涂覆热熔胶或其他粘合剂并嵌入、 固定于智能卡的卡基。  According to the existing production process, the contact smart card chip wafer (die) will package the contact smart card chip wafer (die) onto the carrier tape or carrier before packaging into a finished contact smart card, and then tape A carrier tape or carrier with contact smart card chip wafers, the back of the carrier tape or carrier is embedded into the card of the contact smart card that has been washed with the corresponding size by hot melt adhesive or other adhesive. On the base. The front side (contact surface) of the carrier tape or carrier is a large gold-plated metal surface for contact smart cards to communicate with the outside, and the back side of the carrier tape or carrier is connected to the contact smart card chip wafer (die). The circuit, the contact smart card chip wafer die (die) mounting area and the surrounding vacant area, the vacant area can be used to apply hot melt adhesive or other adhesive and embedded in the card base of the smart card.

将接触式智能卡芯片晶圆颗粒 (die ) 封装到载带或载片上的过 程一般称之为载带封装。载带封装的一个重要要求就是被封装的芯片 要处于晶圆颗粒状态。 这与电子行业通常的芯片封装不是一个概念, 一般我们提到芯片封装都指的是芯片塑封封装。  The process of packaging a contact smart card chip wafer (die) onto a carrier tape or carrier is generally referred to as a tape carrier package. An important requirement of the tape carrier package is that the packaged chip is in a wafer grain state. This is not a concept with the usual chip packaging in the electronics industry. Generally speaking, the chip package refers to the chip package.

目前接触式智能卡的载带封装有两种方法。一种方法是采用引线 键合工艺, 首先将接触式智能卡芯片晶圆片 (wafer ) 减薄, 然后对 接触式智能卡芯片晶圆片 (wafer) 划片得到若干接触式智能卡芯片 晶圆颗粒(die),接下来进行固晶(die bond)或装片,所谓固晶(die bond) 是使用粘结剂或焊料将接触式智能卡芯片晶圆颗粒 (die) 的 背面紧密粘结在载带背面上 (die bond), 然后使用引线键合工艺, 一般都是使用金线绑定 (wire bond), 最后使用热固化或紫外线照射 固化 (UV)对接触式智能卡芯片晶圆颗粒(die)及绑线做封胶保护。 其流程如下: There are currently two methods for carrier tape packaging of contact smart cards. One method is to use a wire bonding process to first thin the contact smart card chip wafer and then Contact smart card chip wafer dicing to obtain a number of contact smart card chip wafers, followed by die bonding or mounting, the so-called die bond is the use of a binder Or the solder bonds the back side of the contact smart card chip wafer die to the die bond, and then uses the wire bonding process, usually using a wire bond, and finally using Thermal curing or UV irradiation curing (UV) protects the contact smart card chip wafers and bonding wires. The process is as follows:

接触式智能卡芯片晶圆片(Wafer)减薄一划片一固晶(die bond) —引线键合 (wire bond) —封装 (紫外线照射胶使其固化、 热固工 艺皆可) 一测试;  Contact smart card chip wafer (wafer) thinning one dicing die bond - wire bond - package (UV illuminating glue to cure, thermosetting process)

热固和 UV的区别: 顾名思义, 热固是通过加热实现保护胶固化, UV是通过紫外照射实现保护胶固化。  The difference between thermosetting and UV: As the name suggests, thermosetting is the curing of the protective adhesive by heating, and UV is cured by UV irradiation.

这种方法目前占据了市场的主流, 随着目前黄金成本和保护用 This method currently dominates the market, with current gold costs and protection

UV胶 (紫外线胶) 成本上升, 封装成本也节节攀升。 另一种方法称之为 FC0S (英飞凌公司申请专利的一种智能卡芯 片封装方法, Flip Chip on Substrate, 板上倒装芯片), 该方法是 通过倒装芯片技术 (倒装焊技术)将接触式智能卡芯片晶圆颗粒 (die) 通过导电胶或热压焊或热声焊粘到载带的背面。 UV glue (ultraviolet glue) costs rise, and packaging costs are also rising. Another method is called FC0S (a smart card chip packaging method patented by Infineon, Flip Chip on Substrate, on-board flip chip), which is based on flip chip technology (flip chip technology). Contact smart card chip wafers are bonded to the back side of the carrier tape by conductive paste or thermocompression bonding or thermosonic bonding.

倒装芯片技术并不是一种新工艺,它是指把半导体芯片颗粒直接 与载带相连接的工艺流程。这个流程首先要对接触式智能卡芯片晶圆 片 (wafer)上的每颗接触式智能卡芯片晶圆颗粒(die) 的有用的焊 点 (PAD) 植金球或其他导电凸点, 然后把接触式智能卡芯片晶圆颗 粒(die)倒装使它的焊点(PAD)面向载带。载带电路上的焊点(PAD) 与长好凸点的接触式智能卡芯片晶圆颗粒(die) 的焊点 (PAD)位置 一一对应, 上述两者之间 (即接触式智能卡芯片晶圆颗粒 (die) 和 载带之间) 的焊点 (PAD) 可以由一种各向异性的导电性粘胶机械地 粘合在一起。  Flip-chip technology is not a new process. It refers to the process of connecting semiconductor chip particles directly to the carrier tape. This process begins with a useful solder joint (PAD) gold ball or other conductive bump for each contact smart card chip wafer on a contact smart card chip wafer, and then contacts The smart card chip wafer is flipped so that its solder joint (PAD) faces the carrier tape. The solder joint (PAD) on the tape carrier circuit has a one-to-one correspondence with the solder joint (PAD) position of the contact smart card chip die of the long bump, between the two (ie, the contact smart card chip wafer particle) The solder joint (PAD) between the (die) and the carrier tape can be mechanically bonded together by an anisotropic conductive adhesive.

倒装芯片技术可增加载带上器件的密度,并且相对于现行的引线 键合技术 (通过金线电连接方式), 它是一种可以省去金线绑定和保 护胶、 更加直接、 稳定的电连接方式。 其主要过程如下: Flip-chip technology increases the density of devices on the carrier tape and is relative to current leads Bonding technology (through gold wire connection), it is a more direct and stable electrical connection that eliminates gold wire bonding and protective glue. The main process is as follows:

接触式智能卡芯片晶圆片(Wafer )减薄一划片一凸点和 UBM (— 种封装工艺, under bump metal,凸块底层金属层)加工一倒装焊(热 压或热声焊, 可加粘结剂配合) 一测试;  Contact smart card chip wafer (Wafer) thinning a scribe-bump and UBM (under bump metal, bump underlying metal layer) processing a flip-chip solder (hot or hot sonic, can Adding a binder) a test;

在经历了较长的研发阶段后, 英飞凌公司与德国智能卡制造商 Giesecke & Devrient (G&D )成功合作推出了创新的 FC0S封装工艺, 首次将倒装芯片技术应用于智能卡封装。 FC0S技术将智能卡模块(带 有智能卡芯片的电路板) 中的接触式智能卡芯片晶圆颗粒 (die ) 以 倒装方式封装。 接触式智能卡芯片晶圆颗粒 (die ) 的功能衬面直接 通过倒装焊与电路板连接, 不再需要传统的金丝和保护胶 (UV胶) 封装,节省了这两个环节的封装成本。另外由于封装中省去了金属线, 这一新的连接技术节约了模块空间,它可以在模块尺寸不变的情况下 安置更大的接触式智能卡芯片晶圆颗粒(die ) , 使接触式智能卡中加 入更多的功能; 也可以使接触式智能卡的模块尺寸更小。 此外, 相比 传统的金线绑定技术, 采用 FC0S的接触式智能卡具有更强的机械稳 定性和光学视觉效果、更小和更薄的模块尺寸、更强的防腐性和韧性, 它采用了非卤素材料, 符合绿色环保要求。  After a long period of research and development, Infineon successfully cooperated with German smart card manufacturer Giesecke & Devrient (G&D) to launch the innovative FC0S packaging process, which is the first time to apply flip chip technology to smart card packaging. The FC0S technology encapsulates the contact smart card chip wafers (die) in a smart card module (a circuit board with a smart card chip) in a flip-chip package. The functional lining of the contact smart card chip wafer (die) is directly connected to the board by flip chip bonding, eliminating the need for traditional gold wire and protective glue (UV glue) packaging, saving the cost of packaging both. In addition, due to the elimination of metal lines in the package, this new connection technology saves module space, and it can place larger contact smart card chip wafers (die) with the same module size, enabling contact smart cards. Add more features; you can also make the contact smart card module smaller. In addition, compared to the traditional gold wire bonding technology, FCXS contact smart card has stronger mechanical stability and optical visual effects, smaller and thinner module size, stronger corrosion resistance and toughness, it uses Non-halogen materials, in line with green environmental requirements.

FC0S 的缺点是倒装焊工艺的设备投资过高, 而且对载带的镀层 金属有特殊要求,要保证载带背面电路的镀层金属必须可以和晶圆凸 点上的焊料材料焊接, 如果载带上镀金, 它的厚度必须要限制在 1一 2Um, 以限制脆弱的金锡化合物的形成, 因此其整体的生产成本很高。 发明内容  The disadvantage of FC0S is that the equipment investment of the flip-chip bonding process is too high, and there are special requirements for the plating metal of the carrier tape. It is necessary to ensure that the plating metal of the circuit on the back side of the carrier tape must be soldered to the solder material on the bumps of the wafer, if the carrier tape Gold plating, its thickness must be limited to 1 2Um to limit the formation of fragile gold-tin compounds, so its overall production cost is high. Summary of the invention

针对现有技术中存在的缺陷,本发明的目的在于提供一种新的接 触式智能卡的封装方法, 目的在于解决封装的薄及小尺寸问题同时, 还能满足低成本及高可靠性的需求。  In view of the deficiencies in the prior art, the present invention aims to provide a new method for packaging a contact smart card, which aims to solve the problem of thin and small size of the package while meeting the requirements of low cost and high reliability.

为达到以上目的, 本发明采取的技术方案是: 一种新的接触式智能卡的封装方法,其特征在于,具体步骤如下: 步骤 (1 ) 加工需要封装的接触式智能卡芯片晶圆颗粒得到加工 后的接触式智能卡芯片晶圆颗粒:所述需要封装的接触式智能卡芯片 晶圆颗粒 101上, 设有若干原始焊点 102, 采用 CSP或 WLCSP工艺, 对需要封装的接触式智能卡芯片晶圆颗粒 101进行加工,设置与原始 焊点 102—一对应的新增焊点 202, 然后用内部连接线 203将原始焊 点 102、 新增焊点 202—一对应连接, 目的是增大原始焊点 102的面 积和增加原始焊点 102之间的间距,新增焊点 202之间的间距至少为 0. 2mm, 新增焊点 202 的直径至少 0. 1匪, 同时, 在需要封装的接触 式智能卡芯片晶圆颗粒 101上设置芯片焊点起始点标识 204, 得到加 工后的接触式智能卡芯片晶圆颗粒 205; In order to achieve the above object, the technical solution adopted by the present invention is: A new contact smart card packaging method is characterized in that the specific steps are as follows: Step (1) processing a contact smart card chip wafer particle to be processed to obtain a processed contact smart card chip wafer particle: the required package The contact smart card chip wafer particle 101 is provided with a plurality of original solder joints 102, and the contact smart card chip wafer particles 101 to be packaged are processed by a CSP or WLCSP process, and the original solder joint 102 is disposed correspondingly. A new solder joint 202 is added, and then the original solder joint 102 and the new solder joint 202 are connected in a corresponding manner by the internal connecting line 203, in order to increase the area of the original solder joint 102 and increase the spacing between the original solder joints 102. The gap between the solder joints 202 is at least 0.2 mm, and the diameter of the new solder joints 202 is at least 0.11. At the same time, the chip solder joint starting point identifier 204 is set on the contact smart card chip wafer particles 101 to be packaged. , obtaining processed contact smart card chip wafer particles 205;

步骤 (2 ) 设计加工与其适配的载带或载片: 根据 CSP或 WLCSP 加工所得到的加工后的接触式智能卡芯片晶圆颗粒 205的芯片尺寸、 对应焊点数据, 来设计生产对应的载带或载片, 使得载带或载片的导 电连接点与加工后的接触式智能卡芯片晶圆颗粒 205 上的新增焊点 202在尺寸和结构上吻合;  Step (2) Designing and processing the carrier tape or carrier to be matched with it: According to the chip size and corresponding solder joint data of the processed contact smart card chip wafer particles 205 obtained by CSP or WLCSP processing, the corresponding load is designed and produced. The tape or carrier is such that the conductive connection points of the carrier tape or carrier are identical in size and structure to the newly added solder joints 202 on the processed contact smart card chip wafer particles 205;

步骤 (3 ) 将加工后的接触式智能卡芯片晶圆颗粒贴在与其适配 的载带或载片上: 采用传统的 SMT贴片工艺将步骤 (1 ) 得到的加工 后的接触式智能卡芯片晶圆颗粒 205贴在按步骤 (2 ) 得到的载带或 载片的相应位置上。 在上述技术方案的基础上,需要封装的接触式智能卡芯片晶圆颗 粒 101是对智能卡芯片的晶圆片 Wafer经过划片得到的。 在上述技术方案的基础上,加工后的接触式智能卡芯片晶圆颗粒 205的厚度不高于 0. 60mm。 在上述技术方案的基础上, 载带或载片的具体加工方法如下: ①选用厚度小于或等于 0. 35毫米的双面敷铜的 PCB基材, 采用 公知的 PCB生产工艺, 经过蚀刻、 打过孔、沉铜形成电路板线路和接 触面, 然后作镀金或者沉金, 形成适合接触式智能卡封装的、 带导电 连接点的载带或载片, Step (3) attaching the processed contact smart card chip wafer particles to the carrier tape or carrier adapted thereto: the processed contact smart card chip obtained by the step (1) by using a conventional SMT chip process The particles 205 are attached to the respective positions of the carrier tape or the carrier sheet obtained in the step (2). Based on the above technical solution, the contact smart card chip wafer particles 101 that need to be packaged are obtained by dicing the wafer Wafer of the smart card chip. The thickness of the wafer 205 of the contact-type smart card chip is not higher than 0. 60 mm. On the basis of the above technical solutions, the specific processing method of the carrier tape or the carrier is as follows: (1) a double-sided copper-clad PCB substrate having a thickness of less than or equal to 0.35 mm is used. The well-known PCB production process, after etching, punching, and sinking copper to form a circuit board circuit and a contact surface, and then performing gold plating or immersion gold to form a carrier tape or carrier with a conductive connection point suitable for a contact smart card package.

②载带或载片上的导电连接点的位置和尺寸要与步骤 (1 ) 所生 成的加工后的接触式智能卡芯片晶圆颗粒 205的尺寸及新增焊点 202 适配,  The position and size of the conductive connection points on the carrier tape or carrier are adapted to the size of the processed contact smart card chip wafer particles 205 and the new solder joints 202 generated in step (1).

③在载带或载片上的导电连接点周围、线路上和过孔点覆盖阻焊 油, 其中, 阻焊油要充满载带或载片上的过孔。 在上述技术方案的基础上, 步骤 (2 ) 制得的载带或载片上, 在 其背面设有与新增焊点 202位置相对应的导电连接点 401,  3 The solder resist is covered around the conductive connection points on the carrier tape or the carrier, on the line, and at the via points, wherein the solder resist oil is filled with the via holes on the carrier tape or the carrier. Based on the above technical solution, the carrier tape or the carrier sheet obtained in the step (2) is provided with a conductive connection point 401 corresponding to the position of the newly added solder joint 202 on the back surface thereof.

在其正面(接触面)通过若干分割线 503形成若干正面(接触面) 金属面 502,  A plurality of front surface (contact surface) metal faces 502 are formed on the front surface (contact surface) through a plurality of dividing lines 503,

正面 (接触面) 金属面 502上设有内部连接线连接点 501, 导电连接点 401和内部连接线连接点 501之间通过载带或载片内 部连接线 403相连。 本发明所述的新的接触式智能卡的封装方法, 其优点在于: 现有 的引线键合工艺或 FC0S工艺对载带或载片的要求很高, 国内没有公 司能做好, 基本上由法国 FCI公司垄断, 所以成本也高。本发明采用 了不同的生成方法, 在贴装过程中采用了成熟的 SMT贴片工艺, 加工 的可靠性大大提高, 同时对载带或载片的生产控制要求更宽松, 对载 带或载片的形式更灵活 (可以是片状), 因此生产成本大大降低, 可 靠性大大提高。 附图说明  The front surface (contact surface) is provided with an internal connection line connection point 501, and the conductive connection point 401 and the internal connection line connection point 501 are connected by a carrier tape or a carrier internal connection line 403. The method for packaging the new contact smart card according to the present invention has the advantages that: the existing wire bonding process or the FC0S process has high requirements on the carrier tape or the carrier film, and no company in the country can do well, basically by France. FCI monopolizes, so the cost is also high. The invention adopts different generation methods, adopts the mature SMT patch process in the mounting process, the processing reliability is greatly improved, and the production control requirements of the carrier tape or the carrier sheet are more relaxed, and the carrier tape or the carrier tape is more relaxed. The form is more flexible (can be sheet-like), so the production cost is greatly reduced and the reliability is greatly improved. DRAWINGS

本发明有如下附图:  The invention has the following figures:

图 1 接触式智能卡芯片晶圆颗粒结构图。  Figure 1 Contact particle array structure of smart card chip.

图 2 加工后的接触式智能卡芯片晶圆颗粒结构图。 图 3 加工后的接触式智能卡芯片晶圆颗粒的贴片面结构图。 图 4 载带或载片背面电路结构示意图。 Figure 2 Wafer structure diagram of the processed contact smart card chip. Figure 3 is a plan view of the surface of the processed smart card chip wafer. Figure 4 Schematic diagram of the circuit structure of the carrier tape or the back of the carrier.

图 5 载带或载片正面 (接触面) 电路结构示意图。  Figure 5 Schematic diagram of the circuit structure of the front side (contact surface) of the carrier tape or carrier.

图 6 载带或载片的阻焊油覆盖示意图一。  Figure 6 Schematic diagram of the solder resist oil coverage of the carrier tape or carrier.

图 7 载带或载片的阻焊油覆盖示意图二。  Figure 7 shows the second example of the solder resist oil coverage of the carrier tape or carrier.

图 8 载带或载片过孔填充图。  Figure 8 Carrier or carrier via fill map.

具体实施方式 detailed description

以下结合附图对本发明作进一步详细说明。  The invention will be further described in detail below with reference to the accompanying drawings.

本发明所述的新的接触式智能卡的封装方法可以适合于载带或 载片, 也可以用于普通的电路板材料 (及块状料)。 本发明所述的新 的接触式智能卡的封装方法, 至少包括三个重要的步骤, 即:  The new contact smart card packaging method of the present invention can be applied to a carrier tape or a carrier, and can also be used for ordinary circuit board materials (and bulk materials). The method for packaging a new contact smart card according to the present invention includes at least three important steps, namely:

加工需要封装的接触式智能卡芯片晶圆颗粒得到加工后的接触 式智能卡芯片晶圆颗粒(采用 CSP或 WLCSP工艺)、设计加工与其(指 加工后的接触式智能卡芯片晶圆颗粒)适配的(可以用于贴片的)载 带或载片,以及将加工后的接触式智能卡芯片晶圆颗粒贴在与其适配 的载带或载片上 (采用 SMT贴片工艺)。所述 CSP(Chip Scale Package) 是芯片级尺寸封装; 所述 WLCSP (Wafer Level Chip Scale Package) 是晶圆级 (WL) 芯片尺寸封装 (CSP); 所述 SMT (Surface Mounted Technology) 是用于贴片的表面组装技术 (表面贴装技术)。 下面以 ISSI公司的 ISSI55160智能卡芯片为例, 用图示简要描 述本发明所述的新的接触式智能卡的封装方法。  The contact smart card chip wafer particles that need to be packaged are processed into contacted smart card chip wafer particles (using CSP or WLCSP process), and the design process is adapted to (refer to the processed contact smart card chip wafer particles) ( The carrier tape or carrier that can be used for the patch, and the processed contact smart card chip wafer particles are attached to the carrier tape or carrier to which it is adapted (using the SMT chip process). The CSP (Chip Scale Package) is a chip scale package; the WLCSP (Wafer Level Chip Scale Package) is a wafer level (WL) chip size package (CSP); the SMT (Surface Mounted Technology) is used for paste Sheet surface assembly technology (surface mount technology). The ISSI 55160 smart card chip of ISSI is taken as an example to describe the packaging method of the new contact smart card according to the present invention.

图 1所示的 ISSI55160智能卡芯片即为需要封装的接触式智能卡 芯片晶圆颗粒 101, 需要封装的接触式智能卡芯片晶圆颗粒 101是对 智能卡芯片的晶圆片 Wafer经过划片得到的,在需要封装的接触式智 能卡芯片晶圆颗粒 101上, 设有若干原始焊点 102。 采用本发明所述 封装方法对 ISSI55160智能卡芯片进行封装包括以下步骤: 步骤(1 ), 加工需要封装的接触式智能卡芯片晶圆颗粒得到加工 后的接触式智能卡芯片晶圆颗粒: The ISSI55160 smart card chip shown in Figure 1 is a contact smart card chip wafer particle 101 that needs to be packaged. The contact smart card chip wafer particle 101 to be packaged is obtained by dicing the wafer wafer Wafer of the smart card chip. The packaged contact smart card chip wafer particles 101 are provided with a plurality of original solder joints 102. Encapsulating the ISSI 55160 smart card chip by using the packaging method of the present invention includes the following steps: Step (1), processing the contact smart card chip wafer particles that need to be packaged to obtain the processed contact smart card chip wafer particles:

采用 CSP或 WLCSP工艺,对需要封装的接触式智能卡芯片晶圆颗 粒 101进行加工, 设置与原始焊点 102—一对应的新增焊点 202, 然 后用内部连接线 203将原始焊点 102、 新增焊点 202—一对应连接, 参见图 2、 3, 目的是增大原始焊点 102 的面积和增加原始焊点 102 之间的间距, 新增焊点 202之间的间距至少为 0. 2mm, 新增焊点 202 的直径至少 0. 1匪, 同时, 在需要封装的接触式智能卡芯片晶圆颗粒 101上设置芯片焊点起始点标识 204, 得到加工后的接触式智能卡芯 片晶圆颗粒(经过 CSP或 WLCSP工艺加工后的接触式智能卡芯片晶圆 颗粒)205;如图 2所示,新增焊点 202的数量可以多于原始焊点 102, 多出的新增焊点 202不需要用内部连接线 203连接;  Using the CSP or WLCSP process, the contact smart card chip wafer particles 101 to be packaged are processed, a new solder joint 202 corresponding to the original solder joint 102 is set, and then the original solder joint 102 is used to connect the original solder joint 102, new 2mm。 The distance between the new solder joints 202 is at least 0. 2mm, the distance between the new solder joints 202 is at least 0. 2mm The solder joint 202 has a diameter of at least 0.1 匪, and at the same time, a chip solder joint starting point identifier 204 is set on the contact smart card chip wafer particle 101 to be packaged, and the processed contact smart card chip wafer granule is obtained ( Contact smart card chip wafers 205 processed by CSP or WLCSP process; as shown in FIG. 2, the number of new solder joints 202 may be more than the original solder joints 102, and the additional new solder joints 202 are not needed. The internal connection line 203 is connected;

这样,经过 CSP或 WLCSP工艺加工后的接触式智能卡芯片晶圆颗 粒可以直接适用于 SMT贴片工艺,加工后的接触式智能卡芯片晶圆颗 粒 205的厚度不能高于 (不能超过) 0. 60mm; 步骤 (2 ) 设计加工与其适配的载带或载片: 根据 CSP或 WLCSP 加工所得到的加工后的接触式智能卡芯片晶圆颗粒 205的芯片尺寸、 对应焊点 (指新增焊点 202的数量、 尺寸、 间距等)数据, 来设计生 产对应的载带或载片,使得载带或载片的导电连接点与加工后的接触 式智能卡芯片晶圆颗粒 205上的新增焊点 202在尺寸和结构上吻合, 载带或载片的具体加工方法如下:  The thickness of the wafer 205 of the contact smart card chip after the processing is not higher than (not exceeding) 0. 60mm; Step (2) Designing and processing the carrier tape or carrier to be matched with it: The chip size of the processed contact smart card chip wafer particle 205 obtained by CSP or WLCSP processing, corresponding solder joint (refer to the new solder joint 202) Data, quantity, spacing, etc.) to design and produce the corresponding carrier tape or carrier such that the conductive connection points of the carrier tape or carrier and the new solder joints 202 on the processed contact smart card chip wafer particles 205 are The size and structure are consistent. The specific processing method of the carrier tape or the carrier is as follows:

①选用厚度小于或等于 0. 35毫米的双面敷铜的 PCB基材, 采用 公知的 PCB生产工艺, 经过蚀刻、 打过孔、沉铜形成电路板线路和接 触面, 然后作镀金或者沉金, 形成适合接触式智能卡封装的、 带导电 连接点的载带或载片,  1 Use a double-sided copper-clad PCB substrate with a thickness less than or equal to 0.35 mm, using a well-known PCB production process, etching, punching, and sinking copper to form circuit board lines and contact surfaces, and then performing gold plating or immersion gold Forming a carrier tape or carrier with a conductive connection point suitable for a contact smart card package,

②载带或载片上的导电连接点的位置和尺寸要与步骤 (1 ) 所生 成的加工后的接触式智能卡芯片晶圆颗粒 205的尺寸及新增焊点 202 适配, ③在载带或载片上的导电连接点周围、线路上和过孔点覆盖阻焊 油, 其中, 阻焊油要充满载带或载片上的过孔。 步骤 (3 ) 将加工后的接触式智能卡芯片晶圆颗粒贴在与其适配 的载带或载片上: 采用传统的 SMT贴片工艺将步骤 (1 ) 得到的加工 后的接触式智能卡芯片晶圆颗粒 205贴在按步骤 (2 ) 得到的载带或 载片的相应位置上。 如图 4、 5所示, 步骤(2 )制得的载带或载片上, 在其背面设有 与新增焊点 202位置相对应的导电连接点 401, 导电连接点 401与新 增焊点 202是对应的焊点关系, 二者的大小、 位置、 尺寸必须完全一 致,以保证能够使用 SMT贴片工艺将新增焊点 202焊接在导电连接点 401的位置, 且加工后的接触式智能卡芯片晶圆颗粒 205的尺寸不能 超过 0. 60mm。 The position and size of the conductive connection points on the carrier tape or carrier are adapted to the size of the processed contact smart card chip wafer particles 205 and the new solder joints 202 generated in step (1). 3 The solder resist oil is covered around the conductive connection points on the carrier tape or the carrier, on the line, and at the via points, wherein the solder resist oil is filled with the via holes on the carrier tape or the carrier. Step (3) attaching the processed contact smart card chip wafer particles to the carrier tape or carrier adapted thereto: the processed contact smart card chip obtained by the step (1) by using a conventional SMT chip process The particles 205 are attached to the respective positions of the carrier tape or the carrier sheet obtained in the step (2). As shown in FIG. 4 and FIG. 5, the carrier tape or the carrier sheet obtained in the step (2) is provided with a conductive connection point 401 corresponding to the position of the newly added solder joint 202 on the back surface thereof, and the conductive connection point 401 and the newly added solder joint. 202 is the corresponding solder joint relationship, the size, position and size of the two must be exactly the same to ensure that the new solder joint 202 can be soldered to the position of the conductive connection point 401 using the SMT chip process, and the processed contact smart card The size of the chip wafer 205 may not exceed 0. 60mm.

步骤 (2 ) 制得的载带或载片上, 在其正面 (接触面) 通过若干 分割线 503形成若干正面 (接触面) 金属面 502,  Step (2) on the carrier tape or the carrier sheet, a plurality of front surface (contact surface) metal faces 502 are formed on the front surface (contact surface) through a plurality of dividing lines 503,

正面 (接触面) 金属面 502上设有内部连接线连接点 501, 导电连接点 401和内部连接线连接点 501之间通过载带或载片内 部连接线 403相连。载带或载片内部连接线 403设置在载带或载片的 背面。 本发明的流程示意一:  The front surface (contact surface) is provided with an internal connection line connection point 501, and the conductive connection point 401 and the internal connection line connection point 501 are connected by a carrier tape or a carrier internal connection line 403. The carrier tape or carrier internal connection line 403 is disposed on the back side of the carrier tape or carrier. The flow of the invention is illustrated by one:

接触式智能卡芯片晶圆片(Wafer )—划片→CSP加工→SMT贴片  Contact smart card chip wafer (Wafer) - dicing → CSP processing → SMT patch

本发明的流程示意二: The flow of the present invention is illustrated as two:

接触式智能卡芯片晶圆片(Wafer )—划片→WLCSP封装→SMT贴 片测试; 以下结合本发明的流程示意二 (本发明的流程示意二只是采用Contact smart card chip wafer (Wafer) - dicing → WLCSP package → SMT patch test; The following is a schematic diagram of the second embodiment of the present invention.

WLCSP封装可能的流程之一), WLCSP封装为例, 对本发明作进一步详 细说明。 随着技术和工艺的进步, 新的封装技术在日新月异, 现在一类全 新的芯片封装技术已经成熟, 比如 CSP (Chip Size Packaging) 及 WLCSP技术 (Wafer Level Chip Sized Packaging, 晶圆级芯片尺寸 封装)。 CSP 结合和倒装芯片技术和表面安装技术的优点, 它具有接 近芯片大小的封装尺寸和封装实体薄的特点。 主要有如下五种: 柔 性基片 CSP、 硬质基片 CSP、 引线框架 CSP、 圆片级 CSP和叠层 CSP, 对于圆片级的 CSP封装, 一般称为 WLCSP, 不同于传统的芯片封装方 式 (先切割再封测, 而封装后至少增加原芯片 20%的体积), 此种最 新技术是先在整片晶圆上进行封装和测试, 然后才切割成一个个的 IC颗粒, 因此封装后的体积即等同 IC裸晶的原尺寸。 通过使用这种 技术, 可以实现芯片尺寸超薄及超小尺寸, 这是传统的芯片塑封技术 所无法实现的。 其最低厚度可以低于 0. 25毫米, 远远低于当前塑封 的最低厚度 0. 5毫米, 而且能有效地获得规模效应来降低成本, 使用 该技术的芯片封装具有成本低, 良率高和减少板面占用的特点。在非 智能卡行业芯片的封装上逐渐流行开来。但在智能卡行业还没有人使 用, 因为传统的载带封装生产线不支持这种生产工艺。 由于这种封装 厚度的优势, 以及成本的优势。本发明利用这种技术来实现一种新的 接触式智能卡的封装方法, 包括以下步骤: 首先将接触式智能卡芯片晶圆片 (Wafer) 通过 WLCSP工艺加工 成厚度不超过 0. 40毫米的可以直接用于贴片(SMT)的芯片。 本实施 例选择的为长电科技股份有限公司的 WLCSP加工,接触式智能卡芯片 晶圆片 (Wafer)上单颗接触式智能卡芯片晶圆颗粒(die) 的尺寸为 2013xl692um, 加工完成后的单颗芯片(接触式智能卡芯片晶圆颗粒) 的尺寸为 2013xl692um, 具体流程可以如下: ( 1 ) 在圆片上制作接触器的圆片级 CSP的封装工艺流程: 圆片一二次布线一减薄一在圆片上制作接触器一接触器电镀一 测试、 筛选一划片一激光打标→SMT贴片一测试 One of the possible processes of the WLCSP package), the WLCSP package is taken as an example, and the present invention is further described in detail. As technology and processes advance, new packaging technologies are changing rapidly, and a new class of chip packaging technologies such as CSP (Chip Size Packaging) and WLCSP (Wafer Level Chip Sized Packaging) are now mature. . The advantages of CSP combining and flip chip technology and surface mount technology are that it has a package size close to the chip size and a thin package body. There are five main types: flexible substrate CSP, hard substrate CSP, lead frame CSP, wafer level CSP and laminated CSP. For wafer level CSP package, it is generally called WLCSP, which is different from traditional chip packaging. (First cut and then sealed, and at least 20% of the original chip is added after packaging). This latest technology is first packaged and tested on the entire wafer, and then cut into individual IC particles, so after packaging The volume is equivalent to the original size of the IC bare crystal. By using this technology, the chip size can be ultra-thin and ultra-small, which is impossible with conventional chip molding technology. The minimum thickness can be less than 0.25 mm, which is much lower than the current minimum thickness of 0.5 mm, and can effectively achieve economies of scale to reduce costs. The chip package using this technology has low cost and high yield. Reduce the characteristics of board occupancy. It has become increasingly popular on the packaging of non-smart card industry chips. But no one in the smart card industry has used it, because the traditional tape carrier packaging line does not support this production process. Due to the advantages of this package thickness, as well as the cost advantage. The present invention utilizes this technology to implement a new method for packaging a contact smart card, including the following steps: First, the contact smart card chip wafer (Wafer) is processed into a thickness of not more than 0.40 mm by the WLCSP process. Chip for patch (SMT). In this embodiment, the WLCSP processing of Changjiang Electronics Technology Co., Ltd. is selected, and the size of the single contact smart card chip wafer (wafer) on the contact smart card chip wafer (wafer) is 2013xl692um, and the single piece after processing is completed. The size of the chip (contact smart card chip wafer granule) is 2013xl692um, the specific process can be as follows: (1) The packaging process of the wafer-level CSP for making the contactor on the wafer: the wafer-secondary wiring, the thinning, the contactor, the contactor, the plating, the test, the screening, the dicing, the laser marking →SMT patch one test

( 2 ) 在圆片上制作焊球的圆片级 CSP的封装工艺流程: 圆片一二次布线一减薄一在圆片上制作焊球一模塑包封或表面 涂敷一测试、 筛选一划片一激光打标→SMT贴片一测试  (2) The packaging process of the wafer-level CSP for making solder balls on the wafer: wafer-secondary wiring, thinning, making solder balls on the wafer, molding or encapsulating or surface coating, testing, screening Film-one laser marking→SMT patch-test

同时设计能与经过这种工艺可以直接焊点 (PAD ) 对应的载带或 载片, 如图 1〜5所示, 使得新增焊点 202和导电连接点 401在尺寸 和结构上吻合。如图 4所示, 然后用满足要求的自动焊锡贴片机将这 种 WLCSP封装好的芯片焊接到载带或载片上。  At the same time, a carrier tape or a carrier which can be directly soldered (PAD) according to this process is designed, as shown in Figs. 1 to 5, so that the new solder joint 202 and the conductive connection point 401 are matched in size and structure. As shown in Figure 4, the WLCSP packaged chip is then soldered to the carrier tape or carrier using an automated solder placement machine that meets the requirements.

和传统的 PCB板不一样,以上所述的这种载带或载片还需要经过 一些特殊的工艺处理, 以下详述:  Unlike traditional PCB boards, the carrier tape or slide described above requires some special processing, as detailed below:

传统贴片的 PCB板一般都是除贴片焊点外其他地方都是用阻焊油 覆盖, 在贴片前使用钢网先在 PCB板的贴片焊点上刮上锡膏, 然后通 过贴片机将芯片或其他器件贴到 PCB板上的对应位置,然后通过加热 炉对贴好芯片或器件的 PCB 板加热使锡膏融化并连接到芯片或器件 的对应管脚上, 最后移出加热炉到常温下使锡自然固化来完成贴片。  The PCB of the traditional patch is generally covered with solder resist oil except for the patch solder joint. Before the patch is used, the steel mesh is first scraped on the solder joint of the PCB board, and then the paste is pasted. The chip machine attaches the chip or other device to the corresponding position on the PCB board, and then heats the PCB board to which the chip or device is pasted by the heating furnace to melt the solder paste and connect it to the corresponding pin of the chip or device, and finally removes the heating furnace. The tin is naturally cured at room temperature to complete the patch.

本发明中使用的贴片的 PCB板的厚度较一般的 PCB板要薄, 一般 在 0. 08mm到 0. 25mm之间, 而且 PCB板的面积较大, 如果采用传统的 方法, 即除贴片焊点外其他地方都用阻焊油覆盖, 那么在贴片后 PCB 板通过加热炉时, 由于 PCB各个组成部分(贴片焊点、 基材、 阻焊油 等) 的热胀冷缩系数不同, PCB板在加热后回到常温下会出现一定程 度的弯曲、 不平整等现象。  The thickness of the PCB board of the patch used in the present invention is thinner than that of the general PCB board, generally between 0.08 mm and 0.25 mm, and the area of the PCB board is large, if the conventional method is used, that is, the patch is removed. The soldering oil is covered in other places outside the solder joint. When the PCB passes through the heating furnace after the mounting, the thermal expansion and contraction coefficients of the various components of the PCB (patch solder joint, substrate, solder resist oil, etc.) are different. When the PCB board returns to normal temperature after heating, there will be a certain degree of bending and unevenness.

本发明通过采用在 PCB板贴片焊点周围小范围内覆盖阻焊油的方 法来尽量解决阻焊油与 PCB 板其他组成部分热胀冷缩系数不同造成 PCB板加热后回到常温下弯曲、 不平整的问题。 阻焊油的范围以包住 所有贴片焊点周围为基准:  The invention solves the problem that the soldering oil and the other components of the PCB board have different thermal expansion and contraction coefficients by using a method of covering the soldering oil in a small area around the solder joint of the PCB board to cause the PCB board to be heated and then returned to the normal temperature to bend, Uneven problems. The range of solder mask oil is based on the surrounding of all the solder joints:

方式 1 : 这些阻焊油覆盖的区域可以是整块的, 如图 6所示, 全 保护区域 604范围内全部按传统线路板阻焊油工艺实施,阻焊油对焊 点、 线路、 过孔点全部保护, 其中: Method 1: The area covered by these solder resist oils can be monolithic. As shown in Fig. 6, all the areas of the full protection area 604 are implemented according to the traditional circuit board solder resist oil process, and the solder resist oil is butt welded. Points, lines, and via points are all protected, where:

焊点保护区域 603中,阻焊油对焊点 602周围进行保护,焊点 602 即为前述的导电连接点 401 ;  In the solder joint protection area 603, the solder resist oil protects the solder joint 602, and the solder joint 602 is the aforementioned conductive connection point 401;

过孔点 601用于敷设载带或载片内部连接线 403, 过孔点 601在 整个封装处理工艺都完成后, 就成了内部连接线连接点 501 ;  The via point 601 is used to lay the carrier tape or the carrier internal connection line 403. After the entire package processing process is completed, the via connection point 501 becomes the internal connection line connection point 501;

方式 2 : 这些阻焊油覆盖的区域也可以是只覆盖线路、 过孔点及 焊点周围, 如图 7所示, 只对线路敷设及过孔点区域 701及焊点区域 702做阻焊油覆盖 (具体关于阻焊油如何涂覆, 焊盘部分如何避免涂 覆是线路板技术的公知技术, 此处不再详述)。  Method 2: The area covered by the solder resist oil may also cover only the line, the via point and the periphery of the solder joint. As shown in Fig. 7, the soldering oil is only applied to the line laying and via point area 701 and the solder joint area 702. Coverage (specifically how the solder resist is applied, how the pad portion avoids coating is a well-known technique for circuit board technology and will not be described in detail herein).

载带或载片上除了线路、 过孔点及焊点外, 其他部分就是 PCB的 基材, 由于焊点周围、 线路及过孔都做了阻焊油保护, 因此不会在生 产中引起锡桥等质量问题, 其他未加阻焊油的部分的 PCB基材, 已经 具备很好的耐酸碱性能、绝缘性能及其他电气性能, 因此采用图 6及 图 7所示的采用部分覆盖阻焊油的工艺, 不会影响产品的质量、可靠 性包括耐盐雾性能, 同时又能解决传统覆盖工艺引起的翘曲问题。  In addition to the wires, vias and solder joints on the carrier tape or the carrier, the other part is the substrate of the PCB. Since the solder joints are protected around the solder joints, the wires and the via holes, the solder bridge will not be generated in the production. For other quality problems, other PCB substrates without solder resist oil have good acid and alkali resistance, insulation properties and other electrical properties. Therefore, the partial solder resist oil shown in Figure 6 and Figure 7 is used. The process does not affect the quality and reliability of the product, including salt spray resistance, while at the same time solving the warpage caused by the traditional covering process.

另外, 一般的 PCB双面板的过孔 (过孔点 601 ) 都是漏空的, 即 使有的 PCB过孔上有阻焊油覆盖, 但是都没有完全将过孔覆盖住。  In addition, the general PCB double-panel vias (vias 601) are leaky, even if some of the PCB vias are covered with solder resist, but the vias are not completely covered.

本发明中所使用的 PCB板 (载带或载片) 一般是双面板, 两个面 的电路需要通过过孔 (过孔点 601 ) 来连接电路, 由于智能卡卡片在 封装过程中需要使用热熔胶来固定、粘结智能卡芯片模块与卡基, 如 果智能卡芯片模块上的 PCB板过孔有空隙的,那么在智能卡卡片封装 过程中热熔胶有可能会溢出到智能卡的正面 (接触面), 这在生产过 程、 使用中都会造成一定的麻烦。  The PCB board (carrier tape or carrier) used in the present invention is generally a double-sided board, and the circuits on both sides need to be connected to the circuit through a via (via point 601), since the smart card card needs to be used in the packaging process. The glue is used to fix and bond the smart card chip module and the card base. If the PCB board has a gap in the via hole of the smart card chip module, the hot melt adhesive may overflow to the front side (contact surface) of the smart card during the smart card card packaging process. This will cause some trouble in the production process and use.

本发明在给 PCB板上阻焊油时, 通过在 PCB板上的过孔位置刷上 阻焊油来填充满过孔,以保证在智能卡卡片封装过程中使用的热熔胶 不会溢出到智能卡的正面 (接触面)。 阻焊油的范围以包住所有过孔 为基准, 如图 8所示, 过孔点 801中用阻焊油 802进行保护及填充。  The invention fills the over-hole by brushing the soldering oil on the PCB board when the solder resist oil is applied to the PCB board, so as to ensure that the hot-melt glue used in the smart card card packaging process does not overflow to the smart card. The front side (contact surface). The range of solder resist oil is based on the inclusion of all vias. As shown in Figure 8, the via 801 is protected and filled with solder resist 802.

通过以上的处理,载带或载片可以完全符合大规模智能卡生产的 要求。 经过这种流程封装的接触式智能卡芯片封装片和 FC0S和金线键 合方法封装的智能卡封装片极为相似,但实际上每个工艺环节都不一 样,而且针对 CSP或 WLCSP加工的智能卡芯片使用的接触式智能卡电 路板 (载带或载片) 与 FC0S和金线键合方法使用的智能卡电路板有 很大的区别, FC0S所需要的智能卡电路板需要适合 FC0S工艺的倒装 焊要求, 金线键合方法使用的电路板需要适合金线 (或铝线) 绑定 (wire bond ) 的要求。 这种新的接触式智能卡芯片的封装方法中使 用的无论是 CSP或 WLCSP工艺还是 SMT贴片工艺都很成熟,只是在载 带或载片的生产过程中需要特殊的设计和处理,这使得这种新的接触 式智能卡芯片的封装方法所采用的技术均能够实现高效率的生产,整 体加工成本低, 而且具有高可靠性, 具有很大的经济价值。 本说明书中未作详细描述的内容属于本领域专业技术人员公知 的现有技术。 Through the above processing, the carrier tape or the carrier can fully meet the requirements of large-scale smart card production. The contact smart card chip package packaged in this process is very similar to the smart card package film packaged by FC0S and gold wire bonding method, but in fact each process step is different, and the smart card chip processed for CSP or WLCSP is used. The contact smart card circuit board (carrier tape or carrier) is very different from the smart card circuit board used in the FC0S and gold wire bonding methods. The smart card circuit board required by the FC0S needs the flip chip bonding requirement for the FC0S process, the gold wire. The board used in the bonding method needs to be suitable for gold wire (or aluminum wire) wire bond requirements. The CSP or WLCSP process or the SMT chip process used in the packaging method of this new contact smart card chip is mature, but requires special design and processing in the production process of the carrier tape or carrier, which makes this The technology of the new contact smart card chip packaging method enables high-efficiency production, low overall processing cost, high reliability, and great economic value. The contents not described in detail in the present specification belong to the prior art well known to those skilled in the art.

Claims

权 利 要 求 书 Claim 1. 一种新的接触式智能卡的封装方法, 其特征在于, 具体步骤 如下:  A new method for packaging a contact smart card, characterized in that the specific steps are as follows: 步骤 (1) 加工需要封装的接触式智能卡芯片晶圆颗粒得到加工 后的接触式智能卡芯片晶圆颗粒:所述需要封装的接触式智能卡芯片 晶圆颗粒 (101) 上, 设有若干原始焊点 (102), 采用 CSP或 WLCSP 工艺, 对需要封装的接触式智能卡芯片晶圆颗粒 (101) 进行加工, 设置与原始焊点 (102) —一对应的新增焊点 (202), 然后用内部连 接线 (203)将原始焊点 (102)、 新增焊点 (202)—一对应连接, 目 的是增大原始焊点(102)的面积和增加原始焊点(102)之间的间距, 新增焊点 (202) 之间的间距至少为 0.2匪, 新增焊点 (202) 的直径 至少 0.1匪, 同时, 在需要封装的接触式智能卡芯片晶圆颗粒 (101) 上设置芯片焊点起始点标识(204), 得到加工后的接触式智能卡芯片 晶圆颗粒 (205);  Step (1) processing the contact smart card chip wafer particles to be processed to obtain the processed contact smart card chip wafer particles: the contact smart card chip wafer particles (101) to be packaged, and having a plurality of original solder joints (102), using the CSP or WLCSP process, processing the contact smart card chip wafer particles (101) to be packaged, and setting a new solder joint (202) corresponding to the original solder joint (102), and then using the internal The connecting wire (203) connects the original solder joint (102) and the new solder joint (202) to each other in order to increase the area of the original solder joint (102) and increase the spacing between the original solder joints (102). The new solder joints (202) have a spacing of at least 0.2 匪, and the new solder joints (202) have a diameter of at least 0.1 匪. At the same time, chip solder joints are placed on the contact smart card chip wafers (101) to be packaged. Starting point identification (204), obtaining processed contact smart card chip wafer particles (205); 步骤 (2) 设计加工与其适配的载带或载片: 根据 CSP或 WLCSP 加工所得到的加工后的接触式智能卡芯片晶圆颗粒 (205) 的芯片尺 寸、 对应焊点数据, 来设计生产对应的载带或载片, 使得载带或载片 的导电连接点与加工后的接触式智能卡芯片晶圆颗粒 (205) 上的新 增焊点 (202) 在尺寸和结构上吻合;  Step (2) Designing and processing the carrier tape or carrier: The chip size and corresponding solder joint data of the processed contact smart card chip wafer (205) obtained by CSP or WLCSP processing are designed and produced. Carrier tape or carrier, such that the conductive connection points of the carrier tape or carrier are identical in size and structure to the newly added solder joints (202) on the processed contact smart card chip wafer particles (205); 步骤 (3) 将加工后的接触式智能卡芯片晶圆颗粒贴在与其适配 的载带或载片上: 采用传统的 SMT贴片工艺将步骤 (1) 得到的加工 后的接触式智能卡芯片晶圆颗粒(205)贴在按步骤(2)得到的载带 或载片的相应位置上。  Step (3) affixing the processed contact smart card chip wafer particles to the carrier tape or carrier adapted thereto: the processed contact smart card chip obtained in step (1) by using a conventional SMT chip process The particles (205) are attached to the respective positions of the carrier tape or the carrier sheet obtained in the step (2). 2. 如权利要求 1所述的新的接触式智能卡的封装方法, 其特征 在于: 需要封装的接触式智能卡芯片晶圆颗粒 (101) 是对智能卡芯 片的晶圆片 Wafer经过划片得到的。  2. The method of packaging a new contact smart card according to claim 1, wherein the contact smart card chip wafer (101) to be packaged is obtained by dicing a wafer Wafer of the smart card chip. 3. 如权利要求 1所述的新的接触式智能卡的封装方法, 其特征 在于: 加工后的接触式智能卡芯片晶圆颗粒 (205) 的厚度不高于 3. The method of packaging a new contact smart card according to claim 1, wherein: the thickness of the processed contact smart card chip wafer particles (205) is not higher than 0.60mm。 0.60mm. 4. 如权利要求 1所述的新的接触式智能卡的封装方法, 其特征 在于, 载带或载片的具体加工方法如下:  4. The method of packaging a new contact smart card according to claim 1, wherein the specific processing method of the carrier tape or the carrier is as follows: ①选用厚度小于或等于 0.35毫米的双面敷铜的 PCB基材, 采用 公知的 PCB生产工艺, 经过蚀刻、 打过孔、沉铜形成电路板线路和接 触面, 然后作镀金或者沉金, 形成适合接触式智能卡封装的、 带导电 连接点的载带或载片,  1 Use a double-sided copper-clad PCB substrate with a thickness less than or equal to 0.35 mm, using a well-known PCB production process, after etching, punching holes, sinking copper to form circuit board lines and contact surfaces, and then performing gold plating or immersion gold to form Carrier tape or slide with conductive connection points for contact smart card packaging, ②载带或载片上的导电连接点的位置和尺寸要与步骤 (1) 所生 成的加工后的接触式智能卡芯片晶圆颗粒 (205) 的尺寸及新增焊点 2 The position and size of the conductive connection point on the carrier tape or carrier should be the same as the size and new solder joint of the processed contact smart card chip wafer (205) generated in step (1). (202) 适配, (202) Adaptation, ③在载带或载片上的导电连接点周围、线路上和过孔点覆盖阻焊 油, 其中, 阻焊油要充满载带或载片上的过孔。  3 The solder resist is covered around the conductive connection points on the carrier tape or the carrier, on the line, and at the via points, wherein the solder resist oil is filled with the via holes on the carrier tape or the carrier. 5. 如权利要求 4所述的新的接触式智能卡的封装方法, 其特征 在于:步骤(2)制得的载带或载片上,在其背面设有与新增焊点(202) 位置相对应的导电连接点 (401),  5. The method of packaging a new contact smart card according to claim 4, wherein the carrier tape or the carrier tape obtained in the step (2) is provided on the back side thereof with a new solder joint (202). Corresponding conductive connection point (401), 在其正面 (接触面) 通过若干分割线 (503) 形成若干正面 (接 触面) 金属面 (502),  Forming a number of front (contact surface) metal faces (502) through a plurality of dividing lines (503) on the front side (contact surface), 正面(接触面)金属面(502)上设有内部连接线连接点 (501), 导电连接点 (401)和内部连接线连接点 (501)之间通过载带或  The front side (contact surface) metal surface (502) is provided with an internal connection line connection point (501), and the conductive connection point (401) and the internal connection line connection point (501) are passed between the carrier tape or
PCT/CN2012/000113 2011-06-16 2012-01-20 A new contact smart card packaging method Ceased WO2012171320A1 (en)

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