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WO2012163172A1 - Procédé et dispositif de synchronisation par rapport à l'horloge - Google Patents

Procédé et dispositif de synchronisation par rapport à l'horloge Download PDF

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Publication number
WO2012163172A1
WO2012163172A1 PCT/CN2012/073487 CN2012073487W WO2012163172A1 WO 2012163172 A1 WO2012163172 A1 WO 2012163172A1 CN 2012073487 W CN2012073487 W CN 2012073487W WO 2012163172 A1 WO2012163172 A1 WO 2012163172A1
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WO
WIPO (PCT)
Prior art keywords
master state
communication port
state
clock
parent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2012/073487
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English (en)
Chinese (zh)
Inventor
赵洪广
瞿艳霞
宋玲玲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZTE Corp
Original Assignee
ZTE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZTE Corp filed Critical ZTE Corp
Publication of WO2012163172A1 publication Critical patent/WO2012163172A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0673—Clock or time synchronisation among packet nodes using intermediate nodes, e.g. modification of a received timestamp before further transmission to the next packet node, e.g. including internal delay time or residence time into the packet

Definitions

  • the present invention relates to synchronous communication network technologies, and in particular, to a clock synchronization method and device. Background technique
  • the time synchronization network is an indispensable component, and different services have different requirements for time synchronization.
  • the most stringent demand comes from wireless communication networks, and the development of wireless technologies is increasingly demanding high-precision time synchronization for wireless communication networks.
  • the bearer network which is the basic network of wireless communication networks, has begun to evolve from traditional circuit switching to packet switching.
  • the packet network the transmission of frequency synchronization signals and time synchronization signals is realized.
  • One is based on the synchronization technology of the physical layer, such as the synchronous Ethernet (syncE) technology of ITU-T G.8261; the other is the packet-based synchronization technology, such as IEEE 1588 V2.
  • IEEE 1588V2 is a precision time synchronization protocol (PTP).
  • PTP can realize frequency synchronization and time synchronization at the same time, and the synchronization precision is high, up to sub-microsecond level, and theoretically can meet the requirements of time synchronization of the wireless communication network. Therefore, the PTP time synchronization protocol has received more and more attention and wide application in the communication network. Domestic and foreign operators continue to use the PTP protocol for time synchronization, and gradually replace the time using the Global Positioning System (GPS). The way to synchronize.
  • GPS Global Positioning System
  • the purpose is to abandon the more complicated frequency synchronization function, but only use its time synchronization function; time synchronization is different from frequency synchronization, no high frequency is needed to detect the frequency, on the basis of syncE frequency synchronization, as long as The packet delay delay (PDV, Package Delay Deviation) of the wireless communication network is detected normally, and the time synchronization only needs 1-2 interactions to correct the deviation back to the normal range.
  • PDV Packet Delay Deviation
  • the access point device clock is the standard clock source outside the network, and the other device clocks in the PTP time synchronization network are consistent with the access point device clock.
  • the access point device clock is also known as the primary clock or the grandmother clock.
  • the clock in the PTP time synchronization network is divided into normal clock (OC, Ordinary Clock) and boundary clock (BC, Boundary Clock) according to the working mode.
  • OC Ordinary Clock
  • BC Boundary Clock
  • the device in the OC working mode is called OC device, only one communication port; working in BC A device in mode is called a BC device and has more than one communication port.
  • the communication port of the BC device and the OC device has a port state, and the communication port states include: a master state (Master, M), a slave state (Slave, S), and a passive state (Passive, P), and the port state is a master communication port.
  • the master port sends the grandmother's clock information to the downstream device through the advertisement.
  • the slave port is consistent with the grandmother's clock according to the received announce message.
  • two access point devices are usually set up during networking. One is the primary access point device and the other is the standby access point device.
  • the clock of the primary access point device is the primary grandmother clock.
  • the clock of the alternate access point is the standby grandmother clock, wherein the priority of the grandmother's clock is higher than that of the standby grandmother's clock.
  • FIG. 1 it is a schematic topology diagram of a PTP time synchronization network, where the OC1 device clock is the master grandmother clock of the PTP time synchronization network, and the OC2 device clock is the standby grandmother clock of the PTP time synchronization network.
  • the clock source is the master's clock.
  • the OC1 device transmits its own clock information to the BC1 device through the announce message.
  • the BC1 device adjusts its own clock and OC1 according to the received announce message.
  • the device is consistent, and its own clock information is transmitted to the BC2 device through the announce message.
  • the BC1 device is called the upstream device of the BC2 device
  • the BC2 device is called the downstream device of the BC1 device, and so on, until the time of synchronizing the network device is completed. Synchronize.
  • the time synchronization network structure is a non-linear structure
  • any BC device may receive the announce message sent by multiple upstream devices. If the device receives multiple announcement messages at the current time, the BC device receives the announce message.
  • the BC device selects the device clock trace with the best clock level from the received announce message, and the selected device is called the parent of the BC device.
  • the upstream device is its parent.
  • the solid line direction shown in Figure 1 is the direction of the announce message, the port status of the solid arrow is Slave, and the port status of the solid arrow is Master; when the master grandmother loses the clock or the master grandmother's clock quality deteriorates.
  • the clock source is switched to the backup grandmother clock.
  • the OC2 device transmits the announce message according to the direction of the dotted line.
  • the port status will be switched, that is, the original master port status is switched.
  • the Slave state the original Slave port state is switched to the Master state.
  • the port state of the dotted arrow is Slave
  • the port state of the dotted arrow is Master.
  • a pre-master state is added before the state of the slave port is switched to the master state, that is, after the BC device receives the announce message. , instead of performing port state switching immediately, it waits for a certain period of time before performing port state switching. Due to the existence of the Pre-Master state, in the PTP time synchronization network, each device takes too long to perform state transition of the communication port, which is not conducive to the stability of the PTP time synchronization network.
  • the embodiments of the present invention provide a clock synchronization method and device, which are used to reduce the time for each device to perform communication port state switching in a PTP time synchronization network, and ensure the stability of the PTP time synchronization network.
  • the embodiment of the invention provides a clock synchronization method, including: The BC device receives the notification announce message carrying the identification information of the grandmother's clock GM; the BC device determines the identification information of the GM carried in the parent-announced message received at the current time and the parent-announced message received at the previous moment.
  • the identification information of the carried GM is different, the communication port that controls the current time in the non-Master state is directly switched to the master state.
  • An embodiment of the present invention provides a clock synchronization device, including: a receiving module and a first switching module;
  • a receiving module configured to receive an announce message carrying the identification information of the grandmother clock GM; the first switching module is configured to: when confirming that the device needs to perform the communication port state switching at the current moment, and determine the parent announcement received at the current time When the GM information carried in the packet is different from the GM information carried in the parent-announce message received at the previous time, the communication port in the device that is not in the master state is directly switched to the master state.
  • the BC device determines, according to the GM identification information carried in the parent-announce message received at the current time, the GM identifier carried in the parent-announce message received at the current time.
  • the communication port whose current state is not in the master state is skipped from the pre-Master state and directly switched to the master state.
  • the GM information carried in the announce message received by the BC device is different from the GM identification information carried in the received message received at the previous time, the original GM information has been cleared from the current network. Therefore, After the pre-Master state waits, the ring is not introduced. In this way, the time for the PTP time synchronization network to perform the state switching of the communication port of the BC device is reduced, and the stability of the PTP time synchronization network is ensured.
  • FIG. 1 is a schematic diagram of a possible topology structure of a PTP time synchronization network in the prior art
  • FIG. 2 is a schematic flowchart of a time synchronization method implementation process according to an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a time synchronization device according to an embodiment of the present invention. detailed description
  • the embodiment of the present invention provides a clock synchronization method and device, and the basic idea is that
  • the border clock BC device receives the announce message carrying the grandmother's clock GM identification information; the BC device confirms that it needs to perform the communication port state switching at the current time, and determines the GM carried in the parent-announce message received at the current time.
  • the identification information is different from the GM information carried in the parent-announce message received at the previous time, the communication port whose current time is in the non-master master state is directly switched to the master state.
  • the clock synchronization method and device provided by the embodiments of the present invention are applicable to the case where the topology of the PTP time synchronization network is linear, and also applies to a network segment when the topology of the PTP time synchronization network is nonlinear.
  • the topology of the PTP time synchronization network is linear as an example for description.
  • the link between the device and the BC3 device is faulty.
  • the BC3 device cannot receive the announce message from the BC2 device, so that the GN clock information cannot be obtained.
  • the BC3 device considers that the GM is lost and goes to its own downstream device BC4.
  • BC5, BC6 and BC7 pass the GM loss message, and the GM is selected by starting the BMC algorithm, and the selected GM is the device with the best clock quality in the current network.
  • the OC2 device clock in FIG. 1 is selected as the GM.
  • the selected OC2 device transmits its own clock information to the BC7 device connected to itself, and transmits its own clock information, so that the BC7 is consistent with its own clock.
  • the BC7 device will enter the communication port state switching phase. Since BC7 is the end device in the original network topology, the communication port state of the BC7 device is Slave. For BC7, the current Slave port status needs to be switched to the Master status. If there is a loop in the current link, the BC7 may still receive the announce message sent by the upstream device at the current time. The announce message carries the original GM identification information, but the GM has actually failed due to the link failure. Failure, may cause BC7 to track the wrong GM.
  • the pre-Master state is added for transition to avoid the existence of a ring in the network. That is, when the BC7 performs communication port state switching, the Slave state is not immediately switched to In the master state, the pre-Master state is entered first, and the pre-Master state continues for a certain period of time before entering the master state.
  • /3 ⁇ 4 () ;
  • r is the hop count of the device sending the announce message to the primary GM device or the standby GM device.
  • the ⁇ time synchronization network has a total of 7 BC devices, assuming that the announcement interval is 2s.
  • an embodiment of the present invention provides a clock synchronization method and device.
  • the preferred embodiments of the present invention are described in conjunction with the accompanying drawings, and the preferred embodiments described herein are only to illustrate and explain the present invention, and are not intended to limit the present invention, and
  • the flowchart of the implementation of the clock synchronization method provided by the embodiment of the present invention includes the following steps:
  • BC (Boundary Clock) device receives the announce message carrying the identification information of the GM (Grandmother Clock);
  • the BC device receives the announce message sent by the upstream device, and the announce message carries the identifier information of the GM.
  • the BC device determines that the GM information carried in the parent-announce message received by the current time is different from the GM information carried in the parent-announce message received at the current time, the current time in the control itself is not the master.
  • the communication port in the (main) state is directly switched from the non-Master state to the Master state.
  • the BC device when the BC device detects that the current GM is lost, or the BC device detects that the topology of the network where the BC device is changed, it confirms that it needs to perform communication port state switching. In addition, when the BC device senses that the current GM device clock quality is degraded, it can also confirm that it needs to perform communication port state switching.
  • the non-Master state involved in the embodiment of the present invention includes, but is not limited to, a Slave state,
  • the BC device determines that the identifier information of the GM device carried in the received parent-announce message is different from the identifier information of the GM device carried in the parent-announce message received at the previous time, the current local network is original. The identification information of the GM device has been cleared.
  • the communication port in the non-Master state can be controlled to be immediately switched. The status of the master and the communication port in the master state are switched from the master state to the slave state.
  • the time synchronization method may further include:
  • the BC device determines that the GM information carried in the parent-announce message received by the current time is the same as the GM information carried in the parent-announce message received at the previous time, the communication port in the non-Master state is controlled in the current time. Enter the Pre-master state.
  • the clock synchronization method may further include:
  • the BC device detects whether the length of the communication port in the Pre-master state is in the Pre-master state has reached the set value
  • the BC device controls its own communication port in the pre-Master state to be switched from the pre-Master state to the Master state.
  • the clock synchronization method provided by the embodiment of the present invention may also include that when the port of the GM device in the PTP network enters the master state, the GM device tracks the clock source outside the PTP time synchronization network, and therefore does not need to go through the pre-Master state. .
  • the BC device determines the GM identity information carried in the parent-announce message and the GM carried in the parent-announce message received at the previous time.
  • the identification information is different, it indicates that the GM information of the previous moment has been cleared in the current local network.
  • the BC device does not track the wrong clock source. Therefore, when performing communication port state switching, the pre-Master state of the intermediate transition can be skipped. Since the pre-Master state of the intermediate transition is skipped, the time for the communication port state switching of each device is reduced in the PTP time synchronization network, thereby reducing the stability of the PTP time synchronization network. Time, to ensure the stability of the PTP time synchronization network.
  • a time synchronization device is also provided in the embodiment of the present invention. Since the time synchronization device solves the problem is similar to the time synchronization method, the implementation of the device can refer to the implementation of the method, and the repetition is no longer Narration.
  • a possible structural diagram of a time synchronization device provided by the implementation of the present invention includes:
  • the receiving module 301 is configured to receive an announce message carrying the grandmother clock GM identification information
  • the first switching module 302 is configured to determine, when the device needs to perform the state transition of the communication port at the current moment, and determine the identifier information of the GM carried in the parent-announce message received at the current time and the parent announce received at the previous moment. If the GM information in the packet is different, the communication port in the device that is not in the master state is directly switched to the master state.
  • the first switching module 302 can be used to confirm that the device needs to perform communication port state switching when detecting that the current GM of the device is lost, or when detecting that the topology of the network where the device is located changes. In addition, when the first switching module 302 senses that the current GM device clock quality is degraded, it can also confirm that the device needs to perform communication port state switching.
  • the time synchronization device may further include:
  • the pre-replacement module is configured to control the current time in the parent to be in the non-Master state when the GM information carried in the parent-announce message received by the current time is the same as the GM information carried in the parent-announce message received at the previous time.
  • the communication port enters the Pre-master state.
  • the time synchronization device may further include:
  • a detecting module configured to detect whether a duration of the communication port in the Pre-master state is in a Pre-master state reaches a set value;
  • the second switching module is configured to control the communication port in the pre-Master state of the device to be switched from the pre-Master state to the master state when the duration of the Pre-master state is reached.
  • the BC device determines, according to the GM identification information carried in the parent-announce message received at the current time, the GM identifier carried in the parent-announce message received at the current time.
  • the communication port whose current state is not in the master state is skipped from the pre-Master state and directly switched to the master state.
  • the GM information carried in the announce message received by the BC device is different from the GM identification information carried in the received message received at the previous time, the original GM information has been cleared from the current network. Therefore, After the pre-Master state waits, the ring is not introduced. In this way, the time for the PTP time synchronization network to perform the state switching of the communication port of the BC device is reduced, and the stability of the PTP time synchronization network is ensured.
  • embodiments of the present invention can be provided as a method, system, or computer program product.
  • the present invention can take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware.
  • the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)

Abstract

L'invention propose un procédé de synchronisation par rapport à l'horloge comprenant les étapes suivantes : un dispositif d'horloge limite (BC) reçoit un message d'annonce porteur d'une information d'identification d'horloge maîtresse (GM) ; lors de la détermination de la nécessité d'un commutateur d'état du port de communication au moment actuel, et de la détermination que l'information d'identification de GM portée dans le message d'annonce du parent reçu au moment actuel est différente de l'information d'identification de GM portée dans le message d'annonce du parent reçu au moment précédent, le dispositif BC commande le passage de son port de communication dans l'état non-maître au moment actuel directement à l'état maître ; la présente invention propose également un dispositif de synchronisation par rapport à l'horloge. Les solutions de la présente invention dans le réseau de synchronisation par rapport à l'horloge PTP permettent de réduire le temps nécessaire par le commutateur d'état du port de communication pour chaque dispositif et de garantir la stabilité du réseau de synchronisation par rapport à l'horloge.
PCT/CN2012/073487 2011-05-31 2012-04-01 Procédé et dispositif de synchronisation par rapport à l'horloge Ceased WO2012163172A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201110143932.8 2011-05-31
CN201110143932.8A CN102215101B (zh) 2011-05-31 2011-05-31 一种时钟同步方法及设备

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CN102215101B (zh) * 2011-05-31 2015-09-16 中兴通讯股份有限公司 一种时钟同步方法及设备
CN102355346B (zh) * 2011-10-13 2018-02-09 中兴通讯股份有限公司 一种时钟同步源设备有效性判定方法及装置
CN103428081A (zh) * 2012-05-14 2013-12-04 中兴通讯股份有限公司 一种分组网络同步方法、装置及系统
CN103023595B (zh) * 2012-06-08 2017-07-21 中兴通讯股份有限公司 一种最佳主时钟算法的实现方法及装置
CN102843205B (zh) * 2012-09-03 2015-08-12 杭州华三通信技术有限公司 一种基于精确时间协议的时间同步收敛的方法和装置
CN103259639B (zh) * 2013-05-24 2016-03-02 杭州华三通信技术有限公司 一种堆叠设备的时钟同步方法和设备
CN106301643B (zh) * 2015-05-15 2018-10-30 华为技术有限公司 一种用于配置时钟跟踪的方法及控制设备
CN106549724A (zh) * 2015-09-16 2017-03-29 中国移动通信集团公司 一种时间同步报文的处理方法及装置
CN106131437A (zh) * 2016-08-25 2016-11-16 武汉烽火众智数字技术有限责任公司 一种多网络摄像机时间同步方法和系统
CN111447673B (zh) * 2020-04-03 2022-06-10 南京大鱼半导体有限公司 无线自组网的同步方法、装置、存储介质及其节点
CN116633476A (zh) * 2023-05-31 2023-08-22 国电南瑞南京控制系统有限公司 一种基于直流irig-b码时源定位的时间同步方法及系统
CN116684024B (zh) * 2023-05-31 2024-06-04 中国科学院空间应用工程与技术中心 Fc-ae-1553边界时钟端口状态配置方法及系统
CN116599871B (zh) * 2023-07-14 2023-10-03 腾讯科技（深圳）有限公司 一种网络时延的确定方法和相关装置

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