[go: up one dir, main page]

WO2012157480A1 - Transistor à effet de champ - Google Patents

Transistor à effet de champ Download PDF

Info

Publication number
WO2012157480A1
WO2012157480A1 PCT/JP2012/061840 JP2012061840W WO2012157480A1 WO 2012157480 A1 WO2012157480 A1 WO 2012157480A1 JP 2012061840 W JP2012061840 W JP 2012061840W WO 2012157480 A1 WO2012157480 A1 WO 2012157480A1
Authority
WO
WIPO (PCT)
Prior art keywords
longitudinal direction
drain electrode
electrode
source electrode
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2012/061840
Other languages
English (en)
Japanese (ja)
Inventor
吐田　真一
哲三 永久
眞一 里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of WO2012157480A1 publication Critical patent/WO2012157480A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/257—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/256—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies

Definitions

  • the present invention relates to a GaN-based HFET (heterojunction field effect transistor).
  • a source electrode 301 and a drain electrode 302 each having a comb finger structure are disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 2010-186925). Yes.
  • the source electrode 301 includes a plurality of source electrode fingers 303 and a source connection portion 305 to which one ends of the plurality of source electrode fingers 303 are connected.
  • the drain electrode 302 is composed of a plurality of drain electrode fingers 306 and a drain connection portion 307 to which one ends of the plurality of drain electrode fingers 306 are connected.
  • the gate electrode disposed between the drain electrode finger 306 and the source electrode finger 303 is omitted.
  • This GaN-based HFET has a plurality of source electrode fingers 303 and drain electrode fingers 306 and has a comb-shaped finger structure, thereby realizing a power device capable of large current operation.
  • a GaN-based HFET having a high breakdown voltage of 600 V or more has been obtained as a static breakdown voltage (off breakdown voltage) at the time of OFF.
  • This static off breakdown voltage is such that in a normally-on GaN HFET, when -10 V is continuously applied to the gate electrode, 0 V is applied to the source electrode and what voltage is applied to the drain electrode. Represents the dielectric breakdown.
  • the dielectric breakdown at the static off breakdown voltage occurs in a region where the source electrode finger 303 and the drain electrode finger 306 face each other as shown in FIG.
  • the dynamic breakdown voltage during the switching operation associated with the short-circuit withstand voltage is one third to one fourth of the static breakdown voltage when OFF. Faced with a problem.
  • the voltage applied to the source electrode is 0 (V)
  • the voltage applied to the drain electrode is voltage X (V)
  • ⁇ 10 (V) is applied to the gate electrode.
  • a pulse wave of 0 V with a pulse width of 5 ⁇ s was applied to the gate electrode for only one pulse to turn it on to observe whether or not the device was destroyed.
  • the voltage X (V) applied to the drain electrode is increased by 10 V, for example, 100 V, 110 V, 120 V,..., And the above experiment is performed at each drain applied voltage X (V), and dielectric breakdown occurs.
  • the voltage X (V) leading to is measured.
  • the dielectric breakdown voltage X (V) obtained in the experiment by applying the pulse wave is referred to as a dynamic breakdown voltage.
  • the dynamic withstand voltage is 1 ⁇ 4 (150 V) of the static off-state withstand voltage although the static off-state withstand voltage is 600V. It has been found that an unexpected phenomenon has occurred.
  • the sample after this experiment was analyzed, it was observed that dielectric breakdown occurred at the end of the drain electrode.
  • the interval between the end 306A of the drain electrode finger 306 and the source connection portion 305 is longer than the interval between the drain electrode finger 306 and the source electrode finger 303 (for example, 1.5 times). For this reason, it was unexpected that dielectric breakdown occurred at the end of the drain electrode.
  • the present inventors have made various estimations about the decrease in the dynamic breakdown voltage, which is a dynamic breakdown voltage with respect to the static off breakdown voltage, and estimated as follows. That is, due to the influence of the temporal change of the electric field due to the switching operation when a pulse wave is applied to the gate electrode, current is locally concentrated as illustrated by arrow Y in FIG. It was thought that dielectric breakdown occurred. That is, it was considered that the decrease in the dynamic withstand voltage was affected by current concentration during switching.
  • an object of the present invention is to provide a GaN-based HFET that can suppress a decrease in dynamic breakdown voltage, which is a dynamic breakdown voltage.
  • the present inventors have found that the fact that the electron current is concentrated at the end of the drain electrode as described above is the cause of the decrease.
  • the inventors have invented a structure that suppresses the concentration of the electron current to the end of the drain electrode, and the structure of the present invention has obtained an effective result for suppressing the decrease in dynamic breakdown voltage.
  • the field effect transistor of the present invention includes a GaN-based laminate having a heterojunction, A finger-like drain electrode formed on the GaN-based laminate; On the GaN-based laminate, the drain electrode is formed so as to be adjacent to the longitudinal direction, which is the direction in which the drain electrode extends in a finger shape, and in the longitudinal direction.
  • Extending finger-like source electrode and In plan view, comprising a gate electrode formed between the drain electrode and the source electrode,
  • the length in the longitudinal direction of the source electrode is the same as the length in the longitudinal direction of the drain electrode, or the length in the longitudinal direction of the source electrode is shorter than the length in the longitudinal direction of the drain electrode,
  • An imaginary line extending in a short direction perpendicular to the longitudinal direction from one end in the longitudinal direction of the source electrode is in contact with the drain electrode or intersects the drain electrode
  • a virtual line extending from the other end in the longitudinal direction of the source electrode in a short direction perpendicular to the longitudinal direction is in contact with the drain electrode or intersects the drain electrode.
  • the length in the longitudinal direction of the source electrode is equal to the length in the longitudinal direction of the drain electrode, or the length in the longitudinal direction of the source electrode is less than the length in the longitudinal direction of the drain electrode.
  • a virtual line extending from one end and the other end in the longitudinal direction of the source electrode in a short direction perpendicular to the longitudinal direction is in contact with the drain electrode or intersects the drain electrode.
  • both ends of the source electrode in the longitudinal direction do not protrude outward in the longitudinal direction from both ends of the drain electrode in the longitudinal direction. It is assumed that the electron flow is less likely to concentrate from the end of the electrode toward the end of the drain electrode.
  • both ends or one end of the source electrode in the longitudinal direction is longer than the both ends in the longitudinal direction of the drain electrode as in the case where the length in the longitudinal direction of the source electrode is longer than the length in the longitudinal direction of the drain electrode.
  • the dynamic breakdown voltage is remarkably reduced as compared with the configuration of the present invention.
  • the chip area can be reduced by the three-dimensional structure in which the source wiring electrically connected through the through hole is arranged on the source electrode.
  • each of the finger-shaped drain electrode and the finger-shaped source electrode comprises a plurality of, The plurality of finger-shaped drain electrodes and the plurality of finger-shaped source electrodes are alternately arranged in a direction intersecting the longitudinal direction, Furthermore, a drain wiring formed on the insulating layer is provided, The drain electrode is The drain wiring is electrically connected through a through hole formed in the insulating layer.
  • the three-dimensional structure in which the drain wiring and the source wiring electrically connected through the through-holes on the drain electrode and the source electrode are arranged, and the chip area can be reduced.
  • the both ends of the source electrode in the longitudinal direction do not protrude outward in the longitudinal direction from both ends in the longitudinal direction of the drain electrode.
  • the dynamic electric field fluctuation at the time makes it difficult for the electron flow to concentrate from the end of the source electrode on both sides to the end of the central drain electrode, so that the dynamic breakdown voltage can be remarkably improved.
  • the gate electrode is in a plan view. It extends in the longitudinal direction between the finger-shaped drain electrode and the finger-shaped source electrode, and extends so as to surround an end portion in the longitudinal direction of the drain electrode.
  • the gate electrode extends so as to surround the end of the drain electrode in the longitudinal direction, concentration of the electric field at the end of the drain electrode can be suppressed during the off-breakdown voltage test, The static off breakdown voltage can be improved.
  • a two-dimensional electron gas removal region in which a two-dimensional electron gas is not present in a GaN-based laminate below a region adjacent to the longitudinal end of the finger-shaped source electrode in the longitudinal direction. Is formed.
  • the end of the drain electrode is extended from the end of the source electrode during the dynamic withstand voltage test. As a result, it becomes difficult to concentrate the electron flow toward the portion, and the dynamic breakdown voltage can be improved.
  • the region adjacent to the longitudinal end of the finger-shaped source electrode on the outer side in the longitudinal direction means that the gap between the longitudinal ends of the finger-shaped source electrode is not disposed on the outer side in the longitudinal direction. It means a region in contact with each other or a region adjacent to the end of the finger-shaped source electrode in the longitudinal direction with a slight gap outside in the longitudinal direction.
  • the slight gap is, for example, 20 ⁇ m or less.
  • the two-dimensional electron gas removal region can be manufactured by forming a recess in the GaN-based stacked body or implanting impurities.
  • the length in the longitudinal direction of the source electrode is the same as or shorter than the length in the longitudinal direction of the drain electrode, and both ends in the longitudinal direction of the source electrode are longer in the longitudinal direction than both ends in the longitudinal direction of the drain electrode.
  • the dynamic breakdown voltage which is a dynamic breakdown voltage, can be improved by the configuration in which it does not protrude outward.
  • FIG. 1 is a schematic plan view of a GaN HFET according to a first embodiment of the present invention. It is a figure which shows the BB line cross section of FIG. It is a figure which shows the AA sectional view of FIG. It is a plane schematic diagram of GaN-HFET which is 2nd Embodiment of this invention.
  • FIG. 5 is a diagram showing a part of a cross section taken along the line CC of FIG. 4.
  • FIG. 5 is a diagram showing a part of a cross section along the line DD in FIG. 4.
  • FIG. 8 is a cross-sectional view taken along line FF in FIG. 7. It is a plane schematic diagram which shows the modification of the said 2nd Embodiment. It is a plane schematic diagram which shows the comparative example of the said 1st Embodiment. It is a figure which shows the pressure
  • FIG. 1 is a schematic plan view of a GaN HFET according to a first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along line BB in FIG.
  • FIG. 3 is a view showing a cross section taken along line AA of FIG.
  • an undoped GaN layer 2 and an undoped AlGaN layer 3 are formed on a Si substrate 1.
  • the undoped GaN layer 2 and the undoped AlGaN layer 3 constitute a GaN-based laminate 5 having a heterojunction.
  • 2DEG (two-dimensional electron gas) 6 is generated at the interface between the undoped GaN layer 2 and the undoped AlGaN layer 3.
  • a protective film 7 and an interlayer insulating film 8 are sequentially formed on the GaN-based laminate 5.
  • the material of the interlayer insulating film 8 for example, polyimide is used here, but an insulating material such as SOG (Spin On Glass) or BPSG (Boron Phosphorous Silicate Glass) may be used.
  • the thickness of the SiN protective film 7 is 150 nm as an example here, but may be set in the range of 20 nm to 250 nm.
  • a recess reaching the undoped GaN layer 2 is formed in the GaN-based laminate 5, and a drain electrode 11 and a source electrode 12 are formed as ohmic electrodes in the recess.
  • the drain electrode 11 and the source electrode 12 are Ti / Al / TiN electrodes in which a Ti layer, an Al layer, and a TiN layer are sequentially stacked.
  • An opening is formed in the protective film 7, and a gate electrode 13 is formed in the opening.
  • the gate electrode 13 is made of, for example, TiN, and is formed as a Schottky electrode that forms a Schottky junction with the undoped AlGaN layer 3.
  • a drain wiring 15 is formed on the interlayer insulating film 8.
  • a through hole 17 is formed in the interlayer insulating film 8, and the drain wiring 15 is electrically connected to the drain electrode 11 through the through hole 17.
  • a source wiring 20 is formed on the interlayer insulating film 8.
  • a through hole 18 is formed in the interlayer insulating film 8, and the source wiring 20 is electrically connected to the source electrode 12 through the through hole 18.
  • Ti / Au or Ti / Al is used as the drain wiring 15 and the source wiring 20.
  • this embodiment includes three finger-shaped drain electrodes 11 and four finger-shaped source electrodes 12.
  • the drain electrode 11 and the source electrode 12 are alternately arranged at a predetermined interval in a short direction perpendicular to a direction in which the drain electrode 11 and the source electrode 12 extend in the longitudinal direction in a finger shape. Has been.
  • the drain electrode 11 and the source electrode 12 extend substantially in parallel with each other.
  • the length L2 in the longitudinal direction of each source electrode 12 and the length L1 in the longitudinal direction of each drain electrode 11 are the same length.
  • virtual lines M1 and M2 extending from both ends 12A and 12B in the longitudinal direction of the source electrode 12 in a short direction perpendicular to the longitudinal direction are in contact with the ends 11A and 11B of the drain electrode 11. That is, the longitudinal positions of the longitudinal ends 12A and 12B of the source electrode 12 coincide with the longitudinal positions of the longitudinal ends 11A and 11B of the drain electrode 11.
  • the gate electrode 13 includes, in plan view, a longitudinally extending portion 13A and a curved portion 13B extending in the longitudinal direction between the finger-shaped drain electrode 11 and the finger-shaped source electrode 12. 13C.
  • the curved portion 13B extends so as to surround the end 11A of the drain electrode 11 in plan view, and is connected to one end of two longitudinally extending portions 13A adjacent to each other with the drain electrode 11 interposed therebetween.
  • the curved portion 13C extends so as to surround the end 11B of the drain electrode 11 in plan view, and is connected to the other ends of the two longitudinally extending portions 13A adjacent to each other with the drain electrode 11 interposed therebetween. Yes.
  • each longitudinally extending portion 13 ⁇ / b> A of the gate electrode 13 has a shorter distance from the source electrode 12 than a shorter distance from the drain electrode 11.
  • the GaN HFET having the above configuration is a normally-on type, and is turned off by applying a negative voltage to the gate electrode 13.
  • FIG. 12 shows the breakdown voltage test results of the GaN HFET of this embodiment and the GaN HFET of the comparative example.
  • This comparative example differs from the present embodiment only in that a source electrode 212 is provided instead of the source electrode 12 as shown in FIG. That is, in this comparative example, the source electrode 212 surrounds the longitudinally extending portion 212A corresponding to the source electrode 12 and the curved portion 13B of the gate electrode 13 from one end in the longitudinal direction of the longitudinally extending portion 212A. And a curved portion 212C extending from the other longitudinal end of the longitudinal extension portion 212A so as to surround the curved portion 13C of the gate electrode 13. .
  • a short distance D1 between the drain electrode 11 and the longitudinal extension 212A of the source electrode 212 and a longitudinal distance between the end 11A of the drain electrode 11 and the curved portion 212B of the source electrode 12 are described.
  • the ratio of the distance D2 in the direction is 1: 1.5, and the distance D2 in the longitudinal direction between the end 11A of the drain electrode 11 and the curved portion 212B of the source electrode 212 is the drain electrode 11 and the source electrode 212. 1.5 times as long as the distance D1 in the short-side direction from the longitudinally extending portion 212A.
  • the static off breakdown voltage of the comparative GaN-HFET was 600 V as shown in FIG. This static off breakdown voltage is short-circuited when 0 V is applied to the source electrode 212 and a voltage of several volts is applied to the drain electrode 11 in the off state where -10 V is continuously applied to the gate electrode 13 ( Indicates whether or not it will result in dielectric breakdown. With this static off breakdown voltage, a short circuit occurred between the longitudinal extension 212 ⁇ / b> A of the source electrode 212 and the drain electrode 11. On the other hand, the dynamic withstand voltage of this comparative example was 150V, which was reduced to a quarter of the static off withstand voltage of 600V.
  • the dynamic breakdown voltage is an on-state in which the voltage applied to the source electrode is 0 (V), the voltage applied to the drain electrode is the voltage X (V), and ⁇ 10 (V) is applied to the gate electrode. Then, a pulse wave of 0V with a pulse width of 5 ⁇ s is applied to the gate electrode for only one pulse to turn it on, and an experiment for observing whether or not the device is broken is performed.
  • the voltage X (V) applied to the drain electrode is increased by 10 V, for example, 100 V, 110 V, 120 V,..., And the above experiment is performed at each drain applied voltage X (V) to make a short circuit ( The voltage X (V) leading to dielectric breakdown) was measured.
  • the dynamic breakdown voltage which is a dynamic breakdown voltage
  • the sample after this experiment was analyzed, it was observed that dielectric breakdown occurred at the ends 11A and 11B of the drain electrode 11.
  • voltage in the said comparative example it estimates as follows. That is, when the electric field is temporally changed by the switching operation when the pulse wave is applied to the gate electrode 13, the current is locally concentrated, and the dielectric breakdown occurs at the ends 11A and 11B of the drain electrode 11. Conceivable. That is, it is imagined that this withstand voltage drop is influenced by dynamic electric field fluctuations during switching.
  • the dynamic breakdown voltage of the GaN-HFET of this embodiment is 250 V, which is 60% or more higher than the dynamic breakdown voltage of 150 V in the comparative example.
  • the static off breakdown voltage of this embodiment is 600 V, which is the same as the comparative example.
  • the longitudinal ends 12A, 12B of the source electrode 12 do not protrude outward in the longitudinal direction from the longitudinal ends 11A, 11B of the drain electrode 11. It is assumed that it is possible to avoid the concentration of electron flow from the source electrode 12 toward the ends 11A and 11B of the drain electrode 11.
  • the gate electrode 13 extends so as to surround the longitudinal ends 11A and 11B of the drain electrode 11 by the curved portions 13B and 13C.
  • the concentration of the electric field on the end portions 11A and 11B of the electrode 11 can be suppressed, and the static off breakdown voltage can be improved.
  • both ends 12A, 12B in the longitudinal direction of the source electrode 12 are more than both ends 11A, 11B in the longitudinal direction of the drain electrode 11.
  • the concentration of the electron flow from the source electrode 12 on both sides to the end of the central drain electrode 11 hardly occurs due to the dynamic electric field fluctuation at the time of switching. Dynamic breakdown voltage can be improved.
  • the length L2 of each source electrode 12 in the longitudinal direction is the same as the length L1 of each drain electrode 11 in the longitudinal direction, and ends 12A, 12A, Although the position in the longitudinal direction of 12B coincides with the position in the longitudinal direction of the longitudinal ends 11A and 11B of the drain electrode 11, the length in the longitudinal direction of the source electrode 12 is the length in the longitudinal direction of the drain electrode 11. It may be shorter than this.
  • the source electrode and the drain electrode are arranged so that a virtual line extending in a short direction perpendicular to the longitudinal direction from both ends 12A, 12B in the longitudinal direction of the source electrode 12 intersects the drain electrode 11.
  • the short side direction from one of the longitudinal ends 12A and 12B of the source electrode 12 is determined.
  • An imaginary line extending in the longitudinal direction of the drain electrode 11 may be in contact with the longitudinal end of the drain electrode 11, and an imaginary line extending in the short direction from the other of the both ends 12 ⁇ / b> A and 12 ⁇ / b> B may intersect the drain electrode 11.
  • FIG. 4 is a schematic plan view of a GaN HFET according to the second embodiment of the present invention.
  • FIG. 5 is a cross-sectional view taken along the line CC of FIG.
  • FIG. 6 is a cross-sectional view taken along the line DD of FIG.
  • an undoped GaN layer 52 and an undoped AlGaN layer 53 are formed on a Si substrate 51.
  • the undoped GaN layer 52 and the undoped AlGaN layer 53 constitute a GaN-based stacked body 55 having a heterojunction.
  • 2DEG (two-dimensional electron gas) 56 is generated at the interface between the undoped GaN layer 52 and the undoped AlGaN layer 53.
  • a protective film 57 and an interlayer insulating film 58 are sequentially formed on the GaN-based stacked body 55.
  • SiN is used as the material of the protective film 57, but SiO 2 , Al 2 O 3, or the like may be used.
  • the material of the interlayer insulating film 58 for example, polyimide is used here, but an insulating material such as SOG or BPSG may be used.
  • the thickness of the SiN protective film 57 is 150 nm as an example, but may be set in the range of 20 nm to 250 nm.
  • a recess reaching the undoped GaN layer 52 is formed in the GaN-based laminate 55, and a drain electrode 61 and a source electrode 62 are formed as ohmic electrodes in the recess.
  • the drain electrode 61 and the source electrode 62 are Ti / Al / TiN electrodes in which a Ti layer, an Al layer, and a TiN layer are sequentially stacked.
  • An opening is formed in the protective film 57, and a gate electrode 63 is formed in the opening.
  • the gate electrode 63 is made of, for example, TiN, and is formed as a Schottky electrode that forms a Schottky junction with the undoped AlGaN layer 53.
  • a drain wiring 65 is formed on the interlayer insulating film 58.
  • a through hole 67 is formed in the interlayer insulating film 58, and the drain wiring 65 is electrically connected to the drain electrode 61 through the through hole 67.
  • another drain wiring 72 is formed on the protective film 57, and this drain wiring 72 is electrically connected to the drain wiring 65 through a through hole 71 formed in the interlayer insulating film 58.
  • a source wiring 73 is formed on the interlayer insulating film 58.
  • a through hole 68 is formed in the interlayer insulating film 58, and the source wiring 73 is electrically connected to the source electrode 62 through the through hole 68.
  • another source wiring 75 is formed on the protective film 57, and this source wiring 75 is electrically connected to the source wiring 73 through a through hole 76 formed in the interlayer insulating film 58.
  • As the drain wirings 65 and 72 and the source wirings 73 and 75 Ti / Au or Ti / Al is used.
  • this embodiment includes three finger-shaped drain electrodes 61 and four finger-shaped source electrodes 62.
  • the drain electrode 61 and the source electrode 62 are alternately arranged at a predetermined interval in a short direction perpendicular to a direction in which the drain electrode 61 and the source electrode 62 extend in the longitudinal direction in a finger shape.
  • the drain electrode 61 and the source electrode 62 extend substantially in parallel with each other.
  • the length L52 in the longitudinal direction of each source electrode 62 is shorter than the length L51 in the longitudinal direction of each drain electrode 61.
  • Virtual lines M21 and M22 extending from the longitudinal ends 62A and 62B of the source electrode 62 in the lateral direction perpendicular to the longitudinal direction intersect with the drain electrode 61. That is, both longitudinal ends 61A and 61B of the drain electrode 61 protrude outward in the longitudinal direction from the longitudinal positions of the longitudinal ends 62A and 62B of the source electrode 62.
  • the gate electrode 63 includes a longitudinally extending portion 63A and a curved portion 63B extending in the longitudinal direction between the finger-shaped drain electrode 61 and the finger-shaped source electrode 62 in plan view. It has a short direction extending portion 63C.
  • the curved portion 63B extends so as to surround the end 61A of the drain electrode 61, and continues to one end of two adjacent longitudinally extending portions 63A with the drain electrode 61 interposed therebetween.
  • the short-side extending portion 63C extends in the short-side direction with a predetermined distance from the end 61B of each drain electrode 61, and is connected to the other end of each long-side extending portion 63A. .
  • each longitudinally extending portion 63 ⁇ / b> A of the gate electrode 63 has a shorter distance from the source electrode 62 than a shorter distance from the drain electrode 61.
  • the GaN HFET having the above configuration is a normally-on type, and is turned off by applying a negative voltage to the gate electrode 13.
  • the breakdown voltage experimental result of the GaN HFET of the second embodiment is improved over the GaN HFET of the first embodiment described above, the static off breakdown voltage is 600V, and the dynamic breakdown voltage is 260V.
  • the above comparison shown in FIG. Compared to the dynamic breakdown voltage of 150 V in the example, it was improved by 70% or more.
  • both ends 62A, 62B in the longitudinal direction of the source electrode 62 are retracted inward in the longitudinal direction from both ends 61A, 61B in the longitudinal direction of the drain electrode 61. It is assumed that the configuration can avoid the concentration of electron flow from the source electrode 62 toward the ends 61A and 61B of the drain electrode 61.
  • the gate electrode 63 extends so as to surround the longitudinal ends 61A and 61B of the drain electrode 61 by the curved portion 63B and the short-side extending portion 63C. It is considered that the concentration of the electric field on the ends 61A and 61B of the drain electrode 61 can be suppressed during the off breakdown voltage test, and the static off breakdown voltage can be improved.
  • both ends 62A and 62B in the longitudinal direction of the source electrode 62 are more than both ends 61A and 61B in the longitudinal direction of the drain electrode 61.
  • the structure that does not protrude outward in the longitudinal direction makes it difficult to concentrate the electron flow from the source electrode 62 on both sides to the end of the central drain electrode 61 due to dynamic electric field fluctuations at the time of switching. Dynamic breakdown voltage can be improved.
  • the source electrode 62 is arranged so that both the virtual lines M21 and M22 extending in the short direction from the longitudinal ends 62A and 62B of the source electrode 62 intersect the drain electrode 61.
  • an imaginary line extending from one of both ends 62A and 62B of the source electrode 62 in the short direction intersects the drain electrode 61, it extends from the other of both ends 62A and 62B in the short direction.
  • the source electrode 62 may be arranged so that the virtual line is in contact with the end 61 ⁇ / b> A or 61 ⁇ / b> B in the longitudinal direction of the drain electrode 61.
  • each source electrode 62 in the longitudinal direction is the same as the length L51 of each drain electrode 61 in the longitudinal direction, and the longitudinal ends 62A and 62B of each source electrode 62 are The longitudinal position may coincide with the longitudinal positions of the longitudinal ends 61A and 61B of the drain electrode 61.
  • FIG. 7 is a schematic plan view of a GaN HFET according to the third embodiment of the present invention.
  • FIG. 8 is a cross-sectional view taken along the line EE of FIG.
  • FIG. 9 is a cross-sectional view taken along line FF in FIG.
  • an undoped GaN layer 82 and an undoped AlGaN layer 83 are formed on a Si substrate 81.
  • the undoped GaN layer 82 and the undoped AlGaN layer 83 constitute a GaN-based stacked body 85 having a heterojunction.
  • 2DEG (two-dimensional electron gas) 86 is generated at the interface between the undoped GaN layer 82 and the undoped AlGaN layer 83.
  • a protective film 87 and an interlayer insulating film 88 are sequentially formed on the GaN-based stacked body 85.
  • SiN is used as the material of the protective film 87, but SiO 2 , Al 2 O 3, or the like may be used.
  • the interlayer insulating film 88 for example, polyimide is used here, but an insulating material such as SOG or BPSG may be used.
  • the thickness of the SiN protective film 87 is 150 nm as an example here, but may be set in the range of 20 nm to 250 nm.
  • a recess reaching the undoped GaN layer 82 is formed in the GaN-based laminate 85, and a drain electrode 91 and a source electrode 92 are formed as ohmic electrodes in the recess.
  • the drain electrode 91 and the source electrode 92 are Ti / Al / TiN electrodes in which a Ti layer, an Al layer, and a TiN layer are sequentially stacked.
  • An opening is formed in the protective film 87, and a gate electrode 93 is formed in the opening.
  • the gate electrode 93 is made of, for example, TiN, and is formed as a Schottky electrode that forms a Schottky junction with the undoped AlGaN layer 83.
  • a drain wiring 95 is formed on the interlayer insulating film 88.
  • a through hole 97 is formed in the interlayer insulating film 88, and the drain wiring 95 is electrically connected to the drain electrode 91 through the through hole 97.
  • the source wiring 103 is formed on the interlayer insulating film 88.
  • a through hole 98 is formed in the interlayer insulating film 88, and the source wiring 103 is electrically connected to the source electrode 92 through the through hole 98.
  • Ti / Au or Ti / Al is used as the drain wiring 95 and the source wiring 103.
  • the third embodiment includes three finger-shaped drain electrodes 91 and four finger-shaped source electrodes 92.
  • the drain electrode 91 and the source electrode 92 are alternately arranged with a predetermined interval in a short direction perpendicular to the direction in which the drain electrode 91 and the source electrode 92 extend in the longitudinal direction in a finger shape. Has been.
  • the drain electrode 91 and the source electrode 92 extend substantially in parallel to each other.
  • the length L92 of each source electrode 92 in the longitudinal direction and the length L91 of each drain electrode 91 in the longitudinal direction are the same length.
  • imaginary lines M31 and M32 extending from the longitudinal ends 92A and 92B of the source electrode 92 in the lateral direction perpendicular to the longitudinal direction are in contact with both ends 91A and 91B of the drain electrode 91. That is, the longitudinal positions of the longitudinal ends 92A, 92B of the source electrode 92 coincide with the longitudinal positions of the longitudinal ends 91A, 91B of the drain electrode 91.
  • both ends 91A and 91B of each drain electrode 91 have a curved shape that protrudes outward in the longitudinal direction.
  • the gate electrode 93 has a longitudinally extending portion 93A and curved portions 93B and 93C extending in the longitudinal direction between the finger-shaped drain electrode 91 and the finger-shaped source electrode 92. is doing.
  • the curved portion 93 ⁇ / b> B extends so as to surround the end 91 ⁇ / b> A of the drain electrode 91, and continues to one end of two adjacent longitudinally extending portions 93 ⁇ / b> A with the drain electrode 91 interposed therebetween.
  • the curved portion 93 ⁇ / b> C extends so as to surround the end 91 ⁇ / b> B of the drain electrode 91, and continues to the other end of two longitudinally extending portions 93 ⁇ / b> A adjacent to each other with the drain electrode 91 interposed therebetween.
  • the annular portion formed by the two longitudinally extending portions 93A, the bending portion 93B, and the bending portion 93C is connected to the branch portion 93D extending in the longitudinal direction, and the branch portion 93D is orthogonal to the longitudinal direction. It is connected with the connection part 93E extended in the direction to do.
  • each longitudinally extending portion 93 ⁇ / b> A of the gate electrode 93 has a shorter distance from the source electrode 92 than a shorter distance from the drain electrode 91.
  • a slight gap is provided on the outer peripheral side with respect to the curved portions 93B and 93C of the gate electrode 93 and the both ends 92A and 92B of the source electrode 92 are separated.
  • Two-dimensional electron gas removal regions 111 and 111A are formed with a slight gap outward in the longitudinal direction. This slight gap is, for example, 20 ⁇ m or less.
  • the two-dimensional electron gas removal regions 111 and 111A are formed by forming recesses to be described later in the GaN-based stacked body 85.
  • the two-dimensional electron gas removal region 111 extends from the vicinity of the end 92A of the source electrode 92 outward in the longitudinal direction and extends along the curved portion 93B of the gate electrode 93.
  • the two-dimensional electron gas removal region 111 ⁇ / b> A extends from the vicinity of the end 92 ⁇ / b> B of the source electrode 92 toward the outer side in the longitudinal direction and extends along the curved portion 93 ⁇ / b> C of the gate electrode 93.
  • the two-dimensional electron gas removal region 111 As shown in FIG. 8, a recess 108 that is adjacent to the outer peripheral side with respect to the curved portion 93 ⁇ / b> B of the gate electrode 93 and reaches the undoped GaN layer 82 is formed.
  • the dimensional electron gas 86 has been removed.
  • the recess 108 is adjacent to the end 92 ⁇ / b> A of the source electrode 92 outward in the longitudinal direction.
  • the two-dimensional electron gas 86 is removed and the two-dimensional electron gas is removed.
  • a removal region 111A is formed.
  • the GaN HFET having the above configuration is a normally-on type, and is turned off by applying a negative voltage to the gate electrode 13.
  • the breakdown voltage experimental results of the GaN HFET of this third embodiment are that the static off breakdown voltage is 600V and the dynamic breakdown voltage is 300V, which is 100% or more improvement compared to the dynamic breakdown voltage 150V of the comparative example shown in FIG. It was.
  • the dynamic breakdown voltage is improved by 50 V compared to the first embodiment described above.
  • the reason is that the two-dimensional electron gas removal region 111 is formed and both ends 91A and 91B of the drain electrode 91 are curved so that the electron flow to the ends 91A and 91B of the drain electrode 91 during the dynamic withstand voltage test is as follows. This is thought to be because concentration could be further suppressed.
  • both ends 92A and 92B in the longitudinal direction of the source electrode 92 are more than both ends 91A and 91B in the longitudinal direction of the drain electrode 91.
  • the concentration of the electron flow from the end of the source electrode 92 on both sides to the end of the central drain electrode 91 is less likely to occur due to dynamic electric field fluctuations during switching.
  • the dynamic breakdown voltage can be remarkably improved.
  • the length of the source electrode 92 in the longitudinal direction may be shorter than the length of the drain electrode 91 in the longitudinal direction.
  • the source electrode 92 and the drain electrode 91 are arranged so that a virtual line extending from both ends 92 ⁇ / b> A and 92 ⁇ / b> B in the longitudinal direction of the source electrode 92 in the short direction perpendicular to the longitudinal direction intersects the drain electrode 91.
  • the short side direction from one of the longitudinal ends 92A and 92B of the source electrode 92 is achieved.
  • An imaginary line extending in the longitudinal direction of the drain electrode 91 may be in contact with the longitudinal end of the drain electrode 91, and an imaginary line extending in the short direction from the other of the both ends 92 ⁇ / b> A and 92 ⁇ / b> B may intersect the drain electrode 91.
  • the two-dimensional electron gas removal region 111 is formed with a slight gap (for example, 20 ⁇ m or less) outward in the longitudinal direction.
  • the two-dimensional electron gas removal regions 151 and 152 may be formed with a slight gap (for example, 20 ⁇ m or less) outward in the longitudinal direction.
  • the two-dimensional electron gas removal regions 151 and 152 have a transverse direction dimension substantially the same as the dimension of the source electrode 92 in the transverse direction, and are substantially rectangular.
  • the two-dimensional electron gas removal regions 111 and 111A are formed by forming the recesses 108 and 109 reaching the undoped GaN layer 82. Instead of forming the recesses 108 and 109, the two-dimensional electron gas removal regions 111 and 111A are formed.
  • the two-dimensional electron gas removal regions 111 and 111A may be formed by implanting impurities such as boron (B) or iron (Fe) into the GaN-based stacked body 85 in the region.
  • the two-dimensional electron gas removal region 111 may be adjacent to the curved portions 93B and 93C of the gate electrode 93 without any gap to the outer peripheral side, and the two-dimensional electron gas removal region 111, 111A. May be adjacent to the both ends 92A, 92B of the source electrode 92 without any gap in the longitudinal direction outward.
  • the two-dimensional electron gas removal region is adjacent to the source electrode or the gate electrode when adjacent to each other without a gap from the small gap (for example, 20 ⁇ m or less). And the case where they are next to each other.
  • three finger-shaped drain electrodes 11, 61, 91 are provided and four finger-shaped source electrodes 12, 62, 92 are provided.
  • Two, three finger-shaped source electrodes may be provided, and the drain electrode and the source electrode may be alternately arranged in the short direction intersecting the longitudinal direction.
  • it may have one finger-shaped drain electrode, two finger-shaped source electrodes 62, three or more finger-shaped drain electrodes, four or more finger-shaped drain electrodes, Electrodes and source electrodes may be alternately arranged in the short direction.
  • the gate electrodes 13, 63, and 93 surround the finger-shaped drain electrodes 11, 61, and 97, but the curved portions 13B, 63B, and 93B are not necessarily provided.
  • the gate electrodes 13, 63, 93 have the curved portions 13B, 63B, 93B, it is possible to suppress the concentration of electron flow to the ends 11A, 61A, 91A of the drain electrodes 11, 61, 91 during the dynamic withstand voltage test. Dynamic breakdown voltage can be improved.
  • the substrate 1, 51, 81 is a Si substrate.
  • the substrate is not limited to a Si substrate, and a sapphire substrate or a SiC substrate may be used.
  • a sapphire substrate or a SiC substrate is nitrided.
  • a physical semiconductor layer may be grown, or a Ga-based semiconductor layer may be grown on a substrate made of a Ga-based semiconductor, such as an AlGaN layer grown on a GaN substrate.
  • a buffer layer may be appropriately formed between the substrate and each layer.
  • a hetero improvement layer made of AlN may be formed between the undoped GaN layers 2, 52, 82 and the undoped AlGaN layers 3, 53, 83.
  • a GaN cap layer may be formed on the undoped AlGaN layers 3, 53, 83.
  • the recess reaching the undoped GaN layer is formed, and the drain electrode and the source electrode are formed as ohmic electrodes in the recess.
  • the recess is not formed, and the upper surface of the undoped GaN layer is formed.
  • a drain electrode and a source electrode may be formed on the undoped AlGaN layer, and the drain electrode and the source electrode may be ohmic electrodes by reducing the thickness of the undoped AlGaN layer.
  • the gate electrodes 13, 63, 93 are made of TiN, but may be made of WN.
  • the gate electrode may be made of Ti / Au or Ni / Au.
  • the drain electrodes 11, 61, 91 and the source electrodes 12, 62, 92 are Ti / Al / TiN electrodes as an example, but may be Ti / Al electrodes.
  • a Hf / Al electrode or a Ti / AlCu / TiN electrode may be used.
  • the drain electrode and the source electrode may be a laminate of Ni / Au on Ti / Al or Hf / Al, or a laminate of Pt / Au on Ti / Al or Hf / Al.
  • Au may be laminated on Ti / Al or Hf / Al.
  • the protective films 7, 57, 87 are made of SiN.
  • the protective films 7, 57, 87 may be made of SiO 2 , Al 2 O 3 or the like, and a SiO 2 film is laminated on the SiN film. A laminated film may be used.
  • the GaN-based stacked body includes a GaN-based semiconductor layer represented by Al X In Y Ga 1- XYN (X ⁇ 0, Y ⁇ 0, 0 ⁇ X + Y ⁇ 1). It may be included. That is, the GaN-based laminate may include AlGaN, GaN, InGaN, or the like.
  • a normally-on type HFET has been described
  • a normally-off type can achieve the same effect.
  • the Schottky gate has been described, an insulated gate structure may be used.

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un transistor à hétérojonction et à effet de champ dans lequel une longueur (L2) dans la direction longitudinale de chacune des électrodes source (12) et une longueur (L1) dans la direction longitudinale de chacune des électrodes déversoir (11), sont égales. En outre, une position dans la direction longitudinale d'extrémités (12A, 12B) dans la direction longitudinale des électrodes source (12), coïncide avec une position dans la direction longitudinale d'extrémités (11A, 11B) dans la direction longitudinale des électrodes déversoir (11). Du fait d'une configuration dans laquelle les deux extrémités (12A, 12B) dans la direction longitudinale des électrodes source (12) ne forment pas une saillie vers l'extérieur de la direction longitudinale par rapport aux deux extrémités (11A, 11B) dans la direction longitudinale des électrodes déversoir (11), il est possible d'éviter la concentration d'un flux électronique se dirigeant des extrémités (12A, 12B) des électrodes source (12) vers les extrémités (11A, 11B) des électrodes déversoir (11).
PCT/JP2012/061840 2011-05-13 2012-05-09 Transistor à effet de champ Ceased WO2012157480A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011108463A JP2012238808A (ja) 2011-05-13 2011-05-13 電界効果トランジスタ
JP2011-108463 2011-05-13

Publications (1)

Publication Number Publication Date
WO2012157480A1 true WO2012157480A1 (fr) 2012-11-22

Family

ID=47176810

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2012/061840 Ceased WO2012157480A1 (fr) 2011-05-13 2012-05-09 Transistor à effet de champ

Country Status (2)

Country Link
JP (1) JP2012238808A (fr)
WO (1) WO2012157480A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111696984A (zh) * 2020-06-09 2020-09-22 杰华特微电子（杭州）有限公司 半导体器件及其制作方法
US20220223699A1 (en) * 2021-01-08 2022-07-14 Taiwan Semiconductor Manufacturing Co., Ltd. Ring transistor structure

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9054027B2 (en) * 2013-05-03 2015-06-09 Texas Instruments Incorporated III-nitride device and method having a gate isolating structure
US9461158B2 (en) 2013-06-13 2016-10-04 Sharp Kabushiki Kaisha Heterojunction field effect transistor
JP6227154B2 (ja) * 2014-09-17 2017-11-08 シャープ株式会社 化合物半導体電界効果トランジスタ
JP6769400B2 (ja) * 2017-06-26 2020-10-14 株式会社デンソー 半導体装置
JP7656258B2 (ja) * 2021-07-20 2025-04-03 サンケン電気株式会社 半導体装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049169A (ja) * 1998-07-28 2000-02-18 Mitsubishi Electric Corp 電界効果トランジスタ
JP2001284367A (ja) * 2000-03-29 2001-10-12 Nec Kansai Ltd 高周波用電界効果トランジスタ
JP2010103158A (ja) * 2008-10-21 2010-05-06 Panasonic Corp 双方向スイッチ
WO2010070824A1 (fr) * 2008-12-19 2010-06-24 株式会社アドバンテスト Dispositif à semi-conducteur, procédé de fabrication d'un dispositif à semi-conducteur et circuit de commutation
JP2010147349A (ja) * 2008-12-19 2010-07-01 Advantest Corp 半導体装置、半導体装置の製造方法およびスイッチ回路
JP2010245351A (ja) * 2009-04-07 2010-10-28 Toshiba Corp 半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049169A (ja) * 1998-07-28 2000-02-18 Mitsubishi Electric Corp 電界効果トランジスタ
JP2001284367A (ja) * 2000-03-29 2001-10-12 Nec Kansai Ltd 高周波用電界効果トランジスタ
JP2010103158A (ja) * 2008-10-21 2010-05-06 Panasonic Corp 双方向スイッチ
WO2010070824A1 (fr) * 2008-12-19 2010-06-24 株式会社アドバンテスト Dispositif à semi-conducteur, procédé de fabrication d'un dispositif à semi-conducteur et circuit de commutation
JP2010147349A (ja) * 2008-12-19 2010-07-01 Advantest Corp 半導体装置、半導体装置の製造方法およびスイッチ回路
JP2010245351A (ja) * 2009-04-07 2010-10-28 Toshiba Corp 半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111696984A (zh) * 2020-06-09 2020-09-22 杰华特微电子（杭州）有限公司 半导体器件及其制作方法
CN111696984B (zh) * 2020-06-09 2023-06-23 杰华特微电子股份有限公司 半导体器件及其制作方法
US20220223699A1 (en) * 2021-01-08 2022-07-14 Taiwan Semiconductor Manufacturing Co., Ltd. Ring transistor structure
TWI798651B (zh) * 2021-01-08 2023-04-11 台灣積體電路製造股份有限公司 電晶體元件、積體晶片及其形成方法
US11664431B2 (en) * 2021-01-08 2023-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Ring transistor structure
US12324211B2 (en) 2021-01-08 2025-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Ring transistor structure

Also Published As

Publication number Publication date
JP2012238808A (ja) 2012-12-06

Similar Documents

Publication Publication Date Title
JP7539447B2 (ja) 半導体装置
EP2975647B1 (fr) Dispositif semi-conducteur
JP5662367B2 (ja) 窒化物半導体装置およびその製造方法
WO2012157480A1 (fr) Transistor à effet de champ
US9070661B2 (en) Semiconductor device including a strain relaxation film
US9754932B2 (en) Semiconductor device
US9269803B2 (en) Semiconductor device
US20170077276A1 (en) Field effect transistor
WO2014041731A1 (fr) Dispositif semi-conducteur
WO2016098391A1 (fr) Transistor à effet de champ
JP5948500B2 (ja) ヘテロ接合電界効果トランジスタ
KR20150020105A (ko) 반도체 장치 및 반도체 장치의 제조 방법
US20110204380A1 (en) Nitride-based fet
JP7161915B2 (ja) 半導体装置
JP5629736B2 (ja) 電界効果トランジスタ
JP2014078561A (ja) 窒化物半導体ショットキバリアダイオード
KR20150107552A (ko) 반도체 장치
WO2012157482A1 (fr) Transistor à effet de champ
JP5604490B2 (ja) 電界効果トランジスタ
JP2015082605A (ja) 窒化物半導体装置
JP6298746B2 (ja) 電界効果トランジスタ
KR20140111795A (ko) 전력 반도체 소자 및 패키지
JP5765143B2 (ja) 高電子移動度トランジスタとその製造方法
JP2015002330A (ja) 窒化物半導体装置
JP2018026371A (ja) 化合物半導体装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12785773

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12785773

Country of ref document: EP

Kind code of ref document: A1