WO2010104172A1 - スイッチング電源装置、集積回路およびスイッチング電源装置の動作状態設定方法 - Google Patents
スイッチング電源装置、集積回路およびスイッチング電源装置の動作状態設定方法 Download PDFInfo
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- WO2010104172A1 WO2010104172A1 PCT/JP2010/054218 JP2010054218W WO2010104172A1 WO 2010104172 A1 WO2010104172 A1 WO 2010104172A1 JP 2010054218 W JP2010054218 W JP 2010054218W WO 2010104172 A1 WO2010104172 A1 WO 2010104172A1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
Definitions
- the present invention relates to a switching power supply having a state setting function relating to power supply operation, an integrated circuit performing the control thereof, and an operating state setting method thereof, and in particular, a switching power supply, integrated circuit
- the present invention relates to a method of setting the operation state.
- the switching power supply device is mounted, for example, on an electronic device such as a cellular phone, a digital camera, etc., and used to boost or step down an input voltage to supply it to a load.
- an electronic device such as a cellular phone, a digital camera, etc.
- the state regarding the power supply operation is set in various ways according to the power supply specification required by the electronic device.
- the switching power supply circuit shown in Patent Document 1 below boosts the DC voltage supplied from the DC power supply and supplies it to six white light emitting diodes LED1 to LED6 which are loads, and these white light emitting diodes LED1 to LED6 are It is intended to drive.
- an external resistor R1 is provided as an adjustment resistor in the oscillation circuit of the step-up chopper regulator in order to adjust the switching frequency.
- noise generated from the switching power supply circuit includes noise that does not adversely affect other LSIs in the electronic device.
- the invention of the switching power supply circuit shown in Patent Document 1 has a linear relationship between the resistance value of the external resistor R1 and the switching cycle, so the designer of the electronic device can freely switch by replacing the external resistor R1. The period can be changed, and the adjustment of the generated noise is easy.
- a power control IC integrated circuit
- step-up chopper regulator there remains a problem that a dedicated terminal for connecting a frequency adjustment resistor is newly required.
- the power supply control IC for controlling the switching power supply device has a limited number of terminals due to the demand for reducing the cost, the package area, and the like. Therefore, in many cases, the power supply control IC is not provided with a dedicated terminal for setting parameters other than the above-described switching frequency. In this case, in order to meet the power supply specifications of various electronic devices, it can not but cope by increasing the lineup of the power supply control IC itself.
- Patent Document 2 sets the operation state during initialization of the power control IC without increasing the number of terminals of the power control IC using a multi-functional capacitor.
- the invention of "method and apparatus for selecting parameter / mode based on measurement” is disclosed.
- the present invention allows multiple operating states in a single piece, for example by selecting the capacitance value of a particular multifunction capacitor coupled to a pin of an integrated circuit, to select from multiple functional parameters or operating modes.
- the multifunction capacitor is to have some normal function during the operation of a normal integrated circuit. For example, VCC pin decoupling capacitors or feedback pin loop compensation capacitors can be used as parameter / mode selection capacitors during initialization.
- the capacitance value of the capacitor is determined in order to divert the capacitor originally provided for other purposes such as the VCC pin decoupling capacitor and the feedback pin loop compensation capacitor described above to the mode setting, and the mode is appropriately set. Settings are made. However, after the mode setting in the initialization period is finished, the capacitor will be used for its original purpose. Therefore, the capacitance value of these capacitors must be set to a suitable size to realize its original purpose.
- the feedback pin loop compensation capacitor is intended to compensate the frequency characteristic of the feedback pin loop of the power supply control IC, and the feedback pin loop compensation capacitor is disposed so that the power supply control feedback loop in the switching power supply does not become unstable. It is If the capacitance value of this feedback pin loop compensation capacitor is set smaller than the optimum value for the stability of the feedback loop, the system becomes unstable and oscillates. On the other hand, if it is set larger than the optimum value, the response of the power supply system will be delayed, for example, the output voltage can not be recovered immediately even if the load changes. Therefore, the capacitance value of this capacitor greatly affects the response of the feedback system, and the change restricts the adjustment of the phase compensation, or the power supply abnormally oscillates, which restricts the design itself of the switching power supply device. There was a problem.
- the following three types of cases are assumed as a method of supplying the VCC voltage to the power supply control IC.
- the VCC voltage is generated by an internal regulator from an external power supply connected to another terminal as in Patent Document 2 described above.
- the VCC voltage is generated by the startup current generated by the startup circuit (corresponding to the internal regulator in the first case) connected to the external power supply during the initialization period at startup, and in the normal operation It receives the supply of the VCC voltage from the winding.
- the third case is to use an external VCC power supply.
- the VCC decoupling capacitor In order to use the VCC pin decoupling capacitor as a multifunctional capacitor, a regulator that generates a constant current for charging the capacitor is required in the power control IC. This is because the VCC decoupling capacitor is connected to the VCC pin (between GND and) of the power control IC in order to supply power to the power control IC itself.
- the VCC decoupling capacitor functions as a buffer when the power supply control IC consumes a large amount of current and can not supply the power in time, or when there is a fluctuation in the power supply voltage. It also works to remove the noise. Therefore, in order to realize such an original purpose, it is necessary to increase the capacitance value of the VCC decoupling capacitor to some extent.
- the VCC decoupling capacitor is always connected to the external power supply.
- the VCC decoupling capacitor is charged with a constant current in such a connection state, it can not be determined whether it is charged by the current from the external power supply or charged by the constant current generated by the power control IC. . That is, in order to use the VCC decoupling capacitor for mode setting during the initialization period, it is necessary to disconnect the VCC pin from the external power supply, and a circuit for this disconnection is provided outside the power control IC. Therefore, it can be said that the method of Patent Document 2 is unsuitable for setting the parameter / mode by applying to the third case.
- Another patent document 3 describes a semiconductor integrated circuit in which a mode switching signal is input without increasing the number of terminals.
- a terminal having a difference between the input voltage range in normal operation and the power supply voltage and the ground potential is used, and a voltage near the power supply voltage or near the ground potential is used.
- a voltage near the power supply voltage or near the ground potential is used.
- JP-A-2007-14082 (refer to paragraph numbers [0039] to [0046] and the like)
- JP-A-2007-73954 (refer to paragraph numbers [0003] to [0028] and the like)
- JP 2007-258294 A (refer to paragraph numbers [0023] to [0027] and the like)
- FIG. 15 is a circuit diagram showing a conventional average current control switching power supply.
- the switching power supply apparatus is configured to apply a constant voltage to a load by the power supply control IC 10, and an input terminal 11 of the switching power supply apparatus is an output in which a load (not shown) is connected via a reactor L1 and a diode D1 in series. It is connected to the terminal 12.
- the connection point of the reactor L1 and the diode D1 is connected to the drain terminal of a switching element Q1 such as an N-channel power MOSFET, for example, and the source terminal of the switching element Q1 is grounded.
- a connection point between the diode D1 and the output terminal 12 is grounded via a capacitor C2, and a circuit for rectification and smoothing is constituted by the diode D1 and the capacitor C2.
- the power supply control IC 10 internally includes a control circuit 1, a VCC detection circuit 2, an oscillation circuit 3, a drive circuit 4, an output voltage detection circuit 5, and the like.
- the power supply control IC 10 includes an OUT terminal for control output, a VCC terminal for power supply input, a VDET terminal for voltage detection of the input terminal 11, an Icomp terminal for phase compensation of an error amplifier of a current feedback system, and a voltage feedback system.
- Vcomp terminal for phase compensation of the error amplifier IS terminal for sense current signal input, FB terminal for feedback signal input of voltage feedback system, and GND terminal for ground connection.
- the OUT terminal is connected to the gate terminal of the switching element Q1 grounded via the resistor R1, and controls the on / off of the switching element Q1 by the control voltage Vout output therefrom.
- the power supply voltage Vcc is supplied from the power supply terminal 13 to the VCC terminal.
- the VDET terminal is connected to a connection point of the resistors R11 and R12 connected in series between the input terminal 11 and the ground.
- the Icomp terminal and the Vcomp terminal are grounded via capacitors C3 and C4, respectively.
- the IS terminal is connected to the connection point of the capacitor C1 and the resistor R21 connected in series between the input terminal 11 and the ground.
- the FB terminal is connected to a connection point of the resistors R13 and R14 connected in series between the output terminal 12 and the ground.
- the switching element Q1 disposed between the input power supply voltage Vi and the load is on / off controlled by the control voltage Vout. Thus, it operates to supply the output voltage Vo to the load connected to the output terminal 12 of the switching power supply.
- the power supply control IC 10 has no terminal for adjusting the oscillation frequency of the oscillation circuit 3, the number of terminals increases from eight to nine when the terminal for frequency adjustment is added. It is difficult to provide a new pin for frequency adjustment because the size and cost of the 8-pin package and the 9-pin or more package are significantly different.
- the state setting terminal is applied even if it is attempted to set in advance the operation state according to the power supply requirement specification provided in the electronic device by applying the techniques described in Patent Documents 1 and 2 described above. There is still the disadvantage of providing a new power supply, increasing the cost, and making the power supply design difficult. Moreover, when the technology of Patent Document 3 is applied, it is difficult to perform mode switching after the power control IC is mounted on the switching power supply device.
- the present invention has been made in view of such a point, and adjusts the resistance value of the resistor connected between the OUT terminal or IS terminal of the integrated circuit and the ground during the initialization period of the switching power supply. It is an object of the present invention to provide a switching power supply, an integrated circuit capable of setting an operating state, and a method of setting the operating state.
- a transformer or a reactor and a switching element are disposed between the input power source and the load, and a constant output voltage is applied to the load by controlling the on / off of the switching element.
- the present invention provides a switching power supply having an integrated circuit for power control.
- the integrated circuit of the switching power supply device includes a drive circuit for turning on and off the switching element, a state setting circuit for outputting a state instruction signal for instructing an operation state of the switching power supply device, and the state setting circuit.
- a control circuit for instructing to determine an operating state of the switching power supply device, and a drive signal to the switching element of the integrated circuit outputs a first resistance having a resistance value adjusted to a predetermined magnitude.
- the switching power supply device Connected to the external terminal for control output or the external terminal for current signal input to which the sense current signal detected in the transformer or reactor is detected, and the switching immediately after the start of power supply to the integrated circuit
- the switching power supply device within an initialization period until on / off control of the element is started Characterized in that so as to set the operating state.
- a pull-down resistance set to 4.7 k ⁇ to 47 k ⁇ is provided to prevent the potential of the gate terminal of the switching element from floating when not controlled, and therefore, the resistance value is adjusted By doing this, during the initialization period of the power supply control IC, the power supply state is set by the internally provided state setting circuit.
- a filter circuit is provided on the external terminal for current signal input to which a sense current signal from a load is input, so this filter resistor is regarded as the first resistor. It is also possible to adjust its resistance value.
- an integrated circuit for power control is provided to control the on / off of the switching element, the switching element is disposed between the input power source and the load, and the on / off of the switching element is controlled.
- the operation state is set within the initialization period immediately after the start of power supply to the switching power supply until the on / off control of the switching element is started. Do.
- a predetermined value is input from an external terminal for current signal input to which a sense current signal obtained by detecting a current flowing to the external terminal of the power supply control integrated circuit connected to the gate of the switching element or the transformer or reactor is input.
- the resistance value of the resistor connected to the gate terminal of the switching element or the filter connected to the external terminal for noise removal By selecting a resistance value such as a resistance, it is possible to accurately set a specific operating state during the initialization period. Further, normal operation is not adversely affected, and it is not necessary to supply large current to the outside as in the case of using the VCC pin decoupling capacitor in Patent Document 2.
- FIG. 18 is a circuit configuration diagram showing an example of a state setting circuit used in the first to fifth embodiments.
- 5 is a time chart showing an example of each input / output signal state of the state setting circuit shown in FIG. 2; 5 is a flowchart showing an example of setting operation in the state setting circuit shown in FIG. 2;
- FIG. 2 is a circuit configuration diagram showing an example of an oscillation circuit that sets a switching frequency of a switching element.
- FIG. 6 is a diagram showing an oscillation frequency determined by a state indication signal and a charging current in the oscillation circuit shown in FIG. 5.
- FIG. 13 is a circuit configuration diagram showing an example different from FIG. 2 of the state setting circuit used in the first to fifth embodiments. It is a time chart which shows an example of each signal state of the state setting circuit shown in FIG. It is a figure which shows the number of the operation states by the state indication signal which can be set with the state setting circuit shown in FIG. It is a circuit diagram which shows the switching power supply device which concerns on Embodiment 5 of this invention. It is a circuit diagram showing the conventional switching power supply of average current control.
- FIG. 1 is a circuit diagram showing an average current control switching power supply according to a first embodiment of the present invention.
- a difference from the conventional device of FIG. 15 is that a state setting circuit 6 is provided in a power supply control IC 100 that controls the switching power supply device.
- the state setting circuit 6 is connected to the OUT terminal together with the drive circuit 4 and further functions to control the oscillation frequency of the oscillation circuit 3 by exchanging a start signal and an end signal described later with the control circuit 1. It is
- FIG. 2 is a circuit configuration diagram showing an example of a state setting circuit used in Embodiment 1 and Embodiments 2 to 5 described later. Hereinafter, the case where it uses for Embodiment 1 is demonstrated.
- the state setting circuit 6 is connected to the START terminal 61 to which the one-shot start signal START from the control circuit 1 is input, and to the OUT terminal for control output, and the voltage Vout of the OUT terminal is input.
- An input / output terminal 62 for outputting a constant current, an END terminal 63 for outputting an end signal END, and state setting terminals 64 and 65 for outputting two state instruction signals CS1 and CS2 are provided therein.
- the START terminal 61 is connected to the set terminal S of the RS flip flop circuit 21, and the output terminal Q of the RS flip flop circuit 21 is connected to the first delay circuit 22.
- the first delay circuit 22 rising of L (Low) to H (High) of the state signal Q from the output terminal Q (the terminals and the signal are given the same reference numerals for simplicity) is input. When this is done, an output signal Ta_out delayed by time Ta is generated. The fall of the state signal Q from H to L is not delayed, and when the state signal Q becomes L, the output signal Ta_out also becomes L immediately.
- the constant current source 23 connected to the internal power supply terminal VDD is connected to the input / output terminal 62 via the switch S1.
- the output signal Ta_out of the first delay circuit 22 turns on the switch S1 when the level is H, and is an input signal of the second delay circuit 24.
- the second delay circuit 24 receives the output signal Ta_out of the first delay circuit 22 and then generates an output signal Tb_out delayed by a time Tb.
- the output signal Tb_out of the second delay circuit 24 is an input signal of the third delay circuit 25 that generates an output signal delayed by a time Tc, and the output signal Tc_out is the one-shot circuit 26 and the RS flip-flop, respectively. It is supplied to the reset terminal of the feedback circuit 21.
- the power supply control IC 100 operates so that the constant current Iout flows to the input / output terminal 62 through the switch S1 by the state setting circuit 6 during the initialization period, and the constant current Iout flows through the OUT terminal. Is injected into the externally attached resistor R1. Further, the drive circuit 4 is controlled by the control circuit 1 to make the output have a high impedance during a period in which the constant current Iout is injected into the resistor R1 during the initialization period.
- the inverting input terminals of the first and second comparators 27a and 27b are connected to the input / output terminal 62, and the reference voltages Vref1 and Vref2 (where Vref1 ⁇ Vref2) are connected to the noninverting input terminals. .
- the first and second comparators 27a and 27b compare the terminal voltage of the externally attached resistor R1 with two reference voltages Vref1 and Vref2 different from each other, and the comparison result is a binary level (H or L) signal It is configured to be supplied to D input terminals of corresponding D-type flip-flop circuits 28a and 28b as Co1 and Co2.
- the reference voltages Vref1 and Vref2 may be generated by the state setting circuit 6 of the power supply control IC 100, and can be set to, for example, 0.45 V and 0.75 V.
- the reset terminals R of D-type flip-flop circuits 28a and 28b are connected to START terminal 61, and are set in state setting circuit 6 in response to the start signal from control circuit 1 at the start of the initialization period of power supply control IC 100.
- the internal state is reset.
- the oscillation frequency of the oscillation circuit 3 is determined by the state indication signals CS1 and CS2 output from the state setting terminals 64 and 65 of the state setting circuit 6, thereby setting the switching frequency of the switching element Q1. . That is, the power supply control IC 100 makes the drive circuit 4 connected to the OUT terminal high impedance, and injects the constant current Iout from the constant current source 23 to the resistor R1 externally connected therefrom.
- the state indication signals CS1 and CS2 are determined by comparing the control voltage Vout appearing at the OUT terminal with the reference voltages Vref1 and Vref2 set in the first and second comparators 27a and 27b.
- the switching frequency in the subsequent normal operation state is set, and the operation state of the switching power supply device is set after the initialization period. It can be held continuously.
- the control voltage Vout appearing at the OUT terminal of the power supply control IC 100 during the initialization period is determined according to the following equation (1) by setting the resistance R1 to a predetermined value of resistance with respect to the constant current Iout. Be done.
- the control voltage Vout Iout * R1 (1)
- the control voltage Vout must be set to a voltage value at which the power MOSFET, which is the switching element Q1, does not turn on. Therefore, if the minimum value Vth_min of the threshold voltage Vth at the gate terminal of the switching element Q1 is 2 V, it is necessary to set the maximum value Vout_max of the control voltage Vout as 1 V smaller than that.
- the maximum resistance value R1_max of the resistor R1 is determined as in the following equation (2). For example, if the constant current Iout is 50 ⁇ A, the maximum value of the resistor R1 is 20 k ⁇ .
- FIG. 3 is a time chart showing an example of each input / output signal state of the state setting circuit shown in FIG.
- FIG. 7A is a start signal START input from the control circuit 1 to the state setting circuit 6 at time t1.
- FIGS. 7B and 7C show an output signal Ta_out of the first delay circuit 22 and an output signal Tb_out of the second delay circuit 24, respectively.
- the end signal END shown in FIG. 6D is output from the state setting circuit 6 to the control circuit 1 at time t5 delayed by (Ta + Tb + Tc) from time t1 when the start signal START is input.
- the voltage Vout of the input / output terminal 62 shown in FIG. 3E (in this case, not a control voltage of the switching element Q1 output from the drive circuit 4 but a voltage according to the equation (1)) Starts at time t2 when injection of the constant current Iout from the start to the resistor R1 starts, reaches the potential of the reference voltage Vref1 at time t3, and continues to increase until the RS flip flop circuit 21 is reset at time t5 thereafter. Asymptotically approach the value of equation (1) (If there is no parasitic capacitance including the gate capacitance of switching element Q1, the value of equation (1) is reached immediately).
- the binary level signal Co2 shown in (g) is at the H level.
- the start signal START is input from the control circuit 1 to the state setting circuit 6, the state setting function starts, and when the state setting operation is completed, the end signal END is transmitted from the state setting circuit 6 to the control circuit 1.
- the initialization period in the power supply control IC 100 ends, and the switching power supply can be put into the normal operation state.
- the delay time Ta in the first delay circuit 22 is set to the power MOSFET which is the switching element Q1.
- the gate discharge time can be made 5 ms, for example, in consideration of the gate discharge time.
- the delay time Tb in the second delay circuit 24 is stabilized in consideration of the gate capacitance of the power MOSFET which is also the switching element Q1, the time constant of the resistor R1 and the current value of the constant current Iout, and the voltage Vout is stabilized. It is possible to set the delay time in consideration of the charge time up to 1 ms, for example. Further, delay time Tc in third delay circuit 25 is set as a time for reading state designation signals CS1 and CS2 to oscillation circuit 3, and is, for example, 1 ⁇ s. As with the delay time Ta, these delay times Tb and Tc are delayed with respect to the timing when the input rises, but are not delayed with respect to the timing when the input falls.
- FIG. 4 is a flowchart showing the setting operation in the state setting circuit shown in FIG.
- the state signal Q is supplied from here to the first delay circuit 22 and the state setting operation is performed. It is started.
- step St1 the output signal Ta_out of the first delay circuit 22 is output with a delay time Ta.
- the switch S1 receiving the output signal Ta_out is turned on in step St2, so that the constant current Iout starts to flow from the OUT terminal of the power control IC 100 from the constant current source 23 via the input / output terminal 62.
- the output signal Ta_out is also supplied to the second delay circuit 24.
- step St3 the output signal Tb_out is output from the second delay circuit 24.
- step St4 the voltage value Vout of the resistor R1 externally connected to the power supply control IC 100 via the input / output terminal 62 is compared with the reference voltage Vref1 of the first comparator 27a. Ru.
- Step St4 of FIG. 4 if it is determined that the voltage value Vout of the resistor R1 is smaller than the reference voltage Vref1 of the first comparator 27a (Vout ⁇ Vref1), the process proceeds to Step St5 and the D-type determined at that time A first state setting indicated by state instruction signals CS1 and CS2, which are state signals of flip flop circuits 28a and 28b, is performed on oscillation circuit 3. If the determination in step St4 is Vout> Vref1, the process proceeds to step St6, and the voltage value Vout of the resistor R1 is compared with the reference voltage Vref2 of the second comparator 27b.
- step St7 the process proceeds to step St7, and the second state setting is performed on the oscillation circuit 3 as in step St5, otherwise (if it is determined that Vout> Vref2), At step St8, the third state setting is performed on the oscillator circuit 3 as at step St5.
- the process waits for the delay time Tc in the third delay circuit 25 to which the output signal Tb_out is input.
- the delay time Tc is set as a read time of the state designation signals CS1 and CS2 output from the two D-type flip flop circuits 28a and 28b, and the END terminal 63 is selected from the one shot circuit 26 by the output signal Tc_out.
- An end signal END is output to the control circuit 1 via the control circuit 1.
- N-1 reference voltages and a pair of comparators or an A / D converter is required.
- FIG. 5 is a circuit diagram showing an example of an oscillation circuit for setting a switching frequency of a switching element.
- the oscillation circuit 3 includes a capacitor C31 which can be charged by three constant current sources 51, 52 and 53, switches S31 and S32 for changing the charging current, a transistor Q31 for discharging the capacitor C31, and reference voltages Vref31 and Vref32 different from each other. , And the third and fourth comparators 54 and 55, which compare the charging voltage of the capacitor C31, and the RS flip flop circuit 56.
- the constant current sources 51, 52 and 53 output constant currents of I1, I2 and I3, respectively, and the input terminals 31 and 32 are connected to the state setting terminals 64 and 65 of the state setting circuit 6 described above.
- the oscillation signal OSC is output from the output terminal 33 to the control circuit 1 by connecting the oscillation circuit 3 with the oscillation frequency according to the levels of the state indication signals CS1 and CS2.
- Switches S31 and S32 are turned on (conductive) when the level of state instruction signals CS1 and CS2 is H, and turned off (cut off) when L.
- FIG. 6 is a diagram showing an oscillation frequency determined by the state indication signal and the charging current in the oscillation circuit shown in FIG.
- constant currents I1, I2 and I3 are 1.0 ⁇ A, 1.0 ⁇ A and 5.0 ⁇ A, a capacitance value of capacitor C31 is 28.5 pF, and reference voltages Vref31 and Vref32 are 0.5 V and 4.0 V, respectively.
- FIG. 7 is a diagram showing an example of oscillation frequencies that can be selected by the oscillation circuit shown in FIG. Here, the relationship between the resistance value of the used resistor R1 and the oscillation frequency is shown for the set states 1 to 3.
- the oscillation frequency in the oscillation circuit 3 is adjusted by adjusting the resistance value of the resistor R1 connected between the OUT terminal and the ground during the initialization period of the switching power supply. It is possible to provide a switching power supply which can be selected to set its operating state.
- the operation state setting method of the present invention is not limited to only the setting of the oscillation frequency of oscillation circuit 3, and state indication signals CS1 and CS2 (,..., Using resistance R1 of the OUT terminal during the initialization period. By setting the level of CS3, ...), it can also be used to set other operating conditions, such as setting the over voltage protection (OVP) level or setting the over current protection (OCP) level. . Furthermore, it is also possible to select whether to respond in the latch mode or restart mode at the time of overload, or to select the fixed frequency mode or the variable frequency mode.
- FIG. 8 is a circuit diagram showing a switching power supply according to Embodiment 2 of the present invention.
- the second embodiment differs from the above-described switching power supply according to the first embodiment in that a resistance of, for example, 22 ⁇ is provided between the OUT terminal of power supply control IC 100 and the gate terminal of switching element Q1 connected thereto. It is that R2 was intervened.
- the drive current to the switching element Q1 can be adjusted by the resistor R2.
- the voltage Vout in the initialization period in this case is determined according to the following equation (3) by setting the resistances R1 and R2 to resistance values of predetermined magnitudes with respect to the constant current Iout.
- FIG. 9 is a circuit diagram showing a switching power supply according to Embodiment 3 of the present invention.
- the third embodiment differs from the switching power supply devices according to the first and second embodiments described above in that a buffer circuit formed of switching elements Q2 and Q3 is connected between the OUT terminal of power supply control IC 100 and the gate terminal of switching element Q1. It was inserted between. As a result, the drivability of the switching element Q1 can be enhanced to compensate for the lack of drivability of the power control IC 100.
- the voltage Vout in this case is determined according to the following equation (4) by setting the resistance R3 to a predetermined value with respect to the constant current Iout.
- FIG. 10 is a circuit diagram showing a switching power supply according to Embodiment 4 of the present invention.
- the input terminal 11 and the output terminal 12 are coupled by a flyback transformer T1, and one end of the primary winding Pc thereof is connected to the drain terminal of a switching element Q1 such as an N channel power MOSFET.
- the source terminal of the switching element Q1 is connected to ground via a shunt resistor R10 for current detection.
- One end of the secondary winding Sc of the flyback transformer T1 is connected to the output terminal 12 via the diode D1, and the other end of the secondary winding Sc is grounded.
- a connection point between the diode D1 and the output terminal 12 is grounded via a capacitor C2, and a circuit for rectification and smoothing is constituted by the diode D1 and the capacitor C2.
- the switching power supply device is configured to be controlled by the power supply control IC 200 to apply a constant output voltage Vo to the load, and when the input power supply voltage Vi is supplied to the input terminal 11, the input power supply voltage Vi is The switching element Q1 disposed between the and the load is on / off controlled by the control voltage Vout.
- the power supply control IC 200 is internally provided with a VCC detection circuit 2, a drive circuit 4, a state setting circuit 7, an activation circuit 8 and the like in addition to the control circuit 1.
- the power control IC 200 also includes an OUT terminal for control output, a VCC terminal for power input, a VH terminal for power supply to the power control IC 200 at startup (and detection of the voltage of the input power voltage Vi), and a feedback circuit.
- a feedback signal from a voltage feedback system including 201 is inputted, a GND terminal current for ground connection, and an IS terminal into which a sense current signal detected the current flowing through the primary winding Pc of the flyback transformer T1 is inputted Is equipped.
- this embodiment can also be applied to a non-insulated switching power supply as shown in FIG. 15, for example, in that case, a sense current signal obtained by detecting the current flowing through reactor L1 is input to IS terminal. It becomes a terminal.
- the OUT terminal is grounded via the resistor R1 and is connected to the gate terminal of the switching element Q1, and the on and off of the switching element Q1 is controlled by the control voltage output therefrom.
- a power supply voltage is supplied from the power supply terminal 13 to the VCC terminal.
- the VH terminal is connected to the input terminal 11 via the resistor R4.
- the FB terminal is grounded via a capacitor C5, and is connected via a feedback circuit 201 to a connection point of the resistors R13 and R14 connected in series between the output terminal 12 and the ground.
- the IS terminal is grounded via a capacitor C6, and is connected to a connection point between the source terminal of the switching element Q1 and the shunt resistor R10 via a resistor R15.
- the power supply control IC 200 of the switching power supply device of FIG. 10 differs from the power supply control IC 10 of the conventional device of FIG. 15 in that a state setting circuit 7 is provided.
- the state setting circuit 7 is connected to an IS terminal for current detection, and detects a voltage Vout obtained by smoothing the voltage across the shunt resistor R10 with an RC filter including a resistor R15 and a capacitor C6. Further, the state setting circuit 7 exchanges start and end signals with the control circuit 1 to initialize the period immediately after the start of power supply to the power control IC 200 until the on / off control of the switching element Q1 is started. Function to set the switching power supply to any of a plurality of selectable operating states.
- FIG. 11 is a circuit configuration diagram showing an example different from FIG. 2 of the state setting circuit used in the first to fourth embodiments and the fifth embodiment described later. Hereinafter, the case where it uses for Embodiment 4 is demonstrated.
- the state setting circuit 7 is connected to the START terminal 71 to which the one-shot start signal START from the control circuit 1 is input, and to the IS terminal for current detection, and the voltage Vout generated there is input. And an END terminal 73 for outputting an end signal END, and state setting terminals 74, 75, 76 for outputting three state indication signals CS1, CS2 and CS_max.
- the START terminal 71 is connected to the set terminal S of the RS flip flop circuit 21, and the output terminal Q of the RS flip flop circuit 21 is connected to the first delay circuit 22.
- the fall of the state signal Q from H to L is not delayed, and when the state signal Q becomes L, the output signal Ta_out also becomes L immediately.
- Two constant current sources 23a and 23b are connected in parallel to the internal power supply terminal VDD, and the constant current source 23a is connected to the input / output terminal 72 via the switch S1 and can output a constant current Iout_1 thereto .
- the constant current source 23b is connected to the input / output terminal 72 via the switches S2 and S1 in series, and when connected, a current obtained by adding the constant current Iout_2 to the constant current Iout_1 is IS via the input / output terminal 72. It is output to the terminal.
- the output signal Ta_out of the first delay circuit 22 turns on the switch S1 when its level is H, and is also an input signal of the second delay circuit 24.
- the second delay circuit 24 receives the output signal Ta_out of the first delay circuit 22 and then generates an output signal Tb_out delayed by a time Tb.
- the output signal Tb_out of the second delay circuit 24 is an input signal of the third delay circuit 25 that generates an output signal delayed by a time Tc, and the output signal Tc_out is the one-shot circuit 26 and the RS flip-flop, respectively. It is supplied to the reset terminal of the feedback circuit 21.
- the first, second and third comparators 27a, 27b and 27c are connected to the input / output terminal 72, and the outputs of the comparators 27a, 27b and 27c are D-type flip-flop circuits 28a and 28b and RS flip-flop circuit 28c, respectively. Input to the Further, the state signal Q (state instruction signal CS_max) of the RS flip flop circuit 28c is supplied to the inverter circuit 29, and the switch S2 is controlled to be turned on / off by the state instruction signal CS_max inverted by the inverter circuit 29. Is configured as.
- the input / output terminal 72 is connected to the inverting input terminals of the first and second comparators 27a and 27b and the non-inverting input terminal of the third comparator 27c.
- reference voltages Vref1, Vref2 and Vref_max are connected to the non-inverted input terminals of the first and second comparators 27a and 27b and the inverted input terminal of the third comparator 27c, respectively. Ru.
- the voltage Vout is compared with three different reference voltages Vref1, Vref2 and Vref_max, and the comparison result is binary level (H or L) It is configured to be supplied as the signals Co1, Co2, Co_max to the input terminals of the corresponding flip-flop circuits 28a, 28b, 28c.
- reset terminals R of D-type flip-flop circuits 28a and 28b and RS flip-flop circuit 28c are connected to START terminal 71, and when the start signal of control circuit 1 is received at the start of the initialization period of power supply control IC 200.
- state instruction signals CS1, CS2, and CS_max output from state setting terminals 74, 75, 76 of state setting circuit 7 are determined by the operation described below, whereby oscillation of oscillation circuit 3 related to power supply control IC 200 is performed.
- An operating state such as frequency is set.
- the final value of the control voltage Vout appearing at the IS terminal of the power supply control IC 200 during the initialization period can be expressed by the following equation by setting the resistors R10 and R15 to a predetermined value of resistance with respect to the constant current Iout. It is decided as (5). However, due to the presence of the external capacitor C6, even if the constant current Iout is applied to the resistors R10 and R15, this value does not instantaneously become this value, and exhibits a transient response similar to that of the time constant circuit of CR.
- the state setting circuit 7 can control the injection current Iout to the input / output terminal 72 to a different value of (Iout1 + Iout2) or Iout1 by operating the switches S1 and S2 during the initialization period. Then, the constant current Iout is injected into the series resistor (R10 + R15) externally attached to the power supply control IC 200 through the IS terminal. That is, by configuring the magnitude of the injection current to the IS terminal of the power control IC 200 to be switchable within the initialization period, the output voltage Vout at the IS terminal and the magnitude of the injection current to the IS terminal are two parameters. Since the state indication signal can be determined, the number of states that can be set can be increased. Therefore, even when the maximum value of the resistance value of the external resistor is limited as in the case of the resistor R1 in the first embodiment shown in FIG. 1, more states can be set by switching the injection current Iout like this. be able to.
- FIG. 12 is a time chart showing an example of each signal state of the state setting circuit shown in FIG.
- FIG. 6A is a start signal START input from the control circuit 1 to the state setting circuit 7 at time t1.
- FIGS. 7B and 7C show an output signal Ta_out of the first delay circuit 22 and an output signal Tb_out of the second delay circuit 24, respectively.
- the end signal END shown in (d) of the figure is output from the state setting circuit 7 to the control circuit 1 at time t8 delayed by (Ta + Tb + Tc) time from time t1 when the start signal START is input.
- the voltage Vout of the input / output terminal 72 is shown in FIG. 6E, and the output current Iout is shown in FIG.
- the voltage Vout shows a transient response toward the voltage of the expression (5), and rises at time t2 when injection of the constant current Iout1 + Iout2 from the constant current sources 23a and 23b into the resistors R10 and R15 starts.
- the potential reaches the potential of the reference voltage Vref2 at time t4.
- the voltage Vout at the input / output terminal 72 continues to rise until time t5, and when it reaches the reference voltage Vref_max, the RS flip flop circuit 28c is set, and the binary level signal Co_max becomes H level.
- the output of the inverter circuit 29 becomes L, the switch S2 is turned off, and the current Iout decreases from Iout1 + Iout2 to Iout1. Therefore, the voltage Vout also decreases, and settles to a potential between the reference voltage Vref1 and the reference voltage Vref2 by time t7.
- the binary level signal Co2 shown in (h) is at the H level.
- the state indication signals CS1, CS2, CS_max do not change.
- the start signal START is input from the control circuit 1 to the state setting circuit 7, the state setting function starts, and when the state setting operation is completed, the end signal END is transmitted from the state setting circuit 7 to the control circuit 1.
- the initialization period in the power supply control IC 200 ends, and the switching power supply can be put into the normal operation state.
- FIG. 13 is a diagram showing the number of operation states according to the state indication signal settable by the state setting circuit shown in FIG.
- six operation states can be set by three state indication signals CS1, CS2, and CS_max.
- FIG. 14 is a circuit diagram showing a switching power supply according to a fifth embodiment of the present invention.
- the fifth embodiment differs from the above-described switching power supply according to the fourth embodiment in that the IS terminal of the power control IC 200 is a capacitor C1 and a shunt resistor R16 connected in series between the input terminal 11 and the ground. The connection point is connected via the resistor R15. Therefore, even when a negative current flows in the IS terminal, it is possible to set the operating state.
- the present invention is applicable to any of the insulating switching power supply device and the non-insulating switching power supply device.
- the insulating switching power supply device Even when one type of switching power supply device is illustrated, it is apparent that the same can be applied to the other type.
- control circuit 2 VCC detection circuit 3 oscillation circuit 4 drive circuit 5 output voltage detection circuit 6, 7 state setting circuit 10, 100, 200 power control IC 11 input terminal 12 output terminal 13 power supply terminal 21, 28c RS flip flop circuit 22 first delay circuit 23, 23a, 23b constant current source 24 second delay circuit 25 third delay circuit 26 one shot circuit 27a, 27b, 27c First, second and third comparators 28a and 28b D-type flip flop circuit 29 inverter circuit 51 to 53 constant current source 54 third comparator 55 fourth comparator 56 RS flip flop circuit 64 and 65 state setting terminal C1 ⁇ C4, C31 Capacitor D1 Diode L1 Reactor Q31 Discharge transistor Q1 Switching element R1 to R5, R13 to R15 Resistor R10, R16 Shunt resistor S1, S2, S31, S32 Switch
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Abstract
Description
このスイッチング電源装置は、電源制御IC10によって負荷に一定の電圧を印加するように構成されたもので、その入力端子11は、リアクトルL1とダイオードD1を直列に介して、図示しない負荷を接続した出力端子12と接続されている。リアクトルL1とダイオードD1の接続点は、たとえばNチャネル型のパワーMOSFETなどのスイッチング素子Q1のドレイン端子と接続され、スイッチング素子Q1のソース端子は接地されている。また、ダイオードD1と出力端子12の接続点は、コンデンサC2を介して接地され、これらのダイオードD1とコンデンサC2によって整流平滑用回路が構成されている。
[実施の形態1]
図1は、本発明の実施の形態1に係る平均電流制御のスイッチング電源装置を示す回路図である。図15の従来装置と異なる点は、スイッチング電源装置を制御する電源制御IC100内に状態設定回路6が設けられていることである。この状態設定回路6は、ドライブ回路4とともにOUT端子に接続され、さらに制御回路1との間で後述するスタート信号、エンド信号をやり取りすることによって、発振回路3の発振周波数を制御するように機能するものである。
図2は、実施の形態1および後述の実施の形態2~5に用いる状態設定回路の一例を示す回路構成図である。以下、実施の形態1に用いた場合について説明する。
D型フリップフロップ回路28a,28bでは、先行してD入力端子に入力された2値レベル信号Co1,Co2が、クロック端子Cに後から到達したクロック信号、すなわち第2の遅延回路24の出力信号Tb_outに同期して読み込まれ、出力端子Qからそれぞれ状態指示信号CS1,CS2として出力される。また、D型フリップフロップ回路28a,28bのリセット端子RはSTART端子61と接続され、電源制御IC100の初期化期間の開始にあたって制御回路1からのスタート信号を受けて、状態設定回路6に設定されている内部状態をリセットするようにしている。
ここでは、制御電圧Voutをスイッチング素子Q1であるパワーMOSFETがターンオンしない電圧値にしなければならない。そのため、スイッチング素子Q1のゲート端子におけるスレッシュ電圧Vthの最小値Vth_minが2Vであれば、制御電圧Voutの最大値Vout_maxをそれより小さい1Vのように設定することが必要になる。このとき抵抗R1の最大抵抗値R1_maxは下記の式(2)のように決まる。たとえば、定電流Ioutが50μAであれば、抵抗R1の最大値は20kΩとなる。
図3は、図2に示す状態設定回路の各入出力信号状態の一例を示すタイムチャートである。同図(a)は、制御回路1から状態設定回路6に時刻t1で入力するスタート信号STARTである。同図(b)、(c)には、それぞれ第1の遅延回路22の出力信号Ta_outおよび第2の遅延回路24の出力信号Tb_outを示している。また、同図(d)に示すエンド信号ENDは、スタート信号STARTが入力された時刻t1から(Ta+Tb+Tc)時間だけ遅れた時刻t5において、状態設定回路6から制御回路1に出力される。
状態設定回路6では、制御回路1からのスタート信号STARTがRSフリップフロップ回路21をセット状態に切り替えたとき、ここから状態信号Qが第1の遅延回路22に供給されて、その状態設定動作が開始される。ステップSt1では、第1の遅延回路22の出力信号Ta_outが遅延時間Taをもって出力される。この出力信号Ta_outを受けたスイッチS1は、ステップSt2でオンされるから、定電流源23から入出力端子62を経由して電源制御IC100のOUT端子から定電流Ioutが流れ始める。それと同時に、第2の遅延回路24にも出力信号Ta_outが供給されるため、ステップSt3に進んで遅延時間Tbが経過したとき、第2の遅延回路24から出力信号Tb_outが出力される。遅延時間Tbが経過した時点でステップSt4に進んで、入出力端子62を経由して電源制御IC100に外付けされた抵抗R1の電圧値Voutと第1のコンパレータ27aの基準電圧Vref1とが比較される。
この発振回路3は、3つの定電流源51,52,53によって充電可能なコンデンサC31、充電電流を変更するためのスイッチS31,S32、コンデンサC31の放電用トランジスタQ31、互いに異なる基準電圧Vref31,Vref32でコンデンサC31の充電電圧を比較する第3、第4のコンパレータ54,55およびRSフリップフロップ回路56から構成されている。定電流源51,52,53は、それぞれI1,I2,I3の大きさの定電流を出力するものであり、入力端子31,32は、上述した状態設定回路6の状態設定端子64,65に接続され、状態指示信号CS1,CS2のレベルに応じた発振周波数で発振回路3を動作させることで、出力端子33からは制御回路1に発振信号OSCが出力される。なお、スイッチS31,S32は、それぞれ状態指示信号CS1,CS2のレベルがHのときオン(導通)し、Lのときオフ(遮断)する。
図6は、図5に示す発振回路において、状態指示信号と充電電流とによって決まる発振周波数を示す図である。入力端子31から入力された状態指示信号CS1がLレベルで、入力端子32から入力された状態指示信号CS2がHレベルであれば、スイッチS31がオフし、スイッチS32がオンして、I2+I3の大きさでコンデンサC31への充電電流が流れる。
[実施の形態2]
図8は、本発明の実施の形態2に係るスイッチング電源装置を示す回路図である。
[実施の形態3]
図9は、本発明の実施の形態3に係るスイッチング電源装置を示す回路図である。
[実施の形態4]
図10は、本発明の実施の形態4に係るスイッチング電源装置を示す回路図である。このスイッチング電源装置では、入力端子11と出力端子12の間がフライバックトランスT1によって結合されており、その一次巻線Pcの一端は、Nチャネル型のパワーMOSFETなどのスイッチング素子Q1のドレイン端子と接続され、スイッチング素子Q1のソース端子は電流検出用のシャント抵抗R10を介して接地されている。フライバックトランスT1の二次巻線Scの一端はダイオードD1を介して出力端子12と接続され、この二次巻線Scの他端は接地されている。また、ダイオードD1と出力端子12の接続点は、コンデンサC2を介して接地され、これらのダイオードD1とコンデンサC2によって整流平滑用回路が構成されている。
この状態設定回路7は、初期化期間中にスイッチS1,S2を操作することにより、入出力端子72への注入電流Ioutを(Iout1+Iout2)、あるいはIout1の異なる大きさに制御できる。そして、この定電流IoutがIS端子を介して電源制御IC200に外付けされた直列抵抗(R10+R15)に注入される。すなわち、電源制御IC200のIS端子に対する注入電流の大きさを初期化期間内に切り替え可能に構成することにより、IS端子での出力電圧VoutとIS端子への注入電流の大きさとを2つのパラメータとして状態指示信号を決定できるため、設定できる状態数を多くすることができる。したがって、図1に示す実施の形態1における抵抗R1のように、外付け抵抗の抵抗値の最大値に制限がある場合でも、このような注入電流Ioutの切り替えによって、より多くの状態を設定することができる。
図12は、図11に示す状態設定回路の各信号状態の一例を示すタイムチャートである。同図(a)は、制御回路1から状態設定回路7に時刻t1で入力するスタート信号STARTである。同図(b)、(c)には、それぞれ第1の遅延回路22の出力信号Ta_outおよび第2の遅延回路24の出力信号Tb_outを示している。また、同図(d)に示すエンド信号ENDは、スタート信号STARTが入力された時刻t1から(Ta+Tb+Tc)時間だけ遅れた時刻t8において、状態設定回路7から制御回路1に出力される。
[実施の形態5]
図14は、本発明の実施の形態5に係るスイッチング電源装置を示す回路図である。
2 VCC検出回路
3 発振回路
4 ドライブ回路
5 出力電圧検出回路
6,7 状態設定回路
10,100,200 電源制御IC
11 入力端子
12 出力端子
13 電源端子
21,28c RSフリップフロップ回路
22 第1の遅延回路
23,23a,23b 定電流源
24 第2の遅延回路
25 第3の遅延回路
26 ワンショット回路
27a,27b,27c 第1、第2、第3のコンパレータ
28a,28b D型フリップフロップ回路
29 インバータ回路
51~53 定電流源
54 第3のコンパレータ
55 第4のコンパレータ
56 RSフリップフロップ回路
64,65 状態設定端子
C1~C4,C31 コンデンサ
D1 ダイオード
L1 リアクトル
Q31 放電用トランジスタ
Q1 スイッチング素子
R1~R5,R13~R15 抵抗
R10,R16 シャント抵抗
S1,S2,S31,S32 スイッチ
Claims (10)
- 入力電源と負荷の間にトランスまたはリアクトルと、スイッチング素子とを配置し、該スイッチング素子のオンオフを制御することによって前記負荷に一定の出力電圧を印加するための電源制御用の集積回路を有するスイッチング電源装置において、
前記集積回路は、
前記スイッチング素子をオンオフするドライブ回路と、
前記スイッチング電源装置の動作状態を指示するための状態指示信号を出力する状態設定回路と、
前記状態設定回路に対して前記スイッチング電源装置の動作状態を決定するよう指示する制御回路と、
を備え、所定の大きさに調整された抵抗値を有する第1の抵抗を前記集積回路の前記スイッチング素子へのドライブ信号が出力される制御出力用の外部端子もしくは前記トランスまたはリアクトルに流れる電流を検出したセンス電流信号が入力される電流信号入力用の外部端子に接続するとともに、前記集積回路への電源供給開始直後から前記スイッチング素子のオンオフ制御が開始されるまでの初期化期間内に前記スイッチング電源装置の動作状態を設定するようにしたことを特徴とするスイッチング電源装置。 - 前記スイッチング素子のスイッチング周波数を規定する発振回路を有し、前記発振回路では、前記状態設定回路の状態指示信号により前記スイッチング周波数を増減するようにしたことを特徴とする請求の範囲第1項記載のスイッチング電源装置。
- 前記ドライブ回路から第2の抵抗を含む抵抗回路を介して前記スイッチング素子のゲート端子にオンオフ制御信号を印加するようにしたことを特徴とする請求の範囲第1項記載のスイッチング電源装置。
- 前記ドライブ回路からバッファ回路を介して前記スイッチング素子のゲート端子にオンオフ制御信号を印加するようにしたことを特徴とする請求の範囲第1項記載のスイッチング電源装置。
- 前記状態設定回路は、前記外部端子から前記第1の抵抗に所定の大きさで電流を注入して前記外部端子に生じる電圧を検出するとともに、検出された前記外部端子の電圧に応じて前記状態指示信号を決定することにより、特定の前記スイッチング電源装置の動作状態を設定するようにしたことを特徴とする請求の範囲第1項記載のスイッチング電源装置。
- 前記状態設定回路は、前記外部端子に対する注入電流の大きさを前記初期化期間内に切り替え可能に構成することにより、前記外部端子の電圧と前記注入電流の大きさに応じて前記状態指示信号を決定するようにしたことを特徴とする請求の範囲第5項記載のスイッチング電源装置。
- 前記スイッチング電源装置は、前記状態設定回路の状態指示信号により、過電流保護レベルの選択、過電圧保護レベルの選択、過負荷時のラッチモードの選択、リスタートモードの選択、および前記スイッチング素子のスイッチング周波数を規定する発振回路が固定周波数モードであるか可変周波数モードであるかの選択、のいずれかを行うことを特徴とする請求の範囲第1項記載のスイッチング電源装置。
- 入力電源と負荷の間にトランスまたはリアクトルと、スイッチング素子とを配置し、該スイッチング素子のオンオフを制御することによって前記負荷に一定の出力電圧を印加するためのスイッチング電源装置の制御を行う集積回路であって、
前記スイッチング素子をオンオフするドライブ回路と、
前記スイッチング電源装置の動作状態を指示するための状態指示信号を出力する状態設定回路と、
前記状態設定回路に対して前記スイッチング電源装置の動作状態を決定するよう指示する制御回路と、
を備え、
前記スイッチング素子へのドライブ信号が出力される制御出力用の外部端子もしくは前記トランスまたはリアクトルに流れる電流を検出したセンス電流信号が入力される電流信号入力用の外部端子に接続されるとともに、所定の大きさに調整された抵抗値を有する第1の抵抗に対し、前記集積回路への電源供給開始直後から前記スイッチング素子のオンオフ制御が開始されるまでの初期化期間内に所定の電流を印加して前記第1の抵抗が接続された前記外部端子の電圧を検出することにより前記スイッチング電源装置の動作状態を決定するようにしたことを特徴とする集積回路。 - スイッチング素子のオンオフを制御する電源制御用集積回路を有し、入力電源と負荷の間に前記スイッチング素子を配置し、前記スイッチング素子のオンオフを制御することによって前記負荷に一定の出力電圧を印加するようにしたスイッチング電源装置における、該スイッチング電源装置に対する電源供給開始直後から前記スイッチング素子のオンオフ制御が開始されるまでの初期化期間内に動作状態を設定する前記スイッチング電源装置の動作状態設定方法であって、
前記スイッチング素子のゲートに接続される前記電源制御用集積回路の外部端子もしくは前記トランスまたはリアクトルに流れる電流を検出したセンス電流信号が入力される電流信号入力用の外部端子から所定の電流を出力する第1工程と、
前記外部端子の電圧を検出し、その検出結果に基づき状態指示信号を形成し、該状態指示信号により前記スイッチング電源装置の動作状態を設定する第2工程と、
前記状態指示信号に基づいて設定された前記スイッチング電源装置の動作状態を初期化期間経過後において継続して保持する第3工程と、
を含むことを特徴とするスイッチング電源装置の動作状態設定方法。 - 前記第2工程および第3工程では、前記スイッチング電源装置における過電流保護レベル、または過電圧保護レベルを設定し、あるいは過負荷時のラッチモード、リスタートモード、固定周波数モード、あるいは可変周波数モードを選択することによって、所定の動作状態として保持することを特徴とする請求の範囲第9項記載のスイッチング電源装置の動作状態設定方法。
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Also Published As
| Publication number | Publication date |
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| JPWO2010104172A1 (ja) | 2012-09-13 |
| US20120049823A1 (en) | 2012-03-01 |
| CN102369654A (zh) | 2012-03-07 |
| US8531163B2 (en) | 2013-09-10 |
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| JP5365686B2 (ja) | 2013-12-11 |
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