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WO2010029340A2 - Réalisation d'un comptage - Google Patents

Réalisation d'un comptage Download PDF

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Publication number
WO2010029340A2
WO2010029340A2 PCT/GB2009/051126 GB2009051126W WO2010029340A2 WO 2010029340 A2 WO2010029340 A2 WO 2010029340A2 GB 2009051126 W GB2009051126 W GB 2009051126W WO 2010029340 A2 WO2010029340 A2 WO 2010029340A2
Authority
WO
WIPO (PCT)
Prior art keywords
signal lines
receiver
rotary encoder
output
count
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/GB2009/051126
Other languages
English (en)
Other versions
WO2010029340A3 (fr
Inventor
Brian Cutherbertson
Peter Gordon Davy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Multiload Technology Ltd
Original Assignee
Multiload Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0816553.2A external-priority patent/GB2463465B/en
Priority claimed from GB0816552.4A external-priority patent/GB2463464B/en
Application filed by Multiload Technology Ltd filed Critical Multiload Technology Ltd
Publication of WO2010029340A2 publication Critical patent/WO2010029340A2/fr
Publication of WO2010029340A3 publication Critical patent/WO2010029340A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • H05B47/175—Controlling the light source by remote control
    • H05B47/18—Controlling the light source by remote control via data-bus transmission

Definitions

  • This invention relates to providing a count using rotary encoder switches.
  • apparatus comprising: two or more rotary encoder switches, each of the two or more rotary encoder switches being commonly connected to first and second signal lines, each switch being operable to provide signals on the first and second signal lines which are dependent on a direction of rotational actuation of the switch by a user; and a receiver connected to the first and second signal lines so as to receive the signals from the two or more rotary encoder switches, the receiver comprising a counter circuit operable to determine a count in response to changes in the signals, the receiver being arranged to provide the count at an output.
  • Apparatus constructed in accordance with this aspect of the invention can allow a change in the count to be effected through operation of any one of the plural rotary encoder switches. This has a number of useful applications. This is particularly useful in a lighting control application since it can be particularly convenient to allow a lighting setting to be changed from any of plural control locations.
  • the provision of a count output provides considerably greater utility than a simple On- off output.
  • the apparatus of this invention has the further advantage of simplicity over a corresponding microprocessor and digital switch-based arrangement.
  • the apparatus also can be constructed in such a way as to have lower power consumption than the corresponding microprocessor and digital switch-based arrangement.
  • the receiver may include a sub-circuit arranged to provide a signal to the counter circuit in response to a detection of a predetermined sequence of changes in the signals on the two or more signal lines.
  • the predetermined sequence of changes may be a first change on a first one of the two or more signal lines followed by a second change on a second one of the two or more signal lines followed by a third change on the first one of the two or more signal lines.
  • the receiver may comprise means for biasing the signal lines. This may allow the rotary encoder switches to be passive devices, i.e. it may allow the avoidance of a separate power supply for the rotary encoder switches.
  • Any of the above apparatuses may comprise a lighting control circuit arranged to control plural lights on the basis of the count provided by the receiver. This can be advantageous in that it may allow a user to effect control of a lighting system through simple manipulation of a rotary encoder switch.
  • each of the two or more rotary encoder switches may be provided with an output transducer, the state of which is dependent on the output of the receiver. This can allow the state of output of the receiver to be indicated at the locations of the rotary encoder switches. This feature is particularly useful since it can allow changes in the count resulting from a user input at one rotary encoder switch to be visible at the locations of the other rotary encoder switches. This may reduce the risk of a user operating a rotary encoder switch in such a way as to make a change to an incorrect count output of the receiver.
  • each of the two or more rotary encoder switches may be connected to the first and second signal lines in parallel. This may allow the use of standard, off-the-shelf rotary encoder switches. Put another way, this may allow the use of conventional rotary encoder switches.
  • each of the two or more rotary encoder switches is connected to the first and second signal lines in series.
  • a second aspect of the invention provides a method comprising: connecting two or more rotary encoder switches commonly to first and second signal lines, each switch being operable to provide signals on the first and second signal lines which are dependent on a direction of rotational actuation of the switch by a user; and receiving the signals from the two or more rotary encoder switches at a receiver connected to the first and second signal lines; using a counter circuit of the receiver to determine a count in response to changes in the signals; and providing the count at an output.
  • a third aspect of the invention provides apparatus comprising: one or more rotary encoder switches, each switch being connected to two or more signal lines, each switch being operable to provide signals on the two or more signal lines which signals are dependent on a direction of rotational actuation of the switch by a user; and a receiver connected to the two or more signal lines so as to receive the signals, the receiver comprising a counter circuit having a clock input, the counter circuit being operable to determine a count in response to input signals present at one or more inputs of the counter circuit at the time of an edge of a signal received at the clock input, the receiver including a sub-circuit arranged to provide a signal to the clock input of the counter circuit in response to a detection of a predetermined sequence of changes in the signals on the two or more signal lines, the receiver being arranged to provide the count at an output.
  • Apparatus constructed in accordance with the third aspect of the invention can experience a number of advantages. Firstly, it may allow the receiver to avoid - A -
  • the arrangement may have relatively low power consumption. Low power consumption can result from the fact that the counter circuit is 'clocked' in response to user input instead of conventionally by a periodic clock signal.
  • the predetermined sequence of changes may be a first change on a first one of the two or more signal lines followed by a second change on a second one of the one or more signal lines followed by a third change on the first one of the two or more signal lines.
  • the receiver may comprise a sub-circuit operable to suppress provision of a signal to the clock input of the counter circuit between the second change and the third change and to refrain from suppressing provision of a signal to the clock input of the counter circuit following the third change.
  • This may allow the receiver to be of a relatively simple design whilst allowing the receiver to avoid reacting to a input comprising rotation of a rotary encoder switch part way between successive rest positions.
  • the receiver may comprises means for biasing the signal lines. This may allow the rotary encoder switches to be passive devices, i.e. allows the avoidance of a separate power supply for the rotary encoder switches.
  • the receiver may comprise a resistive and capacitive circuit arrangement operable to slow down changes in Voltage on the signal lines in order to provide discrimination between transitions of line voltage across DC switching level thresholds, thereby allowing the ordering of logic processes within the receiver, which processes suppress any signal to the clock input of the counter circuit until a time after the third change
  • the apparatuses of the third aspect may comprise a lighting control circuit arranged to control plural lights on the basis of the count provided by the receiver. This may be advantageous in that it can allow a user to effect control of a lighting system through simple manipulation of a rotary encoder switch.
  • each of the one or more rotary encoder switches may be provided with an output transducer, the state of which is dependent on the output of the receiver. This may allow the state of output of the receiver to be indicated at the location of the rotary encoder switch. This feature may be particularly useful in the case of a system comprising plural rotary encoder switches at different locations since it may allow changes in the count resulting from a user input at one rotary encoder switch to be visible at the locations of the one or more other rotary encoder switches.
  • a fourth aspect of the invention provides a method comprising: connecting each of one or more rotary encoder switches to two or more signal lines, each switch being operable to provide signals on the two or more signal lines which are dependent on a direction of rotational actuation of the switch by a user; connecting a receiver to the two or more signal lines so as to receive the signals, the receiver comprising a counter circuit having a clock input; operating the counter circuit to determine a count in response to input signals present at one or more inputs of the counter circuit at the time of an edge of a signal received at the clock input; providing a signal to the clock input of the counter circuit in response to a detection of a predetermined sequence of changes in the signals on the two or more signal lines; and providing the count at an output.
  • Figure 1 shows a first embodiment of a lighting control system in accordance with the present invention
  • Figure 2 shows a receiver circuit forming part of the Figure 1 lighting control system
  • Figure 3 is a timing diagram used to illustrate operation of the Figure 2 circuit
  • Figure 4 shows a second embodiment of a lighting control system in accordance with the present invention.
  • Figure 5 shows a lighting control circuit forming part of the Figures 1 and 4 systems.
  • Figure 1 shows a lighting control system in accordance with the present invention.
  • this number of encoder switches is purely illustrative. There may instead be only one encoder switch, or there may be two or more than three encoder switches.
  • Each of the encoder switches 101, 102, 103 is coupled in parallel to each of the eight cores of an eight core cable 104.
  • the eight cores are labelled, from top to bottom, J, Ground, L, VCC, PE, QO, Ql and Q2.
  • Each core of the eight core cable 104 also is connected to a receiver circuit 100, which is explained in detail below.
  • Each of the rotary encoder switches 101, 102, 103 includes a user manipulable part
  • the rotary encoder switches 101, 102, 103 are of the type in which the user manipulable part 105 can be rotated infinitely, i.e. there is no end stop.
  • Each of the rotary encoder switches 101, 102, 103 includes an output transducer
  • the output transducer 106 is a series of six light transducers, for instance light emitting diodes (LEDs).
  • Each of the rotary encoder switches 101, 102, 103 also includes a reset switch 108.
  • the reset switch 108 is a simple biased push-to-make switch, which may be incorporated into the rotary encoder switches 101, 102, 103 such as to be operable through manipulation of the user manipulable parts 105.
  • the reset switch 108 may be operated by pushing (rather than rotating) the user- manipulable part 105 the a rotary encoder switch. Operation of the reset switch 108 by a user results in supply voltage being provided to the PE core (normally biased at ground potential) of the eight core cable 104.
  • Rotation by a user of the user manipulable part 105 of any of the rotary encoder switches 101, 102, 103 is detected by the receiver circuit 100.
  • An output of the receiver circuit 100 is a count, in this case of a number between 1 and 6, inclusive.
  • the count is encoded in binary form on the cores QO, Ql and Q2.
  • the count is communicated to the rotary encoder switches, 101, 102 and 103 by way of the eight core cable 104.
  • the output transducer 106 of each of the rotary encoder switches 101, 102, 103 indicates the count provided by the receiver circuit 100.
  • the system is arranged such that manipulation of any one of the rotary encoder switches 101, 102, 103 results in a change in the count provided by the receiver circuit 100. Moreover, the output transducer 106 of each of the rotary encoder switches 101, 102, 103 indicates the count currently provided by the receiver circuit 100, even if the change in the count was effected by manipulation of one of the other rotary encoder switches.
  • Each of the rotary encoders switches 101, 102, 103 includes a number of detents. Each of the rotary encoder switches 101, 102, 103 can rest only at a position corresponding to one of the detents, at which both the J and L lines are biased at supply voltage.
  • the rotary encoder switches 101, 102, 103 are of the type wherein rotation from a detent of its user manipulable part 105 in a clockwise direction results in the switch causing a grounding of the line J followed by a grounding of the line L followed by an increase in Voltage on line J to supply Voltage followed by an increase in Voltage on line L to supply Voltage.
  • first and second normally open switches which are referenced at 111 and 112 in the first rotary encoder switch 101 in Figure 1.
  • Each of the rotary encoder switches 101, 102, 103 is arranged also such that rotation of the user-manipulable part 105 in the opposite direction, i.e. anti-clockwise, results in the Voltage on line L falling to ground prior to the Voltage on line J falling to ground, then the Voltage on line L rising to supply Voltage prior to the Voltage on line J rising again to supply Voltage. It is this characteristic that allows the receiver circuit 100 to detect the direction in which the user-manipulable part 105 has been rotated, as is described in detail below.
  • the receiver circuit 100 is shown in detail in Figure 2.
  • FIG 2 shows clearly the eight separate inputs and outputs of the receiver circuit 100.
  • VCC supply Voltage
  • ground potential are the uppermost and lowermost rails respectively in the Figure.
  • QO, Ql and Q2 are shown at the bottom right of the figure.
  • Inputs J and L are shown towards the top left of the figure.
  • Preset enable (PE) in is shown towards the bottom left of the figure.
  • Resistor R3 is connected between supply Voltage and the anode of a diode Dl.
  • the cathode of the diode Dl is connected to input J.
  • the connection of Dl and R3 ensures that J is biased towards VCC.
  • Resistor R4 is connected between supply Voltage and the anode of a diode D2.
  • the cathode of the diode D2 is connected to input L.
  • the presence of R4 and D2 ensures that L is biased towards VCC.
  • J and L are connected to the cathodes of diodes D3 and D4 respectively.
  • the anodes of the diodes D3 and D4 are connected to ground. D3 and D4 protect the circuit to some extent from negative voltages which may appear on J or L.
  • First and second PNP transistors TRl and TR2 are biased at 14 Volts by first and second potential dividers, formed by resistors R6 and R8 and by resistors R7 and R9 respectively.
  • the collectors of the first and second transistors TRl and TR2 are connected to ground potential by resistors RI l and RlO respectively.
  • the first and second transistors thus are connected in a common base configuration.
  • the emitter of transistor TRl is connected to the node connecting resistor R3 and diode Dl by a resistor Rl .
  • the emitter of transistor TR2 is connected to the node connecting resistor R4 and diode D2 by a resistor R5. In this way, the emitters of the first and second transistors TRl and TR2 are connected to inputs J and L respectively.
  • the emitters of the first and second transistors TRl and TR2 also are connected to ground potential by way of capacitors Cl and C2 respectively.
  • a clock enable latch sub-circuit is formed by a first NAND gate A3, first to third NOR gate A5, A7 and A8 and by an inverter A9.
  • the first and second inputs of the NAND gate A3 are connected respectively to the emitters of the first and second transistors TRl and TR2.
  • the first and second inputs of the NOR gate A5 are connected respectively to the collectors of the first and second transistors TRl and TR2.
  • the output of the NOR gate A5 is connected to a first input of the NOR gate A7.
  • the output of the NAND gate A3 is connected to the input of the inverter A9.
  • the NOR gate A8 is connected to receive the output of the inverter A9 and the NOR gate A7 at its first and second inputs respectively.
  • the output of the NOR gate A8 is connected to the second input of the NOR gate A7.
  • An up/down latch sub-circuit is formed by second and third NAND gates Al and A2.
  • the second input of the NAND gate Al is connected to the emitter of the first transistor TRl by way of a resistor R2.
  • the output of the NAND gate Al is connected to the first input of the NAND gate A2.
  • the second input of the NAND gate A2 is connected to the emitter of the second transistor TR2 by way of a resistor Rl 2.
  • the output of the NAND gate A2 is connected to the second input of the NAND gate Al .
  • the output of the NOR gate A5 is connected to anodes of diodes D5 and D6 respectively.
  • the cathodes of the diodes D5 and D6 are connected to the second inputs of the NAND gates Al and A2 respectively.
  • the output of the NAND gate Al is connected to a first input of a further NAND gate A4 by way of series connected resistors Rl 5 and Rl 6.
  • NAND gate A2 is connected to a second input of the NAND gate A4 by way of series connected resistors R13 and R14.
  • the anode of a diode D7 is connected to the node between the resistors Rl 5 and Rl 6.
  • the cathode of the diode D7 is coupled directly to the first input of the NAND gate A4.
  • the diode D7 thus is in parallel with the resistor Rl 6.
  • the anode of a diode D8 is connected to the node between the resistors R13 and R14.
  • the cathode of the diode D8 is coupled directly to the second input of the NAND gate A4.
  • the diode D8 thus is in parallel with the resistor Rl 4.
  • the first and second inputs of the NAND gate A4 are connected to ground potential respectively by capacitors C4 and C3.
  • the output of the NAND gate A4 is pulled towards Ground slightly by connection to Ground potential by a resistor R17.
  • the power inputs VDD and VSS of an integrated circuit ICl are respectively connected to the supply Voltage (VCC,) and Ground rails.
  • the integrated circuit ICl is, in this example, an MC14029B integrated circuit produced by ON Semiconductor of Phoenix, Arizona, USA.
  • the MB14029B IC is a binary/decade up/down counter. It will be appreciated that any suitable arrangement could be used in place of the integrated circuit ICl .
  • a clock (CLK) input of the integrated circuit ICl is connected to the output of the NAND gate A4 by way of a resistor Rl 8.
  • the output of the NOR gate A7 is connected to the anode of a diode D9, the cathode of which is connected to the clock input of the integrated circuit ICl.
  • a B/D (binary/decade) input of the integrated circuit ICl is connected to Ground potential.
  • PO and P3 inputs of the integrated circuit ICl also are connected to Ground potential.
  • Pl and P2 inputs of the integrated circuit ICl are connected to supply Voltage.
  • a PE (preset enable) input of the IC is connected to each of the rotary encoder switches 101, 102, 103 by way of the eight core cable 104.
  • Carry Out and Q3 outputs of the integrated circuit ICl are unconnected.
  • Outputs QO, Ql and Q2 of the integrated circuit ICl are connected to a count management sub-circuit, which will now be described.
  • the output of the NAND gate A2 is connected to an U/D (up/down) input of the integrated circuit ICl .
  • a resistor R20 is connected on one side to supply Voltage and on the other side to anodes of diodes Dl O, DI l, D12 and D16.
  • the cathode of diode D16 is connected to Ground potential by way of a resistor R22.
  • the cathode of diode DlO is connected to the U/D input of the integrated circuit ICl, and thus is connected directly to the output of the NAND gate A2.
  • the cathode of the diode DI l is connected to output Ql.
  • the cathode of the diode D12 is connected to output Q2.
  • Cathodes of diodes D13, D14 and D15 are connected to a resistor R19, the other side of which is connected to Ground potential by a further resistor R21.
  • the anode of the diode D13 is connected to the U/D input of the integrated circuit ICl .
  • the anode of the diode D14 is connected to the output Ql of the integrated circuit ICl.
  • the anode of the diode Dl 5 is connected to the output Q2 of the integrated circuit ICl .
  • the base of a third transistor T3, this transistor being of the NPN type, is connected to the node at the junction of resistors Rl 9 and R21.
  • the emitter of the third transistor T3 is connected to Ground potential.
  • the collector of the third transistor T3 is connected to supply Voltage by a resistor R23.
  • the anode of a diode D17 is connected to the collector of the transistor TR3.
  • the cathode of the diode D17 is connected to a Carry In input of the integrated circuit ICl and to the node between the diode Dl 6 and the resistor R22.
  • supply Voltage is +15 Volts and Ground potential is -2 Volts, although these are merely examples.
  • Node R is the second input of the NAND gate A3 and the emitter of the second transistor TR2, and is indirectly coupled to the L input.
  • Node S is the first input of the NAND gate A3 and the emitter of the first transistor TRl, and is indirectly coupled to the J input.
  • R' is the second input of the NAND gate A2, and is coupled to node R by resistor R12.
  • S' is the second input of the NAND gate Al, and is connected to node S by the resistor R2.
  • R" is the second input of the NOR gate A5, and is coupled to the collector of the second transistor TR2.
  • S" is the first input of the NOR gate A5, and is coupled to the collector of the first transistor TRl .
  • A is the output of the NAND gate Al.
  • B is the output of the NAND gate A2.
  • A' is the first input of the NAND gate A4, and is indirectly coupled to A.
  • B' is the second input of the NAND gate A4, and is indirectly coupled to B.
  • FIG. 3 is timing diagram illustrating the Voltages of various nodes in the receiver circuit 100 of Figure 2.
  • A3, A9, A5, A7 refer to the outputs of the respective gates.
  • the uppermost eleven traces (down to A5) apply to both clockwise and anticlockwise rotation of an encoder switch 101, 102, 103.
  • the next four traces relate to clockwise rotation and the last four relate to anticlockwise rotation.
  • the first two traces show Voltages at nodes S and R.
  • resistors Rl and R5 together with capacitors Cl and C2 (which respectively form slugging networks) slow down the changes in S' and R'; these changes are represented by the sloping portions of the two traces, although the actual changes are exponential, not linear as shown.
  • the remaining traces show logic states at various nodes.
  • the Figure shows the only significant order of logic changes for clockwise and anticlockwise rotation; their exact timing, which depends on the speed of rotation of the encoder, is irrelevant for the purposes of this explanation..
  • the input J and L are connected to the rotary encoder switches 101, 102, 103 shown in Figure 1.
  • the condition at the beginning of the timing diagram is that all of the rotary encoder switches 101, 102, 103 are at a detent position.
  • initial, state, S, R, R', S', R" and S" are all at logic level 'high'.
  • the inverter A9 is provided with a logic 'low', and the NOR gates A5 and A8 each provide a logic 'low' output. Since the output of the NOR gate A5 is logic 'low', the diodes D5 and D6 are not forward biased.
  • the rotary encoder switch 101, 102, 103 causes the Voltage on J to start dropping from supply Voltage just before time Tl .
  • the fall in Voltage on node S causes the emitter voltage of TRl to fall below the level for forward biasing the TRl base (at 14V), so that TRl stops conducting, causing a drop in the Voltage at node S".
  • the slope of S causes the logic states of S and S' (as seen by the inputs of A3 and Al) to fall later, when S has reached a lower level.
  • the drop in Voltage at the node S" causes the Voltage at the first input of the NOR gate A5 to cross the switching threshold. However, this does not cause a change in the state of any of the NOR gates A7 and A8, nor does it cause a change in any of the NAND gates Al, A2 and A3.
  • the Voltage at the node S has fallen sufficiently to cross the switching threshold of the first input of the NAND gate A3.
  • This causes the output of the NAND gate A3 to change from a logic 'low' to a logic 'high', and causes a change of the output of the inverter A9 to a logic 'low' from a logic 'high'.
  • this does not result in any change in the output of the NOR gate A8.
  • the Voltage at the node S' falls below the switching threshold for the second input of the NAND gate Al .
  • This can be termed an active state for node S'. If the output of the NAND gate Al, i.e. node A, was at a logic 'low' and the output of the NAND gate A2, i.e. node B, was at a logic 'high, this change results in the output of each of these NAND gates reversing. If the NAND gates Al and A2 had outputs in logic states 'high' and 'low' respectively, there is no change resulting from the change in the Voltage at node S'.
  • the logic 'high' output on the NOR gate A5 causes a positive potential to be supplied to the nodes R' and S'. Since the Voltage at node S' was low, the change in the output of the NOR gate A5 results in the Voltage at the node S' crossing the switching threshold for the second input of the NAND gate Al . However, this does not result in any change at nodes A and B, i.e. the outputs of the NAND gates Al and A2.
  • the Voltage at node R has risen further to the point that TR2 conducts and the Voltage at node R" exceeds the switching threshold for the second input of the NOR gate A5. This does not result in a change in the output in any of the NAND gates Al, A2 and A3 nor in any of the NOR gates A5, A7 and A8.
  • the receiver circuit 100 is in the same state that it was prior to time Tl, except that node A is at logic 'low and node B is at logic 'high whereas the Voltages at these nodes were previously unknown (depending on previous direction of rotation) and were, in any case, unimportant.
  • the output of the clock- enable latch output (at the output of NOR gate A7) changes from level 'low' to level 'high' at time T3 and changes from level 'high' to level 'low' at time T7.
  • node A changes from logic 'high' to logic 'low' at time T6 and that node B changes from logic 'low' to logic 'high' at the same time. Furthermore, after the first cycle at least, node A changes from logic 'low' to logic 'high' at time T2, which is the same time at which node B changes from logic 'high' to logic 'low'.
  • T6 the first cycle at least.
  • node A changes from logic 'low' to logic 'high' at time T2
  • T2 which is the same time at which node B changes from logic 'high' to logic 'low'.
  • the following circuit operates more reliably when these changes at A and B are made fast by using NAND gates Al and A2 with Schmitt-trigger inputs.
  • node A changes from logic 'high' to logic 'low'
  • node B changes from logic 'low' to logic 'high'.
  • capacitor C3 is charged more quickly than capacitor C4 is discharged. This is because current can flow from the output of the NAND gate A2 through the resistor Rl 3 and the diode D8 to the capacitor C3, but current from capacitor C4 needs to flow through resistors Rl 6 and Rl 5, i.e. it cannot flow through the diode D7 because it is reverse-biased.
  • the NAND gate A4 has two logic 'high' inputs. During this short period of time, the output of the NAND gate A4 falls to logic 'low', but otherwise the output of the NAND gate is at logic 'high'.
  • node B changes from 'high' to 'low' and substantially simultaneously node A changes from 'low' to 'high'.
  • the Voltage at the first input of the NAND gate A4 rises above the threshold relatively quickly due to the forward- biased diode D7.
  • the Voltage at the second input of the NAND gate A4 falls less quickly, because current cannot flow through reverse-biased diode D8 and instead must flow through the resistor Rl 4.
  • the clock enable latch output at the output of NOR gate A7 is high (i.e. in its disable state), this does not result in a negative going pulse at the clock input of ICl .
  • node B is connected to the up/down input of an integrated circuit ICl .
  • the integrated circuit ICl is arranged such that when the CARRY IN input receives a logic 'low' signal and a logic 'high' signal is received at the up/down input, it increments the count provided at the outputs QO to Q3 on every positive going edge of the clock signal. Because node B is a logic 'high' and the CARRY IN input receives a logic 'low' signal between time T6 and time T7, the positive edge of the clock signal occurring between T6 and T7 causes an increment in the count provided at the output QO to Q3 of the integrated circuit ICl . .
  • the signal provided at the CARRY IN input of the integrated circuit ICl, and the mechanism by which it is provided, will now be described.
  • a resistor R20 is connected at one side to supply Voltage and at the other side to the anode of a diode Dl 6.
  • the cathode of the diode Dl 6 is connected to a resistor R22, which is connected at its other side to Ground potential.
  • the node between the diode Dl 6 and the resistor R22 is connected directly to the CARRY IN input of the integrated circuit ICl .
  • the node between the resistor R20 and the diode Dl 6 is connected to the anode of a diode DlO, the cathode of which is connected directly to the up/down input of the integrated circuit ICl .
  • the anode of the diode DlO is connected also to the anode of a diode DI l, the cathode of which is connected directly to the output Ql of the integrated circuit ICl .
  • the anode of the diode DlO is also connected directly to the anode of a diode D12, the cathode of which is connected directly to output Q2 of the integrated circuit ICl.
  • a third transistor TR3 of the NPN type has its base electrode connected at the junction of resistors R19 and R21.
  • the other side of R21 is connected to Ground potential.
  • the other side of R19 is connected to the cathodes of diodes D13, D14 and D15.
  • the anode of diode D13 is connected to the up/down input of the integrated circuit ICl .
  • the anode of diode D14 is connected to the output Ql of the integrated circuit ICl .
  • the anode of diode D15 is connected to the output Q2 of the integrated circuit ICl .
  • the collector electrode of the third transistor TR3 is connected to supply Voltage by a resistor R23.
  • the anode of a diode Dl 7 is connected to the collector of transistor TR3.
  • the cathode of diode D17 is connected to the node between diode Dl 6 and the resistor R22.
  • the emitter electrode of the third transistor TR3 is connected directly to
  • the connection of the diode Dl 7 to the collector of the third transistor TR3 and to the CARRY IN input of the integrated circuit ICl ensures that the integrated circuit ICl receives a logic 'high' signal at the CARRY IN input when the third transistor TR3 is switched off.
  • the base electrode of the third transistor TR3 is not connected directly to supply Voltage, but is indirectly connected to node B (the output of NAND gate A2), output Ql of the integrated circuit ICl and output Q2 of the integrated circuit ICl via diodes D13, D14, D5 respectively and R19. If any of these signal sources is at logic 'high', current flows into the base of TR3 and TR3 is switched ON.
  • node B is high
  • TR3 is ON
  • Dl 7 is reverse-biased so has no effect on CIN input of ICl .
  • the diodes DlO, DI l, D12 are connected to the same signal three signal sources.
  • each of these three signal sources is at a logic 'high' Voltage (which occurs when there is a count of 'six' at the outputs of ICl and a logic 'high' at the U/D input of ICl, indicating an incremental count direction)
  • each of the diodes DlO, DI l and D12 is reverse biased. This causes diode Dl 6 to be pulled 'high' by R20 and a logic 'high' signal to be provided to the CARRY IN input of the integrated circuit ICl .
  • the values of R20 and R22 are selected such that that of R22 is much greater than that of R20, so that in this state the Voltage at CIN is pulled sufficiently high by
  • the generation of a clock signal is disabled by action of the NAND gate A3 and the inverter A9, in particular by the generation of a logic 'high' signal by the NOR gate A7 which is provided to the clock input of the integrated circuit ICl by the diode D9, thus preventing the input from being pulled negative by a negative pulse on R18.
  • the NAND gates Al and A2 operate such that the voltage at node A changes from 'high' to 'low' at time T7 and changes from 'low' to 'high' at time T3.
  • the voltage at node B changes from 'low' to 'high' at time T7 and changes from 'high' to 'low' at time T3.
  • the 'low' (enabled) state at the output of NOR gate A7 extends from time T6 to time T2. Consequently, the negative going pulse that might have been caused after time T7 by the changing of nodes A and B is suppressed by the output of NOR gate A7 being 'high' at that time. Instead, the changing of nodes A and B at time T3 results in a negative going clock pulse shortly after time T3, and before time T2 when A7 is 'low' (enable).
  • the receiver circuit 100 Since in the receiver circuit 100 logic devices change state only when a rotary encoder switch 101, 102, 103 is operated, power consumption of the circuit is relatively low. The power consumption compares particularly favourably to a hypothetical microprocessor-controlled arrangement implementing corresponding functionality.
  • the arrangement of the receiver circuit 100 results in there being a separation between active periods of S' and R'. This is advantageous since it can allow the receiver circuit 100 to avoid reacting to a input comprising rotation of a rotary encoder switch part way between successive rest positions, for instance rotation part way before returning to the start position.
  • the arrangement can have relatively low power consumption. Low power consumption can result from the fact that the counter circuit is 'clocked' in response to user input instead of by a normal, periodic, clock signal.
  • the count output of the receiver circuit 100 comprises a number between 1 and 6 inclusive in binary form on the outputs QO, Ql, and Q2. This output is utilised in two separate ways.
  • the count is fed back to the encoder switches 101,102, 103.
  • the encoder switches incorporate simple logic which translates the count into a visible output on one of the six LEDs constituting the output transducer 106. Only one LED is illuminated at a given time. The LED at the same position is illuminated on all of the encoder switches 101, 102, 103 because they all receive the same count from the receiver circuit. Both logic and L. E. D. are supplied by VCC.
  • the lighting control circuit 107 includes QO, Ql, Q2 and power inputs, 24 preset potentiometers 500 (in a grid of four by six) and first to sixth lamp control outputs 501.
  • preset potentiometers 500 in a grid of four by six
  • first to sixth lamp control outputs 501 there are a different number of lamp control outputs 501 and a different plurality of preset potentiometers 500.
  • the maximum number of preset potentiometers 500 is equal to the number of possible input count values multiplied by the number of lamp control outputs. In this embodiment, however, no present potentiometers are provided for two of the count input values, as is explained in more detail below.
  • a preset potentiometer 500 is a manually controllable variable potentiometer. It is called a preset because it is usually adjusted once, and that setting remains for a considerable period of time.
  • a first column of preset potentiometers 500 relates to a second mood setting.
  • Each of the preset potentiometers 500 in that column relates to a different one of the lamp control outputs 501.
  • the setting of that preset potentiometer 500 sets the voltage applied to the lamp control output 501, and thus sets the brightness of the connected lamp or lamps (not shown). Since different preset potentiometers 500 in the column can have different settings, different lamps (not shown) can be provided with different voltages via the lamp control outputs 501, and thus have different brightnesses.
  • the first mood setting sets the Voltage applied to each of the lamp control outputs 501 at 0 Volts. As such, the first mood setting does not produce any light from any of the lamps connected to the lamp control outputs 501.
  • a second column of preset potentiometers 500 relates to a third mood setting.
  • Each of the preset potentiometers 500 in that column relates to a different one of the lamp control outputs 501. Since different preset potentiometers 500 in the column can have different settings, different lamps (not shown) can be provided with different voltages via the lamp control outputs 501, and thus have different brightnesses. These brightnesses can be different to the brightnesses provided in the first mood setting.
  • the other two columns of preset potentiometers 500 similarly are settable independently of the different preset potentiometers 500 of the other columns. None of the present potentiometers relate to a sixth mood setting. Instead, the sixth mood setting sets the Voltage applied to each of the lamp control outputs 501 at the maximum available Voltage. As such, the sixth mood setting produces maximum illumination from all of the lamps connected to the lamp control outputs 501.
  • the lighting control circuit 107 can alternatively be termed a "mood select" circuit.
  • the mood setting is selected by the receiver circuit 100 by providing a count value corresponding to the mood setting.
  • the mood setting is selectable by operation of any of the rotary encoder switches by a user.
  • a user can switch the brightnesses of plural lamps between a number of (mood) settings by simple manipulation of a rotary encoder switch 101, 102, 103.
  • the mood setting can be changed by control of any of the rotary encoder switches 101, 102, 103.
  • the brightnesses for the second to fifth mood settings are adjustable, through control of the preset potentiometers.
  • the encoder switches 101, 102, 103 are dual output devices. These are sometimes known as incremental rotary encoders, quadrature encoders or relative rotary encoders.
  • a suitable rotary encoder switch is a switch of the PECI l series produced by Bourns, Inc. of 1200 Columbia Ave., Riverside, CA 92507-2114, USA. Numerous other switches also have the appropriate functionality. It is preferred that the switches are endless switches (i.e. are switches without stops). It is relatively straightforward to provide for an off-the-shelf rotary encoder switch an output transducer 106.
  • the rotary encoder switches are not provided with detents. Instead, the rotary encoder switches are not biased towards any stops.
  • the system operates in the same way with the use of such rotary encoder switches, although there is no tactical feedback to the user.
  • the user may be informed of the position of the rotary encoder switch by way of markings on the switch and the user-manipulable part thereof. Feedback to the user is provided by way of the optical output 106.
  • the rotary encoder switches provide a 'gray code' output, in the sense that there is only one change at a given rotational position. This contributes to allowing the receiver circuit 100 to accurately and reliably detect operation of the encoder switched 101, 102, 103 and to accurately and reliably count the number of detents that are moved between.
  • Suitable encoders include absolute encoders. In these embodiments, a greater number of possible states for the outputs exist, thereby allowing more information to be provided. In these embodiments, the receiver circuit may be simpler, as a result of the increased amount of information being provided by the encoder switch, or it may be more complex, allowing greater functionality. However, with many such alternative encoders the possibility of connecting plural encoders in parallel or series to a single receiver circuit is lost.
  • rotary encoder switches 101, 102, 103 are connected in parallel with respect to the output lines J and L.
  • rotary encoder switches are connected in series.
  • Figure 4 first to third rotary encoder switches 410, 402, 403 are shown connected in series on lines J and L.
  • a ground line is connected at one end of each of the J and L lines.
  • This arrangement utilises a receiver circuit 400 which is the same as the circuit shown in Figure 2.
  • the other features shown in Figure 1 are present in the Figure 4 system but are omitted from the Figure for convenience.
  • each of the rotary encoder switches 401, 402, 403 includes a J switch 407 and an L switch 408.
  • Each J switch 407 and each L switch 408 is in a closed position at the detents of the rotary encoder switches 410, 402, 403.
  • Each J switch 407 and L switch 408 is connected in series in an appropriate one of the lines J and L.
  • Each of the rotary encoder switches 401, 402, 403 includes a user- manipulable part 405.
  • Each of the rotary encoder switches 401, 402, 403 also includes an output transducer 406.
  • a rotary encoder switch 401, 402, 403 When a rotary encoder switch 401, 402, 403 is operated by rotation of its user-manipulable part 405, one of the switches 407, 408 opens before the other switch (on the other line). The switches 407, 408 are then closed again, in the same order, as the rotary encoder switch 401, 402, 403 is rotated further.
  • the rotary encoder switches 401 , 402, 403 are not conventional switches. The various manners in which a rotary encoder switch 401, 402, 403 as described could be produced will be apparent to the person skilled in the art.

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  • Electronic Switches (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)

Abstract

Un appareil comprend deux commutateurs de codage rotatifs ou plus, chacun des deux commutateurs de codage rotatifs ou plus étant connecté de façon commune à des première et seconde lignes de signaux. Chaque commutateur a pour fonction d'envoyer des signaux sur les première et seconde lignes de signaux, qui dépendent du sens d'un mouvement de rotation appliqué au commutateur par un utilisateur. L'appareil comprend également un récepteur qui est connecté aux première et seconde lignes de signaux de façon à recevoir les signaux en provenance des deux commutateurs de codage rotatifs ou plus. Le récepteur comprend un circuit de comptage qui a pour fonction de déterminer un comptage en réponse à des changements des signaux, le récepteur étant configuré de façon à délivrer un comptage à une sortie. L'appareil comprend également un ou plusieurs commutateurs de codage rotatif, chaque commutateur étant connecté à deux lignes de signaux ou plus. Chaque commutateur a pour fonction d'envoyer des signaux sur les deux lignes de signaux ou plus, qui dépendent du sens d'un mouvement de rotation appliqué au commutateur par un utilisateur. L'appareil comprend également un récepteur qui est connecté aux deux lignes de signaux ou plus, de façon à recevoir les signaux. Le récepteur comprend un circuit de comptage contenant une entrée d'horloge, le circuit de comptage ayant pour fonction de déterminer un comptage en réponse à des signaux d'entrée présents à une ou plusieurs entrées du circuit de comptage au moment d'un bord d'un signal reçu à l'entrée d'horloge. Le récepteur comprend un sous-circuit configuré de façon à envoyer un signal à l'entrée d'horloge du circuit de comptage en réponse à la détection d'une séquence de changements prédéterminée dans les signaux sur les deux lignes d'acheminement de signaux ou plus, le récepteur étant configuré de façon à délivrer le comptage à une sortie.
PCT/GB2009/051126 2008-09-10 2009-09-04 Réalisation d'un comptage Ceased WO2010029340A2 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB0816553.2A GB2463465B (en) 2008-09-10 2008-09-10 Providing a count
GB0816553.2 2008-09-10
GB0816552.4 2008-09-10
GB0816552.4A GB2463464B (en) 2008-09-10 2008-09-10 Providing a count

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WO2010029340A2 true WO2010029340A2 (fr) 2010-03-18
WO2010029340A3 WO2010029340A3 (fr) 2010-12-29

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MY107353A (en) * 1989-12-25 1995-11-30 Matsushita Electric Works Ltd Remote supervisory and controlling system performing dimming control of light loads
FI85631C (fi) * 1990-02-16 1992-05-11 Smart Set Oy Styrenhet.
DE4312615B4 (de) * 1993-04-19 2004-08-26 Abb Patent Gmbh Steuereinrichtung zur Erzeugung eines variablen Ausgangssignals
FR2729531B1 (fr) * 1995-01-18 1997-03-28 Legrand Sa Auxiliaire de commande a bouton rotatif pour variateur, et, plus particulierement, pour variateur de lumiere

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