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WO2010087367A1 - Dispositif de détection d'images à semi-conducteurs possédant une fonction de multiplication d'électrons - Google Patents

Dispositif de détection d'images à semi-conducteurs possédant une fonction de multiplication d'électrons Download PDF

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Publication number
WO2010087367A1
WO2010087367A1 PCT/JP2010/051038 JP2010051038W WO2010087367A1 WO 2010087367 A1 WO2010087367 A1 WO 2010087367A1 JP 2010051038 W JP2010051038 W JP 2010051038W WO 2010087367 A1 WO2010087367 A1 WO 2010087367A1
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WIPO (PCT)
Prior art keywords
multiplication
electron
solid
register
region
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PCT/JP2010/051038
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English (en)
Japanese (ja)
Inventor
久則 鈴木
康人 米田
慎一郎 ▲高▼木
堅太郎 前田
村松　雅治
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Hamamatsu Photonics KK
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Hamamatsu Photonics KK
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Priority to CN2010800011701A priority Critical patent/CN101960600A/zh
Priority to EP10735833.5A priority patent/EP2264767B1/fr
Priority to US12/920,131 priority patent/US8345135B2/en
Publication of WO2010087367A1 publication Critical patent/WO2010087367A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/15—Charge-coupled device [CCD] image sensors
    • H10F39/151—Geometry or disposition of pixel elements, address lines or gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/15—Charge-coupled device [CCD] image sensors
    • H10F39/151—Geometry or disposition of pixel elements, address lines or gate electrodes
    • H10F39/1515—Optical shielding

Definitions

  • the present invention relates to a solid-state imaging device with a built-in electron multiplication function.
  • a solid-state imaging device having a multiplication register is known (for example, see Patent Documents 1 and 2 below).
  • the electric charge read from the imaging area is transferred to the multiplication register via the horizontal shift register.
  • the multiplication register includes an insulating layer formed on the semiconductor layer and a transfer electrode formed on the insulating layer.
  • a transfer electrode formed on the insulating layer.
  • the present invention has been made in view of such problems, and an object of the present invention is to provide a solid-state imaging device with a built-in electron multiplication function capable of monitoring with a stable multiplication factor.
  • an electron multiplication function-embedded solid-state imaging device includes an imaging region composed of a plurality of vertical shift registers, a horizontal shift register that transfers electrons from the imaging region, and a horizontal shift.
  • a specific vertical shift register having a multiplication register for multiplying electrons from the register and an electron injection means provided at an end of the imaging region on the start point side in the electron transfer direction, in which electrons are injected by the electron injection means Is set to be shielded from incident light.
  • the transfer rate of the vertical shift register is set slower than the transfer rate of the horizontal shift register. Therefore, electrons can be injected into the vertical shift register at a precise timing from the end of the electronic transfer direction to the specific vertical shift register, and this electron is injected into the horizontal shift register via the vertical shift register. It is transferred and then multiplied by the multiplication register. Since the specific vertical shift register is set to be shielded from incident light, electrons injected for monitoring accurately reflect the multiplication factor in the multiplication register and are output at a stable timing. Therefore, it is possible to monitor with a stable multiplication factor.
  • the solid-state imaging device includes a semiconductor substrate having a thin plate portion surrounded by a thick plate portion, the imaging region is formed in the thin plate portion, and a specific vertical shift register is provided in the thick plate portion. Preferably it is located. That is, this solid-state imaging device is a back-illuminated solid-state imaging device in which an imaging region is formed in a thin plate portion, and receives light from the back side without an electrode, so that imaging can be performed with high sensitivity. Further, since the thick plate portion can absorb incident light more sufficiently than the thin plate portion, an image incident from the back side hardly reaches the front side of the thick plate portion, and therefore, electron injection is performed. Certain vertical shift registers can be shielded from incident light.
  • the electron injecting means preferably includes an input electrode electrically connected to the semiconductor substrate and a gate electrode for controlling the potential between the input electrode and a specific vertical shift register.
  • timing of injecting electrons into the vertical shift register can be controlled by adjusting the voltage applied to the gate electrode, it is possible to inject electrons at an accurate timing, and thus a stable monitor of the multiplication factor. Is possible.
  • the multiplication register is a first multiplication register that multiplies electrons transferred from the first area of the imaging area, and a second multiplication that multiplies electrons transferred from the second area of the imaging area.
  • the electron injection means includes a first electron injection means provided at an end of the first region in the electron transfer direction and an end of the second region in the electron transfer direction. And a second electron injecting means provided in the section.
  • the signal can be read out in a short time.
  • the multiplication factor of each multiplication register is monitored by multiplying electrons injected from the first and second electron injection means provided in the respective regions by the first and second multiplication registers, respectively. can do.
  • the empty space in the vicinity of the multiplication register tends to be narrowed. Therefore, physical restrictions are great for arranging other elements.
  • the electron injection means can be arranged without being restricted by physical restrictions in the vicinity of the multiplication register.
  • the solid-state imaging device with a built-in electron multiplication function of the present invention it is possible to monitor the multiplication factor stably.
  • FIG. 1 is a plan view of a solid-state imaging device.
  • 2 is a cross-sectional view taken along the line II-II of the solid-state imaging device shown in FIG. 3 is a cross-sectional view taken along the line III-III of the solid-state imaging device shown in FIG.
  • FIG. 4 is a plan view showing a detailed connection relationship of the solid-state imaging device.
  • 5 is a cross-sectional view taken along the arrow VV of the solid-state imaging device shown in FIG.
  • FIG. 6 is a block diagram showing a connection relationship between the driving / reading circuit and the solid-state imaging device.
  • FIG. 7 is a potential diagram in the multiplication register.
  • FIG. 8 is a perspective view of a portion on the start point side in the electron transfer direction of the imaging region VR in the solid-state imaging device according to the first embodiment.
  • 9 is a cross-sectional view of the solid-state imaging device shown in FIG. 8 taken along the line IX-IX.
  • FIG. 10 is a perspective view of a part on the start point side in the electron transfer direction of the imaging region VR in the solid-state imaging device according to the second embodiment.
  • 11 is a cross-sectional view of the solid-state imaging device shown in FIG. 10 taken along the line XI-XI.
  • FIG. 12 is a diagram illustrating a planar configuration of the solid-state imaging device according to the third embodiment.
  • FIG. 13 is a diagram illustrating a planar configuration of the solid-state imaging device according to the fourth embodiment.
  • FIG. 14 is a diagram illustrating a planar configuration of the solid-state imaging device according to the fifth embodiment.
  • FIG. 15 is a diagram illustrating a planar configuration of the solid-state imaging device according to the sixth embodiment.
  • FIG. 16 is a cross-sectional view of a solid-state imaging device in which the light shielding structure is changed.
  • FIG. 17 is a perspective view of a portion on the start point side in the electron transfer direction of the imaging region VR in the front-illuminated solid-state imaging device.
  • FIG. 18 is a perspective view of a portion on the start point side in the electron transfer direction of the imaging region VR in the front-illuminated solid-state imaging device.
  • FIG. 19 is an enlarged view showing the channel stop IS of the solid-state imaging device shown in FIG.
  • FIG. 1 is a plan view of a back-illuminated solid-state imaging device 100.
  • An insulating layer 2 is formed on the semiconductor substrate, and a plurality of vertical charge transfer electrodes are formed on the surface of the insulating layer 2, and these constitute a vertical shift register.
  • the area where the vertical shift register is formed is an imaging area VR, which is a CCD imaging area in this example. Note that the imaging region VR may be composed of a MOS type image sensor.
  • a horizontal shift register HR is provided adjacent to one side of the imaging region VR, and a corner register CR is disposed in the charge transfer path from the horizontal shift register HR to the multiplication register EM.
  • the structure of the corner register CR is the same as that of the horizontal shift register HR, but the charge transfer direction is bent so as to draw an arc.
  • An amplifier AMP is electrically connected to the output terminal of the multiplication register EM, and image signals acquired from the output terminal OS of the amplifier AMP are sequentially read out for each pixel.
  • the central portion on the back side of the semiconductor substrate on which the insulating layer 2 is formed is etched into a rectangular shape, and a recess DP is formed.
  • the side where the concave portion DP is formed is the back surface of the substrate, and the image is incident on the back surface side of the solid-state imaging device.
  • the region corresponding to the bottom surface inside the concave portion is a thin plate portion having a thickness smaller than that of the periphery, and the periphery constitutes a thick plate portion having a thickness larger than that of the thin plate portion.
  • the imaging region VR composed of a plurality of vertical shift registers is mostly formed in a thin plate portion. If the direction perpendicular to both the electron transfer direction (the direction from the imaging region VR to the horizontal shift register HR) and the substrate thickness direction is the width direction of the imaging region VR, the width of the imaging region VR is larger than the width of the recess DP. Large, both end portions in the width direction are located in the thick plate portion.
  • a specific vertical shift register in which electrons are injected which will be described later, is located on the thick plate portion and is blocked from incident light.
  • FIG. 2 is a cross-sectional view of the solid-state imaging device shown in FIG.
  • the solid-state imaging device 100 is formed in a P-type semiconductor substrate 1A, a P-type epitaxial layer 1B grown on the semiconductor substrate 1A, an imaging region VR formed in the epitaxial layer 1B, and the epitaxial layer 1B. It has an N-type semiconductor region 1C and constitutes a buried channel type CCD.
  • the optical image h ⁇ enters from the back side of the substrate.
  • the semiconductor substrate 1 ⁇ / b> A is etched from the back surface side to form a recess DP.
  • the whole including the semiconductor substrate 1A, the epitaxial layer 1B, and the semiconductor region 1C is referred to as a semiconductor substrate 1.
  • An insulating layer 2 is formed on the semiconductor substrate 1, and a transfer electrode 3 is provided on the insulating layer 2.
  • a P-type contact region 1G is formed in a part of the epitaxial layer 1B, and an electrode E1 is provided in the contact region 1G.
  • a reference potential such as a ground potential
  • the potentials of the P-type semiconductor substrate 1A and the epitaxial layer 1B are determined.
  • an isolation (channel stop) IS composed of a plurality of P-type semiconductor regions extending along the charge transfer direction is formed to define each channel of the vertical shift register. .
  • Each isolation IS is shown in FIG. 2 as extending from the surface of the N-type semiconductor region 1C toward the deep portion and reaching the P-type epitaxial layer 1B. As shown in FIG. 19, it is formed by diffusing under the thickened portion of the insulating layer 2. The region outside the bottom surface of the recess DP (including the slope region) is thick, and dummy channels D2 to D4 and D5 to D7 are formed in these regions R2 and R3 (see FIG. 8). A monitoring channel D1 (and / or D8) is formed in R1 (and / or R4).
  • the channels D2 to D4, D5 to D7, D1, and D8 have no effect on the light h ⁇ incident from the back surface of the substrate. , Is shielded from light.
  • FIG. 3 is a cross-sectional view of the solid-state imaging device shown in FIG. 1 along arrows III-III.
  • the transfer electrodes 3A and 3B provided in the imaging region VR are alternately arranged, and some of these regions are overlapped, but an insulating layer 5 is interposed between the adjacent transfer electrodes 3A and 3B. Have been separated.
  • a signal from the imaging region VR is transferred by the horizontal shift register HR to the multiplication register EM via the corner register CR. Further, a multiplication register EM (in the figure, only the electrode group is schematically shown as EM) is located next to the horizontal shift register HR.
  • the semiconductor substrate 1 includes a thin plate portion in which the concave portion DP is formed and a thick plate portion around the thin plate portion.
  • the thick plate portion carriers generated inside by the incidence of light disappear before reaching the surface side.
  • the P-type impurity concentration of the semiconductor substrate 1A is sufficiently higher than that of the epitaxial layer 1B, the traveling distance of carriers is also shortened.
  • the horizontal shift register HR, the corner register CR (see FIG. 1), and the multiplication register EM are formed at least in a region outside the thin plate portion, and preferably formed in a region of the thick plate portion. Therefore, the carrier generated in the thick plate portion is not mixed into these registers.
  • FIG. 4 is a plan view showing a detailed connection relationship of the solid-state image sensor
  • FIG. 5 is a cross-sectional view taken along the line VV of the solid-state image sensor shown in FIG.
  • FIG. 6 is a block diagram showing a connection relationship between the driving / reading circuit 200 and the solid-state imaging device 100.
  • the imaging region VR includes vertical transfer electrodes 3A and 3B arranged alternately along the vertical direction (see FIG. 3). Each transfer electrode 3A, 3B extends in the horizontal direction, and adjacent ones are slightly overlapped.
  • the transfer electrode 3 is supplied with three-phase drive voltages (P1V, P2V, P3V). By applying this drive voltage, the electrons accumulated immediately below the transfer electrode are transferred in the vertical direction.
  • an FFT (full frame transfer) type CCD is shown, but this is an FT (frame transfer) type CCD further including a storage area, or IT (interline transfer). ) Type CCD.
  • a P-type isolation IS for separating the vertical charge transfer channels CH1 to CH10 (see FIG. 8) is formed. Charges generated in response to the incidence of light in the channels CH1 to CH10 constituting the imaging region VR are transferred in the vertical direction, and flow into the transfer electrodes 6 (see FIG. 5) of the horizontal shift register HR for each channel. .
  • a transfer electrode (transfer gate) to which a gate voltage TG is applied is provided between the imaging region VR and the horizontal shift register HR (see FIG. 3), and the imaging region is controlled by controlling the gate voltage TG.
  • the amount of charge flowing from VR to the horizontal shift register HR can be controlled.
  • the transfer electrodes 6A and 6B constituting the horizontal shift register HR are alternately arranged along the horizontal direction and partially overlap each other.
  • an insulating layer 5 (see FIG. 5) formed on the insulating layer 2 is interposed between adjacent transfer electrodes 3A, 3B, 6A, 6B, 7A, 7B, 8A, and 8B. These are electrically separated.
  • Three-phase drive voltages (P1HA, P2HA, P3HA) are applied to the transfer electrode 6, and electrons immediately below the transfer electrode 6 are transferred in the horizontal direction.
  • the horizontal shift register HR is continuously provided with a corner register CR bent in an arc shape.
  • the transfer electrodes 7A and 7B constituting the corner register CR are alternately arranged along a circular arc and partially overlap each other.
  • the transfer electrode 7 is supplied with a three-phase drive voltage (P1HA, P2HA, P3HA) common to that given to the horizontal shift register, and the electrons immediately below the transfer electrode 7 move along the arc in the multiplication register EM. Is transferred.
  • the transfer electrodes 8A and 8B are alternately arranged along the horizontal direction, and a part thereof overlaps.
  • Three-phase drive voltages (P1HB, P2HB, and P3HB) are applied to the transfer electrode 8, and electrons immediately below the transfer electrode 8 are transferred in the horizontal direction.
  • three transfer electrodes 8 are supplied with a drive voltage, while the remaining one transfer electrode 8 is a DC electrode and is supplied with a DC potential DCB.
  • the transfer electrodes 8 when there are four sets of transfer electrodes 8 that are sequentially adjacent in the horizontal direction, that is, when there are the first, second, third, and fourth transfer electrodes 8, the one that is positioned second is A DC potential DCB is applied to this as a DC electrode.
  • an appropriate positive potential (P1HB) is applied to the first transfer electrode 8 to deepen the potential well (increase the potential: see FIG. 7). Accumulate electrons inside.
  • a large positive potential (maximum value of P2HB> maximum value of P2HA) is also given to the third transfer electrode 8, a potential well is deepened, and a constant potential (DCB) applied to the second transfer electrode 8 is set. Is lower than these potentials (P1HB, P2HB) and forms a potential barrier between the first and third wells. In this state, when the first potential well is made shallower (the potential is lowered; see FIG.
  • the electrons overflowing from the potential well cross the potential barrier and the potential well of the third transfer electrode ( It falls within the potential depth ( ⁇ A).
  • ⁇ A potential depth
  • electron multiplication is performed.
  • the potential of the first potential is further lowered (upward) so that the accumulated electrons are completely transferred to the third potential well.
  • the downward direction of the potential ⁇ is positive.
  • the multiplied electrons deepen the potential well immediately below the fourth transfer electrode 8 and make the potential well immediately below the third transfer electrode 8 shallow, thereby forming a fourth potential well. Can be moved. Similarly, the electrons accumulated in the fourth potential well are moved to the first potential well of the next set using the same method as that used for the third to fourth charge transfer. Accumulated. Thereafter, the multiplication / transfer process is repeated in the next set using the same method as described above. In this example, three-phase driving is used for charge transfer. However, this may be four-phase driving or two-phase driving.
  • the multiplied electrons finally flow into the high-concentration N-type semiconductor region FD.
  • the semiconductor region FD is connected to the amplifier AMP.
  • This amplifier AMP is a floating diffusion amplifier built in the semiconductor substrate 1.
  • An amplifier AMP is connected to the semiconductor region FD of the signal reading unit shown in FIG.
  • the gate potential of the transistor QB varies according to the amount of charge in the semiconductor region FD, and the amount of current flowing through the resistor R from the output drain OD via the transistor QB varies accordingly. That is, the voltage (output voltage) OS at both ends of the resistor R changes according to the amount of charge accumulated in the semiconductor region FD, and this is read out.
  • the reset voltage RG is input to the reset gate RG, and the potential of the semiconductor region FD is reset through the reset drain RD.
  • the potential of the reset drain RD is positive, a potential well capable of storing electrons is formed in the semiconductor region FD at the time of reset.
  • the potential of the reset gate RG is controlled to turn off the transistor QA and keep the potential of the semiconductor region FD at a floating level.
  • the potential of the previous signal gate SG is raised, the charge is accumulated therein, and the potential of the output gate OG is fixed, so that the region directly below the signal gate SG A barrier is formed so as to prevent charges from flowing into the semiconductor region FD. Thereafter, if the potential of the signal gate SG is lowered while the potential of the output gate OG is fixed, the charge accumulated immediately below the signal gate SG flows into the semiconductor region FD.
  • the multiplication register EM multiplies electrons from the horizontal shift register HR.
  • the epitaxial layer is known for its excellent crystallinity. Therefore, when the N type semiconductor region 1C is formed in the P type epitaxial layer 1B, electrons in the vertical shift register, the horizontal shift register HR, and the corner register CR are transferred in the semiconductor having excellent crystallinity, and noise is generated. The electronic transfer is performed with high accuracy. The transferred electrons enter the semiconductor region 1C of the multiplication register EM.
  • the multiplication register EM includes an N-type semiconductor region 1C, an insulating layer 2 formed on the semiconductor region 1C, a plurality of transfer electrodes 8 formed adjacently on the insulating layer 2, and a transfer electrode 8. And a DC electrode 8 to which a DC potential DCB (see FIGS. 4 and 7) is applied.
  • the epitaxial layer 1B is formed on the entire surface of the substrate, but the N-type semiconductor region 1C is selectively formed only in the region where the imaging region VR, the horizontal shift register HR, the corner register CR, and the multiplication register EM are formed. Is formed.
  • FIG. 7 is a potential diagram in the multiplication register EM.
  • the potential change in the semiconductor region immediately below the transfer electrode 8 in the multiplication register EM becomes steep and the electron multiplication factor is remarkably improved. That is, the potential change in the N-type semiconductor region 1C between the DC electrode 8 to which the DC potential DCB is applied and the transfer electrode (multiplier electrode) 8 to which the potential P2HB is applied becomes steep, Remarkable electron multiplication is performed.
  • Electron multiplication is performed when electrons flow from the first potential well (potential P1HB) to the third potential well (potential P2HB) beyond the second potential to which the DC potential DCB is applied. .
  • the concentration C N of the concentration C P and N-type impurity of P-type impurities in the semiconductor element in the present example is as follows.
  • the surface resistance of the P-type epitaxial layer 1B is set so that the photosensitivity in the imaging region VR is high.
  • the impurity concentration C satisfies the following relationship. ⁇ C P (1A)> C N (1C)> C P (1B)
  • the thickness t (1A) of the P-type semiconductor substrate 1A, the thickness t (1B) of the P-type epitaxial layer 1B, and the thickness t (1C) of the N-type semiconductor region 1C satisfy the following relationship. T (1A)> t (1B)> t (1C)
  • the electron injection means (input electrode) 11A is provided at the end of the imaging region VR on the start point side in the electron transfer direction.
  • the transfer rate of electrons in the vertical shift register is set to be slower than the transfer rate of the horizontal shift register. Therefore, electrons can be injected into the specific vertical shift register (monitoring channel D1) from the end on the starting point side in the electron transfer direction into the vertical shift register at an accurate timing.
  • the electrons are transferred to the horizontal shift register HR via the vertical shift register, and then transferred to the multiplication register EM via the corner register CR and multiplied by the multiplication register EM. Since the specific vertical shift register (channel D1) located at the end is set to be shielded from incident light, the electrons injected for monitoring accurately reflect the multiplication factor in the multiplication register. Is output at a stable timing. Therefore, it is possible to monitor with a stable multiplication factor.
  • a specific vertical shift register (channel D1) is located in the thick plate portion.
  • This solid-state imaging device is a back-illuminated solid-state imaging device in which the imaging region VR is formed in a thin plate portion, and receives light from the back side without electrodes, so that it is possible to perform imaging with high sensitivity. Since the thick plate part can absorb incident light more sufficiently than the thin plate part, the image incident from the back side hardly reaches the front side of the thick plate part, so that the electron injection is performed.
  • the vertical shift register (channel D1) can be blocked from incident light. Electrons are supplied to the input electrode 11A from the terminal EIJ of the current source 13A.
  • FIG. 8 is a perspective view of a part on the start point side in the electron transfer direction of the imaging region VR in the solid-state imaging device according to the first embodiment
  • FIG. 9 is a cross-sectional view taken along the arrow IX-IX of the solid-state imaging device shown in FIG. .
  • the electron injection means includes an input electrode 11A electrically connected to the semiconductor region (semiconductor substrate) 1C.
  • the input electrode 11A is in contact with the high-concentration N-type contact region 1K formed in the semiconductor region 1C through a contact hole provided in the insulating layer 2 (see FIG. 9). Since the contact region 1K is adjacent to the vertical transfer electrode 3A, electrons injected into the contact region 1K via the input electrode 11A are transferred along the arrow direction (vertical direction) in the figure.
  • the regions R1, R2, R3, and R4 shown in FIG. 8 are shielded from light, the charge caused by the incidence of light is applied to the electrons injected from the input electrode 11A for monitoring. There is no contamination.
  • FIG. 10 is a perspective view of a portion on the start point side in the electron transfer direction of the imaging region VR in the solid-state imaging device according to the second embodiment
  • FIG. 11 is a cross-sectional view taken along line XI-XI of the solid-state imaging device shown in FIG. .
  • This solid-state imaging device is that a gate electrode 12A is provided between the N-type contact region 1K in the first embodiment and a region directly below the transfer electrode 3A at the start point side end.
  • the gate electrode 12A constitutes an electron supply unit that controls the potential between the input electrode 11A and a specific vertical shift register (transfer electrode 3A of the channel D1).
  • Other configurations are the same as those of the first embodiment.
  • the timing of injecting electrons into the vertical shift register can be controlled by adjusting the voltage IGV applied to the gate electrode 12A, it is possible to inject electrons at an accurate timing, and therefore, the multiplication factor is stabilized. Monitoring is possible.
  • the gate electrode 12A is formed on the insulating layer 2.
  • FIG. 12 is a diagram illustrating a planar configuration of the solid-state imaging device according to the third embodiment.
  • the multiplication register EM includes a first multiplication register EMA for multiplying electrons transferred from the first area (R1, R2, RE1) of the imaging area VR, and a second area (R3, R4,. And a second multiplication register EMB for multiplying the electrons transferred from RE2). That is, the imaging region VR is composed of a first region on the left side and a second region on the right side from the center position in the width direction.
  • the electrons transferred from the first area on the left side are transferred to the first multiplication register EMA via the first horizontal shift register HRA and the first corner register CRA, and in the first multiplication register EMA. After being multiplied, it is output to the outside through the floating diffusion amplifier AMPA.
  • the cross-sectional view and action of the VA-VA arrow in the portion from the horizontal shift register HRA to the multiplication register EMA are the same as those shown in FIG. In the case of this cross section, the symbols HR, CR, EM, and AMP in the figure are read as HRA, CRA, EMA, and AMPA, respectively.
  • the electrons transferred from the second region on the right side are transferred to the second multiplication register EMB via the second horizontal shift register CRB and the second corner register CRB, and are multiplied by the second multiplication register EMB. After being multiplied, it is output to the outside via the second floating diffusion amplifier AMPB.
  • the cross-sectional view and operation of the VB-VB arrow in the portion from the horizontal shift register HRB to the multiplication register EMB is the same as that shown in FIG. In the case of this cross section, the symbols HR, CR, EM, and AMP in the figure are replaced with HRB, CRB, EMB, and AMPB, respectively.
  • the input electrode includes a first electron injection means (first input electrode) 11A provided at an end of the first region (R1, R2, RE1) on the start point side in the electron transfer direction of the region R1, and the second region In the region (R3, R4, RE2), there is provided second electron injection means (second input electrode) 11B provided at the end of the region R4 on the starting point side in the electron transfer direction. Further, in the remaining regions (R2, RE, R3), a third input electrode 11C is provided at the end of the imaging region VR on the start point side in the electron transfer direction.
  • Current sources 13A, 13B, and 13C for supplying electrons are connected to the input electrodes 11A, 11B, and 11C, respectively. These electron supplies are performed according to the required application.
  • the input electrodes 11A and 11B at both ends perform electron injection for monitoring the multiplication factor of the multiplication register, but the central input electrode 11C injects electrons into a region other than these to perform monitoring. Can be used to do.
  • the multiplication factors of the respective multiplication registers EMA and EMB are obtained by using electrons injected from the first and second electron injection means (electrodes 12A and 12B) provided in the respective regions as the first and second multiplications.
  • the multiplication can be monitored by the multiplication registers EMA and EMB.
  • the empty space near the multiplication register tends to be narrowed.
  • the electron injection means is arranged without being restricted by physical restrictions in the vicinity of the multiplication registers. be able to.
  • FIG. 13 is a diagram showing a planar configuration of the solid-state imaging device according to the fourth embodiment.
  • the solid-state imaging device of this embodiment includes a single input electrode 11A ′ extending including the regions R1, R2, RE, R3, and R4, and includes a gate electrode 12A in the region R1 and a gate electrode 12B in the region R4.
  • a gate electrode 12C is provided in the regions R2, R3, and E3.
  • the longitudinal sectional structure in the vicinity of each electrode is the same as that shown in FIG. These electron supplies are performed according to the required application.
  • the gate electrodes 12A and 12B at both ends perform electron injection for monitoring the multiplication factor of the multiplication register, supply electrons from the current source 13A to the input electrode 11A ', and apply them to the gate electrodes 12A and 12B. By controlling the voltage, the amount of electron supply can be controlled.
  • the central input electrode 11C can be used when monitoring is performed by injecting electrons into a region other than these, and the electrons are supplied from the current source 13A to the input electrode 11A ′. It can be controlled by the voltage applied to the gate electrode 12C.
  • FIG. 14 is a diagram showing a planar configuration of the solid-state imaging device according to the fifth embodiment.
  • This type of solid-state imaging device is obtained by omitting the input electrode 11C from the solid-state imaging device according to the third mode shown in FIG.
  • Other structures and operations are the same as those of the third embodiment.
  • FIG. 15 is a diagram illustrating a planar configuration of the solid-state imaging device according to the sixth embodiment.
  • the solid-state imaging device of this form is a region R1 between the input electrodes 11A, 11B, and 11C and the transfer electrode at the end of the vertical shift register in the solid-state imaging device according to the third embodiment shown in FIG.
  • a gate electrode 12A ′ extending to include R4 is disposed.
  • Other structures and operations are the same as those of the third embodiment.
  • the longitudinal sectional view along the electron transfer direction in the vicinity of each electrode is the same as that shown in FIG. 11, and the gate electrode 12A in the figure is read as 12A ', and the input electrode 11A in the figure is replaced with the input electrode 11A, 11B and 11C.
  • the electrons supplied from the current sources 13A, 13B, and 13C to the input electrodes 11A, 11B, and 11C can control the injection amount to the corresponding vertical shift register by controlling the voltage applied to the gate electrode 12 '. Can do.
  • FIG. 16 is a cross-sectional view of a solid-state imaging device with a light shielding structure changed.
  • the thickness of the substrate is used to prevent light from entering the regions R1, R2, R3, and R4.
  • the surface on the back surface side of the semiconductor substrate 1 (the exposed surface of the thick plate portion)
  • a light shielding member SF made of an aluminum plate, a ceramic plate, or the like is attached to prevent the light h ⁇ from entering the regions R1, R2, R3, and R4 from the back side. Therefore, it is possible to monitor the multiplication factor with high accuracy.
  • FIG. 17 is a perspective view of a part on the start point side in the electron transfer direction of the imaging region VR in the front-illuminated solid-state imaging device. In the figure, illustration of an electron injection electrode and the like is omitted.
  • a light shielding film SF made of an aluminum film or the like is disposed on the transfer electrodes 3A and 3B in the regions R1 and R2 thus formed.
  • the light shielding film SF is insulated from the transfer electrodes 3A and 3B. In the case of this structure, light incident from the surface side is blocked by the light shielding film SF, and does not enter the monitoring channel D1 and the dummy channels D2 to D4. Therefore, it is possible to monitor the multiplication factor with high accuracy.
  • FIG. 18 is a perspective view of a portion on the start point side in the electron transfer direction of the imaging region VR in the front-illuminated solid-state imaging device.
  • the concave portion DP is not provided, and in the case of a front-illuminated solid-state imaging device, the monitor channel D1 and the dummy channels D2 ⁇
  • a light shielding film SF made of an aluminum film or the like is disposed on the gate electrode 12A and the transfer electrodes 3A and 3B in the regions R1 and R2 where D4 is formed.
  • the light shielding film SF is insulated from the transfer electrodes 3A and 3B. In the case of this structure, light incident from the surface side is blocked by the light shielding film SF, and does not enter the monitoring channel D1 and the dummy channels D2 to D4. Therefore, it is possible to monitor the multiplication factor with high accuracy.
  • the multiplication factor can be monitored in real time for each line with a simple configuration.
  • the embedded channel CCD is configured by the presence of the above-described N-type semiconductor region 1C. If this is omitted, a surface channel CCD can be formed.
  • the above-described embodiment can also be applied to a front-illuminated solid-state imaging device without etching the semiconductor substrate.
  • the present invention can be applied to a solid-state imaging device with a built-in electron multiplication function capable of capturing a weak light image by performing high-performance electron multiplication.
  • SYMBOLS 1A Semiconductor substrate, 1B ... Epitaxial layer, VR ... Imaging region, 1C ... N type semiconductor region, HR ... Horizontal shift register, EM ... Multiplication register, 11A ... -Input electrode, 12A ... gate electrode.

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

Cette invention se rapporte à un dispositif de détection d'images à semi-conducteurs possédant une fonction de multiplication d'électrons, qui comprend : une zone d'imagerie (VR) composée d'une pluralité de registres à décalage vertical ; un registre à décalage horizontal (HR) qui transfère les électrons en provenance de la zone d'imagerie (VR) ; un registre de multiplication (EM) qui multiplie les électrons transférés en provenance du registre à décalage horizontal (HR) ; et une électrode d'injection d'électrons (11A) située dans une partie d'extrémité du côté du point de départ dans le sens de transfert des électrons de la zone d'imagerie (VR). L'électrode d'injection d'électrons (11A) injecte les électrons vers un registre à décalage vertical spécifique (un canal (CH1)) qui est positionné dans une partie de plaque épaisse d'un substrat semi-conducteur et protégé de la lumière incidente.
PCT/JP2010/051038 2009-01-30 2010-01-27 Dispositif de détection d'images à semi-conducteurs possédant une fonction de multiplication d'électrons Ceased WO2010087367A1 (fr)

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CN2010800011701A CN101960600A (zh) 2009-01-30 2010-01-27 内建电子倍增功能型的固体摄像元件
EP10735833.5A EP2264767B1 (fr) 2009-01-30 2010-01-27 Dispositif de detection d'images a semi-conducteurs possedant une fonction de multiplication d'electrons
US12/920,131 US8345135B2 (en) 2009-01-30 2010-01-27 Solid-state image sensing device containing electron multiplication function

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JP2009020929A JP5335459B2 (ja) 2009-01-30 2009-01-30 電子増倍機能内蔵型の固体撮像素子
JP2009-020929 2009-01-30

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JP7522019B2 (ja) * 2020-12-07 2024-07-24 浜松ホトニクス株式会社 光電変換装置

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EP2264767A4 (fr) 2011-11-09
EP2264767A1 (fr) 2010-12-22
JP5335459B2 (ja) 2013-11-06
KR20100107062A (ko) 2010-10-04
TW201034452A (en) 2010-09-16
JP2010177590A (ja) 2010-08-12
US8345135B2 (en) 2013-01-01
KR101064433B1 (ko) 2011-09-14
CN101960600A (zh) 2011-01-26
US20110025897A1 (en) 2011-02-03
EP2264767B1 (fr) 2013-07-10
TWI497995B (zh) 2015-08-21

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