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WO2010082280A1 - Radio transmitting apparatus - Google Patents

Radio transmitting apparatus Download PDF

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Publication number
WO2010082280A1
WO2010082280A1 PCT/JP2009/007147 JP2009007147W WO2010082280A1 WO 2010082280 A1 WO2010082280 A1 WO 2010082280A1 JP 2009007147 W JP2009007147 W JP 2009007147W WO 2010082280 A1 WO2010082280 A1 WO 2010082280A1
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WO
WIPO (PCT)
Prior art keywords
bit
unit
bits
byte
parity
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/JP2009/007147
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French (fr)
Japanese (ja)
Inventor
篠井健一郎
板原弘
萩原雄一
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Panasonic Corp
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Panasonic Corp
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching
    • H04L1/0068Rate matching by puncturing
    • H04L1/0069Puncturing patterns
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0047Decoding adapted to other signal detection operation
    • H04L1/005Iterative decoding, including iteration between signal detection and decoding operation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • H04L1/0066Parallel concatenated codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L2001/0092Error control systems characterised by the topology of the transmission link
    • H04L2001/0093Point-to-multipoint

Definitions

  • the present invention relates to a wireless transmission device.
  • terrestrial broadcasting that has been analog has been digitized for the purpose of effective use of radio waves.
  • Digital broadcasting using terrestrial television broadcasting is called “terrestrial digital television broadcasting”
  • audio broadcasting using terrestrial broadcasting is called “terrestrial digital audio broadcasting”.
  • Non-Patent Document 1 and Non-Patent Document 2 define the technologies related to the digital television broadcast and the digital audio broadcast, respectively.
  • An object of the present invention is to provide a wireless transmission device that realizes high quality digital signal transmission.
  • the wireless transmission device of the present invention is a wireless transmission device that transmits a transmission signal in a digital broadcasting system, and includes an outer encoder, an inner encoder arranged in series with the outer encoder, and an output from the inner encoder. Puncturing means for puncturing systematic bits and parity bits according to a puncture pattern, and turbo coding means, and modulation means for forming a modulation signal based on an output signal of the turbo coding means, The puncturing means switches the puncture pattern according to the coding rate of the transmission signal.
  • FIG. 3 is a block diagram illustrating a configuration of a wireless transmission device according to the first embodiment.
  • Diagram for explaining TS remultiplexer processing Diagram showing an example of two-layer division
  • FIG. 9 is a block diagram illustrating a configuration of a wireless transmission device according to the third embodiment. The figure which shows the corrected amount in each hierarchy which concerns on Embodiment 3.
  • FIG. Block diagram showing the configuration of the turbo encoder The figure which shows the corrected amount in each hierarchy which concerns on Embodiment 3.
  • FIG. 1 is a block diagram showing a configuration of radio transmitting apparatus 100 according to Embodiment 1 of the present invention.
  • a radio transmission apparatus 100 includes a TS remultiplexer 101, an outer encoding unit 102, a layer division unit 103, a byte / bit MSB (Most Significant Bit) first unit 104, an energy spreading unit 105, A delay correction unit 106, a bit / byte MSB (Most Significant Bit) first unit 107, a byte interleave unit 108, a byte / bit MSB (Most Significant Bit) first unit 109, and a turbo encoding unit 110, , Carrier modulation section 111, layer synthesis section 112, time interleaving section 113, frequency interleaving section 114, scattered pilot (Scattered Pilot) signal section 115, CP signal generation section 116, and control signal generation section 117.
  • Scattered Pilot scattered pilot
  • an additional information generation unit 118 and an OFDM frame configuration unit 119 are included in the wireless transmission device 100.
  • functional units other than the turbo encoding unit 110 have the same functions as those defined in the STD-B31 standard (or STD-B29 standard).
  • the TS remultiplexer 101 receives a transmission stream (that is, a transport stream (TS)) and remultiplexes the input transmission stream.
  • the input transmission stream is, for example, an output stream of an MPEG multiplexing unit (not shown).
  • the transport stream after re-multiplexing is composed of a multiplex frame consisting of n transport stream packets (TSP) as a basic unit.
  • TSP transport stream packets
  • FIG. 2 is a diagram for explaining the processing of the TS remultiplexer 101.
  • FIG. 2A is a table showing the number of TSPs constituting a multiplex frame with respect to the transmission mode and the guard interval ratio.
  • the TSP constituting the multiplex frame is a 204-byte TSP in which 16-byte null data is added to 188 bytes, and this is called a transmission TS.
  • the transmission TSP in the multiplex frame is transmitted (TSPX) in the X layer of the OFDM signal (the X layer indicates one of the A layer, the B layer, and the C layer). Finally, it belongs to one of null packets (TSPnull) that are not transmitted as an OFDM signal.
  • the receiver can reproduce the synchronization of the transport stream from the synchronization of the OFDM signal, and the synchronization performance is enhanced.
  • the receiving side By associating the TSP arrangement in multiple frames with the “separation / combination operation” of the layer, the receiving side reproduces the same single TS as the transmitting side from the signal transmitted divided into multiple layers Can do.
  • Outer encoding section 102 receives the transport stream packet obtained by TS remultiplexer 101, and performs error correction encoding for each transport packet.
  • the outer code applied to the outer encoding unit 102 is a shortened Reed-Solomon code (204, 188).
  • the shortened Reed-Solomon (204,188) code is generated by adding 51 bytes of 00HEX before the input data byte in the Reed-Solomon (255,239) code and removing the first 51 bytes after encoding.
  • p (x) X8 + X4 + X3 + X2 + 1
  • the layer division unit 103 divides the remultiplexed TS into a designated layer in units of 204 bytes (transmission TSP) from the byte next to the TS synchronization byte to the synchronization byte. At the same time, the layer division unit 103 removes null packets.
  • the hierarchy to which each transmission TSP should belong is specified by the hierarchy information based on the organization information. Here, the maximum number of hierarchies is three. At this time, the OFDM frame synchronization is shifted by 1 byte and becomes the head of the information byte.
  • FIG. 3 is a diagram illustrating an example of two-layer division.
  • the byte / bit MSB first unit 104 is provided for each layer. Therefore, here, the same number of three byte / bit MSB first units 104 as the maximum number of layers is provided.
  • the byte / bit MSB first unit 104 receives the byte string divided by the hierarchy dividing unit 103 and performs MSB first processing on the bits in each byte.
  • the energy spreading unit 105 performs an exclusive OR operation on a PRBS (pseudo random code sequence) generated by the circuit shown in FIG.
  • the initial value of the register in the circuit shown in FIG. 4 is “100101010000000” (D1 to D14), and is initialized for each OFDM frame. At this time, the head of the OFDM frame is the MSB position of the byte next to the TSP synchronization byte. It is assumed that the shift register operates also in the synchronous byte portion.
  • the delay correction unit 106 performs delay correction on the signal subjected to the energy diffusion processing by the energy diffusion unit 105. This delay correction is for making the delay time in each layer the same by sending and receiving.
  • FIG. 5 is a diagram showing the correction amount in each layer.
  • a delay amount including a transmission / reception delay amount (11 transmission TSPs) by byte interleaving is set to be 1 frame + 1 TSP.
  • a transmission TSP delay amount (11 TSP) caused by byte interleaving, which will be described later, also varies from layer to layer when converted to a delay time.
  • delay correction corresponding to the transmission bit rate is performed for each layer prior to byte interleaving.
  • bit / byte MSB first unit 107 receives the bit sequence that has been delay-corrected by the delay correction unit 106, and performs MSB first processing on the byte sequence obtained by bundling the input bit sequence in units of bytes.
  • the byte interleave unit 108 byte interleaves the byte sequence obtained by the bit / byte MSB first unit 107.
  • the byte interleave unit 108 has a configuration as shown in FIG. 6, for example.
  • the total transmission and reception delay due to byte interleaving and deinterleaving on the receiving side is 17 x 11 x 12 bytes (equivalent to 11TSP).
  • the byte interleaving unit 108 performs convolutional byte interleaving on the 204-byte transmission TSP that is error-protected and energy-spread with an 11RS code.
  • the interleave depth is 12 bytes. However, it is assumed that the byte next to the synchronization byte passes through a reference path without delay.
  • the byte / bit MSB first unit 109 receives the byte string after byte interleaving by the byte interleaving unit 108, and performs MSB first processing on the bits in each byte.
  • the turbo encoding unit 110 performs turbo encoding on the bit string obtained by the byte / bit MSB first unit 109.
  • the turbo encoding unit 110 is a serial concatenated convolutional code (SCCC) type turbo code processing unit.
  • SCCC serial concatenated convolutional code
  • the turbo encoding unit 110 turbo-encodes the input bit sequence while switching the puncture pattern according to the encoding rate applied to the transmission signal.
  • the configuration and operation of the turbo encoding unit 110 will be described in detail later.
  • the carrier modulation unit 111 performs modulation mapping after bit-interleaving a bit string, which is a code word obtained by a convolutional encoder, by a method specified in advance for each layer.
  • the carrier modulation unit 111 includes a delay correction unit, a bit interleaving unit 141, and a mapping unit 142 as shown in FIG.
  • FIG. 8 is a diagram illustrating the amount of delay correction associated with bit interleaving.
  • the parameter setting values differ between modes, and in modes 1 to 3, the parameter settings are as shown in FIG.
  • Hierarchical combining section 112 combines the signals of the respective layers that have been subjected to channel coding and carrier modulation with parameters designated in advance, inserts them into the data segment, and performs speed conversion.
  • time interleaving unit 113 performs time interleaving on the signal subjected to hierarchical synthesis by the hierarchical synthesis unit 112 in units of modulation symbols (I and Q axis units).
  • the frequency interleaving unit 114 frequency interleaves the signal time-interleaved by the time interleaving unit 113.
  • FIG. 10 is a block diagram showing the configuration of the frequency interleaving unit 114.
  • the frequency interleaving unit 114 includes, in segment division, a partial reception unit, a differential modulation unit (a segment in which carrier modulation is specified as DQPSK), and a synchronous modulation unit (a segment in which the carrier modulation is specified as QPSK, 16QAM, or 64QAM).
  • data segment numbers 0 to 12 are assigned.
  • the data segments of each hierarchy are sequentially arranged in the order of numbers, and the A hierarchy, the B hierarchy, and the C hierarchy are arranged from the hierarchy including the smaller number of data segments. Even when the layers are different, inter-segment interleaving is applied to data segments belonging to the same type of modulation unit.
  • inter-segment interleaving which is interleaving with other segments, is not performed. Further, as shown in the frame configuration described later, since the differential modulation unit and the synchronous modulation unit have different frame structures, inter-segment interleaving is executed in each group. Inter-segment interleaving across different layers is performed to maximize the effect of frequency interleaving.
  • Inter-segment interleaving is performed for the differential modulation (DQPSK) unit and the synchronous modulation (QPSK, 16QAM, 64QAM) unit, respectively, according to FIG.
  • Si, j, k represents a carrier symbol having a data segment structure
  • n represents the number of segments assigned to the differential modulation unit and the synchronous modulation unit.
  • FIG. 12 After performing carrier rotation for each segment according to the segment number, it is randomized as shown in FIGS.
  • S ′ i, j, k is the carrier symbol of the kth segment after inter-segment interleaving is performed.
  • the numbers in FIGS. 13 and 14 indicate the intra-segment carrier numbers after the carrier rotation. 13 and 14, the carrier data having the value indicated by “before” is the carrier data indicated by “after” as a result of intra-segment carrier randomization.
  • carrier rotation and carrier randomization are performed to eliminate the periodicity of the carrier arrangement. Thereby, when frequency selective fading coincides with the carrier arrangement period after inter-segment interleaving, a phenomenon in which the carrier of a specific data segment is erroneous in a burst is avoided.
  • Scattered pilot signal section 115 generates a pilot signal and outputs it to OFDM frame configuration section 119.
  • the pilot signal output from the scattered pilot signal section 115 is mapped in the frame by the scattered mapping pattern in the OFDM frame configuration section 119 as will be described later.
  • CP signal generation section 116 generates a pilot signal and outputs it to OFDM frame configuration section 119.
  • the pilot signal output from CP signal generation section 116 is mapped to a certain carrier.
  • the control signal generation unit 117 generates a control signal (here, TMCC (Transmission and Modulation Configuration Control) signal) and outputs it to the OFDM frame configuration unit 119.
  • TMCC Transmission and Modulation Configuration Control
  • the TMCC signal is mapped to a carrier different from the CP signal in the frame by the OFDM frame configuration unit 119 as will be described later.
  • FIG. 15 is a diagram illustrating an example of information allocation to 204 bits B 0 to B 203 of a carrier to which a TMCC signal is mapped (that is, a TMCC carrier).
  • B 110 to B 121 which are reserved bits of TMCC in the STD-B31 standard (or STD-B29 standard), are used as new control signals.
  • the system identifiers B 20 to B 21 are used.
  • the additional information generation unit 118 generates additional information and outputs the additional information to the OFDM frame configuration unit 119.
  • the OFDM frame configuration unit 119 includes a data segment received from the frequency interleaving unit 114, a pilot signal received from the scattered pilot signal unit 115, a pilot signal received from the CP signal generation unit 116, a control signal received from the control signal generation unit 117, and an addition
  • the additional signal received from the information generation unit 118 is mapped to a predetermined symbol to form a frame.
  • the OFDM segment configuration of the differential modulation unit is the same as the configuration defined in the STD-B31 standard (or STD-B29 standard).
  • S i, j represents a carrier symbol in the data segment after interleaving.
  • CP Continuous Pilot
  • TMCC Transmission and Multiplexing Configuration Control
  • AC Advanced Channel
  • the carrier numbers in mode 1 are 0 to 107, while in modes 2 and 3, they are 0 to 215 and 0 to 431, respectively.
  • the arrangement of various control signals added by the OFDM frame configuration unit 119 is shown in FIGS. 18 and 19 with carrier numbers in segments in each mode.
  • the CP of the differential modulator segment is a substitute for the SP of the synchronous modulator when the segment of the synchronous modulator is adjacent to the lower frequency, and is located at the low end of the differential modulator segment .
  • synchronous detection is performed using this CP as the high frequency end SP of the synchronous modulation section segment.
  • the carriers of TMCC and AC (AC1, AC2) are randomly arranged in the frequency direction in order to reduce the influence of periodic dips on transmission path characteristics due to multipath. In addition to the role of the AC pilot signal, it can also be used for additional information for transmission control. Note that the AC1 carrier is arranged at the same location as the AC1 carrier of the synchronous modulation segment.
  • the OFDM frame configuration unit 119 has an SP arrangement configuration (hereinafter referred to as SP Structure) defined by the STD-B31 standard (or STD-B29 standard).
  • SP Structure an SP arrangement configuration defined by the STD-B31 standard (or STD-B29 standard).
  • FIG. 20 is a diagram illustrating an OFDM segment structure of a synchronous modulation unit having a scattered pilot configuration. Also, the arrangement of various control signals added by the OFDM frame configuration section 119 is shown in FIG. 21 with the carrier numbers in the segments in each mode.
  • SPs are arranged every 3 subcarriers in the frequency (subcarrier) direction, albeit intermittently.
  • the arrangement interval in the frequency (subcarrier) direction of the SP uniquely determines the time length of the delay profile (spread) generated in the transmission path.
  • regression is performed in the time direction with a period of 4 OFDM symbols. This regression period uniquely determines the maximum Doppler frequency that can be accommodated.
  • FIG. 22 is a block diagram illustrating a configuration of the turbo encoding unit 110.
  • a turbo encoding unit 110 includes an outer encoder 211, interleavers 212 and 213, an inner encoder 214, a puncture processing unit 215, and a parallel serial conversion unit. (P / S) 216.
  • the outer encoder 211 is a convolutional encoder, and includes adders 221, 222, and 223 and delay units 224 and 225 as shown in FIG.
  • the coding rate of the outer encoder 211 is 1 ⁇ 2.
  • the outer encoder 211 encodes the input bit string d k and outputs the obtained systematic bit d k (A in FIG. 23) and parity bit P 1k (B in FIG. 23) to the interleavers 212 and 213, respectively. To do.
  • Interleavers 212 and 213 rearrange the input bit strings.
  • the interleavers 212 and 213 rearrange the input bit string within the processing unit using 1TSP (that is, 204 bytes) as an interleaving processing unit.
  • 1TSP that is, 204 bytes
  • the bit string after the systematic bit d k is rearranged by the interleaver 212 is denoted as dn
  • the bit string after the parity bit P 1k is rearranged by the interleaver 212 is denoted as P 1n .
  • the inner encoder 214 is a convolutional encoder, and includes adders 231, 232, and 233 and delay units 234 and 235, as shown in FIG.
  • the encoding rate of the inner encoder 214 is 2/3.
  • the inner encoder 214 encodes the input bit strings d n and P 1n , and the obtained systematic bits d n (A ′ in FIG. 24), parity bits P 1n (B ′ in FIG. 24), and parity bits P 2n (C in FIG. 24) is output to the puncture processing unit 215.
  • the outer encoder 211 and the inner encoder 214 perform convolutional encoding in two stages before and after the interleaving process.
  • the generator polynomial used in the outer encoder 211 and the inner encoder 214 is shown in FIG.
  • systematic bits d n next bit string systematic bits d k obtained is sorted by the interleaver 212 at the outer encoder 211 is an output of the inner encoder 214 as it is, obtained in the outer encoder 211
  • the bit string in which the parity bit P 1k thus rearranged is rearranged by the interleaver 213 becomes the parity bit P 1n that is the output of the inner encoder 214 as it is.
  • the systematic bit d n , the parity bit P 1n, and the parity bit P 2n obtained by the inner encoder 214 are thinned out by the puncture processing unit 215. This puncturing process is performed in order to obtain a desired coding rate required when input to the carrier modulation unit provided in the output stage of the turbo coding unit 110.
  • the puncture processing unit 215 switches the puncture pattern depending on the carrier modulation unit 111 in the subsequent stage. That is, the puncture processing unit 215 switches the puncture pattern according to the coding rate applied to the transmission signal that is finally transmitted from the wireless transmission device 100.
  • DQPSK, QPSK, 16QAM, and 64QAM are used as modulation systems, and different bit interleaving is applied to each modulation system.
  • different bit interleaving is applied to each modulation system.
  • the systematic bit and the parity bit 0 representing the channel value cannot be arranged in (1) polarity bits (b0, b1) that are difficult to error.
  • FIG. 26 is a diagram for explaining a case where the bit arrangement of the systematic bit and the parity bit 0 is biased.
  • FIG. 26A shows a puncture pattern 1.
  • the coding rate is 2/3
  • 1 parity bit is added to 2 systematic bits. That is, as shown in FIG. 26B, the puncture processing unit 215 receives systematic bits d n , parity bits P 1n and parity bits P 2n and performs puncture processing according to the puncture pattern 1 shown in FIG. 26A.
  • a transmission signal sequence (d n , P 1n , d n , d n , P 2n , d n ,...) Is output.
  • the transmission signal sequence output from the puncture processing unit 215 is converted into six parallel sequences in the S / P unit as shown in FIG. 26C. Is done.
  • the parity bit P2n is always arranged at a bit position other than the polarity bit. Further, even if bit interleaving is performed on the output of the S / P unit, the bit position where the parity bit P 2n is arranged basically does not change in the case of 64QAM. In FIG.
  • a delay unit (no delay, 24-bit delay, 48-bit delay, 72-bit delay, 96-bit delay, 120-bit delay) provided between the S / P unit and the mapping unit 142 is a bit.
  • An interleaving processing function unit (that is, the bit interleaving unit 141) is configured.
  • the parity bit 1 (that is, the parity bit P 2n ) is used as a polarity bit. It is preferable to arrange the parity bit 0 (that is, the parity bit P 1n ) in the polarity bit rather than the arrangement.
  • the correction capability of the inner decoder may be reduced. As a result, the final error correction capability is reduced. It is thought that it falls.
  • puncture processing section 215 selects an appropriate puncture pattern according to the coding rate and performs puncture processing. By improving the correction ability.
  • a symbol that includes at least one parity bit is used.
  • a systematic bit is arranged in at least one of the two polarity bits, and a parity bit is arranged in at least one of the bit groups other than the polarity bits.
  • at least one bit of the bit group other than the polarity bit is b3 (that is, the fourth bit).
  • FIG. 27 is a diagram for explaining the puncturing process when the coding rate is 3/4.
  • FIG. 27A shows a puncture pattern used when the coding rate is 3/4.
  • the parity bit is always arranged at b3 (that is, the fourth bit) as shown in FIG. 27B.
  • the number of parity bits included in one symbol is 1 bit or less regardless of the delay amount of the bit interleaver, and the number of symbols composed of only systematic bits can be reduced. As a result, error correction capability can be improved.
  • a systematic bit is arranged in at least one of the two polarity bits, and a bit group other than the polarity bits is included. At least one parity bit is arranged.
  • FIG. 29 is a diagram for explaining the puncturing process when the coding rate is 1/2.
  • FIG. 29A shows a puncture pattern used when the coding rate is 1/2.
  • the parity bits are always arranged at b1 (that is, the second bit) and b3 (that is, the fourth bit) as shown in FIG. 29B.
  • the number of systematic bits and the number of parity bits constituting one symbol of 16QAM are not changed. For this reason, it is possible to avoid the appearance of a symbol composed of only systematic bits. Therefore, in a case where symbols are lost in fading, the number of systematic bits that are lost can be suppressed, and it is possible to prevent a reduction in error correction capability.
  • FIG. 30 is a diagram for explaining the puncturing process when the coding rate is 2/3.
  • FIG. 30A shows a puncture pattern when the coding rate is 2/3.
  • FIG. 30B shows the bit arrangement before and after the interleaving process when this puncture pattern is used.
  • parity bit 1 is a polarity bit while determining a position to leave as a puncture pattern so that parity bit 0 is arranged in a polarity bit. The case where it is not arranged at all can be avoided.
  • b1, b2, and b3 are respectively delayed by 40 bit, 80 bit, and 120 bit by a bit interleaver.
  • the bit arrangement after bit interleaving in this case is shown in the subsequent stage of FIG. 30B.
  • the bits constituting the symbol are only systematic bits or parity bits. Therefore, when there are erasure symbols during fading, the number of affected systematic bits increases.
  • the parity bit 1 is not arranged at all in the polarity bit can be avoided, it is possible to prevent the error correction capability of the inner encoder from being lowered.
  • the puncture pattern used at each coding rate can also be used in the case of 64QAM.
  • FIG. 31 is a diagram for explaining puncturing processing when a coding rate is 3/4.
  • a systematic bit is arranged in at least one of two polarity bits, and at least one of a bit group other than the polarity bits. Parity bits are arranged. That is, there is no symbol composed only of systematic bits, and the probability that the systematic bits are arranged in the polarity bits is high, so that the error correction capability can be improved.
  • FIG. 32 is a diagram for explaining the puncturing process when the coding rate is 1/2.
  • the parity bits are always arranged in b1 (that is, the second bit), b3 (that is, the fourth bit) and b5 (that is, the sixth bit).
  • b1 that is, the second bit
  • b3 that is, the fourth bit
  • b5 that is, the sixth bit.
  • FIG. 33 is a diagram for explaining puncturing processing when the coding rate is 2/3.
  • a systematic bit is arranged in at least one of the two polarity bits, and other than the polarity bits.
  • Parity bits are arranged in at least one of the bit groups. That is, there is no symbol composed only of systematic bits, and the probability that the systematic bits are arranged in the polarity bits is high, so that the error correction capability can be improved.
  • turbo encoding section 110 includes outer encoder 211 and inner encoder 214 arranged in series with outer encoder 211.
  • a puncture processing unit 215 that punctures systematic bits and parity bits output from the inner encoder 214 according to the puncture pattern, and the puncture pattern is determined according to the coding rate of the transmission signal transmitted from the wireless transmission device 100. Switch.
  • the puncture pattern group includes a modulation scheme applied to a modulation unit provided at an output stage of the turbo encoding unit 110, and a delay caused by a bit interleaver provided between the turbo encoding unit 110 and the modulation unit.
  • a modulation scheme applied to a modulation unit provided at an output stage of the turbo encoding unit 110
  • a delay caused by a bit interleaver provided between the turbo encoding unit 110 and the modulation unit.
  • it is prepared to satisfy at least one of the following two points.
  • the systematic bits used as channel values at the time of decoding are arranged so as to come to the amplitude modulation polarity bits, and the parity bits created by the outer encoder 211 and the inner encoder 214 are either One of them is not reflected in the polarity bit at all, so that it is not biased.
  • Each symbol is not composed of only systematic bits or only parity bits.
  • a systematic bit is arranged in at least one of the two polarity bits, and the polarity bit Parity bits are arranged in at least one of the other bit groups.
  • the coding rate is 3/4 and the modulation method is 16QAM, an exception is made.
  • ISDB-T system transmission system for terrestrial digital television broadcasting
  • ISDB-Tsb system transmission system for terrestrial digital audio broadcasting
  • the present invention is not limited to this, and can also be applied to one-segment broadcasting. That is, the present invention can also be applied to multimedia broadcasting for mobile terminals.
  • Embodiment 2 In Embodiment 2, the parity bit obtained by the outer coding process is not used, but a known bit sequence is used instead.
  • the radio transmission apparatus according to Embodiment 2 has the same basic configuration as radio transmission apparatus 100, and will be described with reference to FIG.
  • outer encoding section 102 receives the transport stream packet obtained by TS remultiplexer 101 as in Embodiment 1, and for each transport packet Perform error correction coding.
  • the outer code applied to the outer encoding unit 102 is a shortened Reed-Solomon code (204, 188).
  • outer coding section 102 outputs a known bit sequence in place of the parity bit sequence obtained by the error correction coding process.
  • the TSP after encoding obtained by using the shortened Reed-Solomon code is a synchronization byte (1 byte), a systematic bit sequence (in the figure, a data part: 187 bytes) and a parity bit sequence (parity portion: 16 bytes in the figure).
  • Outer encoding section 102 replaces this parity bit sequence with a known bit series, and then outputs the encoded TSP to layer division section 103.
  • the known bit sequence may be composed of only 0 values or may be composed of only 1 values.
  • the energy spreading unit 105 performs exclusive OR operation on the PRBS (pseudo random code sequence) generated by the circuit shown in FIG. 4 for each layer and the signal excluding the synchronization byte and the known bit sequence.
  • PRBS pseudo random code sequence
  • a shortened Reed-Solomon code (204, 188) is applied for each TSP as outer decoding.
  • This shortened Reed-Solomon code has the ability to correct random errors up to 8 bytes out of 204 bytes.
  • the inner code in the ISDB-T system uses a punctured convolutional code having a constraint length of 7 and an encoding rate of 1/2 as a mother code.
  • a turbo code is known as a technique for realizing transmission characteristics close to the limits of information theory by a realistic process.
  • a PER around 2 ⁇ 10 ⁇ 4 is required.
  • the wireless transmission device 100 is provided with a turbo encoding unit 110 as a turbo encoder used for inner decoding.
  • the turbo coding unit 110 is a serial concatenated convolutional code (SCCC) type turbo code processing unit that is less likely to be flattened.
  • SCCC serial concatenated convolutional code
  • Reed-Solomon codes used for outer codes as error correction codes that are resistant to random errors cannot remove residual errors concentrated on a certain TSP, resulting in the number of error packet errors after turbo decoding. And the number of error packets after decoding in Reed-Solomon decoding are not greatly different, and there is a problem that the effect of improving the characteristics of inner decoding cannot be seen.
  • FIG. 35 is a diagram showing a distribution of residual error bits.
  • FIG. 35A shows an example of the distribution of residual error bits after turbo decoding
  • FIG. 35B shows an example of the distribution of residual error bits after Viterbi decoding.
  • the vertical axis represents the number of residual bit errors after decoding for each TSP
  • the horizontal axis represents the number of trials. Comparing FIG. 35A and FIG. 35B, the total number of error bits is smaller in FIG. 35A than in FIG. 35B, but in FIG. 35A, errors remain concentrated on a certain TSP. On the other hand, in FIG. 35B, the number of residual errors is more uniform for each TSP than in FIG. 35A.
  • outer coding section 102 outputs a known bit sequence instead of the parity bit sequence obtained by error correction coding processing.
  • the hierarchy division unit 103 divides the remultiplexed TS into a designated hierarchy in units of 204 bytes (transmission TSP) from the byte next to the TS synchronization byte to the synchronization byte. Therefore, the receiver side can use 17 consecutive bytes of the parity bit sequence (16 bytes) and the synchronization byte (1 byte) as known bits in turbo decoding.
  • a known bit sequence is transmitted after being interleaved by a serial concatenated convolutional code (Serial) Concatenated ⁇ Convolutional Codes, SCCC) type turbo code processing unit. Mixed randomly.
  • Serial serial concatenated convolutional code
  • SCCC serial concatenated ⁇ Convolutional Codes
  • FIG. 36 is a block diagram of radio transmitting apparatus 100a according to the third embodiment. 36 has the same basic configuration as that of the wireless transmission device 100 shown in FIG. 1 except that the byte interleaving unit 108 is not used, and a description thereof will be omitted.
  • the error bits remaining after turbo decoding tend to harden in close proximity. Therefore, if error bits generated in a certain TSP are distributed among a plurality of TSPs by byte interleaving section 108, since Reed-Solomon decoding is not performed in Embodiments 1 and 2, an error packet after turbo decoding is used. There arises a problem that the number of final error packets increases rather than the number.
  • the byte interleaving unit 108 in the first and second embodiments is deleted, and the delay correction unit 106 has no influence of the delay amount due to the byte interleaving. Therefore, the transmission as shown in FIG.
  • the transmission / reception delay amount is set to be 1 frame + 1 TSP.
  • the wireless transmission device 100a uses the turbo encoding unit 110 shown in FIG. 22 as the turbo encoder used for the inner decoding, but this is the turbo encoding unit 110a shown in FIG. In this manner, a configuration in which a bit interleaver 217 is further provided in the preceding stage of the outer encoder 211 may be adopted.
  • the correction amount shown in FIG. 5 is the correction amount shown in FIG. According to this configuration, the positions of known bits can be dispersed.
  • the wireless transmission device of the present invention is useful for realizing high quality digital signal transmission.

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Abstract

A radio transmitting apparatus wherein a high quality of digital signal transmission is achieved.  A radio transmitting apparatus (100) in a digital broadcast system includes a turbo encoding unit (110), which comprises: an external encoder (211); an internal encoder (214) connected in series with the external encoder (211); and a puncturing unit (215) for puncturing systematic and parity bits outputted from the internal encoder (214) in accordance with a puncture pattern.  Puncture patterns are switched in accordance with an encoding rate of transmission signals to be transmitted by the radio transmitting apparatus (100).  Specifically, according to any one of the puncture patterns prepared in the turbo encoding unit (110), in a symbol including systematic and parity bits, the systematic bit is placed on at least one of two polarity bits, while the parity bits are placed in at least one of groups of bits other than the polarity bits.

Description

無線送信装置Wireless transmission device

 本発明は、無線送信装置に関する。 The present invention relates to a wireless transmission device.

 近年、電波の有効利用を目的として、これまでアナログ方式(地上アナログテレビジョン放送)だった地上波放送も、デジタル化が進められている。デジタル方式で、地上波を使ったテレビジョン放送は、「地上デジタルテレビジョン放送」と呼ばれ、また、地上波を使った音声放送は、「地上デジタル音声放送」と呼ばれる。 In recent years, terrestrial broadcasting that has been analog (terrestrial analog television broadcasting) has been digitized for the purpose of effective use of radio waves. Digital broadcasting using terrestrial television broadcasting is called “terrestrial digital television broadcasting”, and audio broadcasting using terrestrial broadcasting is called “terrestrial digital audio broadcasting”.

 デジタル方式では、従来のTV信号(アナログ)又は音声信号を1と0のデジタル化信号に変換し、送信する。そのままでは伝送する情報帯域がアナログに比べると約20倍に広がるので、符号圧縮と呼ばれる技術(実用的にはMPEG-2)を用いて、帯域を圧縮した(約1/30~1/60)信号で放送する。デジタル方式を用いることにより、従来のアナログ方式に比べて、より高品質な(ゴーストや雑音のない)映像と音声を受信できる。このデジタルテレビ放送及びデジタル音声放送に関する技術は、例えば、非特許文献1及び非特許文献2でそれぞれ規定されている。 In the digital system, a conventional TV signal (analog) or audio signal is converted into a digitized signal of 1 and 0 and transmitted. As it is, the information bandwidth to be transmitted is about 20 times larger than that of analog, so the bandwidth is compressed using a technique called code compression (practically MPEG-2) (about 1/30 to 1/60). Broadcast on signal. By using the digital system, it is possible to receive higher-quality (ghost and noise-free) video and audio than the conventional analog system. For example, Non-Patent Document 1 and Non-Patent Document 2 define the technologies related to the digital television broadcast and the digital audio broadcast, respectively.

ARIB STD-B31 Version 1.0 (April 5, 2001)ARIB STD-B31 Version 1.0 (April 5, 2001) ARIB STD-B29 Version 1.0 (April 5, 2001)ARIB STD-B29 Version 1.0 (April 5, 2001)

 しかしながら、上記した従来のデジタル放送技術でもアナログ方式に比べて十分に高品質な放送が実現されるものの、デジタル放送技術の更なる高性能化が望まれている。 However, although the above-described conventional digital broadcasting technology can realize sufficiently high-quality broadcasting as compared with the analog system, further enhancement of the performance of the digital broadcasting technology is desired.

 本発明の目的は、デジタル信号伝送の高品質化を実現する無線送信装置を提供することである。 An object of the present invention is to provide a wireless transmission device that realizes high quality digital signal transmission.

 本発明の無線送信装置は、デジタル放送システムにおいて伝送信号を送信する無線送信装置であって、外符号器と、前記外符号器と直列に配置される内符号器と、前記内符号器から出力されるシステマチックビット及びパリティビットをパンクチャパターンに従ってパンクチャするパンクチャ手段と、を含むターボ符号化手段と、前記ターボ符号化手段の出力信号に基づいて変調信号を形成する変調手段と、を具備し、前記パンクチャ手段が、前記伝送信号の符号化率に応じて前記パンクチャパターンを切り替える。 The wireless transmission device of the present invention is a wireless transmission device that transmits a transmission signal in a digital broadcasting system, and includes an outer encoder, an inner encoder arranged in series with the outer encoder, and an output from the inner encoder. Puncturing means for puncturing systematic bits and parity bits according to a puncture pattern, and turbo coding means, and modulation means for forming a modulation signal based on an output signal of the turbo coding means, The puncturing means switches the puncture pattern according to the coding rate of the transmission signal.

 本発明によれば、デジタル信号伝送の高品質化を実現する無線送信装置を提供することができる。 According to the present invention, it is possible to provide a wireless transmission device that realizes high quality digital signal transmission.

実施の形態1に係る無線送信装置の構成を示すブロック図FIG. 3 is a block diagram illustrating a configuration of a wireless transmission device according to the first embodiment. TS再多重化器の処理の説明に供する図Diagram for explaining TS remultiplexer processing 2階層分割の例を示す図Diagram showing an example of two-layer division PRBS(擬似ランダム符号系列)の生成回路の構成を示す図The figure which shows the structure of the generation circuit of PRBS (pseudo random code series) 各階層での補正量を示す図Diagram showing the amount of correction at each level バイトインタリーブ部の構成例を示す図The figure which shows the structural example of a byte interleave part キャリア変調部の構成例を示す図The figure which shows the structural example of a carrier modulation part ビットインタリーブに伴う遅延補正量を示す図Diagram showing the amount of delay correction associated with bit interleaving 各モードでのパラメータ設定例を示す図Diagram showing examples of parameter settings in each mode 周波数インタリーブ部の構成を示す図Diagram showing the configuration of the frequency interleave unit セグメント間インタリーブの説明に供する図Illustration for explaining inter-segment interleaving セグメント内インタリーブの説明に供する図Diagram for explaining interleaving within a segment セグメント内インタリーブの説明に供する図Diagram for explaining interleaving within a segment セグメント内インタリーブの説明に供する図Diagram for explaining interleaving within a segment TMCCキャリアの204ビットB0~B203に対する情報割当の一例を示す図Diagram showing an example of information allocation to 204 bits B 0 ~ B 203 of the TMCC carrier TMCC情報に対するビットB20~B121に対する情報割当の一例を示す図Diagram showing an example of information allocation for the bit B 20 ~ B 121 for TMCC information 差動変調部のOFDMセグメント構成を示す図The figure which shows the OFDM segment constitution of the differential modulation section OFDMフレーム構成部で付加される各種の制御信号の配置を各モードにおけるセグメント内のキャリア番号で示す図The figure which shows the arrangement | positioning of the various control signals added by an OFDM frame structure part with the carrier number in the segment in each mode OFDMフレーム構成部で付加される各種の制御信号の配置を各モードにおけるセグメント内のキャリア番号で示す図The figure which shows the arrangement | positioning of the various control signals added by an OFDM frame structure part with the carrier number in the segment in each mode スキャッタードパイロット構成をとる同期変調部のOFDMセグメント構造を示す図The figure which shows the OFDM segment structure of the synchronous modulation part which takes a scattered pilot structure OFDMフレーム構成部で付加される各種の制御信号の配置を各モードにおけるセグメント内のキャリア番号で示す図The figure which shows the arrangement | positioning of the various control signals added by an OFDM frame structure part with the carrier number in the segment in each mode ターボ符号化部の構成を示すブロック図Block diagram showing the configuration of the turbo encoder 外符号器の構成を示すブロック図Block diagram showing configuration of outer encoder 内符号器の構成を示すブロック図Block diagram showing the configuration of the inner encoder 外符号器及び内符号器にて用いられる生成多項式を示す図Diagram showing generator polynomial used in outer and inner encoders システマチックビット及びパリティビット0のビット配置が偏った構成となってしまう場合についての説明に供する図The figure which uses for description about the case where the bit arrangement | positioning of a systematic bit and the parity bit 0 becomes a biased structure 符号化率が3/4の場合のパンクチャ処理の説明に供する図The figure which uses for description of the puncture process in case an encoding rate is 3/4 符号化率が5/6、7/8の場合のパンクチャパターンを示す図The figure which shows the puncture pattern in case a coding rate is 5/6, 7/8 符号化率が1/2の場合のパンクチャ処理の説明に供する図The figure which uses for description of the puncture process in case an encoding rate is 1/2 符号化率が2/3の場合のパンクチャ処理の説明に供する図The figure which uses for description of puncture processing in case a coding rate is 2/3 符号化率が3/4の場合のパンクチャ処理の説明に供する図The figure which uses for description of the puncture process in case an encoding rate is 3/4 符号化率が1/2の場合のパンクチャ処理の説明に供する図The figure which uses for description of the puncture process in case an encoding rate is 1/2 符号化率が2/3の場合のパンクチャ処理の説明に供する図The figure which uses for description of puncture processing in case a coding rate is 2/3 実施の形態2の外符号化部における処理の説明に供する図The figure which uses for description of the process in the outer coding part of Embodiment 2. 残留誤りビットの分布を示す図Diagram showing distribution of residual error bits 実施の形態3に係る無線送信装置の構成を示すブロック図FIG. 9 is a block diagram illustrating a configuration of a wireless transmission device according to the third embodiment. 実施の形態3に係る各階層での補正量を示す図The figure which shows the corrected amount in each hierarchy which concerns on Embodiment 3. FIG. ターボ符号化部の構成を示すブロック図Block diagram showing the configuration of the turbo encoder 実施の形態3に係る各階層での補正量を示す図The figure which shows the corrected amount in each hierarchy which concerns on Embodiment 3. FIG.

 以下、本発明の実施の形態について図面を参照して詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

 (実施の形態1)
 図1は、本発明の実施の形態1に係る無線送信装置100の構成を示すブロック図である。図1において、無線送信装置100は、TS再多重化器101と、外符号化部102と、階層分割部103と、バイト/ビットMSB(Most Significant Bit)ファースト部104と、エネルギー拡散部105と、遅延補正部106と、ビット/バイトMSB(Most Significant Bite)ファースト部107と、バイトインタリーブ部108と、バイト/ビットMSB(Most Significant Bit)ファースト部109と、ターボ(Turbo)符号化部110と、キャリア変調部111と、階層合成部112と、時間インタリーブ部113と、周波数インタリーブ部114と、スキャッタードパイロット(Scattered Pilot)信号部115と、CP信号生成部116と、制御信号生成部117と、付加情報生成部118と、OFDMフレーム構成部119とを有する。なお、無線送信装置100の機能部に関して、ターボ(Turbo)符号化部110以外の機能部は、STD-B31規格(又はSTD-B29規格)に定められているものと同じ機能を有する。
(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of radio transmitting apparatus 100 according to Embodiment 1 of the present invention. In FIG. 1, a radio transmission apparatus 100 includes a TS remultiplexer 101, an outer encoding unit 102, a layer division unit 103, a byte / bit MSB (Most Significant Bit) first unit 104, an energy spreading unit 105, A delay correction unit 106, a bit / byte MSB (Most Significant Bit) first unit 107, a byte interleave unit 108, a byte / bit MSB (Most Significant Bit) first unit 109, and a turbo encoding unit 110, , Carrier modulation section 111, layer synthesis section 112, time interleaving section 113, frequency interleaving section 114, scattered pilot (Scattered Pilot) signal section 115, CP signal generation section 116, and control signal generation section 117. And an additional information generation unit 118 and an OFDM frame configuration unit 119. Regarding the functional units of the wireless transmission device 100, functional units other than the turbo encoding unit 110 have the same functions as those defined in the STD-B31 standard (or STD-B29 standard).

 [TS再多重化器101]
 TS再多重化器101は、送信ストリーム(つまり、トランスポートストリーム(TS))を入力し、この入力送信ストリームを再多重化する。入力送信ストリームは、例えば、図示しないMPEG多重部の出力ストリームである。
[TS remultiplexer 101]
The TS remultiplexer 101 receives a transmission stream (that is, a transport stream (TS)) and remultiplexes the input transmission stream. The input transmission stream is, for example, an output stream of an MPEG multiplexing unit (not shown).

 再多重後のトランスポートストリームは、n個のトランスポートストリームパケット(TSP)から成る多重フレームを基本単位として構成される。 The transport stream after re-multiplexing is composed of a multiplex frame consisting of n transport stream packets (TSP) as a basic unit.

 図2は、TS再多重化器101の処理の説明に供する図である。図2Aは、多重フレームを構成するTSP数を伝送モードとガードインターバル比について示したテーブルである。多重フレームを構成するTSPは、188バイトに16バイトのヌルデータを付加した204バイトのTSPであり、これを伝送TSと呼ぶ。 FIG. 2 is a diagram for explaining the processing of the TS remultiplexer 101. FIG. 2A is a table showing the number of TSPs constituting a multiplex frame with respect to the transmission mode and the guard interval ratio. The TSP constituting the multiplex frame is a 204-byte TSP in which 16-byte null data is added to 188 bytes, and this is called a transmission TS.

 多重フレームにおける伝送TSPは、図2Bに示すように、OFDM信号のX階層(X階層は、A階層、B階層、C階層のいずれかを示すものとする)で伝送される(TSPX)か、最終的にOFDM信号としては伝送されないヌルパケット(TSPnull)のいずれかに属する。 As shown in FIG. 2B, the transmission TSP in the multiplex frame is transmitted (TSPX) in the X layer of the OFDM signal (the X layer indicates one of the A layer, the B layer, and the C layer). Finally, it belongs to one of null packets (TSPnull) that are not transmitted as an OFDM signal.

 単位時間に伝送できるトランスポートストリームパケットの数は各階層の伝送パラメータの設定に依存して多様な値をとるため、TS再多重化器101の入力TSと出力の単一TSの間で整合が取れない。これに対し適切な数のヌルパケットを補完することにより、伝送パラメータの設定によらず、一定のクロックでトランスポートストリームのインターフェイスをとることができる。 Since the number of transport stream packets that can be transmitted per unit time varies depending on the transmission parameter setting of each layer, there is a match between the input TS of the TS remultiplexer 101 and the output single TS. I can't take it. On the other hand, by complementing an appropriate number of null packets, it is possible to interface the transport stream with a constant clock regardless of the transmission parameter setting.

 多重フレーム長とOFDMフレーム長が一致しているため、受信機ではOFDM信号の同期からトランスポートストリームの同期を再生することができ、同期性能が強化される。 Since the multiplex frame length matches the OFDM frame length, the receiver can reproduce the synchronization of the transport stream from the synchronization of the OFDM signal, and the synchronization performance is enhanced.

 多重フレーム中のTSPの配置を階層の「分離・合成動作」と関係つけることにより、受信側では、複数の階層に分割されて伝送された信号から送信側と同じ単一のTSを再生することができる。 By associating the TSP arrangement in multiple frames with the “separation / combination operation” of the layer, the receiving side reproduces the same single TS as the transmitting side from the signal transmitted divided into multiple layers Can do.

 [外符号化部102]
 外符号化部102は、TS再多重化器101で得られたトランスポートストリームパケットを入力し、トランスポートパケット毎に誤り訂正符号化する。外符号化部102に適用される外符号は、ここでは、短縮化リードソロモン符号(204,188)である。
[Outer encoding unit 102]
Outer encoding section 102 receives the transport stream packet obtained by TS remultiplexer 101, and performs error correction encoding for each transport packet. Here, the outer code applied to the outer encoding unit 102 is a shortened Reed-Solomon code (204, 188).

 短縮化リードソロモン(204,188)符号は、リードソロモン(255,239)符号において入力データバイトの前に51バイトの00HEXを付加し、符号化後に先頭51バイトを除去することによって生成する。 The shortened Reed-Solomon (204,188) code is generated by adding 51 bytes of 00HEX before the input data byte in the Reed-Solomon (255,239) code and removing the first 51 bytes after encoding.

 このリードソロモン符号の元としては、GF(28)の元を用い、GF(28)を定義する原始多項式には、次式p(x)を用いる。
 p(x)=X8+X4+X3+X2+1
As an element of the Reed-Solomon code, an element of GF (28) is used, and the following expression p (x) is used as a primitive polynomial that defines GF (28).
p (x) = X8 + X4 + X3 + X2 + 1

 また、(204,188)短縮化リードソロモン符号の生成多項式g(x)は次式とする。
 g(x)= (X-λ0)(X-λ1)(X-λ2)……(X-λ15) 但し、λ=02HEX
Also, the generator polynomial g (x) of the (204,188) shortened Reed-Solomon code is as follows.
g (x) = (X-λ0) (X-λ1) (X-λ2) (X-λ15) where λ = 02HEX

 [階層分割部103]
 階層分割部103は、再多重後のTSを、TS同期バイトの次のバイトから同期バイトまでの204バイト(伝送TSP)単位で、指定された階層に分割する。同時に、階層分割部103は、ヌルパケットの除去を行う。個々の伝送TSPが属すべき階層は編成情報に基づく階層情報で指定される。ここで、最大階層数は3とする。またこのとき、OFDMフレーム同期は1バイト分シフトし、情報バイトの先頭となる。図3は、2階層分割の例を示す図である。
[Hierarchy division unit 103]
The layer division unit 103 divides the remultiplexed TS into a designated layer in units of 204 bytes (transmission TSP) from the byte next to the TS synchronization byte to the synchronization byte. At the same time, the layer division unit 103 removes null packets. The hierarchy to which each transmission TSP should belong is specified by the hierarchy information based on the organization information. Here, the maximum number of hierarchies is three. At this time, the OFDM frame synchronization is shifted by 1 byte and becomes the head of the information byte. FIG. 3 is a diagram illustrating an example of two-layer division.

 [バイト/ビットMSBファースト部104]
 バイト/ビットMSBファースト部104は、階層毎に設けられる。従って、ここでは、最大階層数と同数の3つのバイト/ビットMSBファースト部104が設けられている。バイト/ビットMSBファースト部104は、階層分割部103で分割されたバイト列を入力し、各バイト内のビットをMSBファースト処理する。
[Byte / bit MSB first part 104]
The byte / bit MSB first unit 104 is provided for each layer. Therefore, here, the same number of three byte / bit MSB first units 104 as the maximum number of layers is provided. The byte / bit MSB first unit 104 receives the byte string divided by the hierarchy dividing unit 103 and performs MSB first processing on the bits in each byte.

 [エネルギー拡散部105]
 エネルギー拡散部105は、図4に示す回路により生成されるPRBS(擬似ランダム符号系列)を階層毎に同期バイトを除く信号とビット単位で排他的論理和を行う。図4に示す回路のレジスタ-の初期値は、”100101010000000”(D1~D14)とし、OFDMフレーム毎に初期化される。この際、OFDMのフレームの先頭は、TSPの同期バイトの次のバイトのMSBの位置とする。また、同期バイト部分においてもシフトレジスタは動作するものとする。PRBSの生成多項式g(x)は次式とする。g(x)=X15+X14+1
[Energy diffusion unit 105]
The energy spreading unit 105 performs an exclusive OR operation on a PRBS (pseudo random code sequence) generated by the circuit shown in FIG. The initial value of the register in the circuit shown in FIG. 4 is “100101010000000” (D1 to D14), and is initialized for each OFDM frame. At this time, the head of the OFDM frame is the MSB position of the byte next to the TSP synchronization byte. It is assumed that the shift register operates also in the synchronous byte portion. The PRBS generator polynomial g (x) is as follows. g (x) = X15 + X14 + 1

 [遅延補正部106]
 遅延補正部106は、エネルギー拡散部105でエネルギー拡散処理された信号に対して遅延補正を行う。この遅延補正は、各階層での遅延時間を送受合わせて同一とするためのものである。
[Delay Correction Unit 106]
The delay correction unit 106 performs delay correction on the signal subjected to the energy diffusion processing by the energy diffusion unit 105. This delay correction is for making the delay time in each layer the same by sending and receiving.

 図5は、各階層での補正量を示す図である。図5に示すような伝送TSP数の遅延を設けることにより、バイトインタリーブによる送受の遅延量(11伝送TSP)を含めた遅延量が、1フレーム+1TSPとなるように設定する。 FIG. 5 is a diagram showing the correction amount in each layer. By providing a delay of the number of transmission TSPs as shown in FIG. 5, a delay amount including a transmission / reception delay amount (11 transmission TSPs) by byte interleaving is set to be 1 frame + 1 TSP.

 階層伝送においては階層毎に異なる伝送パラメータ(セグメント数、内符号の符号化率、変調方式)が設定可能であるが、この場合、各階層における伝送ビットレートが異なり、送信側の内符号の符号化から受信側の復号までの伝送速度も異なってしまう。従って、後述のバイトインタリーブにより生じる伝送TSPの遅延量(11TSP)も遅延時間に換算すると階層毎に異なってくる。この階層間における相対的な遅延時間差を補償するため、バイトインタリーブに先立って、伝送ビットレートに対応した遅延補正を階層毎に行う。 In hierarchical transmission, different transmission parameters (number of segments, inner code coding rate, modulation method) can be set for each layer, but in this case, the transmission bit rate in each layer is different and the code of the inner code on the transmission side is different. The transmission rate from the conversion to the decoding on the receiving side is also different. Accordingly, a transmission TSP delay amount (11 TSP) caused by byte interleaving, which will be described later, also varies from layer to layer when converted to a delay time. In order to compensate for the relative delay time difference between layers, delay correction corresponding to the transmission bit rate is performed for each layer prior to byte interleaving.

 [ビット/バイトMSBファースト部107]
 ビット/バイトMSBファースト部107は、遅延補正部106で遅延補正されたビット列を入力し、入力ビット列をバイト単位で束ねて得られたバイト列をMSBファースト処理する。
[Bit / byte MSB first part 107]
The bit / byte MSB first unit 107 receives the bit sequence that has been delay-corrected by the delay correction unit 106, and performs MSB first processing on the byte sequence obtained by bundling the input bit sequence in units of bytes.

 [バイトインタリーブ部108]
 バイトインタリーブ部108は、ビット/バイトMSBファースト部107で得られたバイト列をバイトインタリーブする。バイトインタリーブ部108は、例えば、図6に示すような構成を有する。
[Byte interleaving section 108]
The byte interleave unit 108 byte interleaves the byte sequence obtained by the bit / byte MSB first unit 107. The byte interleave unit 108 has a configuration as shown in FIG. 6, for example.

 バイトインタリーブ及び受信側のデインタリーブによる送受合計の遅延量は17×11×12バイト(11TSP相当)である。バイトインタリーブ部108は、11RS符号で誤り保護され、エネルギー拡散された204バイトの伝送TSPに対して、畳込みバイトインタリーブを行う。インタリーブの深さは12バイトとする。但し、同期バイトの次のバイトは遅延無しの基準パスを通過するものとする。 The total transmission and reception delay due to byte interleaving and deinterleaving on the receiving side is 17 x 11 x 12 bytes (equivalent to 11TSP). The byte interleaving unit 108 performs convolutional byte interleaving on the 204-byte transmission TSP that is error-protected and energy-spread with an 11RS code. The interleave depth is 12 bytes. However, it is assumed that the byte next to the synchronization byte passes through a reference path without delay.

 図6に示すバイトインタリーブ回路を有するバイトインタリーブ部108において、パス0は遅延量0である。パス1のメモリ容量は17バイト(各々のパスは12 バイト毎に選択されるため、パス1の遅延量は17×12バイトとなる)、パス2のメモリ容量は17×2=34バイト(遅延量は17×12×2バイトとなる)、…とする。また、入力と出力は1バイト毎に、パス0、パス1、パス2、…、パス11、パス0、パス1、パス2、…と順次巡回的に切り替える。 In the byte interleave unit 108 having the byte interleave circuit shown in FIG. The memory capacity of path 1 is 17 bytes (each path is selected every 12 bytes, so the delay amount of path 1 is 17 x 12 bytes), and the memory capacity of path 2 is 17 x 2 = 34 bytes (delay The amount is 17 x 12 x 2 bytes). Also, input and output are cyclically switched sequentially for each byte, such as path 0, path 1, path 2,..., Path 11, path 0, path 1, path 2,.

 [バイト/ビットMSBファースト部109]
 バイト/ビットMSBファースト部109は、バイトインタリーブ部108でバイトインタリーブされた後のバイト列を入力し、各バイト内のビットをMSBファースト処理する。
[Byte / bit MSB first part 109]
The byte / bit MSB first unit 109 receives the byte string after byte interleaving by the byte interleaving unit 108, and performs MSB first processing on the bits in each byte.

 [ターボ符号化部110]
 ターボ符号化部110は、バイト/ビットMSBファースト部109で得られたビット列をターボ符号化する。ターボ符号化部110は、直列連接畳み込み符号(Serial Concatenated Convolutional Codes,SCCC)型のターボ符号処理部である。ターボ符号化部110は、伝送信号に適用される符号化率に応じてパンクチャパターンを切り替えつつ、入力ビット列をターボ符号化する。ターボ符号化部110の構成及び動作については、後に詳細に説明する。
[Turbo Encoding Unit 110]
The turbo encoding unit 110 performs turbo encoding on the bit string obtained by the byte / bit MSB first unit 109. The turbo encoding unit 110 is a serial concatenated convolutional code (SCCC) type turbo code processing unit. The turbo encoding unit 110 turbo-encodes the input bit sequence while switching the puncture pattern according to the encoding rate applied to the transmission signal. The configuration and operation of the turbo encoding unit 110 will be described in detail later.

 [キャリア変調部111]
 キャリア変調部111は、畳み込み符号器で得られた符号語であるビット列を、各階層について予め指定された方式によりビットインタリーブした後、変調マッピングする。
[Carrier modulation section 111]
The carrier modulation unit 111 performs modulation mapping after bit-interleaving a bit string, which is a code word obtained by a convolutional encoder, by a method specified in advance for each layer.

 具体的には、キャリア変調部111は、図7に示すように遅延補正部と、ビットインタリーブ部141と、マッピング部142とを有する。 Specifically, the carrier modulation unit 111 includes a delay correction unit, a bit interleaving unit 141, and a mapping unit 142 as shown in FIG.

 ビットインタリーブ処理では、送受で120キャリアシンボルの遅延が生じる。これに送信側で適当な遅延補正を付加することにより、送受で2OFDMシンボルの遅延となるように補正する。図8は、ビットインタリーブに伴う遅延補正量を示す図である。なお、本明細書において、モード間ではパラメータの設定値が異なっており、モード1~3では、図9に示すようなパラメータ設定となっている。 In the bit interleaving process, a 120 carrier symbol delay occurs in transmission and reception. By adding an appropriate delay correction on the transmission side to this, the transmission and reception are corrected so as to be a delay of 2 OFDM symbols. FIG. 8 is a diagram illustrating the amount of delay correction associated with bit interleaving. In this specification, the parameter setting values differ between modes, and in modes 1 to 3, the parameter settings are as shown in FIG.

 [階層合成部112]
 階層合成部112は、あらかじめ指定されたパラメータで伝送路符号化およびキャリア変調が施された各階層の信号を合成し、データセグメントに挿入するとともに、速度変換を行なう。
[Hierarchical synthesis unit 112]
Hierarchical combining section 112 combines the signals of the respective layers that have been subjected to channel coding and carrier modulation with parameters designated in advance, inserts them into the data segment, and performs speed conversion.

 [時間インタリーブ部113]
 時間インタリーブ部113は、階層合成部112で階層合成された信号に対して、変調シンボル単位(I、Q軸単位)で時間インタリーブを行なう。
[Time interleaving unit 113]
The time interleaving unit 113 performs time interleaving on the signal subjected to hierarchical synthesis by the hierarchical synthesis unit 112 in units of modulation symbols (I and Q axis units).

 [周波数インタリーブ部114]
 周波数インタリーブ部114は、時間インタリーブ部113で時間インタリーブされた信号を周波数インタリーブする。
[Frequency interleaving section 114]
The frequency interleaving unit 114 frequency interleaves the signal time-interleaved by the time interleaving unit 113.

 図10は、周波数インタリーブ部114の構成を示すブロック図である。周波数インタリーブ部114は、セグメント分割において、部分受信部、差動変調部(キャリア変調がDQPSKに指定されたセグメント)、同期変調部(キャリア変調がQPSK、16QAM、または64QAMに指定されたセグメント)の順に、データセグメント番号、0から12が割り当てられる。なお、階層構成とデータセグメントの関係については、各階層のデータセグメントは番号順に連続的に配置されるものとし、データセグメントの小さい番号を含む階層から、A階層、B階層、C階層とする。階層が異なる場合でも、同じ種類の変調部に属するデータセグメントにはセグメント間インタリーブが施される。 FIG. 10 is a block diagram showing the configuration of the frequency interleaving unit 114. The frequency interleaving unit 114 includes, in segment division, a partial reception unit, a differential modulation unit (a segment in which carrier modulation is specified as DQPSK), and a synchronous modulation unit (a segment in which the carrier modulation is specified as QPSK, 16QAM, or 64QAM). In order, data segment numbers 0 to 12 are assigned. As for the relationship between the hierarchical structure and the data segment, the data segments of each hierarchy are sequentially arranged in the order of numbers, and the A hierarchy, the B hierarchy, and the C hierarchy are arranged from the hierarchy including the smaller number of data segments. Even when the layers are different, inter-segment interleaving is applied to data segments belonging to the same type of modulation unit.

 なお、部分受信部に関しては、そのセグメントのみを受信する受信機を想定しているため、他のセグメントとのインタリーブであるセグメント間インタリーブは実施されない。また、後述するフレーム構成に示すように、差動変調部と同期変調部では異なるフレーム構造をとるため、セグメント間インタリーブはそれぞれのグループで実行される。異なる階層に跨るセグメント間インタリーブは、周波数インタリーブの効果を最大化するために行われる。 In addition, regarding the partial receiving unit, since a receiver that receives only the segment is assumed, inter-segment interleaving, which is interleaving with other segments, is not performed. Further, as shown in the frame configuration described later, since the differential modulation unit and the synchronous modulation unit have different frame structures, inter-segment interleaving is executed in each group. Inter-segment interleaving across different layers is performed to maximize the effect of frequency interleaving.

 (セグメント間インタリーブ)
 セグメント間インタリーブは、図11に従って、差動変調(DQPSK)部および同期変調(QPSK、16QAM、64QAM)部についてそれぞれに行なわれる。なお、図11におけるSi,j,kはデータセグメント構成のキャリアシンボルを、nは差動変調部および同期変調部に割り当てられたセグメント数を表わす。
(Inter-segment interleaving)
Inter-segment interleaving is performed for the differential modulation (DQPSK) unit and the synchronous modulation (QPSK, 16QAM, 64QAM) unit, respectively, according to FIG. In FIG. 11 , Si, j, k represents a carrier symbol having a data segment structure, and n represents the number of segments assigned to the differential modulation unit and the synchronous modulation unit.

 (セグメント内インタリーブ)
 図12に示すように、セグメント番号にしたがって各セグメント毎にキャリアローテーションを行った後、図13、14に示すようにランダム化される。ここで、S'i,j,kは、セグメント間インタリーブを行った後のk番目のセグメントのキャリアシンボルである。図13、14の番号は、キャリアローテーション後のセグメント内キャリア番号を示す。図13、14中の「前」で示される値のキャリアのデータが、セグメント内キャリアランダマイズの結果、「後」に示されるキャリアのデータとなる。
(Intra-segment interleaving)
As shown in FIG. 12, after performing carrier rotation for each segment according to the segment number, it is randomized as shown in FIGS. Here, S ′ i, j, k is the carrier symbol of the kth segment after inter-segment interleaving is performed. The numbers in FIGS. 13 and 14 indicate the intra-segment carrier numbers after the carrier rotation. 13 and 14, the carrier data having the value indicated by “before” is the carrier data indicated by “after” as a result of intra-segment carrier randomization.

 なお、キャリアローテーションとキャリア ランダマイズは、キャリア配列の周期性を排除するために行われる。これにより、セグメント間インタリーブ後のキャリア配列周期に周波数選択性フェージングが一致した場合、特定のデータセグメントのキャリアがバースト的に誤る現象が避けられる。 Note that carrier rotation and carrier randomization are performed to eliminate the periodicity of the carrier arrangement. Thereby, when frequency selective fading coincides with the carrier arrangement period after inter-segment interleaving, a phenomenon in which the carrier of a specific data segment is erroneous in a burst is avoided.

 [スキャッタードパイロット信号部115]
 スキャッタードパイロット信号部115は、パイロット信号を生成し、OFDMフレーム構成部119に出力する。スキャッタードパイロット信号部115から出力されるパイロット信号は、後述するようにOFDMフレーム構成部119においてスキャッタードマッピングパターンでフレーム中にマッピングされる。
[Scattered pilot signal section 115]
Scattered pilot signal section 115 generates a pilot signal and outputs it to OFDM frame configuration section 119. The pilot signal output from the scattered pilot signal section 115 is mapped in the frame by the scattered mapping pattern in the OFDM frame configuration section 119 as will be described later.

 [CP信号生成部116]
 CP信号生成部116は、パイロット信号を生成し、OFDMフレーム構成部119に出力する。CP信号生成部116から出力されるパイロット信号は、或るキャリアにマッピングされる。
[CP signal generator 116]
CP signal generation section 116 generates a pilot signal and outputs it to OFDM frame configuration section 119. The pilot signal output from CP signal generation section 116 is mapped to a certain carrier.

 [制御信号生成部117]
 制御信号生成部117は、制御信号(ここでは、TMCC(Transmission and Modulation Configuration Control)信号)を生成し、OFDMフレーム構成部119に出力する。TMCC信号は、後述するようにOFDMフレーム構成部119でフレーム中のCP信号と異なるキャリアにマッピングされる。
[Control Signal Generation Unit 117]
The control signal generation unit 117 generates a control signal (here, TMCC (Transmission and Modulation Configuration Control) signal) and outputs it to the OFDM frame configuration unit 119. The TMCC signal is mapped to a carrier different from the CP signal in the frame by the OFDM frame configuration unit 119 as will be described later.

 図15は、TMCC信号がマッピングされるキャリア(つまり、TMCCキャリア)の204ビットB0~B203に対する情報割当の一例を示す図である。 FIG. 15 is a diagram illustrating an example of information allocation to 204 bits B 0 to B 203 of a carrier to which a TMCC signal is mapped (that is, a TMCC carrier).

 本実施の形態では、図16に示すように、STD-B31規格(又はSTD-B29規格)ではTMCCのリザーブビットとされていたB110~B121を新たな制御信号として使用する。STD-B31規格(又はSTD-B29規格)のビット割当と本実施の形態のビット割当の区別を受信機に通知するために、B20~B21のシステム識別子を利用する。 In this embodiment, as shown in FIG. 16, B 110 to B 121, which are reserved bits of TMCC in the STD-B31 standard (or STD-B29 standard), are used as new control signals. In order to notify the receiver of the bit allocation of the STD-B31 standard (or STD-B29 standard) and the bit allocation of this embodiment, the system identifiers B 20 to B 21 are used.

 [付加情報生成部118]
 付加情報生成部118は、付加情報を生成し、OFDMフレーム構成部119に出力する。
[Additional Information Generation Unit 118]
The additional information generation unit 118 generates additional information and outputs the additional information to the OFDM frame configuration unit 119.

 [OFDMフレーム構成部119]
 OFDMフレーム構成部119は、周波数インタリーブ部114から受け取るデータセグメント、スキャッタードパイロット信号部115から受け取るパイロット信号、CP信号生成部116から受け取るパイロット信号、制御信号生成部117から受け取る制御信号、および付加情報生成部118から受け取る付加信号を所定シンボルにマッピングしてフレームを構成する。
[OFDM frame configuration unit 119]
The OFDM frame configuration unit 119 includes a data segment received from the frequency interleaving unit 114, a pilot signal received from the scattered pilot signal unit 115, a pilot signal received from the CP signal generation unit 116, a control signal received from the control signal generation unit 117, and an addition The additional signal received from the information generation unit 118 is mapped to a predetermined symbol to form a frame.

 (差動変調部のOFDMセグメント構造)
 差動変調部のOFDMセグメント構成は、図17に示すように、STD-B31規格(又はSTD-B29規格)で定められている構成と共通である。但し、図17において、Si,jは、インタリーブ後のデータセグメント内のキャリアシンボルを表わす。また、CP(Continual Pilot)は連続キャリアであり、TMCC(Transmission and Multiplexing Configuration Control)は制御情報を伝送するための信号であり、AC (Auxiliary Channel)は付加情報を伝送するための拡張用信号である。モード1のキャリア番号は0から107なのに対して、モード2、モード3ではそれぞれ、0から215、0から431である。
(OFDM segment structure of differential modulator)
As shown in FIG. 17, the OFDM segment configuration of the differential modulation unit is the same as the configuration defined in the STD-B31 standard (or STD-B29 standard). However, in FIG. 17, S i, j represents a carrier symbol in the data segment after interleaving. CP (Continual Pilot) is a continuous carrier, TMCC (Transmission and Multiplexing Configuration Control) is a signal for transmitting control information, and AC (Auxiliary Channel) is an extension signal for transmitting additional information. is there. The carrier numbers in mode 1 are 0 to 107, while in modes 2 and 3, they are 0 to 215 and 0 to 431, respectively.

 OFDMフレーム構成部119で付加される各種の制御信号の配置を、各モードにおけるセグメント内のキャリア番号で、図18、19に示す。差動変調部セグメントのCPは、同期変調部のセグメントが周波数の低い方に隣接する場合に同期変調部のSPの代わりとなるもので、差動変調部セグメントの低域端に配置されている。受信機では、このCPを同期変調部セグメントの高域端SP として同期検波が行われる。TMCC、AC(AC1,AC2)のキャリアは、マルチパスによる伝送路特性の周期的なディップの影響を軽減するために、周波数方向にランダムに配置されている。ACパイロット信号の役割に加え、伝送制御の付加情報にも利用することができる。なお、AC1のキャリアは、同期変調部セグメントのAC1のキャリアと同じところに配置されている。 The arrangement of various control signals added by the OFDM frame configuration unit 119 is shown in FIGS. 18 and 19 with carrier numbers in segments in each mode. The CP of the differential modulator segment is a substitute for the SP of the synchronous modulator when the segment of the synchronous modulator is adjacent to the lower frequency, and is located at the low end of the differential modulator segment . In the receiver, synchronous detection is performed using this CP as the high frequency end SP of the synchronous modulation section segment. The carriers of TMCC and AC (AC1, AC2) are randomly arranged in the frequency direction in order to reduce the influence of periodic dips on transmission path characteristics due to multipath. In addition to the role of the AC pilot signal, it can also be used for additional information for transmission control. Note that the AC1 carrier is arranged at the same location as the AC1 carrier of the synchronous modulation segment.

 (同期変調部のOFDMセグメント構造)
 OFDMフレーム構成部119は、STD-B31規格(又はSTD-B29規格)で定められているSP配置構成(以下、SP Structure)である。図20は、スキャッタードパイロット構成をとる同期変調部のOFDMセグメント構造を示す図である。また、OFDMフレーム構成部119で付加される各種の制御信号の配置を、各モードにおけるセグメント内のキャリア番号で、図21に示す。
(OFDM segment structure of synchronous modulation section)
The OFDM frame configuration unit 119 has an SP arrangement configuration (hereinafter referred to as SP Structure) defined by the STD-B31 standard (or STD-B29 standard). FIG. 20 is a diagram illustrating an OFDM segment structure of a synchronous modulation unit having a scattered pilot configuration. Also, the arrangement of various control signals added by the OFDM frame configuration section 119 is shown in FIG. 21 with the carrier numbers in the segments in each mode.

 SP Structureでは、周波数(サブキャリア)方向には、断続的にではあるが3サブキャリア毎にSPが配置される。SPの周波数(サブキャリア)方向の配置間隔は、伝送路において生じる遅延プロファイル(スプレッド)の時間的な長さを一意に決定する。また、SP Structureでは、時間方向には4OFDMシンボル周期で回帰する。この回帰周期は、対応できるドップラー周波数最大値を一意に決定する。 In SP Structure, SPs are arranged every 3 subcarriers in the frequency (subcarrier) direction, albeit intermittently. The arrangement interval in the frequency (subcarrier) direction of the SP uniquely determines the time length of the delay profile (spread) generated in the transmission path. In SP Structure, regression is performed in the time direction with a period of 4 OFDM symbols. This regression period uniquely determines the maximum Doppler frequency that can be accommodated.

[ターボ符号化部110の構成及び動作]
 ここで、ターボ符号化部110の構成及び動作について説明する。
[Configuration and Operation of Turbo Encoding Unit 110]
Here, the configuration and operation of the turbo encoding unit 110 will be described.

 (ターボ符号化部110の構成)
 図22は、ターボ符号化部110の構成を示すブロック図である。図22において、ターボ符号化部110は、外符号器(Outer Encoder)211と、インタリーバ212,213と、内符号器(Inner Encoder)214と、パンクチャ処理部(Puncture)215と、パラレルシリアル変換部(P/S)216とを有する。
(Configuration of Turbo Encoding Unit 110)
FIG. 22 is a block diagram illustrating a configuration of the turbo encoding unit 110. In FIG. 22, a turbo encoding unit 110 includes an outer encoder 211, interleavers 212 and 213, an inner encoder 214, a puncture processing unit 215, and a parallel serial conversion unit. (P / S) 216.

 外符号器211は、畳み込み符号器であり、図23に示すように、加算器221,222,223と、遅延部224,225とを有する。ここでは、外符号器211の符号化率は、1/2となっている。外符号器211は、入力ビット列dを符号化し、得られたシステマチックビットd(図23では、A)及びパリティビットP1k(図23では、B)を、インタリーバ212,213へそれぞれ出力する。 The outer encoder 211 is a convolutional encoder, and includes adders 221, 222, and 223 and delay units 224 and 225 as shown in FIG. Here, the coding rate of the outer encoder 211 is ½. The outer encoder 211 encodes the input bit string d k and outputs the obtained systematic bit d k (A in FIG. 23) and parity bit P 1k (B in FIG. 23) to the interleavers 212 and 213, respectively. To do.

 インタリーバ212,213は、入力されるビット列を並べ替える。インタリーバ212,213は、1TSP(つまり、204byte)をインタリーブ処理単位として、入力ビット列をその処理単位内で並べ替える。システマチックビットdがインタリーバ212にて並べ替えられた後のビット列をdと表記し、パリティビットP1kがインタリーバ212にて並べ替えられた後のビット列をP1nと表記する。 Interleavers 212 and 213 rearrange the input bit strings. The interleavers 212 and 213 rearrange the input bit string within the processing unit using 1TSP (that is, 204 bytes) as an interleaving processing unit. The bit string after the systematic bit d k is rearranged by the interleaver 212 is denoted as dn, and the bit string after the parity bit P 1k is rearranged by the interleaver 212 is denoted as P 1n .

 内符号器214は、畳み込み符号器であり、図24に示すように、加算器231,232,233と、遅延部234,235とを有する。ここでは、内符号器214は、の符号化率は、2/3となっている。内符号器214は、入力ビット列d及びP1nを符号化し、得られたシステマチックビットd(図24では、A’)、パリティビットP1n(図24では、B’)及びパリティビットP2n(図24では、C)を、パンクチャ処理部215へ出力する。 The inner encoder 214 is a convolutional encoder, and includes adders 231, 232, and 233 and delay units 234 and 235, as shown in FIG. Here, the encoding rate of the inner encoder 214 is 2/3. The inner encoder 214 encodes the input bit strings d n and P 1n , and the obtained systematic bits d n (A ′ in FIG. 24), parity bits P 1n (B ′ in FIG. 24), and parity bits P 2n (C in FIG. 24) is output to the puncture processing unit 215.

 以上のように、ターボ符号化部110では、外符号器211及び内符号器214によって、畳み込み符号化がインタリーブ処理の前後の2段階で行われる。ここで外符号器211及び内符号器214にて用いられる生成多項式は、図25に示されている。また、外符号器211にて得られたシステマチックビットdがインタリーバ212にて並べ替えられたビット列がそのまま内符号器214の出力であるシステマチックビットdとなり、外符号器211にて得られたパリティビットP1kがインタリーバ213にて並べ替えられたビット列がそのまま内符号器214の出力であるパリティビットP1nとなっている。 As described above, in the turbo encoding unit 110, the outer encoder 211 and the inner encoder 214 perform convolutional encoding in two stages before and after the interleaving process. Here, the generator polynomial used in the outer encoder 211 and the inner encoder 214 is shown in FIG. Furthermore, systematic bits d n next bit string systematic bits d k obtained is sorted by the interleaver 212 at the outer encoder 211 is an output of the inner encoder 214 as it is, obtained in the outer encoder 211 The bit string in which the parity bit P 1k thus rearranged is rearranged by the interleaver 213 becomes the parity bit P 1n that is the output of the inner encoder 214 as it is.

 次に、内符号器214にて得られたシステマチックビットd、パリティビットP1n及びパリティビットP2nは、パンクチャ処理部215にて間引きされる。このパンクチャ処理は、ターボ符号化部110の出力段に設けられているキャリア変調部へ入力される際に求められる所望の符号化率とするために行われる。 Next, the systematic bit d n , the parity bit P 1n, and the parity bit P 2n obtained by the inner encoder 214 are thinned out by the puncture processing unit 215. This puncturing process is performed in order to obtain a desired coding rate required when input to the carrier modulation unit provided in the output stage of the turbo coding unit 110.

 パンクチャ処理部215は、後段のキャリア変調部111に依存して、パンクチャパターンを切り替える。すなわち、パンクチャ処理部215は、無線送信装置100から最終的に送信される伝送信号に適用される符号化率に応じてパンクチャパターンを切り替える。 The puncture processing unit 215 switches the puncture pattern depending on the carrier modulation unit 111 in the subsequent stage. That is, the puncture processing unit 215 switches the puncture pattern according to the coding rate applied to the transmission signal that is finally transmitted from the wireless transmission device 100.

 (パンクチャ処理における問題点)
 ここで、例えば、地上デジタルテレビジョン放送の伝送方式(以下、ISDB-T方式)では、変調方式に、DQPSK,QPSK,16QAM,64QAMが用いられ、さらに変調方式ごとに異なるビットインタリーブが施される。一般に、ターボ符号器の出力を振幅変調によって変調した後に送信する場合には、極性ビットにシステマチックビットを配置することが伝送特性上好ましい。しかし、符号化率のみを考慮した単純なパンクチャパターンを適用すると、通信路値を表現するシステマチックビット及びパリティビット0が、(1)誤り難い極性ビット(b0,b1)に配置することができない、(2)誤り難い極性ビット(b0,b1)に配置できた場合であっても、特定のパリティビットが常に誤りやすいビットに配置されてしまう等、システマチックビット及びパリティビット0のビット配置が偏った構成となってしまう場合がある。これらの場合には、伝送特性が低下してしまう問題がある。以下、この問題が起こる場合について、具体的に説明する。
(Problems in puncture processing)
Here, for example, in the transmission system of terrestrial digital television broadcasting (hereinafter referred to as ISDB-T system), DQPSK, QPSK, 16QAM, and 64QAM are used as modulation systems, and different bit interleaving is applied to each modulation system. . In general, when transmission is performed after the output of the turbo encoder is modulated by amplitude modulation, it is preferable in terms of transmission characteristics to arrange systematic bits in the polarity bits. However, when a simple puncture pattern that considers only the coding rate is applied, the systematic bit and the parity bit 0 representing the channel value cannot be arranged in (1) polarity bits (b0, b1) that are difficult to error. (2) Even if it can be arranged in the polarity bits (b0, b1) that are difficult to error, the bit arrangement of the systematic bit and the parity bit 0 is such that a specific parity bit is always arranged in an error-prone bit. There may be a biased configuration. In these cases, there is a problem that transmission characteristics deteriorate. Hereinafter, the case where this problem occurs will be described in detail.

 図26は、システマチックビット及びパリティビット0のビット配置が偏った構成となってしまう場合についての説明に供する図である。図26Aには、パンクチャパターン1が示されている。ここでは、符号化率が2/3であり、2ビットのシステマチックビットに対して1ビットのパリティビットが付加される。すなわち、図26Bに示すように、パンクチャ処理部215では、システマチックビットd、パリティビットP1n及びパリティビットP2nが入力され、図26Aに示されるパンクチャパターン1によってパンクチャ処理され、その結果、伝送信号系列(d,P1n,d,d,P2n,d,…)が出力される。 FIG. 26 is a diagram for explaining a case where the bit arrangement of the systematic bit and the parity bit 0 is biased. FIG. 26A shows a puncture pattern 1. Here, the coding rate is 2/3, and 1 parity bit is added to 2 systematic bits. That is, as shown in FIG. 26B, the puncture processing unit 215 receives systematic bits d n , parity bits P 1n and parity bits P 2n and performs puncture processing according to the puncture pattern 1 shown in FIG. 26A. A transmission signal sequence (d n , P 1n , d n , d n , P 2n , d n ,...) Is output.

 また、キャリア変調部111にて64QAMが採用されている場合には、図26Cに示すように、パンクチャ処理部215から出力された伝送信号系列は、S/P部にて6つの並列系列に変換される。64QAMでは1つのシンボルが6ビットを示すので、パリティビットP2nは常に極性ビット以外のビット位置に配置されることになる。また、S/P部の出力に対してビットインタリーブ処理を実施しても、64QAMの場合には、パリティビットP2nが配置されるビット位置は基本的に変化しない。なお、図26Cにおいて、S/P部とマッピング部142との間に設けられた遅延部(遅延無し、24ビット遅延、48ビット遅延、72ビット遅延、96ビット遅延、120ビット遅延)が、ビットインタリーブ処理機能部(つまり、ビットインタリーブ部141)を構成している。 When 64QAM is adopted in the carrier modulation unit 111, the transmission signal sequence output from the puncture processing unit 215 is converted into six parallel sequences in the S / P unit as shown in FIG. 26C. Is done. In 64QAM, since one symbol indicates 6 bits, the parity bit P2n is always arranged at a bit position other than the polarity bit. Further, even if bit interleaving is performed on the output of the S / P unit, the bit position where the parity bit P 2n is arranged basically does not change in the case of 64QAM. In FIG. 26C, a delay unit (no delay, 24-bit delay, 48-bit delay, 72-bit delay, 96-bit delay, 120-bit delay) provided between the S / P unit and the mapping unit 142 is a bit. An interleaving processing function unit (that is, the bit interleaving unit 141) is configured.

 ここで、上記したようにシステマチックビット及びパリティビット0(つまり、パリティビットP1n)は復号時にそれぞれ通信路値として使用されるので、パリティビット1(つまり、パリティビットP2n)を極性ビットに配置するよりも,パリティビット0(つまり、パリティビットP1n)を極性ビットに配置する方が望ましい。しかしながら、図26Cに示される例のように、パリティビット1が極性ビットに全く配置されない場合には、内復号器の訂正能力が低下する可能性があり、この結果として最終的な誤り訂正能力が低下することが考えられる。 Here, as described above, since the systematic bit and the parity bit 0 (that is, the parity bit P 1n ) are used as channel values at the time of decoding, the parity bit 1 (that is, the parity bit P 2n ) is used as a polarity bit. It is preferable to arrange the parity bit 0 (that is, the parity bit P 1n ) in the polarity bit rather than the arrangement. However, as in the example shown in FIG. 26C, when the parity bit 1 is not arranged at all in the polarity bit, the correction capability of the inner decoder may be reduced. As a result, the final error correction capability is reduced. It is thought that it falls.

 (パンクチャ処理部215における処理の詳細)
 上記した問題点に着目し、本実施の形態では、ISDB-T方式が適用される無線送信装置100において、パンクチャ処理部215が符号化率に応じて適切なパンクチャパターンを選択してパンクチャ処理することにより、訂正能力を改善する。
(Details of processing in the puncture processing unit 215)
Focusing on the above-described problems, in this embodiment, in radio transmission apparatus 100 to which the ISDB-T scheme is applied, puncture processing section 215 selects an appropriate puncture pattern according to the coding rate and performs puncture processing. By improving the correction ability.

 〈16QAMの場合〉
 まず、16QAMでは1つのシンボルが4ビットを示すので、符号化率が3/4、5/6、7/8の場合には、1シンボル当たりに含まれるパリティビットの数が1ビット以下となる。
<In the case of 16QAM>
First, since one symbol indicates 4 bits in 16QAM, when the coding rate is 3/4, 5/6, or 7/8, the number of parity bits included in one symbol is 1 bit or less. .

 (1)符号化率が3/4、5/6、7/8の場合
 符号化率が3/4、5/6、7/8の場合には、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。この極性ビット以外のビット群のうち少なくとも1つのビットは、具体的にはb3(つまり、4ビット目)である。こうすることにより、S/P216の出力段にビットインタリーバが設けられる場合でも、1つのシンボル内に含まれるパリティビットを1つにすることができる。
(1) When the coding rate is 3/4, 5/6, or 7/8 When the coding rate is 3/4, 5/6, or 7/8, a symbol that includes at least one parity bit is used. A systematic bit is arranged in at least one of the two polarity bits, and a parity bit is arranged in at least one of the bit groups other than the polarity bits. Specifically, at least one bit of the bit group other than the polarity bit is b3 (that is, the fourth bit). By doing so, even if a bit interleaver is provided in the output stage of S / P 216, one parity bit can be included in one symbol.

 ここで、具体例として符号化率が3/4の場合を説明する。図27は、符号化率が3/4の場合のパンクチャ処理の説明に供する図である。図27Aには、符号化率が3/4の場合に用いられるパンクチャパターンが示されている。このパンクチャパターンを用いることにより、図27Bに示すようにパリティビットは常にb3(つまり、4ビット目)に配置される。これにより、ビットインタリーバの遅延量によらず、1つのシンボル当りに含まれるパリティビットの数は1ビット以下となり、システマチックビットのみで構成されるシンボルの数を削減される。この結果、誤り訂正能力を向上できる。 Here, a case where the coding rate is 3/4 will be described as a specific example. FIG. 27 is a diagram for explaining the puncturing process when the coding rate is 3/4. FIG. 27A shows a puncture pattern used when the coding rate is 3/4. By using this puncture pattern, the parity bit is always arranged at b3 (that is, the fourth bit) as shown in FIG. 27B. As a result, the number of parity bits included in one symbol is 1 bit or less regardless of the delay amount of the bit interleaver, and the number of symbols composed of only systematic bits can be reduced. As a result, error correction capability can be improved.

 また、符号化率が5/6、7/8の場合にも、図28に示すパンクチャパターンを用いることにより、3/4の場合と同様の効果が得られる。 Also, when the coding rate is 5/6 or 7/8, the same effect as in the case of 3/4 can be obtained by using the puncture pattern shown in FIG.

 (2)符号化率が1/2の場合
 符号化率が1/2の場合には、システマチックビット1ビットに対してパリティビットが1ビットだけ付加される。従って、システマチックビット2ビットに対して、パリティビット0、パリティビット1がそれぞれ1ビットずつ付加されることにより、16QAMにおける1シンボルが構成される。上記したように、パリティビット0は外復号の際の通信路値として使用されるので、パリティビット1よりも高確率で極性ビットに配置することが望ましい。
(2) When coding rate is ½ When coding rate is ½, only one parity bit is added to one systematic bit. Therefore, one parity bit 0 and one parity bit 1 are added to two systematic bits, thereby forming one symbol in 16QAM. As described above, since the parity bit 0 is used as a channel value at the time of outer decoding, it is desirable to arrange the parity bit in the polarity bit with higher probability than the parity bit 1.

 符号化率が1/2の場合においても、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。 Even when the coding rate is ½, in a symbol including at least one parity bit, a systematic bit is arranged in at least one of the two polarity bits, and a bit group other than the polarity bits is included. At least one parity bit is arranged.

 図29は、符号化率が1/2の場合のパンクチャ処理の説明に供する図である。図29Aには、符号化率が1/2の場合に用いられるパンクチャパターンが示されている。このパンクチャパターンを用いることにより、図29Bに示すようにパリティビットは、常にb1(つまり、2ビット目)及びb3(つまり、4ビット目)に配置される。ビットインタリーブの遅延量を考慮した最終的なマッピングにおいても、16QAMの1シンボルを構成するシステマチックビットの数及びパリティビットの数は変わらない。このため、システマチックビットのみで構成されるシンボルが出現することを避けることができる。従って、フェージングにおいてシンボルが消失するようなケースにおいて、消失するシステマチックビットの数を抑えることができるので、誤り訂正能力が低下することを防止できる。 FIG. 29 is a diagram for explaining the puncturing process when the coding rate is 1/2. FIG. 29A shows a puncture pattern used when the coding rate is 1/2. By using this puncture pattern, the parity bits are always arranged at b1 (that is, the second bit) and b3 (that is, the fourth bit) as shown in FIG. 29B. Even in the final mapping in consideration of the bit interleaving delay amount, the number of systematic bits and the number of parity bits constituting one symbol of 16QAM are not changed. For this reason, it is possible to avoid the appearance of a symbol composed of only systematic bits. Therefore, in a case where symbols are lost in fading, the number of systematic bits that are lost can be suppressed, and it is possible to prevent a reduction in error correction capability.

 (3)符号化率が2/3の場合
 符号化率が2/3の場合には、システマチックビット2ビットに対してパリティビットが1ビットだけ付加される。従って、システマチックビット8ビットに対して、パリティビット0及びパリティビット1が合計4ビットだけ付加されることにより、16QAMにおけるシンボルが3シンボルだけ構成される。この3シンボルが1つの単位となる。
(3) When coding rate is 2/3 When coding rate is 2/3, only 1 parity bit is added to 2 systematic bits. Accordingly, by adding a total of 4 parity bits 0 and 1 to 8 systematic bits, 3 symbols in 16QAM are configured. These three symbols become one unit.

 図30は、符号化率が2/3の場合のパンクチャ処理の説明に供する図である。図30Aには、符号化率が2/3の場合のパンクチャパターンが示される。図30Bには、このパンクチャパターンが用いられた場合の、インタリーブ処理の前後のビット配置が示されている。図30Bのインタリーブ処理前のビット配置に示されるように、このパンクチャパターンを用いることにより、パリティビット0が極性ビットに配置されるようパンクチャパターンとして残す位置を決定しつつ、パリティビット1が極性ビットに全く配置されないケースを避けることができる。 FIG. 30 is a diagram for explaining the puncturing process when the coding rate is 2/3. FIG. 30A shows a puncture pattern when the coding rate is 2/3. FIG. 30B shows the bit arrangement before and after the interleaving process when this puncture pattern is used. As shown in the bit arrangement before interleaving processing in FIG. 30B, by using this puncture pattern, parity bit 1 is a polarity bit while determining a position to leave as a puncture pattern so that parity bit 0 is arranged in a polarity bit. The case where it is not arranged at all can be avoided.

 ここでISDB-T方式の場合、b1,b2,b3には、ビットインタリーバにてそれぞれ40bit、80bit、120bitの遅延が施される。この場合のビットインタリーブ後のビット配置が、図30Bの後段に示されている。このケースでは、シンボルを構成するビットが、システマチックビット又はパリティビットのみとなる。従って、フェージング時に消失シンボルが存在した場合に、影響を受けるシステマチックビットの数は多くなってしまう。しかしながら、パリティビット1が極性ビット全くに配置されないケースは避けることができているので、内符号器の誤り訂正能力の低下を防止できる。 Here, in the case of ISDB-T system, b1, b2, and b3 are respectively delayed by 40 bit, 80 bit, and 120 bit by a bit interleaver. The bit arrangement after bit interleaving in this case is shown in the subsequent stage of FIG. 30B. In this case, the bits constituting the symbol are only systematic bits or parity bits. Therefore, when there are erasure symbols during fading, the number of affected systematic bits increases. However, since the case where the parity bit 1 is not arranged at all in the polarity bit can be avoided, it is possible to prevent the error correction capability of the inner encoder from being lowered.

 〈64QAMの場合〉
 上記した16QAMの場合に、各符号化率で用いられたパンクチャパターンは、64QAMの場合にも用いることができる。
<For 64QAM>
In the case of 16QAM described above, the puncture pattern used at each coding rate can also be used in the case of 64QAM.

 (1)符号化率が3/4、5/6、7/8の場合
 図31は、符号化率が3/4の場合のパンクチャ処理の説明に供する図である。図31に示されるように、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。すなわち、システマチックビットのみで構成されるシンボルはなく、また、システマチックビットが極性ビットに配置される確率も高いので、誤り訂正能力を向上することができる。
(1) When coding rates are 3/4, 5/6, and 7/8 FIG. 31 is a diagram for explaining puncturing processing when a coding rate is 3/4. As shown in FIG. 31, in a symbol including at least one parity bit, a systematic bit is arranged in at least one of two polarity bits, and at least one of a bit group other than the polarity bits. Parity bits are arranged. That is, there is no symbol composed only of systematic bits, and the probability that the systematic bits are arranged in the polarity bits is high, so that the error correction capability can be improved.

 (2)符号化率が1/2の場合
 符号化率が1/2の場合においても、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。
(2) When coding rate is ½ Even when coding rate is ½, in a symbol including at least one parity bit, systematic bits are arranged in at least one of two polarity bits. In addition, a parity bit is arranged in at least one of the bit groups other than the polarity bits.

 図32は、符号化率が1/2の場合のパンクチャ処理の説明に供する図である。図32に示すようにパリティビットは、常にb1(つまり、2ビット目)、b3(つまり、4ビット目)及びb5(つまり、6ビット目)に配置される。ビットインタリーブの遅延量を考慮した最終的なマッピングにおいても、16QAMの1シンボルを構成するシステマチックビットの数及びパリティビットの数は変わらない。このため、システマチックビットのみで構成されるシンボルが出現することを避けることができる。従って、フェージングにおいてシンボルが消失するようなケースにおいて、消失するシステマチックビットの数を抑えることができるので、誤り訂正能力が低下することを防止できる。 FIG. 32 is a diagram for explaining the puncturing process when the coding rate is 1/2. As shown in FIG. 32, the parity bits are always arranged in b1 (that is, the second bit), b3 (that is, the fourth bit) and b5 (that is, the sixth bit). Even in the final mapping in consideration of the bit interleaving delay amount, the number of systematic bits and the number of parity bits constituting one symbol of 16QAM are not changed. For this reason, it is possible to avoid the appearance of a symbol composed of only systematic bits. Therefore, in a case where symbols are lost in fading, the number of systematic bits that are lost can be suppressed, and it is possible to prevent a reduction in error correction capability.

 (3)符号化率が2/3の場合
 図33は、符号化率が2/3の場合のパンクチャ処理の説明に供する図である。64QAMのときには、符号化率が2/3の場合においても、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。すなわち、システマチックビットのみで構成されるシンボルはなく、また、システマチックビットが極性ビットに配置される確率も高いので、誤り訂正能力を向上することができる。
(3) When coding rate is 2/3 FIG. 33 is a diagram for explaining puncturing processing when the coding rate is 2/3. In the case of 64QAM, even when the coding rate is 2/3, in a symbol including at least one parity bit, a systematic bit is arranged in at least one of the two polarity bits, and other than the polarity bits. Parity bits are arranged in at least one of the bit groups. That is, there is no symbol composed only of systematic bits, and the probability that the systematic bits are arranged in the polarity bits is high, so that the error correction capability can be improved.

 以上のように本実施の形態によれば、デジタル放送システムにおける無線送信装置100において、ターボ符号化部110が、外符号器211と、外符号器211と直列に配置される内符号器214と、内符号器214から出力されるシステマチックビット及びパリティビットをパンクチャパターンに従ってパンクチャするパンクチャ処理部215とを有し、無線送信装置100から送信される伝送信号の符号化率に応じてパンクチャパターンを切り替える。 As described above, according to the present embodiment, in radio transmitting apparatus 100 in the digital broadcasting system, turbo encoding section 110 includes outer encoder 211 and inner encoder 214 arranged in series with outer encoder 211. A puncture processing unit 215 that punctures systematic bits and parity bits output from the inner encoder 214 according to the puncture pattern, and the puncture pattern is determined according to the coding rate of the transmission signal transmitted from the wireless transmission device 100. Switch.

 具体的には、パンクチャパターン群は、ターボ符号化部110の出力段に設けられた変調部に適用される変調方式と、ターボ符号化部110と変調部との間に設けられるビットインタリーバによる遅延量を考慮して、以下の2点のうち少なくとも一方を満たすように用意されている。
 (1)復号時に通信路値として使用されるシステマチックビットについては、振幅変調の極性ビットに来るように配置すると共に、外符号器211及び内符号器214により作成されたパリティビットについては、どちらか一方が極性ビットに全く反映されない等、偏った配置とならない。
 (2)各シンボルが、システマチックビットのみ又はパリティビットのみで構成されない。
Specifically, the puncture pattern group includes a modulation scheme applied to a modulation unit provided at an output stage of the turbo encoding unit 110, and a delay caused by a bit interleaver provided between the turbo encoding unit 110 and the modulation unit. In consideration of the amount, it is prepared to satisfy at least one of the following two points.
(1) The systematic bits used as channel values at the time of decoding are arranged so as to come to the amplitude modulation polarity bits, and the parity bits created by the outer encoder 211 and the inner encoder 214 are either One of them is not reflected in the polarity bit at all, so that it is not biased.
(2) Each symbol is not composed of only systematic bits or only parity bits.

 より詳細には、ターボ符号化部110に用意されたパンクチャパターンにより、パリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される。ただし、符号化率が3/4であり、且つ、変調方式が16QAMの場合は、例外となる。 More specifically, according to the puncture pattern prepared in the turbo encoding unit 110, in a symbol including at least one parity bit, a systematic bit is arranged in at least one of the two polarity bits, and the polarity bit Parity bits are arranged in at least one of the other bit groups. However, when the coding rate is 3/4 and the modulation method is 16QAM, an exception is made.

 なお、以上の説明では、STD-B31規格(又はSTD-B29規格)で定められている13セグメント形式を前提として説明を行った。すなわち、例えば、地上デジタルテレビジョン放送の伝送方式(以下、ISDB-T方式)、及び、地上デジタル音声放送の伝送方式(以下、ISDB-Tsb方式)を前提としている。しかしながら、本発明はこれに限定されるものではなく、1セグメント形式の放送にも適用できる。すなわち、携帯端末向けマルチメディア放送にも適用することができる。 In the above description, the description has been made on the premise of the 13-segment format defined in the STD-B31 standard (or STD-B29 standard). That is, for example, it is based on a transmission system for terrestrial digital television broadcasting (hereinafter referred to as ISDB-T system) and a transmission system for terrestrial digital audio broadcasting (hereinafter referred to as ISDB-Tsb system). However, the present invention is not limited to this, and can also be applied to one-segment broadcasting. That is, the present invention can also be applied to multimedia broadcasting for mobile terminals.

 (実施の形態2)
 実施の形態2では、外符号化処理によって得られたパリティビットを用いずに、その代わりに、既知ビット系列を用いる。なお、実施の形態2に係る無線送信装置は、無線送信装置100と同様の基本構成を有するので、図1を用いて説明する。
(Embodiment 2)
In Embodiment 2, the parity bit obtained by the outer coding process is not used, but a known bit sequence is used instead. The radio transmission apparatus according to Embodiment 2 has the same basic configuration as radio transmission apparatus 100, and will be described with reference to FIG.

 実施の形態2に係る無線送信装置100において、外符号化部102は、実施の形態1と同様に、TS再多重化器101で得られたトランスポートストリームパケットを入力し、トランスポートパケット毎に誤り訂正符号化する。外符号化部102に適用される外符号は、ここでは、短縮化リードソロモン符号(204,188)である。 In radio transmission apparatus 100 according to Embodiment 2, outer encoding section 102 receives the transport stream packet obtained by TS remultiplexer 101 as in Embodiment 1, and for each transport packet Perform error correction coding. Here, the outer code applied to the outer encoding unit 102 is a shortened Reed-Solomon code (204, 188).

 ただし、実施の形態2において、外符号化部102は、誤り訂正符号化処理によって得られたパリティビット系列に代えて、既知ビット系列を出力する。 However, in Embodiment 2, outer coding section 102 outputs a known bit sequence in place of the parity bit sequence obtained by the error correction coding process.

 すなわち、図34に示すように、短縮化リードソロモン符号(204,188)を用いることによって得られる、符号化後のTSPは、同期バイト(1バイト)、システマチックビット系列(同図では、データ部:187バイト)、及び、パリティビット系列(同図では、パリティ部:16バイト)である。外符号化部102は、この内のパリティビット系列を既知ビット系列に置き換えた後に、符号化後のTSPを階層分割部103へ出力する。既知ビット系列は、例えば、0値のみで構成されても良いし、1値のみで構成されても良い。 That is, as shown in FIG. 34, the TSP after encoding obtained by using the shortened Reed-Solomon code (204, 188) is a synchronization byte (1 byte), a systematic bit sequence (in the figure, a data part: 187 bytes) and a parity bit sequence (parity portion: 16 bytes in the figure). Outer encoding section 102 replaces this parity bit sequence with a known bit series, and then outputs the encoded TSP to layer division section 103. For example, the known bit sequence may be composed of only 0 values or may be composed of only 1 values.

 エネルギー拡散部105は、図4に示す回路により生成されるPRBS(擬似ランダム符号系列)を階層毎に同期バイト及び既知ビット系列を除く信号とビット単位で排他的論理和を行う。 The energy spreading unit 105 performs exclusive OR operation on the PRBS (pseudo random code sequence) generated by the circuit shown in FIG. 4 for each layer and the signal excluding the synchronization byte and the known bit sequence.

 [対比技術]
 ISDB-T方式では、外復号としてTSP毎に短縮化リードソロモン符号(204,188)を適用している。この短縮化リードソロモン符号は、204バイ中8バイトまでのランダム誤りを訂正できる能力を有している。一方、ISDB-T方式における内符号では、拘束長7、符号化率1/2をマザーコードとするパンクチャード畳み込み符号が用いられる。このような外符号と内符号との組み合わせにより、受信側では、例えば、ビタビ復号により内復号を行って誤り訂正を実施した後、さらに外復号としてリードソロモン復号を実施する。こうすることで、最終的なTSPのパケット誤り率を低減している。
[Contrast technology]
In the ISDB-T system, a shortened Reed-Solomon code (204, 188) is applied for each TSP as outer decoding. This shortened Reed-Solomon code has the ability to correct random errors up to 8 bytes out of 204 bytes. On the other hand, the inner code in the ISDB-T system uses a punctured convolutional code having a constraint length of 7 and an encoding rate of 1/2 as a mother code. By such a combination of the outer code and the inner code, on the receiving side, for example, after performing inner decoding by Viterbi decoding to perform error correction, Reed-Solomon decoding is further performed as outer decoding. In this way, the final TSP packet error rate is reduced.

 一方、情報理論の限界に近い伝送特性を現実的な処理で実現する手法として、ターボ符号が知られる。ISDB-T方式のような放送システムにおいては、2×10-4近辺のPERが要求される。 On the other hand, a turbo code is known as a technique for realizing transmission characteristics close to the limits of information theory by a realistic process. In a broadcasting system such as the ISDB-T system, a PER around 2 × 10 −4 is required.

 そこで、実施の形態1にて説明したように、無線送信装置100には、内復号として用いるターボ符号器として、ターボ符号化部110が導入されている。ターボ符号化部110は、平坦化(flattening)が生じにくい直列連接畳み込み符号(Serial Concatenated Convolutional Codes,SCCC)型のターボ符号処理部である。これにより、同じCN比において、内復号のBER特性を改善することができるため、最終的なTSPのパケット誤り率を低減する効果が期待できる。 Therefore, as described in Embodiment 1, the wireless transmission device 100 is provided with a turbo encoding unit 110 as a turbo encoder used for inner decoding. The turbo coding unit 110 is a serial concatenated convolutional code (SCCC) type turbo code processing unit that is less likely to be flattened. As a result, it is possible to improve the BER characteristics of the inner decoding at the same CN ratio, so that the effect of reducing the final TSP packet error rate can be expected.

 しかしながら、ターボ復号後に残留する誤りビットは、特定のTSPに集中して残留する。従って、ランダム誤りに強い誤り訂正符号として外符号に用いられているリードソロモン符号では、或るTSPに集中した残留誤りを除去することができず、結果的に、ターボ復号後の誤りパケットエラー数とリードソロモン復号の復号後の誤りパケット数との間に大差がなく、内復号の特性を改善した効果が見られないという課題が生じる。 However, error bits remaining after turbo decoding remain concentrated on a specific TSP. Therefore, Reed-Solomon codes used for outer codes as error correction codes that are resistant to random errors cannot remove residual errors concentrated on a certain TSP, resulting in the number of error packet errors after turbo decoding. And the number of error packets after decoding in Reed-Solomon decoding are not greatly different, and there is a problem that the effect of improving the characteristics of inner decoding cannot be seen.

 図35は、残留誤りビットの分布を示す図である。図35Aには、ターボ復号後の残留誤りビットの分布の一例が示され、図35Bには、ビタビ復号後の残留誤りビットの分布の一例が示されている。図35において、縦軸は、TSP毎の復号後の残留ビット誤り個数であり、横軸は、試行回数である。図35Aと図35Bとを比較すると、図35Aの方が図35Bに比べてトータルの誤りビット数は少ないが、図35Aでは或るTSPに集中して誤りが残留している。一方、図35Bでは、図35Aよりも、残留誤り個数がTSP毎に均一である。 FIG. 35 is a diagram showing a distribution of residual error bits. FIG. 35A shows an example of the distribution of residual error bits after turbo decoding, and FIG. 35B shows an example of the distribution of residual error bits after Viterbi decoding. In FIG. 35, the vertical axis represents the number of residual bit errors after decoding for each TSP, and the horizontal axis represents the number of trials. Comparing FIG. 35A and FIG. 35B, the total number of error bits is smaller in FIG. 35A than in FIG. 35B, but in FIG. 35A, errors remain concentrated on a certain TSP. On the other hand, in FIG. 35B, the number of residual errors is more uniform for each TSP than in FIG. 35A.

 以上のように、内符号としてより誤り訂正能力の強いターボ符号を施しても、後段のリードソロモン復号による訂正能力が期待できない。 As described above, even if a turbo code having a stronger error correction capability is applied as the inner code, the correction capability by the Reed-Solomon decoding in the subsequent stage cannot be expected.

 そこで、本実施の形態においては、外符号化部102は、誤り訂正符号化処理によって得られたパリティビット系列に代えて、既知ビット系列を出力する。 Therefore, in the present embodiment, outer coding section 102 outputs a known bit sequence instead of the parity bit sequence obtained by error correction coding processing.

 ここで、階層分割部103においては、再多重後のTSをTS同期バイトの次のバイトから同期バイトまでの204バイト(伝送TSP)単位で、指定された階層に分割する。従って、受信機側では、パリティビット系列(16バイト)、同期バイト(1バイト)の連続計17バイトを既知ビットとしてターボ復号で使用することができる。特に、既知ビット系列が直列連接畳み込み符号(Serial Concatenated Convolutional Codes,SCCC)型のターボ符号処理部にてインタリーブされた後に伝送されるので、受信側の内復号器においては、既知ビットが受信信号系列にランダムに混ざる。これにより、直列連結型ターボの外復号器に入力される尤度情報の信頼度を向上することができ、この結果として、パケット誤り率特性を改善することができる。 Here, the hierarchy division unit 103 divides the remultiplexed TS into a designated hierarchy in units of 204 bytes (transmission TSP) from the byte next to the TS synchronization byte to the synchronization byte. Therefore, the receiver side can use 17 consecutive bytes of the parity bit sequence (16 bytes) and the synchronization byte (1 byte) as known bits in turbo decoding. In particular, a known bit sequence is transmitted after being interleaved by a serial concatenated convolutional code (Serial) Concatenated 部 Convolutional Codes, SCCC) type turbo code processing unit. Mixed randomly. Thereby, the reliability of the likelihood information input to the serially connected turbo outer decoder can be improved, and as a result, the packet error rate characteristic can be improved.

 なお、以上の説明では、直列連結型ターボ符号について説明したが、本発明はこれに限定されるものではなく、並列連結型ターボ符号であっても同様の効果が得られる。 In the above description, the serially connected turbo code has been described. However, the present invention is not limited to this, and the same effect can be obtained even with a parallel connected turbo code.

 (実施の形態3)
 実施の形態3では、図1に示すバイトインタリーブ部108を用いない構成とする。図36は、実施の形態3に係る無線送信装置100aのブロック図である。なお、図36に示す無線送信装置100aは、バイトインタリーブ部108を用いないこと以外は図1に示す無線送信装置100と同様の基本構成を有するので、その説明を省略する。
(Embodiment 3)
In the third embodiment, the byte interleaving unit 108 shown in FIG. 1 is not used. FIG. 36 is a block diagram of radio transmitting apparatus 100a according to the third embodiment. 36 has the same basic configuration as that of the wireless transmission device 100 shown in FIG. 1 except that the byte interleaving unit 108 is not used, and a description thereof will be omitted.

 図1に示す無線送信装置100では、ターボ復号後に残留する誤りビットが近接して固まる傾向がある。よって、バイトインタリーブ部108により、あるTSPに生じた誤りビットを複数のTSP間で分散させてしまうと、実施の形態1及び2においては、リードソロモン復号が実施されないため、ターボ復号後の誤りパケット数よりも最終的な誤りパケット数が増加してしまうという課題が生じる。 In the wireless transmission device 100 shown in FIG. 1, the error bits remaining after turbo decoding tend to harden in close proximity. Therefore, if error bits generated in a certain TSP are distributed among a plurality of TSPs by byte interleaving section 108, since Reed-Solomon decoding is not performed in Embodiments 1 and 2, an error packet after turbo decoding is used. There arises a problem that the number of final error packets increases rather than the number.

 そこで、実施の形態3においては、実施の形態1及び2におけるバイトインタリーブ部108を削除し、遅延補正部106においては、バイトインタリーブによる遅延量の影響がなくなることから、図37に示すような伝送TSP数の遅延を設けることにより、送受の遅延量が、1フレーム+1TSPとなるように設定する。これにより、実施の形態3では、上記のターボ復号後の誤りパケット数よりも最終的な誤りパケット数が増加してしまうという課題を解決できる。 Therefore, in the third embodiment, the byte interleaving unit 108 in the first and second embodiments is deleted, and the delay correction unit 106 has no influence of the delay amount due to the byte interleaving. Therefore, the transmission as shown in FIG. By providing a delay equal to the number of TSPs, the transmission / reception delay amount is set to be 1 frame + 1 TSP. Thereby, in Embodiment 3, the subject that the number of final error packets will increase rather than the number of error packets after said turbo decoding can be solved.

 なお、実施の形態3において、無線送信装置100aには、内復号として用いるターボ符号器として、図22に示すターボ符号化部110を用いているが、これを図38に示すターボ符号化部110aのように外符号器211の前段にビットインタリーバ217をさらに備えた構成としても良い。この場合、実施の形態3においては、図5に示す補正量は図39に示す補正量とする。この構成によれば、既知ビットの位置を分散させることができる。 Note that in Embodiment 3, the wireless transmission device 100a uses the turbo encoding unit 110 shown in FIG. 22 as the turbo encoder used for the inner decoding, but this is the turbo encoding unit 110a shown in FIG. In this manner, a configuration in which a bit interleaver 217 is further provided in the preceding stage of the outer encoder 211 may be adopted. In this case, in the third embodiment, the correction amount shown in FIG. 5 is the correction amount shown in FIG. According to this configuration, the positions of known bits can be dispersed.

 2009年1月15日出願の特願2009-006969の日本出願及び2009年2月6日出願の特願2009-025925の日本出願に含まれる明細書、図面および要約書の開示内容は、すべて本願に援用される。 The disclosure of the specification, drawings and abstract contained in the Japanese application of Japanese Patent Application No. 2009-006969 filed on Jan. 15, 2009 and the Japanese Patent Application No. 2009-025925 filed on Feb. 6, 2009 is hereby incorporated by reference. Incorporated.

 本発明の無線送信装置は、デジタル信号伝送の高品質化を実現するものとして有用である。 The wireless transmission device of the present invention is useful for realizing high quality digital signal transmission.

Claims (3)

 デジタル放送システムにおいて伝送信号を送信する無線送信装置であって、
 外符号器と、前記外符号器と直列に配置される内符号器と、前記内符号器から出力されるシステマチックビット及びパリティビットをパンクチャパターンに従ってパンクチャするパンクチャ手段と、を含むターボ符号化手段と、
 前記ターボ符号化手段の出力信号に基づいて変調信号を形成する変調手段と、
 を具備し、
 前記パンクチャ手段は、前記伝送信号の符号化率に応じて前記パンクチャパターンを切り替える、無線送信装置。
A wireless transmission device for transmitting a transmission signal in a digital broadcasting system,
Turbo coding means comprising: an outer encoder; an inner encoder arranged in series with the outer encoder; and puncturing means for puncturing systematic bits and parity bits output from the inner encoder according to a puncture pattern When,
Modulation means for forming a modulation signal based on the output signal of the turbo coding means;
Comprising
The puncturing means is a wireless transmission device that switches the puncture pattern according to a coding rate of the transmission signal.
 前記パンクチャ手段にてパンクチャされた後に出力されるシンボル群のうちパリティビットを少なくとも1ビット含むシンボルにおいては、2つの極性ビットのうち少なくとも1つにシステマチックビットが配置されるとともに、極性ビット以外のビット群のうち少なくとも1つにパリティビットが配置される、請求項1に記載の無線送信装置。 Among symbols that are output after being punctured by the puncturing means, in a symbol including at least one parity bit, a systematic bit is arranged in at least one of two polarity bits, and other than polarity bits. The radio transmission apparatus according to claim 1, wherein a parity bit is arranged in at least one of the bit groups.  前記パンクチャ手段にてパンクチャされた後に出力されるシンボル群のうち全てのシンボルにおいて、少なくとも1つのシステマチックビットと少なくとも1つのパリティビットが配置される、請求項1に記載の無線送信装置。
 
The radio transmission apparatus according to claim 1, wherein at least one systematic bit and at least one parity bit are arranged in all symbols of a symbol group output after being punctured by the puncturing means.
PCT/JP2009/007147 2009-01-15 2009-12-22 Radio transmitting apparatus Ceased WO2010082280A1 (en)

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