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WO2010062659A1 - Système et procédé pour l'assemblage d’un film épitaxial - Google Patents

Système et procédé pour l'assemblage d’un film épitaxial Download PDF

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Publication number
WO2010062659A1
WO2010062659A1 PCT/US2009/062415 US2009062415W WO2010062659A1 WO 2010062659 A1 WO2010062659 A1 WO 2010062659A1 US 2009062415 W US2009062415 W US 2009062415W WO 2010062659 A1 WO2010062659 A1 WO 2010062659A1
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WIPO (PCT)
Prior art keywords
substrate
epitaxial
epitaxial layer
thin film
assembly
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PCT/US2009/062415
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English (en)
Inventor
Eric Ting-Shan Pan
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Athenaeum LLC
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Athenaeum LLC
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Filing date
Publication date
Priority claimed from US12/418,223 external-priority patent/US20090250099A1/en
Application filed by Athenaeum LLC filed Critical Athenaeum LLC
Priority claimed from US12/607,776 external-priority patent/US7905197B2/en
Priority claimed from US12/607,726 external-priority patent/US20100102419A1/en
Priority claimed from US12/607,762 external-priority patent/US8193078B2/en
Publication of WO2010062659A1 publication Critical patent/WO2010062659A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B19/00—Liquid-phase epitaxial-layer growth
    • C30B19/02—Liquid-phase epitaxial-layer growth using molten solvents, e.g. flux
    • H10P14/263—
    • H10P14/271—
    • H10P14/276—
    • H10P14/2922—
    • H10P14/34—
    • H10P14/3441—

Definitions

  • ELP Epitaxy-Level Packaging
  • the present invention relates to epitaxial layer growth and transfer using liquid phase epitaxy and particularly to such systems/methods that provide one or more epitaxial layers that are stackable and connectable for integration in monolithic devices, chip scale packaging, and multi-component modules.
  • An epitaxial layer is the engine of compound semiconductor device where its composition, dopant concentration, homostructure or heterostructure, and thickness determine a device's electrical, thermal, mechanical, and/or optical characteristics. Because of special material properties, compound semiconductors are critical to the success of many technologies that have demonstrated widespread applications in defense, space, and commercial sectors. These applications and devices include but not limited to optoelectronics such as lasers, sensors, optical data storage, fiber optics, light emitting diodes (LED), and photovoltaics (PV), radio frequency (RF) and wireless systems, and microwave, millimeter-wave, radar, and satellite communication systems.
  • optoelectronics such as lasers, sensors, optical data storage, fiber optics, light emitting diodes (LED), and photovoltaics (PV), radio frequency (RF) and wireless systems, and microwave, millimeter-wave, radar, and satellite communication systems.
  • the prior art layer transfer methods separate grown epitaxy layer(s) or finished device structure from a parent wafer substrate to a daughter substrate.
  • the prior art process typically is practiced as follows:
  • first functional elements to connect in the semiconductor device layer.
  • Remove the carrier substrate. Provide input output means on the exposed surface of the first functional elements to form the integrated device structure.
  • the epitaxial lift-off process allows the separation of a thin layer of compound semiconductor material from the substrate by strain- accelerated selective etching of an intermediate or sacrificial layer.
  • Other means of removing the sacrificial layer in ELO include laser- assisted lift-off, ion bombardment.
  • etch stop layer epitaxial surface grown on a substrate. Mesa etch to etch stop layer and pattern separate devices. Remove substrate using selective wet etching. Bond the device onto a host substrate using a transfer diaphragm.
  • Wax the top of the device Lift-off in selective chemical etch of a sacrificial layer and removes the substrate. Attach the lift-off device to a glass substrate. Remove wax in chemical.
  • Implant the device template substrate Activate and clean the surface of the device template substrate and the handle substrate.
  • the other barrier is a lack of a technology platform (fabrication and integration platforms either monolithic or modular) versatile enough to intermix and integrate devices made from different materials for higher performance and/or functionality. Examples of needs for such an integration platform come from photonic integrated circuits in fiber optics, full spectrum utilization multijunction cells in photovoltaics, and transceiver in communication and radar systems.
  • a technology platform fabrication and integration platforms either monolithic or modular
  • needs for such an integration platform come from photonic integrated circuits in fiber optics, full spectrum utilization multijunction cells in photovoltaics, and transceiver in communication and radar systems.
  • epitaxy growth technologies have advanced with sophistications in equipment, epitaxy structure, and materials over the past decades, the manufacturing process of monolithically layering over crystalline substrate, wafer processing for device or integrated circuit (IC) formation, device/IC packaging, and board/module assembly has remained essentially the same.
  • An object of the present invention is to overcome the aforementioned limitations of the prior art.
  • One aspect of the present invention concerns an assembly substrate that can be used to form a desired structure for an epitaxial layer
  • Another aspect of the invention concerns an epitaxial structure that includes an assembly substrate and an integrated epitaxial thin film layer;
  • a further aspect of the invention concerns epitaxial layers and structures that can be freely separated from associated seed substrates, allowing for re-use of such substrates and ease of later processing for additional active devices;
  • Still another aspect concerns methods of making the aforementioned layers, structures, as well as electrically active regions (P-N junctions) and devices incorporating the same; Another aspect concerns an apparatus that can be used to manufacture the above referenced epitaxial films, structures, etc.
  • FIG. 1 is a simplified diagram view of a preferred crystalline substrate, an assembly substrate, and a sacrificial layer or metamorphic buffer layer grown on a crystalline substrate as building blocks for layer growth and transfer in accordance with the teachings of the present invention
  • FIG. 2 is a top view diagram of a preferred assembly substrate made in accordance with the teachings of the present invention.
  • FIG. 3 is an illustration of a preferred method of growing and transferring an epitaxy layer from a crystalline substrate to an assembly substrate by liquid phase epitaxy;
  • FIG. 4 is an illustrative diagram of various preferred forms of epitaxy layer at the completion of layer transfer
  • FIG. 5 is a simplified diagram of the preferred growth of epitaxy layer by LPE.
  • FIG. 6 is an illustrative diagram of the preferred separation of the grown epitaxy layer on an assembly substrate from the crystalline substrate;
  • FIG. 7 is an illustrative diagram of various preferred device structures resulting from layer transfer and subsequent processing;
  • FIG. 8 is a simplified diagram of a preferred assembly substrate for layer growth and transfer of heterojunction, multijunction, or diode structure
  • FIG. 9 is an illustrative diagram of two structures described in FIG.1 and FIG. 8 that are brought into physical contact;
  • FIG. 10 is an illustrative diagram of the preferred growth of epitaxy layer on the combined structure in FIG. 9;
  • FIG. 1 1 is an illustrative diagram of the preferred preparatory steps before the separation of the sacrificial layer or buffer layer from the crystalline substrate or removal of the sacrificial layer;
  • FIG. 12 is a simplified diagram of the preferred epitaxy layer on the assembly substrate after the separation from the crystalline substrate;
  • FIG. 13 is a simplified diagram of the preferred formed device;
  • FIG. 14 is a top view diagram of FIG. 13.
  • the present invention addresses the aforementioned prior art barriers through a preferred simultaneous growth and transfer method of epitaxial structures from a semiconductor substrate to an assembly substrate.
  • the method lowers the material cost by replacing a conventional semiconductor substrate with a lower-cost assembly substrate and further using a low-cost liquid phase epitaxy (LPE) manufacturing process.
  • LPE liquid phase epitaxy
  • the assembly substrate standardizes substrate size for further processing regardless of the original material sizes.
  • the epitaxial layer transferred directly unto an assembly substrate provides a unit building block for higher level of device and subsystem integration.
  • the present invention can preferably transfer an epitaxy layer during layer growth, which provides a number of benefits including low cost, high yield, high material quality, and wide applications.
  • LPE is a well-known method of growing a material epitaxially on a single-crystalline substrate of a specific crystalline orientation, lattice constant, and defect density.
  • this techniques uses a solution of the material to make contact to and grow a thin layer (10 nm to 100 urn) over a substrate surface.
  • the thin layer grows and replicates the crystalline structure of the substrate as in seeded crystal growth.
  • the growth process preferably begins with a melt of the material solution (or growth solution) in an appropriate solvent at supersaturation that is maintained at an elevated temperature and a controlled gas pressure. When the melt is brought into contact with the substrate, materials at the contact interface are in thermodynamic equilibrium at a constant temperature. At a lower but a constant temperature, the material from the melt precipitates and grows epitaxially on the substrate of the same material (homojunction) until a layer of the desired thickness has been grown and the substrate is removed from the melt.
  • Both growth rate and material composition of the epitaxial layer can be controlled by temperature uniformity, responsive temperature profile, and gas pressure.
  • an impurity element (dopant) can be added to a crystal lattice in low concentrations in order to alter the optical/electrical/physical/chemical properties of the crystal material. Therefore, a dopant can be added into the melt and the doped layer can be grown on an undoped substrate.
  • a dopant can be added into the melt and the doped layer can be grown on an undoped substrate.
  • To grow a heterojunction, a multijunction, or a diode structure it may be necessary to grow a sacrificial layer, a transition layer, or a metamorphic buffer layer of graded compositions and lattice constant on the crystalline substrate. The sacrificial layer or a transition layer may be removed from the crystalline substrate during or after the subsequent growth of epitaxy layer unto an assembly substrate.
  • ELO epitaxial lateral overgrowth
  • the ELO technique can provide a faster rate of growth for an epitaxial layer in the lateral direction over narrow openings in a mask layer (such as silicon oxide or metal nitride) deposited atop a substrate than the growth of epitaxial layer in the narrow openings in the vertical direction normal to the substrate surface.
  • a mask layer such as silicon oxide or metal nitride
  • the result is typically a single epitaxial layer over the mask layer that is coalesced of lateral grown parts of the layers (wings) from adjacent openings.
  • Prior studies have shown that these ELO layers exhibit much lower dislocation density than that in standard planar epitaxial layers grown on the crystalline substrate.
  • the line seeds aligned at 15°, 30°, 60°, or 75° off from the ⁇ 01 1 > direction show a large value of lateral to normal growth rate ratio.
  • Other process parameters that may affect lateral growth of different materials include the growth temperature dependence of the normal growth rate and the lateral growth rate in different crystallographic direction, electric field through the growing layer, the amount of dopant introduced to the melt, the solubility of the dopant in the liquid solution, the spacing between windows, and physical properties of the growth solution such as viscosity as a function of temperature, fluid pressure, density, solute diffusion coefficient, etc..
  • Preferred embodiments of the present invention offer a transformational epitaxy-level packaging (ELP) technique that advances beyond chip-scale packaging (CSP) (where the resulting package is about the same size as the die), wafer-level packaging (WLP) (where the package of integrated circuit is at wafer level), and traditional package and assembly where the package of individual device is after wafer dicing.
  • ELP transformational epitaxy-level packaging
  • CSP chip-scale packaging
  • WLP wafer-level packaging
  • traditional package and assembly where the package of individual device is after wafer dicing.
  • the preferred ELP of the present invention leverages the ELO process using LPE and provides a streamlined technique that can achieve high yield for epitaxial layer growth and layer transfer from a crystalline parent substrate directly unto an assembly daughter substrate.
  • the preferred embodiments of the invention can enable transformational material manufacturing and package integration for compound semiconductors with clear advantages in providing low cost, high yield, high quality materials, and wide applications over conventional methods.
  • the preferred method can remove the traditional crystalline substrate of compound semiconductors to thus eliminate the cost of crystalline substrate in device. Furthermore, in most applications the crystalline substrate can be re- used.
  • preferred embodiments of the invention also save package and assembly costs at least in areas associated with wafer mount, wafer thinning, wafer dicing, and die attach.
  • preferred embodiments of the layer transfer process can be made high yield by liquid-solid phase separation or localized etch in smaller areas that minimizes or eliminates defect-prone separation between two sheets of solids.
  • the ELP growth of the preferred embodiment produces high quality films of near-perfect material quality that is suitable for wide device applications.
  • preferred embodiments of the present invention provide a direct growth and attachment of an epitaxy layer to the second substrate (assembly substrate). Preferred embodiments of the present invention also do not need to resort to fabrication of an inverted device structure in subsequent processing.
  • the preferred embodiments of the present invention streamline package and assembly steps by eliminating at least wafer mount, wafer thinning, wafer dicing, and die attach. These preferred embodiments provide a wafer level platform where islands of different epitaxy materials can intermix on the same planar substrate.
  • the preferred layer transfer method of the present invention is easily integrable in liquid phase epitaxy equipment for high-throughput and high-yield production. Three main components are used in preferred embodiments of the present invention. First, a preferred multi-compartment boat apparatus is used for crystalline substrate, assembly substrate, manifold's aperture, and source melt.
  • an assembly board is preferably made of materials that can withstand the thermal requirement of epitaxy growth and is suitable for end applications with patterned openings, slids, or windows and other interconnects or components for epitaxy lateral overgrowth and subsequent layer transfer.
  • a preferred layer transfer mechanism is used to separate a crystalline substrate and the assembly substrate during or after layer growth, and utilizes both multi-zone temperature control from melt to crystalline substrate and mechanical actions.
  • FIG. 1 shows some of the basic building blocks used in an epitaxy layer growth and transfer process.
  • An upper graph (A) depicts a crystalline substrate 110 of any conventional semiconductor crystalline wafer.
  • a surface 1 15 of a crystalline substrate provides a two-dimensional nucleation site for an epitaxy layer to replicate the lattice structure of the substrate for homojunction type growth.
  • the crystalline substrate 1 10 in some cases may not be a whole crystalline substrate but rather multiple and localized nucleation sites on one substrate that match the openings of a patterned assembly substrate.
  • Middle graph (B) depicts a crystalline substrate with a sacrificial layer or a metamorphic buffer layer 120 grown atop it.
  • the 120 can be of any conventional epitaxial growth method, such as MOCVD, LPE, VPE, MBE, MOVPE, etc.
  • a sacrificial layer 120 is preferably of different material composition from but lattice-matched to crystalline substrate 1 10.
  • a metamorphic buffer layer 120 includes graded compositions and a lattice constant to the crystalline substrate.
  • a sacrificial or a buffer layer 120 is preferably used for growing heterojunction, multijunction, or diode structures.
  • Bottom graph (C) shows an assembly substrate 130 with patterned holes, slits, or windows 140 that are open through the thickness of the assembly substrate 130.
  • a side profile of the holes, slits, or windows can be vertical or step recessed or sloped to any desired angle.
  • FIG. 2 is a top view diagrammatic of the assembly substrate 210 illustrating different patterns, shapes, spacings, and sizes for openings such as slits or windows 220 and holes or wells 230 for the initial epitaxial growth in direction vertical to the crystalline substrate surface and later epitaxial lateral overgrowth.
  • the assembly substrate 210 is preferably made of a solid, rigid material and can be thought of as a template or stencil for a desired epitaxial layer geometry, structure and arrangement for an integrated circuit.
  • the openings in the assembly substrate define a multidimensional pattern to be imparted to a thin film epitaxial layer.
  • the substrate is adapted to receive a liquid phase epitaxial material and has thermal characteristics sufficient to support growth of epitaxial material within the openings without causing damage to the substrate that would prevent it from being used in subsequent conventional semiconductor processing steps for making active devices.
  • This substrate 210 is thus preferably a single or multi-layered ceramic substrate that is thermally matched to the thin single-crystal epitaxial layer to be transferred onto or any substrate materials that has lower cost than the crystalline substrate and properties that fits specific product and application requirements. Accordingly other choices for materials for substrate 210 will be apparent to those skilled in the art from the present teachings.
  • a significant advantage of growing epitaxy layers on assembly boards of the present invention is that the latter then can serve just like a conventional wafer for later processing steps. It can be subjected to wafer processing for device/IC formation. It can save significant operational steps and costs in wafer mount, wafer thinning, wafer dicing, and die attach.
  • FIGs. 3A -3B illustrate a novel method of growing and transferring an epitaxial layer from a crystalline substrate with or without a sacrificial layer or a buffer layer to an assembly substrate by liquid phase epitaxy (LPE).
  • LPE liquid phase epitaxy
  • 300 forms an epitaxial layer within an assembly substrate on top of a crystalline substrate, which is then heated sufficiently so that it can be “swiped” or mechanically sheared off the surface of the substrate.
  • a crystalline substrate 310 is preferably placed in a holder of apparatus 300, which preferably includes a platform (not shown) and a recessed base of a boat 320, which is preferably made of graphite or similar material.
  • Graphite is a preferred material for material availablility in high purity form, being easily machined, and being not wet by metals.
  • An assembly substrate 330 is preferably enclosed by a barrel or frames 370 preferably comprised of graphite or similar material and placed atop crystalline substrate
  • apparatus 300 can be employed by apparatus 300 to secure the assembly substrate/template and effectuate the goals of the invention.
  • the LPE melt in a single or multiple melt pockets 350 preferably sits stationary and the resulting melt is directed unto the assembly substrate 330 preferably through aperture's 360 in a manifold 365 (preferably comprised of graphite or similar material) and then ultimately unto the surface of the crystalline substrate 310 through openings 340 in the assembly substrate.
  • the form of LPE melt 350 can take any number of forms commonly known in the art.
  • the manifold 365 may have one or more additional apertures 360 (not shown) and other conventional control mechanisms for controlling the overall rate and amount of melt dispensed.
  • the manifold may be movable within apparatus 300 to dispense the melt across the surface of the assembly substrate.
  • the melt dispensation is selective of melt pockets, time controlled, volume controlled, temperature controlled, location specific through the arrangement of manifold, and either stationary or motion controlled, for example, sliding, rotational, in a scanning motion, or any other moving mechanisms.
  • the manifold apertures thus define an aperture plate used by apparatus 300 to selectively control an area used for localizing the dispensing of the melt as well.
  • topology of the mechanism could be inverted so that the assembly substrate is flipped with the melt bath introduced into the bottom of the on the bottom of the boat 320.
  • the melt may be introduced directly onto the crystalline substrate first, with the assembly substrate then physically pressed/superimposed on top of such melt so as to displace and force the bulk of the melt into openings 340 where it can begin to crystallize. Residual material on the bottom of the substrate could be removed by any number of conventional mechanisms without disturbing the resulting template in assembly substrate 330.
  • the geometry/spatial relationship between the manifold 365 and assembly substrate 330 can be configured as well to optimize the distribution of the melt from chamber 350 to the desired openings 340. Accordingly other orientations are possible, and all that is required is that there be some reliable mechanism for introducing the melt in a manner that allows controlled growth at a substrate interface at the bottom of openings 340.
  • the zones where the crystalline substrate, the assembly substrate, and the melt situate are situated are each preferably temperature controlled.
  • all three zones are preferably of the same temperature T 1 at or slightly above the bulk melting temperature of the melt.
  • Control of the temperatures in these areas to control the melt properties within apparatus 300 can be achieved by any number of well-known techniques.
  • the entire assembly 300 may be maintained in a temperature controlled chamber of a furnace, a reactor, and/or conventional heat conduction and/or convection mechanisms may be employed to provide localized heat energy to these zones.
  • an epitaxial layer 375 is formed when substrates 310 and 330 and the localized melt 380 are slowly cooled to an end temperature T 2 corresponding to a super-cooling point for the particular melt. At this temperature segregation of solute from the melt results on the substrate, that is, the epitaxy layer 375 begins to grow. The entire layer is then solidified over some predetermined time in a direction extending from the bottom of openings 340 to a surface of the assembly substrate 330. The time and temperatures required will be a function of the thickness of the epitaxial layer, the compositions of the substrates, etc., and can be determined experimentally using routine skill. In any event, the end result of this process is a completed epitaxial layer formed within the substrate/template 330 having a desired geometry, structure, material and doping composition suitable for use in any conventional integrated circuit requiring such layers.
  • Apparatus 300 is further adapted so that preferably either or both the barrel or frame 365 or the crystalline substrate holder 320 or both can be physically moved with respect with one another. This allows for a swiping or shearing action that can be used to detach the completed epitaxial layer 375 from the underlying substrate 310 and allow it be integrated as part of an additional semiconductor ciruit.
  • the crystalline substrate holder 320 temperature is preferably raised to a surface pre-melting temperature T 3 JUSt below a re-melting temperature of the bulk of epitaxial layer, which event causes epitaxial layer 375 to begin to pre-melt by lattice heating at the epitaxial layer-to-crystalline substrate interface, and in particular in the bottom of openings 340.
  • this pre-melt temperature can be employed, including by adding one or more heating elements embedded inside or as part of the crystalline substrate holder and even the assembly substrate barrel or frames, a heat lamp inside or under the crystalline substrate holder, or a RF induction heated system applied to the crystalline substrate holder.
  • a meshed heating element made of resistance wires, a thin heating plate, a sheet of carbon nanotube, or a thin film of positive thermal coefficient ceramic placed on top of the crystalline substrate with openings for epitaxial growth unto the assembly substrate.
  • Other examples will be apparent to those skilled in the art.
  • apparatus 300 employs a mechanical action to move barrel 370 and crystalline substrate holder 320 from each other to separate the epitaxial layer from the surface of crystalline substrate.
  • Mechanical actions may be swiping, sliding, rotation, spinning, pulling, tearing, vibration, stepping, breaking, cutting, or any combination (simultaneous or sequential) thereof. While a mechanical action serves to slide or shear the epitaxial layer 375 from the crystalline substrate 310, it will be apparent to those skilled in the art that other mechanisms may be used to separate the two materials.
  • the surface area of the epitaxial layer is relatively small compared to the overall surface area so the amount of physical adhesion is relatively small. In such event it may not be necessary to employ any physical force to shear the interface, and, instead, it may be possible simply to gradually lift the assembly substrate 330 in a timed/controlled fashion (again using a mechanical arm/fingers not shown) to achieve the same result in a lift-off fashion.
  • the temperatures of both the barrel and crystalline substrate holder are preferably lowered in apparatus 300 eventually to approximately an ambient or room temperature T 4 .
  • More precise growth control may be accomplished in some instances within apparatus 300 by micro-heating and cooling elements in combination with or without a conventional Peltier-induced LPE in which an electric current (generated by electric field or induced by magnetic filed) is passed through the substrate-melt interface and heats and cools it by a well-known Peltier effect. The growth takes place at a constant temperature and growth rate is proportional to an applied current and/or applied field. Again other techniques can be employed with the present invention.
  • FIG. 4 shows various forms of epitaxial layers after completion of epitaxial layer growth and subsequent layer transfer from crystalline substrate
  • FIG. 4A describes a discrete epitaxial layer in the openings of the assembly substrate, corresponding epitaxial lines of a desired width and configuration.
  • FIG. 4B describes islands of a desired width and length forming an epitaxial layer on the assembly substrate.
  • FIG. 4C describes a continuous epitaxial layer or film on the assembly substrate, again having a desired thickness.
  • FIG. 5 illustrates a growth of an epitaxial layer 575 by LPE in circumstances where there is an initial vertical growth 512 from a crystalline substrate 510 through the openings of an assembly substrate 530 and subsequent lateral overgrowth of islands 525 on the surface of the assembly substrate. These islands may continue to grow laterally and coalesce to form a single film 575, which may serve as the base for additional epitaxial layers to grow on top thereof in subsequent processing operations. It will be apparent from these illustrations that the thickness, size, geometry and orientation of the epitaxial structures (including islands, through-holes and lines) can be controlled and configured in any manner of desired topology based on the characteristics of the assembly substrate.
  • melt composition could be varied by time so that at a first time a particular melt composition/doping is added, while at a subsequent time a different melt mix (with different composition/doping) is added.
  • melt composition could be varied by time so that at a first time a particular melt composition/doping is added, while at a subsequent time a different melt mix (with different composition/doping) is added.
  • the process can be automated to create graded epitaxial layers of any desired chemical, physical and electrical properties as needed for any particular application.
  • the assembly substrate could be used to assist in tailoring the epitaxial film characteristics, including by physical configurations and other variations for altering the film growth and/or composition.
  • FIG. 6 illustrates generally the separation of a grown epitaxial layer 675 on an assembly substrate 630 from a crystalline substrate 610. As noted earlier the separation may take place during epitaxial layer growth or after epitaxial layer growth by a combination of temperature and mechanical means as described in FIGs. 3A - 3C.
  • FIGs. 7A - 7D illustrate how the invention's techniques can be used to manufacture more complex epitaxial structures. These device structures include epitaxial layers 775 with additional processing steps and patterned layers 720. As is apparent from FIG. 7, the number of additional epitaxy layers, epitaxy islands or continuous epitaxy layers, post-epitaxy processing steps, device structures, device layout, dimensions, and patterns can be varied as desired for different products and applications. In particular the invention can be used for making devices which include:
  • a single junction or homojunction device can be formed with one continuous layer on the assembly substrate 730.
  • An active region (e.g. p- n junction) 715 may be formed after the epitaxial layer completes an initial lateral overgrowth forming a continuous layer. Thereafter a p-n junction 715 may be grown using conventional processing techniques.
  • the completed epitaxy-on-assembly substrate is advantageous because it can be used for post-epitaxy processing like any wafer fabrication for device and/or integrated circuit formation.
  • the size and thickness of the assembly substrate can also be made to match that of any semiconductor wafer that fit into the wafer fabrication and handling.
  • a second continuous epitaxy layer 776 is manufactured on the surface of an underlying first epitaxial layer 775.
  • an epitaxial layer can be grown on an assembly substrate (instead of the crystalline substrate).
  • assembly substrate 730 can now serve as the base for double or multi-junction active layer formation monolithically through another LPE or even by any conventional epitaxy growth means.
  • FIG. 7C provides an alternate method to form double junction or multi- junction layers that is not purely monolithic but instead part of a hybrid package or a modular integration that may consist of stacking of multiple device assembly layers intermixed with multiple epitaxy layers and/or different localized pockets of epitaxy materials and devices of different functionalities.
  • a first assembly substrate 730 containing a first epitaxial layer 775 is formed, followed by a second assembly substrate 730'containing a second epitaxial layer 776'.
  • the composition and properties of the layers can be tailored as needed for any function.
  • FIG. 7D describes yet another scheme of forming single junction, double junction or multi-junction within the openings of an assembly substrate 730 such that discrete devices (shown as stacked layers of active devices ?4£ and epitaxial layers 775, 776) can be formed, assembled, and separated by cutting directly the assembly substrate in the area noted with a hash marks 780.
  • discrete devices shown as stacked layers of active devices ?4£ and epitaxial layers 775, 776
  • FIG. 8 is a simplified diagram of another embodiment of an assembly substrate 830, including other preferred novel features such as a mesh (and/or a patterned plate as shown in FIG. 2) 805, a patterned adhesion layer 825, cavities 835, and a plate 838 to cover cavities, prior to making contact to a crystalline substrate 810 with a sacrificial layer 820. Except where noted like reference numerals are intended to correspond with similarly referenced components identified above in prior figures.
  • the assembly substrate 830 can be of a one or multi-layered ceramic substrate that is thermally matched to the thin single-crystal epitaxial layer to be transferred onto or any substrate materials that has lower cost than the crystalline substrate and properties that fits specific product and application requirements.
  • the adhesion layer 825 can be of a metallic film, an organic film, or an adhesive tape.
  • the adhesion layer may be necessary for cases when the epitaxy layer surface-to-volume ratio is large, the thickness of assembly substrate is much thicker that the epitaxy layer, or the epitaxy layer is grown and attached directly to the backside, the surface that contacts the epitaxy layer first during growth, of the assembly substrate.
  • the assembly substrate 830 can have patterned openings 870 and other devices or components previously formed. Epitaxial layer transfer may be accomplished through thermal and/or mechanical means as described in FIG. 3.
  • the embodiment of FIGs. 8 - 13 uses an etchant to help detach the epitaxial layer, rather than primarily heat/mechanical means.
  • cavities 835 are used for guiding etchant to remove sacrificial layer after epitaxial growth and the plate 838 is used to cover cavities 835 during epitaxial growth. Therefore the purpose of plate 838 is to prevent the introduction of material in these cavities during this deposition operation.
  • openings 870 are areas where epitaxial growth takes place.
  • the patterned plate 805 may have special optical, electrical, mechanical and/or other properties that suit the device applications.
  • the plate may be of glass, acrylic, other transparent, beam collection, or beam steering media for the solar cell application.
  • FIG. 9 shows additional novel feature of a preferred spacer 901 when the epitaxy layer is to be grown and attached directly to the backside of a device, the surface that contacts the epitaxy layer first during growth, The contact on either side can be patterned, interlocked, or formed with a spacer 901 to open up the space for subsequent epitaxial film growth and required thickness.
  • the spacer 901 may be deposited directly on the sacrificial layer or the crystalline substrate such as a patterned silicon nitride thin film or other materials of thin layer.
  • the spacer may also be a patterned sheet or plate that makes physical contact to the surface of sacrificial layer or the crystalline substrate.
  • FIG. 10 is an illustrative diagram showing the preferred growth of epitaxial film 1075 on the crystalline substrate 1010 or on a sacrificial layer or buffer layer 1020 through the patterned openings of the assembly substrate.
  • the crystalline substrate 1010 and the assembly substrate 1030 can be positioned in particular orientations to best fit the epitaxial growth apparatus and growth conditions.
  • a plate 1038 covers cavities 1035.
  • Epitaxial lateral overgrowth can be implemented by applying a heating element or mask placed on top of crystalline substrate 1010. Otherwise, ELO usually does not apply to growth directly on the crystalline substrate because the growth occurs in the vertical direction perpendicular to the surface of the crystalline substrate.
  • FIG. 1 1 is an illustrative diagram showing the later removal of plate 1 138 covering cavities 1 135 and spacer 1 101 .
  • Sacrificial layer or buffer layer 1 120 can be removed by a combined thermal and mechanical means as described previously in FIG. 3 or by other physical, chemical, ionic bombardment, thermal, mechanical, electromechanical, optical means, or a combination thereof.
  • a selective etchant can be applied onto the sacrificial layer 1120 through the cavities 1135 and/or an edge portion 1150.
  • the details of the etch chemistry recipe can be determined using routine skill based on the composition of an underlying substrate, sacrificial layer 1120, epitaxial film 1 175, etc.
  • FIG. 12 is a simplified diagram of the completed epitaxial film 1275 as it may be employed on the backside of an assembly substrate as part of an electrically active region to be used with integrated circuits.
  • the assembly can be further processed with additional epitaxy layers, processing steps, and patterned layers 1212 that may include metallization, thin film etching, film deposition, and/or encapsulation to form desired devices such as solar cell, light emitting diode, and other integrated circuits for a desired applications.
  • FIG. 13 is a simplified diagram of a completed device 1300 that is separated by means of saw, scribe and break, or chemical etch.
  • the separated discrete device 1300 on assembly substrate 1330 can be further processed and/or assembled with final dimensions with additional components 1312.
  • the assembled package can be further incorporated into a module or higher integration as desired.
  • FIG. 14 is a diagram of a top view of FIG. 13 illustrating some key constituents such as patterned assembly substrate 1430, components 1412 on assembly substrate 1430, epitaxial film 1475, and patterned layers or devices 1432 on the epitaxial film 1475.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

La présente invention concerne un système d’épitaxie qui fait croître un film épitaxial et le transfère à un substrat d'assemblage. La croissance et le transfert du film sont réalisés à l'aide d'une technique de surcroissance latérale épitaxiale. Le film épitaxial formé sur le substrat d'assemblage peut en outre être traité pour former des dispositifs tels qu'une cellule solaire, une diode électroluminescente et d'autres dispositifs, et assemblé à un niveau supérieur d'intégration d'applications souhaitées.
PCT/US2009/062415 2008-10-28 2009-10-28 Système et procédé pour l'assemblage d’un film épitaxial Ceased WO2010062659A1 (fr)

Applications Claiming Priority (16)

Application Number Priority Date Filing Date Title
US10914708P 2008-10-28 2008-10-28
US61/109,147 2008-10-28
US12/418,223 2009-04-03
US12/417,982 2009-04-03
US12/418,223 US20090250099A1 (en) 2008-04-07 2009-04-03 Solar-To-Electricity Conversion System Using Cascaded Architecture of Photovoltaic and Thermoelectric Devices
US12/418,020 2009-04-03
US12/418,020 US20090250098A1 (en) 2008-04-07 2009-04-03 Method for Solar-To-Electricity Conversion
US12/417,982 US20090250097A1 (en) 2008-04-07 2009-04-03 Solar-To-Electricity Conversion System
US12/417,931 US20090250096A1 (en) 2008-04-07 2009-04-03 Solar-To-Electricity Conversion Sub-Module
US12/417,931 2009-04-03
US12/607,776 US7905197B2 (en) 2008-10-28 2009-10-28 Apparatus for making epitaxial film
US12/607,726 US20100102419A1 (en) 2008-10-28 2009-10-28 Epitaxy-Level Packaging (ELP) System
US12/607,726 2009-10-28
US12/607,776 2009-10-28
US12/607,762 2009-10-28
US12/607,762 US8193078B2 (en) 2008-10-28 2009-10-28 Method of integrating epitaxial film onto assembly substrate

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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3647578A (en) * 1970-04-30 1972-03-07 Gen Electric Selective uniform liquid phase epitaxial growth
US4052252A (en) * 1975-04-04 1977-10-04 Rca Corporation Liquid phase epitaxial growth with interfacial temperature difference
US4372808A (en) * 1982-03-22 1983-02-08 Intel Magnetics, Inc. Process for removing a liquid phase epitaxial layer from a wafer
US4547230A (en) * 1984-07-30 1985-10-15 The United States Of America As Represented By The Secretary Of The Air Force LPE Semiconductor material transfer method
US4612072A (en) * 1983-06-24 1986-09-16 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask
US5326716A (en) * 1986-02-11 1994-07-05 Max Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. Liquid phase epitaxial process for producing three-dimensional semiconductor structures by liquid phase expitaxy
US6486042B2 (en) * 2000-02-24 2002-11-26 North Carolina State University Methods of forming compound semiconductor layers using spaced trench arrays and semiconductor substrates formed thereby
US6500731B1 (en) * 1999-09-22 2002-12-31 Canon Kabushiki Kaisha Process for producing semiconductor device module
WO2007019487A2 (fr) * 2005-08-05 2007-02-15 Reveo, Inc. Procede et systeme de fabrication de dispositifs ultra-minces et de dispositifs multicouches
US7238598B2 (en) * 2002-10-07 2007-07-03 Commissariat A L'energie Atomique Formation of a semiconductor substrate that may be dismantled and obtaining a semiconductor element

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3647578A (en) * 1970-04-30 1972-03-07 Gen Electric Selective uniform liquid phase epitaxial growth
US4052252A (en) * 1975-04-04 1977-10-04 Rca Corporation Liquid phase epitaxial growth with interfacial temperature difference
US4372808A (en) * 1982-03-22 1983-02-08 Intel Magnetics, Inc. Process for removing a liquid phase epitaxial layer from a wafer
US4612072A (en) * 1983-06-24 1986-09-16 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask
US4547230A (en) * 1984-07-30 1985-10-15 The United States Of America As Represented By The Secretary Of The Air Force LPE Semiconductor material transfer method
US5326716A (en) * 1986-02-11 1994-07-05 Max Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. Liquid phase epitaxial process for producing three-dimensional semiconductor structures by liquid phase expitaxy
US5397736A (en) * 1986-02-11 1995-03-14 Max-Planck-Gesellschaft Zur Foerderung Der Wissenschaften Liquid epitaxial process for producing three-dimensional semiconductor structures
US6500731B1 (en) * 1999-09-22 2002-12-31 Canon Kabushiki Kaisha Process for producing semiconductor device module
US6486042B2 (en) * 2000-02-24 2002-11-26 North Carolina State University Methods of forming compound semiconductor layers using spaced trench arrays and semiconductor substrates formed thereby
US7238598B2 (en) * 2002-10-07 2007-07-03 Commissariat A L'energie Atomique Formation of a semiconductor substrate that may be dismantled and obtaining a semiconductor element
WO2007019487A2 (fr) * 2005-08-05 2007-02-15 Reveo, Inc. Procede et systeme de fabrication de dispositifs ultra-minces et de dispositifs multicouches

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