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WO2009141954A1 - Procédé de fabrication de tranche collée, et tranche collée - Google Patents

Procédé de fabrication de tranche collée, et tranche collée Download PDF

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Publication number
WO2009141954A1
WO2009141954A1 PCT/JP2009/001647 JP2009001647W WO2009141954A1 WO 2009141954 A1 WO2009141954 A1 WO 2009141954A1 JP 2009001647 W JP2009001647 W JP 2009001647W WO 2009141954 A1 WO2009141954 A1 WO 2009141954A1
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Prior art keywords
wafer
temperature
peeling
heat treatment
bonded
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Ceased
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PCT/JP2009/001647
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English (en)
Japanese (ja)
Inventor
横川功
宮下昭
山口進一
北村琢也
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Shin Etsu Handotai Co Ltd
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Shin Etsu Handotai Co Ltd
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    • H10P95/90—
    • H10P90/1916—
    • H10W10/181—

Definitions

  • the present invention relates to a heat treatment for peeling a wafer with an ion implantation layer in the manufacture of a bonded wafer using an ion implantation peeling method.
  • a bonded wafer is used in which a semiconductor wafer is bonded to another wafer and then a wafer on which an element is manufactured is thinned.
  • a wafer on which an element is manufactured is thinned.
  • two mirror-polished silicon wafers are prepared, and an oxide film is formed on at least one of the wafers.
  • heat treatment is performed at a temperature of 200 to 1200 ° C. to increase the bond strength.
  • the element fabrication side wafer (bond wafer) is thinned to a desired thickness by grinding and polishing, etc., so that a bonded SOI wafer on which an SOI (Silicon On Insulator) layer is formed can be manufactured.
  • SOI Silicon On Insulator
  • an ion implantation layer such as hydrogen ions is formed in advance on the bond wafer before bonding, and after bonding to the base wafer, for example, 500
  • a method also called Smart Cut (registered trademark) in which a heat treatment is performed at about 10 minutes for about 10 minutes (see Japanese Patent Application Laid-Open No. 2005-79388), and the bond wafer is thinned by peeling off the ion-implanted layer. .
  • a part called a polishing sag and a chamfered part with a slightly reduced thickness exist in the peripheral part of the two mirror wafers to be bonded, and these parts are bonded. Otherwise, it remains as an unbonded portion with weak bonding strength. If the thin film is formed by heat treatment while such an unbonded portion exists, a part of the unbonded portion is peeled off during the thinning process. Therefore, the thinned bond wafer has a smaller diameter than the base wafer (base wafer), and minute irregularities are continuously formed in the peripheral portion.
  • Such a peripheral portion where the thin film is not transferred is called a terrace, and if the terrace width is large, the number of chips of the semiconductor device finally obtained is reduced.
  • Such a terrace width problem is a particularly significant problem because an oxide film is formed on both the bond wafer and the base wafer, and when the oxide films are bonded together, the bonding strength between the oxide films becomes weak. .
  • the present invention has been made in view of the above problems, and can reduce the terrace width where the thin film is not transferred during the peeling heat treatment in the ion implantation peeling method, and can suppress the film thickness unevenness of the marble pattern. It aims at providing the manufacturing method of a bonded wafer.
  • the present invention provides an ion-implanted layer formed inside a wafer by ion-implanting at least one kind of gas ions of hydrogen ions and rare gas ions from the surface of the bond wafer. Bonding is performed by bonding the surface of the ion-implanted surface and the surface of the base wafer directly or through an insulating film, and then performing a peeling heat treatment to peel off the bond wafer at the ion-implanted layer to produce a bonded wafer.
  • At least the wafer holding portion of the boat that holds the wafer in the peeling heat treatment is made of a material having a higher thermal conductivity than quartz, and the wafer is placed in a heat treatment furnace having a temperature lower than the peeling temperature. After the loading, at least until the bond wafer is peeled off at the ion implantation layer.
  • the wafer is placed in a heat treatment furnace having a temperature lower than the peeling temperature at the time of the peeling heat treatment, and the temperature at which the peeling occurs is maintained by raising the temperature until peeling. It can be made higher than the temperature at the time of peeling. Thereby, since it peels when the bond strength in the wafer surface, especially the wafer peripheral part with low bond strength is high, the terrace width can be reduced. Also, at least the wafer holding part is made of a material having a higher thermal conductivity than quartz, so that the temperature of the wafer holding part rises in the same way as the temperature of the wafer rises during the temperature rise during heat treatment.
  • the wafer is put into the heat treatment furnace having a temperature of less than 500 ° C. and the temperature is continuously raised to a temperature of 500 ° C. or more until the bond wafer is exfoliated at least in the ion implantation layer. .
  • the temperature at the time of wafer introduction to less than 500 ° C.
  • peeling does not occur immediately after being put into the heat treatment furnace, and the bond strength is higher when peeling is generated at the highest possible temperature. Therefore, it is preferable to raise the temperature so that peeling occurs at a temperature of 500 ° C. or higher.
  • the wafer is put into the heat treatment furnace having a temperature of 400 ° C. or lower and the temperature is continuously increased at 2 ° C./min or more until the bond wafer is exfoliated at least in the ion implantation layer. .
  • the temperature is 400 ° C. or lower, it can be surely prevented that peeling occurs immediately by introducing it into the heat treatment furnace.
  • a higher temperature can be obtained.
  • peeling can occur when the bond strength is increased.
  • a silicon single crystal wafer is used as the bond wafer and the base wafer, and the material of at least the wafer holding portion of the boat is Si or SiC.
  • the bond wafer and the base wafer are silicon single crystal wafers, if the wafer holding part is made of Si or SiC material, the thermal conductivity is close to that of silicon. A temperature difference is unlikely to occur between the other portions of the wafer and there is little temperature unevenness in the wafer surface.
  • an insulating film is formed in advance on the surfaces of the bond wafer and the base wafer, and bonded together via the insulating films during the bonding.
  • the method for producing a bonded wafer according to the present invention can achieve good peeling even in the case where the bonding strength is high, even when bonding is performed through insulating films having low bonding strength, so that the film thickness is uniform. And a terrace width is reduced.
  • a bonded wafer which has a thin film on the base wafer manufactured by the manufacturing method of the bonded wafer of this invention, Comprising:
  • the defect density detected by selectively etching this thin film is 10 pieces / cm ⁇ 2 > or less.
  • a bonded wafer is provided. If it is a bonded wafer manufactured by the manufacturing method of the present invention, since the temperature at the time of peeling becomes high, peeling occurs in a state where the bonding strength is high, and the temperature is uniform within the wafer surface, and good peeling Since the surface roughness of the peeled surface is improved, a bonded wafer having a high-quality thin film with a defect density of 10 pieces / cm 2 or less detected by selective etching of the thin film is obtained.
  • the wafer is put into a heat treatment furnace having a temperature lower than the peeling temperature during the peeling heat treatment, and then the temperature is continuously raised until peeling, thereby making the conventional method Peeling occurs at higher temperatures. Due to this high temperature, peeling occurs when the bonding strength is increased in the wafer surface, particularly in the periphery of the wafer having a low bonding strength in the past, so that a separation surface having a small terrace width and few defects such as voids can be obtained. .
  • the wafer holding part of the boat that holds the wafers during the peeling heat treatment is made of a material having a higher thermal conductivity than quartz, the temperature of the wafer and the wafer holding part is relatively close even if the temperature in the heat treatment furnace is increased. Since the temperature is raised by the temperature, there is almost no temperature difference between the contact portion and the other portion of the wafer surface, and the in-plane uniform peeling occurs, so the uneven portion of the marble pattern does not occur and the film thickness is uniform. It can be a highly thin film. For this reason, the width of the thin film with high quality is widened, and the number of chips of the finally obtained semiconductor device can be increased, so that the product yield is improved.
  • the inventors determined that the bond strength at the bonding interface strongly depends on the heat treatment temperature, and becomes stronger as the temperature is higher. It has been found that when the peeling heat treatment is performed, the temperature of the portion where the wafer contacts the heat treatment boat is different from the other regions during the temperature rise, and the temperature becomes nonuniform within the wafer surface.
  • a heat treatment for peeling is performed using a quartz heat treatment boat
  • the thermal conductivity of silicon is 156 W / mK
  • quartz is as small as 2 W / mK
  • quartz is Since it is transparent and hardly absorbs heat, the temperature of the portion of the wafer that contacts the boat during the temperature rise is considered to be lower than in other regions.
  • wafer peeling occurs in this state, the temperature in the vicinity of contact with the boat is lower than in other areas, so the bond strength at the bonding interface is low, and the cavity that is the driving force for peeling in the ion implantation layer Growth will not progress.
  • the film is forcibly peeled off, and striped film thickness unevenness is formed (hereinafter referred to as a marble pattern).
  • the present inventors have found a problem that arises when a material having different thermal conductivity and heat absorption characteristics is used as a peeling heat treatment boat in the peeling heat treatment in the ion implantation peeling method.
  • the present invention has been completed by finding a peeling heat treatment method capable of reducing the terrace width while avoiding it. That is, the present invention is a peeling heat treatment method in the production of bonded wafers using the ion implantation peeling method, and the material of the wafer holding part, which is a part that comes into contact with the wafer during the peeling heat treatment, is frequently used as a boat. It has a higher thermal conductivity than quartz, and its thermal conductivity and heat absorption characteristics are the same as or close to those of the semiconductor wafer to be manufactured, and the wafer is peeled off during temperature rise. Is.
  • a bonded wafer using a general silicon wafer (a bonded wafer in which a high-temperature bonding heat treatment is performed after bonding at room temperature and then thinned by grinding and polishing) is performed by setting the bonding heat treatment to 1000 ° C. or higher.
  • the bond at the bonding interface is a strong siloxane bond.
  • the heat treatment temperature when peeling the bonded wafer is as low as about 500 ° C.
  • the bonding state of the bonding interface is a weak bond centered on a silanol group, the bonding force of the bonding interface is defeated by the peeling force, and the terrace width is widened, causing void defects and blister defects. The possibility was high. Therefore, in the ion implantation separation method, it is necessary to increase the bond strength at the bonding interface when separation occurs.
  • the present invention by using a heat treatment boat made of a material having the same thermal conductivity as that of the wafer (a material having a higher thermal conductivity than quartz), the temperature in the wafer surface is uniform even during the temperature rise. It is possible to maintain the property at a relatively high level.
  • the wafer temperature near the contact portion with the boat can be suppressed, and the wafer temperature during the peeling heat treatment can be kept almost uniform in the plane.
  • the wafer can be peeled off at the highest possible temperature, so that the peeling can be carried out with the highest bonding force at the bonding interface, and the SOI width can be reduced by reducing the terrace width and void defects. The quality is improved and the merit of improving productivity is obtained.
  • FIG. 1 is a flowchart showing an example of an embodiment of a method for producing a bonded wafer according to the present invention.
  • two silicon single crystal bare wafers are prepared as the bond wafer 10 and the base wafer 20.
  • wafers such as polished wafers (PW), epitaxial wafers, heat-treated wafers, etc.
  • PW polished wafers
  • epitaxial wafers epitaxial wafers
  • heat-treated wafers etc.
  • the wafer material is not limited to silicon, and the present invention can also be applied to compound semiconductors or quartz, metals, etc. in addition to semiconductor materials, and also to patterned wafers such as devices.
  • the insulating films 12 and 21 are formed on both the bond wafer 10 and the base wafer 20 in advance. However, the insulating films may be formed on only one of the wafers. Both may not be formed.
  • the manufacturing method of this invention as shown in FIG. 1, even if it is a bonded wafer with low bonding strength, such as when an insulating film is formed on both wafers and bonded via the insulating films, Since the bonding strength can be increased and the separation can be performed at the time of the separation heat treatment, a bonded wafer having a reduced film thickness and a high film thickness uniformity can be manufactured.
  • the insulating film formed at this time for example, a thermal oxide film, a CVD oxide film, or the like can be formed.
  • the insulating film formed on each wafer may be formed only on the bonding surface in addition to being formed on the entire surface of the wafer including the back surface.
  • step (b) at least one kind of gas ion of hydrogen ion or rare gas ion is ion-implanted from the surface of the insulating film 12 of the bond wafer 10 to form the ion-implanted layer 11 inside the wafer.
  • other ion implantation conditions such as implantation energy, implantation amount, and implantation temperature can be appropriately selected so that a thin film having a predetermined thickness can be obtained.
  • the temperature at the time of peeling in the subsequent peeling heat treatment changes mainly depending on the implantation amount at the time of ion implantation, the temperature at the time of peeling can be adjusted to some extent by appropriately adjusting the implantation amount. .
  • the insulating film 12 of the bond wafer 10 and the insulating film 21 of the base wafer 20 are adhered and bonded together.
  • the bonding strength of either or both wafers can be increased by plasma treatment.
  • RCA cleaning can be performed before bonding to remove particles and organic substances adhering to the wafer surface, thereby performing better bonding.
  • a bonded wafer in which the bond wafer 10 is peeled off by the ion implantation layer 11 and a thin film 31 is formed on the base wafer 20 via the insulating films 12 and 21 by performing a peeling heat treatment. 30 is produced.
  • a defect layer called a cavity is formed in the ion implantation layer 11 in the bond wafer 10, and this defect layer is connected in the horizontal direction inside the bond wafer 10, whereby the bond wafer 10 is peeled off.
  • a part of the bond wafer 10 is transferred to the base wafer 20 to become the thin film 31, and the bonded wafer 30 is formed.
  • the material of at least the wafer holding portion of the boat that holds the wafer in the peeling heat treatment is a material having a higher thermal conductivity than quartz, and the wafer is put into a heat treatment furnace having a temperature lower than the peeling temperature. Thereafter, the temperature is continued to rise until the bond wafer is peeled off at least by the ion implantation layer. In this way, by continuing to raise the temperature until the bond wafer peels, it is possible to cause peeling at the highest possible temperature, that is, when the bonding strength of bonding is increased, it is possible to cause peeling. It is possible to reduce the terrace width at the wafer peripheral portion where the bonding strength is weak and the thin film is difficult to be transferred.
  • the wafer holding part a material with higher thermal conductivity than quartz, the temperature difference at the contact part with the wafer at the time of temperature rise is reduced, and the temperature of the contact part and other parts within the wafer surface is uniform. Thus, good peeling occurs and a thin film with high film thickness uniformity can be obtained.
  • the temperature lower than the peeling temperature when the wafer is put into the heat treatment furnace is a temperature at which peeling does not occur at least immediately after the wafer is charged, and the temperature rises when the temperature is too low such as room temperature.
  • holding at 500 ° C. for 10 to 30 minutes has caused peeling.
  • the temperature at which the temperature rises and peeling occurs varies depending on the heat treatment conditions and the like, but when the temperature is raised to about 600 ° C., almost all wafers in the heat treatment furnace are peeled off.
  • the method for confirming the peeling of the bond wafer is not particularly limited, but it can be confirmed that the peeling is performed by the peeling sound.
  • the wafer is put into a heat treatment furnace having a temperature of less than 500 ° C., and the temperature is continuously increased to a temperature of 500 ° C. or more until at least the ion-implanted layer 11 peels the bond wafer 10.
  • a heat treatment furnace having a temperature of less than 500 ° C. it was not peeled off immediately, and the temperature was continuously raised to 500 ° C.
  • peeling can occur at a higher temperature than before, and peeling can be caused in a state where the bond strength is higher.
  • the wafer is placed in a heat treatment furnace having a temperature of 400 ° C. or lower, and the temperature is continuously increased at 2 ° C./min or higher until the bond wafer 10 is peeled off at least by the ion implantation layer 11. If the wafer is put into a heat treatment furnace having a temperature of 400 ° C. or lower, the temperature can be increased to a high temperature without causing separation immediately. The temperature can be raised to a temperature at which the bond strength is further increased while maintaining uniformity.
  • the material of at least the wafer holding portion of the boat for peeling heat treatment is Si or SiC. Since the silicon single crystal wafer and Si or SiC are close in thermal conductivity, there is no temperature difference at the time of temperature rise, and the temperature at the contact part with the wafer holding part is the same temperature as in other wafer surfaces, which is good. Peeling occurs and a thin film with high film thickness uniformity without a marble pattern can be obtained.
  • the material of the entire boat as well as the wafer holding part is made of a material (Si or SiC) having a higher thermal conductivity than quartz, the temperature uniformity during the temperature rise in the entire heat treatment furnace is also improved. Therefore, it is more preferable.
  • the bonded wafer 30 thus manufactured is subjected to, for example, a bonding heat treatment for increasing the bonding strength at the bonding interface at 1000 ° C. or higher in an oxidizing atmosphere or a non-oxidizing atmosphere, and the thin film 31 side is subjected to heat treatment, micro polishing, etc.
  • the final bonded wafer is completed by performing the flattening process.
  • the bonded wafer 30 manufactured as described above has a defect density of 10 pieces / cm 2 or less detected by selectively etching the thin film 31.
  • the bonded wafer manufactured by the method for manufacturing a bonded wafer according to the present invention has a good peeling property in a state where the bonding strength is increased.
  • Example 2 Use of SiC boat, peeling at around 600 ° C. during heating, bonding of oxide films
  • 25 sets of mirror-polished silicon single crystal wafers having a diameter of 8 inches (200 mm) were prepared as material wafers. .
  • a 200 nm oxide film was formed on the bond wafer, and a 500 nm oxide film was formed on the base wafer.
  • a bond wafer is injected with hydrogen ions at an acceleration voltage of 80 keV and an injection amount of 7 ⁇ 10 16 / cm 2 , and is subjected to pre-bonding cleaning including RCA cleaning, and then bonded to the base wafer at room temperature. It was.
  • a SiC heat treatment boat having a thermal conductivity close to that of silicon was prepared, and exfoliation heat treatment was performed in a horizontal furnace that is a resistance heating heat treatment furnace (batch furnace) capable of performing heat treatment on a large number of sheets at once.
  • a wafer is introduced at 300 ° C. in a nitrogen atmosphere, and the temperature is raised to 600 ° C. at 5 ° C./min.
  • the bond wafer is peeled off by the ion implantation layer and transferred to the base wafer.
  • a wafer was produced.
  • the relationship between temperature and time at this time is shown in FIG.
  • the SOI layer surface is planarized (trace polishing and sacrificial oxidation).
  • the final quality of the SOI layer (thin film) of the completed SOI wafer is the SOI layer.
  • the mixed acid etching was performed, and the number of pits was evaluated. As a result of evaluating the pit density, it was found that the pit density was 10 pieces / cm 2 at the maximum, and most of them were very low, less than 10 pieces / cm 2 .
  • a bond wafer is injected with hydrogen ions at an acceleration voltage of 80 keV and an injection amount of 7 ⁇ 10 16 / cm 2 , and is subjected to pre-bonding cleaning including RCA cleaning, and then bonded to the base wafer at room temperature. It was.
  • a quartz heat treatment boat having a thermal conductivity lower than that of silicon was prepared, and peeling heat treatment was performed in a horizontal furnace.
  • the peeling heat treatment was performed in a nitrogen atmosphere, the temperature was raised to 500 ° C. at 5 ° C./min, and held at 500 ° C. for 30 minutes, and the bond wafer was peeled off and transferred to the base wafer by the ion implantation layer. Even if a quartz boat having a low thermal conductivity is used, the temperature distribution in the furnace can be made uniform by maintaining the temperature at 500 ° C. for a while. The relationship between temperature and time at this time is shown in FIG.
  • the widest portion of the terrace width of each wafer was found to vary from 2.2 mm to 3.2 mm.
  • the final quality of the SOI layer was evaluated by the number of pits obtained by etching the SOI layer with mixed acid.
  • the pit density fluctuated in the range of 10 to 40 pieces / cm 2 , and the quality of the SOI layer was not defective, but its numerical level increased. From the above results, it was found that peeling occurs in the ion-implanted layer at the bonding interface bond strength at 500 ° C., so that the terrace width is widened, the final quality is lowered, and the product yield is lowered.
  • Comparative Example 2 Use of quartz boat, peeling at around 600 ° C. during temperature rise, bonding of oxide films
  • 25 sets of mirror-polished silicon single crystal wafers having a diameter of 8 inches were prepared as material wafers.
  • a 200 nm oxide film was formed on the bond wafer, and a 500 nm oxide film was formed on the base wafer.
  • a bond wafer is injected with hydrogen ions at an acceleration voltage of 80 keV and an injection amount of 7 ⁇ 10 16 / cm 2 , and is subjected to pre-bonding cleaning including RCA cleaning, and then bonded to the base wafer at room temperature. It was.
  • a quartz heat treatment boat having a thermal conductivity lower than that of silicon was prepared, and peeling heat treatment was performed in a horizontal furnace.
  • the peeling heat treatment was performed in a nitrogen atmosphere, and the temperature was raised to 600 ° C. at 5 ° C./min. During the temperature rising, peeling of the bond wafer and transfer to the base wafer occurred. The relationship between temperature and time at this time is shown in FIG. As a result, the peeling heat treatment occurs in a state where the bonding interface bond strength is higher than the peeling at 500 ° C., but the temperature of the region in contact with the boat of the wafer is lower than the other regions.
  • the marble pattern as shown in FIG. It occurred in most of the wafers put in the process. From the above results, even if the heat treatment temperature at the time of wafer peeling is higher than 500 ° C., if a heat treatment boat made of quartz having a low thermal conductivity is used, the temperature in the wafer surface during temperature rise becomes non-uniform. Therefore, it turned out that a marble pattern will occur.
  • the present invention is not limited to the above embodiment.
  • the above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

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Abstract

L'invention porte sur un procédé de fabrication de tranche collée, dans lequel au moins une partie de support de tranche d'une nacelle pour tenir une tranche dans un traitement thermique de pelage est faite d'un matériau ayant une conductivité thermique plus élevée que celle du quartz. Après que la tranche ait été insérée dans un four de traitement thermique à une température inférieure à la température de pelage, l'élévation de température est continuée jusqu'à ce que la tranche collée soit pelée dans au moins une couche d'implantation ionique. En conséquence, le procédé de fabrication de tranche collée peut réduire une largeur de terrasse, dans laquelle un film mince n'est pas transféré à un traitement thermique de pelage dans un procédé de pelage à implantation ionique, et peut supprimer l'irrégularité d'épaisseur de film d'un motif de marbre.
PCT/JP2009/001647 2008-05-21 2009-04-09 Procédé de fabrication de tranche collée, et tranche collée Ceased WO2009141954A1 (fr)

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JP2008132651A JP2009283582A (ja) 2008-05-21 2008-05-21 貼り合わせウェーハの製造方法及び貼り合わせウェーハ
JP2008-132651 2008-05-21

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014506008A (ja) * 2010-12-29 2014-03-06 ジーティーエイティー・コーポレーション 薄い薄膜を形成するための方法および装置
WO2015033516A1 (fr) * 2013-09-05 2015-03-12 信越半導体株式会社 Procédé de fabrication de plaquette liée
US10679908B2 (en) 2017-01-23 2020-06-09 Globalwafers Co., Ltd. Cleave systems, mountable cleave monitoring systems, and methods for separating bonded wafer structures

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JP5780234B2 (ja) 2012-12-14 2015-09-16 信越半導体株式会社 Ｓｏｉウェーハの製造方法
FR3079658B1 (fr) * 2018-03-28 2021-12-17 Soitec Silicon On Insulator Procede de detection de la fracture d'un substrat fragilise par implantation d'especes atomiques

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JP2002353082A (ja) * 2001-05-28 2002-12-06 Shin Etsu Handotai Co Ltd 貼り合わせウェーハの製造方法
JP2003347526A (ja) * 2002-05-02 2003-12-05 Soi Tec Silicon On Insulator Technologies 材料の二層を剥離する方法
JP2007019303A (ja) * 2005-07-08 2007-01-25 Sumco Corp 半導体基板の製造方法及びその半導体基板

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JPH10335616A (ja) * 1997-05-29 1998-12-18 Mitsubishi Materials Shilicon Corp Ｓｏｉ基板の製造方法
JP2000294754A (ja) * 1999-04-07 2000-10-20 Denso Corp 半導体基板及び半導体基板の製造方法並びに半導体基板製造装置
JP2002353082A (ja) * 2001-05-28 2002-12-06 Shin Etsu Handotai Co Ltd 貼り合わせウェーハの製造方法
JP2003347526A (ja) * 2002-05-02 2003-12-05 Soi Tec Silicon On Insulator Technologies 材料の二層を剥離する方法
JP2007019303A (ja) * 2005-07-08 2007-01-25 Sumco Corp 半導体基板の製造方法及びその半導体基板

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014506008A (ja) * 2010-12-29 2014-03-06 ジーティーエイティー・コーポレーション 薄い薄膜を形成するための方法および装置
WO2015033516A1 (fr) * 2013-09-05 2015-03-12 信越半導体株式会社 Procédé de fabrication de plaquette liée
JP2015053332A (ja) * 2013-09-05 2015-03-19 信越半導体株式会社 貼り合わせウェーハの製造方法
TWI578402B (zh) * 2013-09-05 2017-04-11 信越半導體股份有限公司 Method of manufacturing wafers
US9679800B2 (en) 2013-09-05 2017-06-13 Shin-Etsu Handotai Co., Ltd. Method for manufacturing bonded wafer
US10679908B2 (en) 2017-01-23 2020-06-09 Globalwafers Co., Ltd. Cleave systems, mountable cleave monitoring systems, and methods for separating bonded wafer structures
US10910280B2 (en) 2017-01-23 2021-02-02 Globalwafers Co., Ltd. Methods for separating bonded wafer structures

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