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WO2009038353A2 - Procédé et système d'émission et de réception de signaux - Google Patents

Procédé et système d'émission et de réception de signaux Download PDF

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Publication number
WO2009038353A2
WO2009038353A2 PCT/KR2008/005503 KR2008005503W WO2009038353A2 WO 2009038353 A2 WO2009038353 A2 WO 2009038353A2 KR 2008005503 W KR2008005503 W KR 2008005503W WO 2009038353 A2 WO2009038353 A2 WO 2009038353A2
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WO
WIPO (PCT)
Prior art keywords
symbols
bitstreams
ofdm
modulation
convolutional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2008/005503
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English (en)
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WO2009038353A3 (fr
Inventor
Woo Suk Ko
Sang Chul Moon
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LG Electronics Inc
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LG Electronics Inc
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Filing date
Publication date
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Priority to EP08831663A priority Critical patent/EP2195985A4/fr
Publication of WO2009038353A2 publication Critical patent/WO2009038353A2/fr
Publication of WO2009038353A3 publication Critical patent/WO2009038353A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0044—Allocation of payload; Allocation of data channels, e.g. PDSCH or PUSCH
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2614—Peak power aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2614—Peak power aspects
    • H04L27/2618—Reduction thereof using auxiliary subcarriers

Definitions

  • the present invention relates to a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM (Orthogonal Frequency Division Multiplexing) system including a TFS (Time-Frequency Slicing).
  • OFDM Orthogonal Frequency Division Multiplexing
  • TFS Time-Frequency Slicing
  • TFS Time Frequency Slicing
  • a single service can be transmitted through multiple RF (Radio Frequency) channels on a two-dimensional time-frequency space.
  • RF Radio Frequency
  • OFDM Orthogonal Frequency Division Multiplexing
  • FDM frequency-division multiplexing
  • a large number of closely-spaced orthogonal sub-carriers are used to carry data.
  • the data are divided into several parallel data streams or channels, one for each sub-carrier.
  • Each sub-carrier is modulated with a conventional modulation scheme (such as quadrature amplitude modulation or phase shift keying) at a low symbol rate, maintaining total data rates similar to conventional single-carrier modulation schemes in the same bandwidth.
  • a conventional modulation scheme such as quadrature amplitude modulation or phase shift keying
  • OFDM has developed into a popular scheme for wideband digital communication, whether wireless or over copper wires, used in applications such as digital television and audio broadcasting, wireless networking and broadband internet access.
  • One of the embodiments of the present invention provides a method of efficiently using LDPC code as an inner code for a TFS system and an efficient inner interleaving method when hybrid modulation is used.
  • Another embodiment of the present invention provides, for a case where DVB-S2 LDPC code is used as FEC, using new codeword for convolutional interleaving by using puncturing/shortening.
  • Yet another embodiment of the present invention provides method of using dummy padding without loss of performance.
  • a method of transmitting signals for an OFDM (Orthogonal Frequency Division Multiplexing) system including TFS (Time Frequency Slicing), comprising: encoding frames made of bitstreams; performing a modulation to transform the encoded frames into symbols; performing a puncturing and a shortening on the symbols such that the symbols have lengths of two consecutive integers multiplied by at least one integer; and encoding the puncturing and the shortening performed symbols into a multiple signal or a single signal.
  • OFDM Orthogonal Frequency Division Multiplexing
  • TFS Time Frequency Slicing
  • a receiver for an OFDM system including, comprising: a demodulator configured to transform received signals into OFDM symbols; a frame parser configured to perform modulation to transform the OFDM symbols into bitstreams; and a BICM(Bit-Interleaved Coding and Modulation) decoder configured to deinterleave the bitstreams through performing a zero padding on an information part of the bitstreams and performing a parity depuncturing on a parity part of the bitstreams.
  • a demodulator configured to transform received signals into OFDM symbols
  • a frame parser configured to perform modulation to transform the OFDM symbols into bitstreams
  • a BICM(Bit-Interleaved Coding and Modulation) decoder configured to deinterleave the bitstreams through performing a zero padding on an information part of the bitstreams and performing a parity depuncturing on a parity part of the bitstreams.
  • a method of receiving signals for an OFDM system including TFS comprising: transforming received signals into OFDM symbols; performing modulation to transform the OFDM symbols into bitstreams; and deinterleaving the bitstreams through performing a zero padding on an information part of the bitstreams and performing a parity depuncturing on a parity part of the bitstreams.
  • Fig. 1 is a block diagram of an example of a TFS (Time Frequency Slicing)-OFDM
  • FIG. 2 is a block diagram of an example of the input processor shown in the Fig. 1.
  • FIG. 3 is a block diagram of an example of the BICM (Bit-Interleaved Coding and
  • FIG. 4 shows an example of LDPC encoding using shortening / puncturing.
  • FIG. 5 is a block diagram of an example of the Frame Builder shown in Fig. 1.
  • Fig. 6 is a table of an example of a hybrid modulation ratio when an LDPC block length is 64800 bits.
  • Fig. 7 is a table of an example of a hybrid modulation ratio when an LDPC block length is 16200 bits.
  • Fig. 8 is a block diagram of an example of the QAM mapper shown in Fig. 1.
  • FIG. 9 is a block diagram of an example of the QAM mapper combined with an inner encoder and an inner interleaver.
  • Fig. 10 is an example of a bit interleaver.
  • Fig. 11 is a table of an example of the bit interleaver when an LDPC block length is
  • Fig. 12 is a table of an example of the bit interleaver when an LDPC block length is
  • Fig. 13 is an example of the demux shown in Fig. 1.
  • Fig. 14 is another example of the demux shown in Fig. 1.
  • Fig. 15 is a relationship between an input bitstream of the bit interleaver and an output bitstream of the demux.
  • Fig. 16 is an example of a QAM symbol mapping.
  • Fig. 17 shows an example of a timer interleaver.
  • Figs. 18 and 19 show an example of a convolutional interleaving.
  • Fig. 20 shows an example of a time interleaver and a TFS frame builder.
  • Fig. 21 is a block diagram of an example of the MIMO/MISO decoder shown in Fig.
  • Fig. 22 is a block diagram of an example of the modulator, specifically an example of an OFDM modulator.
  • Fig. 23 is a block diagram of an example of the analog processor shown in Fig. 1.
  • Fig. 24 is a block diagram of an example of a TFS-OFDM receiver.
  • FIG. 25 is a block diagram of an example of the AFE (Analog Front End) shown in
  • Fig. 26 is a block diagram of an example of the demodulator, specifically an OFDM demodulator.
  • Fig. 27 is a block diagram of an example of the MIMO/MISO decoder shown in Fig.
  • Fig. 28 is a block diagram of an example of the frame parser shown in Fig. 24.
  • Fig. 29 is a block diagram of an example of the QAM demapper shown in Fig. 28.
  • Fig. 30 is a block diagram of an example of the QAM demapper combined with an inner deinterleaver.
  • Fig. 31 shows a time deinterleaver.
  • Fig. 32 shows a time deinterleaver.
  • Fig. 33 is a block diagram of an example of the BICM decoder shown in Fig. 24.
  • Fig. 34 shows an example of LDPC decoding using padding /depuncturing.
  • Fig. 35 is a block diagram of an example of the output processor shown in Fig. 24.
  • Fig. 1 shows an example of proposed TFS (Time Frequency Slicing)-OFDM
  • a multiple MPEG2-TS (Transport Stream) and a multiple Generic stream can be inputted into a TFS transmitter.
  • the input processor (101) can split the inputted streams into a multiple output signals for a multiple PLP (Physical Layer Path).
  • the BICM (Bit-Interleaved Coding and Modulation) (102) can encode and interleave the PLP individually.
  • the frame builder (103) can transform the PLP into total R of RF bands.
  • MIMO (Multiple-Input Multiple- Output)/MIS O (Multiple-Input Single- Output) (104) technique can be applied for each RF band.
  • Each RF band for each antenna can be individually modulated by the modulator (105a, b) and can be transmitted to antennas after being converted to an analog signal by the analog processor (106a, b).
  • Fig. 24 shows an example of a TFS-OFDM receiver.
  • AFE Analog Front End
  • demodulators 802a,b
  • MIMO/MISO Decoder 803
  • Frame parser 804
  • BICM decoder 805
  • output processor 806
  • Fig. 2 is an example of the input processor.
  • MPEG-TS Transport Stream
  • Generic streams Internet protocol
  • GSE General Stream Encapsulation
  • Each output from the TS-MUX and GSE can be split for multiple services by the service splitter (202a, b).
  • PLP is a processing of each service.
  • Each PLP can be transformed into a frame by the BB (Baseband) Frame (103a ⁇ d).
  • Fig. 3 is an example of the BICM.
  • the outer in- terleaver (302) and the inner interleaver (304) can interleave data randomly to mitigate burst errors.
  • FIG. 4 shows an example of an LDPC encoding using shortening / puncturing.
  • shortening process is performed on input blocks having having number of bits smaller than required number of bits for LDPC encoding.
  • Zeros as many as bits required for LDPC encoding can be padded (301a).
  • Zero Padded input bitstreams can have parity bit through LDPC encoding (302a).
  • puncturing can be performed according to code-rate (304a).
  • Fig. 5 is an example of the frame builder.
  • QAM mapper (401a, b) can transform inputted bits into QAM symbols. Hybrid QAM can be used.
  • Time domain interleaver (402a, b) can interleave data in time domain to make the data be robust against burst error. At this point, an effect of interleaving many RF bands can be obtained in a physical channel because the data are going to be transmitted to a multiple RF bands.
  • TFS frame builder (403) can split inputted data to form TFS frames and send the TFS frames to total R of RF bands according to a TFS scheduling.
  • Each RF band can be individually interleaved in frequency domain by frequency domain interleaver (404a, b) and can become robust against frequency selective fading.
  • Ref Reference Signals
  • PL Physical Layer
  • pilots can be inserted when the TFS frame is built (405).
  • an Odd-QAM which transmits odd number of bits per QAM symbol
  • hybrid 128-QAM can be obtained by hybriding 256-QAM and 64-QAM
  • hybrid 32-QAM can be obtained by hybriding 64-QAM and 16-QAM
  • hybrid 8-QAM can be obtained by hybriding 16-QAM and 4-QAM.
  • Figs. 6 and 7 show examples of a hybrid ratio when DVB-S2 LDPC (Low Density
  • Parity Check code is used as an inner code.
  • the first column on the table represents constellation type.
  • HOQ (Higher-Order QAM) ratio represents a ratio for higher-order QAM between two QAM types.
  • LOQ (Lower-Order QAM) ratio is 1-HOQ ratio.
  • Hybrid QAM can be obtained by two adjacent Even-QAMs.
  • HOQ bits and LOQ bits represent number of bits used for mapping into HOQ symbol and LOQ symbol respectively in one LDPC block.
  • HOQ symbols and LOQ symbols represent number of symbols after symbol mapping. Total symbol is a sum of the HOQ symbols and the LOQ symbols.
  • the last column on the table represents effective number of bits transmitted per QAM symbol. As seen on the table, only Hybrid 128-QAM shows a slight difference from 7 bit/cell.
  • Fig. 7 shows a case when LDPC block length is 16200 bits.
  • the value of the total symbols should be divisible by a least common multiple of each index number of RF band. For example, if six RF bands are allowed, then the value of total symbols on the table should be divisible by a least common multiple of 1 through 6, i.e., 60. For the case shown in Fig. 6, it is divisible. However, for the case shown in Fig. 7, it is not divisible.
  • LDPC block length is 16200 bits as shown in Fig. 7, the total symbols on the table can be made divisible by 60 by combining four of the LDPC blocks into a single LDPC block having a length of 64800 as in Fig. 6.
  • Convolution interleaver can be used as an example of the time interleavers (402,
  • Interleaver depth is L*(L-1)*M for a case where a number of delay branch is L and a length of basic delay element is M.
  • a length of the symbol stream corresponding to an LDPC block should be a multiple of L*(L- 1).
  • convolutional interleaver can be implemented for every even QAM and hybrid QAM while satisfying length condition of integer multiples of L*(L-1).
  • the original codeword length according to the puncturing/ shortening scheme can be restored, then LDPC decoding can be performed.
  • a convolutional interleaver where a single LDPC block is interleaved for two TFS frames can be defined as a basic convolutional interleaver (BCI) and if a number of LDPC blocks transmitted to TFS frame is N, then a final convolutional interleaver can be implemented by using total N of the BCI having the BCI as a basic unit.
  • BCI basic convolutional interleaver
  • each LDPC block can be assigned to a single BCI, thus, convolutional interleaver can be implemented without extra dummy padding.
  • Total N of BCI output symbols can be multiplexed to form the final convolutional interleaver output.
  • symbols can be demultiplexed into N convolutional deinterleaver corresponding to BCI, a single output can be outputted by combining the number of LDPC blocks transmitted to the TFS frame.
  • dummy padding can be performed to convolutional interleaving input symbols such that a length become a multiple of L*(L-1).
  • a receiver can perform a deinterleaving and then remove a predetermined number of dummy symbols.
  • FIG. 8 shows an example of QAM mapper using hybrid modulation.
  • Bit stream parser(c-401) can parse inputted bitstreams into HOQ mapper(c-402a) and LOQ mapper(c-402b).
  • the symbol merger(c-403) can merge the two inputted symbol streams into a single symbol stream.
  • FEC (Forward Error Correction) block merger (c-404), for example, can combine four of bit symbol blocks having a length of 16200 into a single block having a length of 64800.
  • Fig. 9 shows an example of QAM mapper combined with inner interleavers.
  • Bitstreams can be divided by bitstream parser (d-402) into bitstreams for HOQ and LOQ mappers.
  • Each bitstream goes through bit interleaving (d-403a, d-403b) and demux (d-404a, d-404b) processes. Throughout these processes, characteristics of LDPC codeword and constellation reliability can be combined.
  • Each output can be converted into symbolstreams by the HOQ and LOQ mappers (d-405a, d-405b), then merged into a single symbols tream by the symbol merger (d-406).
  • Fig. 10 shows an example of bit interleaving. Bits can be saved into a matrix type memory having columns and rows in the direction of column or in the direction of the blue arrow. Then the saved bits can be read out in the direction of row or in the direction of the red arrow.
  • Figs. 11 and 12 show numbers of columns and rows of HOQ bit interleaver (d-403a) and LOQ bit interleaver (d-403b) according to QAM modulation type. As seen in the tables, when a typical even-QAM is used but a hybrid modulation is not used, only HOQ interleaving is used.
  • Fig. 13 shows an example of the demux. It shows that interleaved outputs according to QPSK, 16-QAM, 64-QAM, and 256-QAM can be demultiplexed and mapped. It also shows that the numbers of output bitstreams from demuxs are 2, 4, 6, and 8 respectively.
  • Fig. 14 Details of the demux operation are shown in Fig. 14. As seen in the figure, output order of interleaver can be changed by demux. For example, for the case of 16-QAM, bitstreams can be outputted as j-th output bits tream of each demux according to a value resulting from performing an modulo-4 operation on index of input bitstream b.
  • Fig. 14 shows a relationship between a value resulting from a modulo operation and demux output branch index j.
  • Fig. 15 shows a relationship between an input bitstream of bit interleaver and an output bitstream of demux. As seen in the equations, dividing index of input bitstream by 2, 4, 6, and 8 is a result by the interleaving and mapping each index to index of output bitstream is a result by the demux.
  • Fig. 16 shows an example of QAM symbol mapping.
  • Output bitstream of demux can be converted into symbolstream by using Gray mapping rule. Even if it is not shown, it can be extended to constellation of 256-QAM or more.
  • Fig. 17 shows an example of a timer interleaver.
  • Dummy symbol generator (40Ij) can generate dummy symbols such that a number of symbols in a TFS frame become a multiple of L*(L-1).
  • the multiplexer (402j) can perform padding to the QAM symbols. After this adjustment of number of input symbols, interleaving can be performed by the Convolutional interleaver (403j).
  • FIGs. 18 and 19 show an example of a convolutional interleaving.
  • a convolutional interleaver in a TFS system where a multiple of RF bands are used may cause a decrease in frequency diversity gain.
  • Figs. 18 and 19 show such a case.
  • a convolutional interleaving which uses four RF bands, FEC block composed of twenty symbols, four branches, and five for a length of elements is exemplified.
  • Represents as (a) are source symbols. If necessary, by performing zero padding to the (a), (b) can be obtained which fills TFS frame length. By performing interleaving to the (b), (c) can be obtained.
  • Fig. 20 shows an example of a time interleaver and a TFS frame builder. Specifically,
  • Fig. 20 shows a case where a typical convolutional interleaver is implemented and a possible solution to a decrease in frequency diversity gain.
  • convolutional interleaving unit (CIU) can be used for each RF band and by doing this, for a single FEC block, a same number of symbol can be assigned to each RF band.
  • CIU convolutional interleaving unit
  • the inputted symbols are sequentially inputted to total R of CIUs (4021-4011) which are assigned to total R of RF bands by the switching (4011).
  • Total R of CIUs (4021-4041) can have a same structure as typical convolutional interleaver and can perform interleaving to the inputted symbols.
  • the final outputs can be transmitted to TFS frame builder and the frame builder should perform a scheduling such that, for all PLPs, symbols assigned to a same RF band can be transmitted to the same RF band.
  • Fig. 21 shows an example of MIMO/MISO Encoder.
  • MIMO/MISO Encoder (501) applies MIMO/MISO method to obtain an additional diversity gain or payload gain.
  • MIMO/MISO Encoder can output signals for total A of antennas.
  • MIMO encoding can be performed individually on total A of antenna signals for each RF band among total R of RF bands.
  • A is equal to or greater than 1.
  • Fig. 22 shows an example of a modulator, specifically an example of an OFDM modulator.
  • PAPR Peak- to- Average Power Ratio
  • IFFT 602
  • PAPR reduction 2 603
  • ACE Active Constellation Extension
  • a tone reservation can be used for the PAPR reduction 2 (603).
  • guard interval 604 can be inserted.
  • Fig. 23 shows an example of the analog processor. Output of each modulator can be converted to an analog-domain signal by a DAC (Digital to Analog Conversion) (701), then can be transmitted to antenna after up-conversion (702). Analog filtering (703) can be performed.
  • DAC Digital to Analog Conversion
  • 703 Analog filtering
  • Fig. 24 shows an example of a TFS-OFDM receiver.
  • AFE Analog Front End
  • demodulators 802a,b
  • MIMO/MISO Decoder 803
  • Frame parser 804
  • BICM decoder 805
  • output processor 806
  • Fig. 25 shows an example of an AFE (Analog Front End).
  • FH Frequency
  • Hopping-tuner (901) can perform a frequency hopping and tune signals according to inputted RF center frequency. After down-conversion (902), signals can be converted to digital signals by ADC (Analog to Digital Conversion) (903).
  • ADC Analog to Digital Conversion
  • Fig. 26 shows an example of a demodulator, specifically an OFDM demodulator.
  • TFS detector (1001) can detect TFS signals in a received digital signal.
  • Channel Estimation (1005) can estimate distortion in a transmission channel based on pilot signals. Based on the estimated distortion, Channel Equalization (1006) can compensate distortion in the transmission channel.
  • PL Physical Layer
  • Fig. 27 shows an example of MIMIO/MISO decoder. Diversity and multiplexing gain can be obtained from data received from total B of antennas. For MIMO, B is greater than 1. For MISO, B is 1.
  • Fig. 28 shows an example of a Frame parser.
  • Total R of the inputted RF bands data can undergo frequency deinterleaving (1201a, b), then can be reconstructed into datastream by TFS frame parser for each PLP (Physical Layer Path) according to a TFS scheduling.
  • PLP Physical Layer Path
  • input data for BICM decoder can be obtained by using time domain deinterleaver (1203a, b) and QAM demapper (1204a, b).
  • hybrid QAM demapper can be used as the QAM demapper.
  • Fig. 29 shows an example of performing a QAM demapper, which is a counterpart of
  • FEC block splitter can split inputted symbol block unit having 64800 bits into four symbol blocks of 16200 bits when short DVB -S2 LDPC mode is used.
  • Symbol splitter (a- 1202) can split inputted symbol streams into two symbol streams for HOQ and LOQ demapper.
  • HOQ demapper (a- 1203a) and LOQ demapper (a- 1203b) can perform HOQ and LOQ demapping respectively.
  • Bitstream merger (a- 1204) can merge two inputted bit streams into a single output bitstream.
  • Fig. 30 shows an example of a QAM demapper combined with inner deinterleavers which are counterparts of Fig. 9 of transmitter.
  • symbol splitter (b-1201) can split output of time domain deinterleaver into two symbol streams for HOQ and LOQ demappers.
  • HOQ and LOQ Demapper (b- 1202a, b- 1202b) can convert sym- bolstreams into bitstreams.
  • Each bitstream can be rearranged by multiplexer (b- 1203a, b- 1203b), which is a counterpart of the demux of Fig. 9 of transmitter.
  • bit dein- terleavers (b- 1204a, b- 1204b) can deinterleave bitstreams according to constellation type.
  • bitstream merger (b-1205) can merge bitstreams into a single bitstream, then LDPC decoder (b-1206) can correct errors in a transmission channel.
  • Fig. 31 shows a time deinterleaver, a counterpart of time interleaver shown in Fig. 17
  • Convolutional Deinterleaving (1201a) can be performed on input symbol streams and dummy symbols can be removed (1202a).
  • Fig. 32 shows a time deinterleaver, a counterpart of time interleaver shown in Fig.
  • Convolutional Deinterleaving (1201b ⁇ 1203b) can be performed on input symbol streams for each RF band and for each PLP symbol streams.
  • Original PLP symbol streams can be restored by multiplexing (1204b) the outputs of each Convolutional deinterleaving unit to original sequence.
  • Fig. 33 shows an example of a BICM decoder.
  • Inner deinterleaver (1301) and outer deinterleaver (1303) can convert burst errors in a transmission channel into random errors.
  • Inner decoder (1302) and outer decoder (1304) can correct errors in the transmission channel.
  • Fig. 34 shows an example of LDPC decoding for shortened/punctured LDPC codeword.
  • demux (1301a) can separate systematic code into information part and parity part.
  • zero padding (1302a) can be performed according to Number of Input bit of LDPC decoder.
  • input bit streams for LDPC decoder can be generated by depuncturing (1303a).
  • LDPC decoding (1304a) can be performed and zeros in information part can be removed (1305a).
  • Fig. 35 shows an example of an output processor.
  • BB Baseband
  • (1401a ⁇ d) can reconstruct input data into total P of PLP data.
  • Service mergers (1402a, b) can merge data into a single TS (Transport Stream) and a single GSE stream.
  • TS-demux (1403a) can reconstruct original TS.
  • GSE Decapsulation (1403b) can reconstruct generic stream.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)

Abstract

L'invention concerne des procédés efficaces d'émission de signaux, un récepteur efficace, et des procédés efficaces de réception de signaux. Elle concerne, plus particulièrement, un récepteur et des procédés de réception permettant la mise en oeuvre d'un remplissage par zéros et une réintroduction de parité. En outre, cette invention concerne des procédés efficaces de transmission de signaux qui sont les homologues des procédés de réception.
PCT/KR2008/005503 2007-09-18 2008-09-17 Procédé et système d'émission et de réception de signaux Ceased WO2009038353A2 (fr)

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EP08831663A EP2195985A4 (fr) 2007-09-18 2008-09-17 Procédé et système de transmission et de réception de signaux

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US97341807P 2007-09-18 2007-09-18
US60/973,418 2007-09-18

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WO2009038353A2 true WO2009038353A2 (fr) 2009-03-26
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016096766A1 (fr) * 2014-12-15 2016-06-23 Sony Corporation Émetteur et récepteur supposant un entrelacement convolutionnel et procédés correspondants
JP2016536938A (ja) * 2013-09-25 2016-11-24 エルジー エレクトロニクス インコーポレイティド 放送信号送信装置、放送信号受信装置、放送信号送信方法及び放送信号受信方法
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EP2195985A4 (fr) 2011-06-08
WO2009038353A3 (fr) 2009-05-28

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