WO2009004628A3 - Multi-core cpu - Google Patents
Multi-core cpu Download PDFInfo
- Publication number
- WO2009004628A3 WO2009004628A3 PCT/IL2008/000916 IL2008000916W WO2009004628A3 WO 2009004628 A3 WO2009004628 A3 WO 2009004628A3 IL 2008000916 W IL2008000916 W IL 2008000916W WO 2009004628 A3 WO2009004628 A3 WO 2009004628A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- core cpu
- cores
- predefined tasks
- perform
- interconnected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
- G06F15/7832—Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Hardware Redundancy (AREA)
Abstract
A multi-core CPU has a plurality of interconnected cores, each of said cores being mainly dedicated to a set of predefined tasks, and each of said cores being adapted to perform its predefined tasks.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US94799607P | 2007-07-05 | 2007-07-05 | |
| US60/947,996 | 2007-07-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2009004628A2 WO2009004628A2 (en) | 2009-01-08 |
| WO2009004628A3 true WO2009004628A3 (en) | 2010-03-04 |
Family
ID=40226623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/IL2008/000916 Ceased WO2009004628A2 (en) | 2007-07-05 | 2008-07-03 | Multi-core cpu |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2009004628A2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9891964B2 (en) | 2014-11-19 | 2018-02-13 | International Business Machines Corporation | Network traffic processing |
| CN114866499B (en) * | 2022-04-27 | 2024-02-23 | 曙光信息产业(北京)有限公司 | Synchronous broadcast communication method, device and storage medium of multi-core system on chip |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4922414A (en) * | 1982-12-17 | 1990-05-01 | Symbolics Inc. | Symbolic language data processing system |
| US5835775A (en) * | 1996-12-12 | 1998-11-10 | Ncr Corporation | Method and apparatus for executing a family generic processor specific application |
| US20040024845A1 (en) * | 2001-11-15 | 2004-02-05 | Globalview Software, Inc. | Data transfer system |
| US20060179277A1 (en) * | 2005-02-04 | 2006-08-10 | Flachs Brian K | System and method for instruction line buffer holding a branch target buffer |
| US20060236147A1 (en) * | 2005-04-15 | 2006-10-19 | Rambus Inc. | Processor controlled interface |
| US20070061433A1 (en) * | 2005-09-12 | 2007-03-15 | Scott Reynolds | Methods and apparatus to support dynamic allocation of traffic management resources in a network element |
| US20070130445A1 (en) * | 2005-12-05 | 2007-06-07 | Intel Corporation | Heterogeneous multi-core processor having dedicated connections between processor cores |
-
2008
- 2008-07-03 WO PCT/IL2008/000916 patent/WO2009004628A2/en not_active Ceased
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4922414A (en) * | 1982-12-17 | 1990-05-01 | Symbolics Inc. | Symbolic language data processing system |
| US5835775A (en) * | 1996-12-12 | 1998-11-10 | Ncr Corporation | Method and apparatus for executing a family generic processor specific application |
| US20040024845A1 (en) * | 2001-11-15 | 2004-02-05 | Globalview Software, Inc. | Data transfer system |
| US20060179277A1 (en) * | 2005-02-04 | 2006-08-10 | Flachs Brian K | System and method for instruction line buffer holding a branch target buffer |
| US20060236147A1 (en) * | 2005-04-15 | 2006-10-19 | Rambus Inc. | Processor controlled interface |
| US20070061433A1 (en) * | 2005-09-12 | 2007-03-15 | Scott Reynolds | Methods and apparatus to support dynamic allocation of traffic management resources in a network element |
| US20070130445A1 (en) * | 2005-12-05 | 2007-06-07 | Intel Corporation | Heterogeneous multi-core processor having dedicated connections between processor cores |
Non-Patent Citations (1)
| Title |
|---|
| GUTTAG, J.: "Abstract Data Types and the Development of Data Structures.", COMMUNICATIONS OF THE ACM., vol. 20, no. 6, June 1977 (1977-06-01), pages 396 - 404, Retrieved from the Internet <URL:http://www.cs.wright.edu/people/iaculty/tkprasad/courses/cs784/guttag-cacm77.pdf> [retrieved on 20081108] * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2009004628A2 (en) | 2009-01-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
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| NENP | Non-entry into the national phase |
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| 122 | Ep: pct application non-entry in european phase |
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