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WO2009079442A1 - Method and apparatus for digital-to-analog converter with noise cancellation - Google Patents

Method and apparatus for digital-to-analog converter with noise cancellation Download PDF

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Publication number
WO2009079442A1
WO2009079442A1 PCT/US2008/086795 US2008086795W WO2009079442A1 WO 2009079442 A1 WO2009079442 A1 WO 2009079442A1 US 2008086795 W US2008086795 W US 2008086795W WO 2009079442 A1 WO2009079442 A1 WO 2009079442A1
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WO
WIPO (PCT)
Prior art keywords
noise
signal
amplifier
circuit
analog converter
Prior art date
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Ceased
Application number
PCT/US2008/086795
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French (fr)
Inventor
Andrew Martin Mallinson
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ESS Technology Inc
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ESS Technology Inc
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Filing date
Publication date
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Publication of WO2009079442A1 publication Critical patent/WO2009079442A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/03—Indexing scheme relating to amplifiers the amplifier being designed for audio applications
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45622—Indexing scheme relating to differential amplifiers the IC comprising a voltage generating circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45644—Indexing scheme relating to differential amplifiers the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion

Definitions

  • Figure 1 is an audio digital-to-analog converter.
  • Figure 2 is an audio digital-to-analog converter with reduced noise.
  • Figure 3 is a noise analysis for the circuit of Figure 2.
  • Figures 4A and 4B are node equations and associated solution for the circuit of
  • Figure 5 shows a variation of the circuit from Figure 1 with the additional resistors from the technology described by Figure 2.
  • Figure 6 shows a non-inverting amplifier configuration with indistinguishable noise source and input signal, therefore not susceptible to noise cancellation or suppression.
  • Figure 7 shows an inverting amplifier configuration having distinguishable noise source and input signal, therefore susceptible to noise cancellation or suppression.
  • Figure 8 shows a circuit which requires an auxiliary amplifier to remove noise, in contrast with an embodiment of the technology.
  • Figure 1 is an audio digital-to-analog converter. This three op-amp configuration has two V to I converters (left side) followed by one differential to single ended converter (right side). The circuit has an output noise that is due to the noise of each amplifier; the two V to I converters / amplifiers and the output amplifier all contribute noise to the output.
  • Figure 2 is an audio digital-to-analog converter with reduced noise. Although the pair of V to I converters / amplifiers are shown as a single amplifier (Ul), the principle of operation is similar to Figure 1. This embodiment removes the noise of the two V to I converters / amplifiers, and simplifies the problem of obtaining a low noise solution to the differential single ended amplifier. This embodiment adds the resistors R3A and R3B.
  • Figure 3 is a noise analysis showing that the 50kohm R6 resistor contributes very little noise to the output.
  • Figures 4A and 4B are node equations and associated solution for the circuit of Figure 2.
  • the solution line %ol3 indicates a gain.
  • the solution line %ol4 indicates a zero noise contribution from the V to I converter. This follows from the solution line %ol2 which indicates that a value of R3 is 112.68 ohms.
  • the particular value is less important, than the existence of some resistance value for a similarly situated resistor in a similar circuit, which results in this improved noise performance.
  • Other embodiments with differently arranged circuits and/or different circuit values will have a different resistance value that results in this improved noise performance.
  • various embodiments eliminate the Vl source and R6 resistor which are present for purposes of proof of concept.
  • FIG. 1 shows a variation of the circuit from Figure 1 with the additional resistors from the technology described by Figure 2. The values are not optimized as shown, but routine experimentation would indicate the values for the additional resistors that removes the noise of the two V to I converters / amplifiers, and simplifies the problem of obtaining a low noise solution to the differential single ended amplifier.
  • This technology is directed towards those circuits where the noise and signal may be differentiated and hence a potential exists to cancel the noise without canceling the signal. The ability to discriminate the noise and the signal occurs in those circuits where the noise gain differs from the signal gain.
  • Noise gain is a term used to describe the amplification of noise that arises in any circuit due to noise considered to be present as an unwanted signal at the input.
  • the circuit shown in Figure 6 is a non- inverting amplifier and has a signal gain and noise gain often.
  • the battery device (Vl) is added to indicate the noise source.
  • the noise source and the input signal are indistinguishable because they are in series.
  • the gain from the input to the output is ten, and the gain from the noise source to the output is also ten.
  • the amplifier of Figure 7 however is a little different, and shows an inverting amplifier configuration and with a gain from input to output of minus one. But, interestingly, the noise gain from that battery representing the noise source is plus two. The noise gain and signal gain being different in this configuration is not at all optimum from a noise point of view, because the noise is two times higher in this case than in the non-inverting case. However, because the noise gain and signal gain are different, the potential exists to separate the signal from the noise, and also to cancel the noise. [0018] Although prior instances of technology have canceled the noise of an inverting amplifier configuration, such as in M-L.
  • the first caveat is that an auxiliary amplifier is required to inspect the noise present on the amplifier that is to have its noise cancelled, (i.e., in Figure Ib of the above referenced paper shown as Figure 8 of the present application, the amplifier having its noise removed is TO and the auxiliary amplifier measuring that noise for the purpose of cancellation is T2.
  • the second caveat is that the amplifier having its noise removed is configured as an inverting voltage amplifier.
  • this technology is beneficial in at least these two distinct aspects: no additional amplifier is required, and the amplifier having its noise removed is not constrained to be an inverting voltage amplifier; rather, the amplifier having its noise removed can be an inverting voltage amplifier, and alternatively the amplifier having its noise removed can be a current to voltage converter.
  • One embodiment is a circuit configuration wherein the signal and the noise due to circuit elements experience a different transfer characteristic, in at least part of the circuit, such as is present in the well known inverting amplifier or current to voltage conversion circuit. [0023] One embodiment is this circuit also having a divergent signal path and a convergent signal path to a common output.
  • One embodiment has the divergent signals being constructed so as to carry mathematically independent representations of the signal and the noise, that is, having any linear combination of signal and noise in each path that is not mathematically redundant, (not excluding the case where one signal is entirely noise one entirely signal or visa- versa).
  • One embodiment has the convergent signal path being such that the noise and signals present in the divergent signal paths are beneficially added, or otherwise processed, such that the noise is suppressed relative to the signal.
  • One embodiment has the divergent and convergent signal paths being created without addition of any other active components. The prior technology must add additional active circuit elements.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Amplifiers (AREA)

Abstract

A circuit such as a digital-to-analog converter performs suppression of noise relative to signal. Various examples of the circuit suppress the noise of an inverting voltage amplifier or a current to voltage amplifier. Another example does require an auxiliary amplifier dedicated to perform the noise suppression. Examples of the circuits which benefit from the technology have a circuit configuration which separates the signal from the noise.

Description

METHOD AND APPARATUS FOR A DIGITAL-TO-ANALOG CONVERTER WITH
NOISE CANCELLATION
BRIEF DESCRIPTION OF THE DRAWINGS [0001] Figure 1 is an audio digital-to-analog converter.
[0002] Figure 2 is an audio digital-to-analog converter with reduced noise.
[0003] Figure 3 is a noise analysis for the circuit of Figure 2.
[0004] Figures 4A and 4B are node equations and associated solution for the circuit of
Figure 2. [0005] Figure 5 shows a variation of the circuit from Figure 1 with the additional resistors from the technology described by Figure 2.
[0006] Figure 6 shows a non-inverting amplifier configuration with indistinguishable noise source and input signal, therefore not susceptible to noise cancellation or suppression.
[0007] Figure 7 shows an inverting amplifier configuration having distinguishable noise source and input signal, therefore susceptible to noise cancellation or suppression.
[0008] Figure 8 shows a circuit which requires an auxiliary amplifier to remove noise, in contrast with an embodiment of the technology.
DETAILED DESCRIPTION [0009] Figure 1 is an audio digital-to-analog converter. This three op-amp configuration has two V to I converters (left side) followed by one differential to single ended converter (right side). The circuit has an output noise that is due to the noise of each amplifier; the two V to I converters / amplifiers and the output amplifier all contribute noise to the output. [0010] Figure 2 is an audio digital-to-analog converter with reduced noise. Although the pair of V to I converters / amplifiers are shown as a single amplifier (Ul), the principle of operation is similar to Figure 1. This embodiment removes the noise of the two V to I converters / amplifiers, and simplifies the problem of obtaining a low noise solution to the differential single ended amplifier. This embodiment adds the resistors R3A and R3B. [0011] Figure 3 is a noise analysis showing that the 50kohm R6 resistor contributes very little noise to the output.
[0012] Figures 4A and 4B are node equations and associated solution for the circuit of Figure 2. For this particular embodiment, the solution line %ol3 indicates a gain. For this particular embodiment, the solution line %ol4 indicates a zero noise contribution from the V to I converter. This follows from the solution line %ol2 which indicates that a value of R3 is 112.68 ohms. The particular value is less important, than the existence of some resistance value for a similarly situated resistor in a similar circuit, which results in this improved noise performance. Other embodiments with differently arranged circuits and/or different circuit values will have a different resistance value that results in this improved noise performance. For example, various embodiments eliminate the Vl source and R6 resistor which are present for purposes of proof of concept.
[0013] In several embodiments, a huge FET area in the V to I converter is reduced to reduce 1/f noise. [0014] Figure 5 shows a variation of the circuit from Figure 1 with the additional resistors from the technology described by Figure 2. The values are not optimized as shown, but routine experimentation would indicate the values for the additional resistors that removes the noise of the two V to I converters / amplifiers, and simplifies the problem of obtaining a low noise solution to the differential single ended amplifier. [0015] This technology is directed towards those circuits where the noise and signal may be differentiated and hence a potential exists to cancel the noise without canceling the signal. The ability to discriminate the noise and the signal occurs in those circuits where the noise gain differs from the signal gain. "Noise gain" is a term used to describe the amplification of noise that arises in any circuit due to noise considered to be present as an unwanted signal at the input. [0016] For example, the circuit shown in Figure 6 is a non- inverting amplifier and has a signal gain and noise gain often. The battery device (Vl) is added to indicate the noise source. The noise source and the input signal are indistinguishable because they are in series. The gain from the input to the output is ten, and the gain from the noise source to the output is also ten.
Consequently, if the equivalent noise at the input to this amplifier was, for example, 20nV/V Hz,
(20 nano-volts per square root hertz) then the noise at the output would be 200nV/V Hz ; a noise gain often.
[0017] The amplifier of Figure 7 however is a little different, and shows an inverting amplifier configuration and with a gain from input to output of minus one. But, interestingly, the noise gain from that battery representing the noise source is plus two. The noise gain and signal gain being different in this configuration is not at all optimum from a noise point of view, because the noise is two times higher in this case than in the non-inverting case. However, because the noise gain and signal gain are different, the potential exists to separate the signal from the noise, and also to cancel the noise. [0018] Although prior instances of technology have canceled the noise of an inverting amplifier configuration, such as in M-L. Grima, "SiGe CMOS Differential Low Noise Amplifier 100MHz - 300MHz", URSI (International Union of Radio Science) General Assembly, October 25, 2005 New Delhi, India. However, such prior instances of technology have two caveats, as follows. The first caveat, is that an auxiliary amplifier is required to inspect the noise present on the amplifier that is to have its noise cancelled, (i.e., in Figure Ib of the above referenced paper shown as Figure 8 of the present application, the amplifier having its noise removed is TO and the auxiliary amplifier measuring that noise for the purpose of cancellation is T2. The second caveat, is that the amplifier having its noise removed is configured as an inverting voltage amplifier.
[0019] Accordingly, this technology is beneficial in at least these two distinct aspects: no additional amplifier is required, and the amplifier having its noise removed is not constrained to be an inverting voltage amplifier; rather, the amplifier having its noise removed can be an inverting voltage amplifier, and alternatively the amplifier having its noise removed can be a current to voltage converter.
[0020] The guidance behind this technology was the knowledge that, since the noise gain had nothing to do with the signal gain in the intended application (the V to I stage of a current output DAC). A number of false "guesses" were required to lead to the mathematically proven solution, and lab work verified that the mathematically apparent solution is actually practically viable.
[0021] In the well known case of the "three op-amp" differential current to single ended voltage conversion noise cancellation of the voltage noise present in the first current to voltage conversion stage may be accomplished by the addition of two extra resistors. Those extra resistors are seen a posteriori to be adding a fraction of the signal present in the inverting channel to the non-inverting channel and visa- versa. This is rationalized by the realization that the noise signal not only has a different gain than the intended signal, but it also has a different sign - the noise is positively amplified by the V to I conversion amplifier whereas the signal is negatively amplified. This was the intuitive source of the repeated number of false "guesses", that there may be a means to subtract the noise from the signal by adding the noise to its inverse signal. The analytical math solution shows that this is indeed the case.
[0022] One embodiment is a circuit configuration wherein the signal and the noise due to circuit elements experience a different transfer characteristic, in at least part of the circuit, such as is present in the well known inverting amplifier or current to voltage conversion circuit. [0023] One embodiment is this circuit also having a divergent signal path and a convergent signal path to a common output.
[0024] One embodiment has the divergent signals being constructed so as to carry mathematically independent representations of the signal and the noise, that is, having any linear combination of signal and noise in each path that is not mathematically redundant, (not excluding the case where one signal is entirely noise one entirely signal or visa- versa).
[0025] One embodiment has the convergent signal path being such that the noise and signals present in the divergent signal paths are beneficially added, or otherwise processed, such that the noise is suppressed relative to the signal. [0026] One embodiment has the divergent and convergent signal paths being created without addition of any other active components. The prior technology must add additional active circuit elements.
[0027] While the present invention is disclosed by reference to the preferred embodiments and examples detailed above, it is to be understood that these examples are intended in an illustrative rather than in a limiting sense. It is contemplated that modifications and combinations will readily occur to those skilled in the art, which modifications and combinations will be within the spirit of the invention and the scope of the following claims. What is claimed is:

Claims

1. A circuit with noise reduction as described herein.
2. A digital-to-analog converter with noise reduction as described herein.
3. A digital-to-analog converter with output having suppression of noise relative to signal, without additional active components to perform the suppression of the noise.
4. A digital-to-analog converter with in a current-to-voltage amplifier having an output with suppression of noise relative to signal.
PCT/US2008/086795 2007-12-14 2008-12-15 Method and apparatus for digital-to-analog converter with noise cancellation Ceased WO2009079442A1 (en)

Applications Claiming Priority (2)

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US1386807P 2007-12-14 2007-12-14
US61/013,868 2007-12-14

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393775A (en) * 2011-09-28 2012-03-28 魏德米勒电联接国际贸易(上海)有限公司 Voltage-current converting circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972188A (en) * 1989-09-15 1990-11-20 International Business Machines Corporation Push pull double digital-to-analog converter
US5243344A (en) * 1991-05-30 1993-09-07 Koulopoulos Michael A Digital-to-analog converter--preamplifier apparatus
US6952176B2 (en) * 2003-12-05 2005-10-04 Wolfson Microelectronics Plc Digital-to-analogue converter circuits
US7205920B2 (en) * 2004-09-17 2007-04-17 Analog Devices, Inc. Continuous-time-sigma-delta DAC using chopper stabalization

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972188A (en) * 1989-09-15 1990-11-20 International Business Machines Corporation Push pull double digital-to-analog converter
US5243344A (en) * 1991-05-30 1993-09-07 Koulopoulos Michael A Digital-to-analog converter--preamplifier apparatus
US6952176B2 (en) * 2003-12-05 2005-10-04 Wolfson Microelectronics Plc Digital-to-analogue converter circuits
US7205920B2 (en) * 2004-09-17 2007-04-17 Analog Devices, Inc. Continuous-time-sigma-delta DAC using chopper stabalization

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393775A (en) * 2011-09-28 2012-03-28 魏德米勒电联接国际贸易(上海)有限公司 Voltage-current converting circuit

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