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WO2009047865A1 - 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム - Google Patents

受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム Download PDF

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Publication number
WO2009047865A1
WO2009047865A1 PCT/JP2007/069984 JP2007069984W WO2009047865A1 WO 2009047865 A1 WO2009047865 A1 WO 2009047865A1 JP 2007069984 W JP2007069984 W JP 2007069984W WO 2009047865 A1 WO2009047865 A1 WO 2009047865A1
Authority
WO
WIPO (PCT)
Prior art keywords
converter
conversion table
reception circuit
signal transmission
transmission system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/069984
Other languages
English (en)
French (fr)
Inventor
Masaya Kibune
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2009536905A priority Critical patent/JP4874398B2/ja
Priority to PCT/JP2007/069984 priority patent/WO2009047865A1/ja
Priority to CN200780100491.5A priority patent/CN101796732B/zh
Publication of WO2009047865A1 publication Critical patent/WO2009047865A1/ja
Priority to US12/757,571 priority patent/US8031091B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Analogue/Digital Conversion (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

　入力信号に応じてデジタルデータを出力するＡＤコンバータ３１と、ＡＤコンバータの非線形性を補正する補正回路５０と、補正された前記デジタルデータを等化する等化回路３２と、を備え、ＡＤＣの非線形性を補正するように構成された受信回路３で、補正回路５０は、ＡＤコンバータの出力するデジタルデータを変換する変換テーブル５５と、ＡＤコンバータの出力データと等化回路の出力から変換テーブルを作成する補正量演算部５４と、を備える。
PCT/JP2007/069984 2007-10-12 2007-10-12 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム Ceased WO2009047865A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009536905A JP4874398B2 (ja) 2007-10-12 2007-10-12 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム
PCT/JP2007/069984 WO2009047865A1 (ja) 2007-10-12 2007-10-12 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム
CN200780100491.5A CN101796732B (zh) 2007-10-12 2007-10-12 接收电路及其ad转换器的转换表生成方法以及信号传输系统
US12/757,571 US8031091B2 (en) 2007-10-12 2010-04-09 Reception circuit, method of creating AD converter conversion table of reception circuit, and signal transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/069984 WO2009047865A1 (ja) 2007-10-12 2007-10-12 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/757,571 Continuation US8031091B2 (en) 2007-10-12 2010-04-09 Reception circuit, method of creating AD converter conversion table of reception circuit, and signal transfer system

Publications (1)

Publication Number Publication Date
WO2009047865A1 true WO2009047865A1 (ja) 2009-04-16

Family

ID=40549021

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/069984 Ceased WO2009047865A1 (ja) 2007-10-12 2007-10-12 受信回路、受信回路のａｄコンバータの変換テーブル作成方法、および信号伝送システム

Country Status (4)

Country Link
US (1) US8031091B2 (ja)
JP (1) JP4874398B2 (ja)
CN (1) CN101796732B (ja)
WO (1) WO2009047865A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011228799A (ja) * 2010-04-15 2011-11-10 Fujitsu Ltd 受信回路
WO2017213138A1 (ja) * 2016-06-08 2017-12-14 株式会社デンソー 受信装置
WO2023218756A1 (ja) * 2022-05-11 2023-11-16 ソニーセミコンダクタソリューションズ株式会社 アナログデジタル変換器、電子装置、および、アナログデジタル変換器の制御方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5605064B2 (ja) * 2010-08-04 2014-10-15 富士通株式会社 判定帰還等化回路、受信回路、及び判定帰還等化処理方法
JP2012079385A (ja) * 2010-10-04 2012-04-19 Sony Corp データ検出装置、再生装置、データ検出方法
US11239854B2 (en) 2019-10-03 2022-02-01 Texas Instruments Incorporated Non-linearity correction
WO2021067932A1 (en) * 2019-10-03 2021-04-08 Texas Instruments Incorporated Non-linearity correction

Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH04259125A (ja) * 1991-02-13 1992-09-14 Nec Corp 自動等化器
JPH10322205A (ja) * 1997-05-14 1998-12-04 Nippon Columbia Co Ltd 非線形歪み補正装置及び非線形歪み補正方法
JP2003298953A (ja) * 2002-03-29 2003-10-17 Seiko Epson Corp 画像処理装置および画像処理方法
JP2007189535A (ja) * 2006-01-13 2007-07-26 Hitachi Kokusai Electric Inc 歪補償増幅装置

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NL8600815A (nl) 1986-03-28 1987-10-16 At & T & Philips Telecomm Inrichting voor het kompenseren van niet-lineaire vervorming in een te digitaliseren ingangssignaal en een echokompensatiestelsel voorzien van een dergelijke inrichting.
JP3556066B2 (ja) 1996-07-10 2004-08-18 コロムビアミュージックエンタテインメント株式会社 歪み検出装置および歪み補正装置および歪み補正方法
US5771127A (en) * 1996-07-29 1998-06-23 Cirrus Logic, Inc. Sampled amplitude read channel employing interpolated timing recovery and a remod/demod sequence detector
US6690311B2 (en) * 1998-11-20 2004-02-10 Telefonaktiebolaget Lm Ericsson (Publ) Adaptively calibrating analog-to-digital conversion with correction table indexing
US6127955A (en) * 1998-11-20 2000-10-03 Telefonaktiebolaget Lm Ericsson (Publ) Method and system for calibrating analog-to-digital conversion
JP3292165B2 (ja) 1999-02-02 2002-06-17 日本電気株式会社 線路等化器及びその等化方法
ATE336106T1 (de) 2000-06-19 2006-09-15 Ericsson Telefon Ab L M Spitzenwertkalibrierung in analog-digital- wandlungen
DE10305972A1 (de) * 2003-02-13 2004-09-02 Micronas Gmbh Kompensationsschaltungsanordnung und Kompensationsverfahren zum Kompensieren von nicht-linearen Verzerrungen eines AD-Wandlers
US6967603B1 (en) * 2004-07-19 2005-11-22 Realtek Semiconductor Corp. ADC background calibration timing
DE102004049348A1 (de) * 2004-10-08 2006-04-20 Micronas Gmbh Verfahren sowie Einrichtung zur Kompensation von Kennlinienfehlern eines Analog-Digital-Wandlers

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04259125A (ja) * 1991-02-13 1992-09-14 Nec Corp 自動等化器
JPH10322205A (ja) * 1997-05-14 1998-12-04 Nippon Columbia Co Ltd 非線形歪み補正装置及び非線形歪み補正方法
JP2003298953A (ja) * 2002-03-29 2003-10-17 Seiko Epson Corp 画像処理装置および画像処理方法
JP2007189535A (ja) * 2006-01-13 2007-07-26 Hitachi Kokusai Electric Inc 歪補償増幅装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011228799A (ja) * 2010-04-15 2011-11-10 Fujitsu Ltd 受信回路
WO2017213138A1 (ja) * 2016-06-08 2017-12-14 株式会社デンソー 受信装置
JP2017220820A (ja) * 2016-06-08 2017-12-14 株式会社デンソー 受信装置
WO2023218756A1 (ja) * 2022-05-11 2023-11-16 ソニーセミコンダクタソリューションズ株式会社 アナログデジタル変換器、電子装置、および、アナログデジタル変換器の制御方法

Also Published As

Publication number Publication date
JPWO2009047865A1 (ja) 2011-02-17
CN101796732A (zh) 2010-08-04
US8031091B2 (en) 2011-10-04
US20100194611A1 (en) 2010-08-05
CN101796732B (zh) 2013-08-14
JP4874398B2 (ja) 2012-02-15

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