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WO2008136069A1 - 中継回路、情報処理装置、中継方法 - Google Patents

中継回路、情報処理装置、中継方法 Download PDF

Info

Publication number
WO2008136069A1
WO2008136069A1 PCT/JP2007/058585 JP2007058585W WO2008136069A1 WO 2008136069 A1 WO2008136069 A1 WO 2008136069A1 JP 2007058585 W JP2007058585 W JP 2007058585W WO 2008136069 A1 WO2008136069 A1 WO 2008136069A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
voltage
relaying
waveform
information processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/058585
Other languages
English (en)
French (fr)
Inventor
Yoshinari Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to EP07742021A priority Critical patent/EP2141812A4/en
Priority to JP2009512805A priority patent/JP4894919B2/ja
Priority to PCT/JP2007/058585 priority patent/WO2008136069A1/ja
Publication of WO2008136069A1 publication Critical patent/WO2008136069A1/ja
Priority to US12/578,738 priority patent/US8102198B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017509Interface arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Dc Digital Transmission (AREA)

Abstract

 第1電圧で駆動される第1回路と、第1電圧とは異なる第2電圧で駆動される第2回路との間に設けられ、第1回路と第2回路との間の信号伝達を中継する中継回路であって、第2電圧の変動を急峻にするように第2電圧の波形を整形して整形電圧を得る波形整形回路と、第1電圧により駆動されると共に波形整形回路により得られた整形電圧が制御信号として入力され、整形電圧が所定値以下となる場合に信号伝達を遮断するバッファ回路とを備えた。
PCT/JP2007/058585 2007-04-20 2007-04-20 中継回路、情報処理装置、中継方法 Ceased WO2008136069A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP07742021A EP2141812A4 (en) 2007-04-20 2007-04-20 RELAY SWITCHING, INFORMATION PROCESSING DEVICE AND RELAY METHOD
JP2009512805A JP4894919B2 (ja) 2007-04-20 2007-04-20 中継回路、情報処理装置、中継方法
PCT/JP2007/058585 WO2008136069A1 (ja) 2007-04-20 2007-04-20 中継回路、情報処理装置、中継方法
US12/578,738 US8102198B2 (en) 2007-04-20 2009-10-14 Relay circuit, information processing apparatus, and relay method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/058585 WO2008136069A1 (ja) 2007-04-20 2007-04-20 中継回路、情報処理装置、中継方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/578,738 Continuation US8102198B2 (en) 2007-04-20 2009-10-14 Relay circuit, information processing apparatus, and relay method

Publications (1)

Publication Number Publication Date
WO2008136069A1 true WO2008136069A1 (ja) 2008-11-13

Family

ID=39943194

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/058585 Ceased WO2008136069A1 (ja) 2007-04-20 2007-04-20 中継回路、情報処理装置、中継方法

Country Status (4)

Country Link
US (1) US8102198B2 (ja)
EP (1) EP2141812A4 (ja)
JP (1) JP4894919B2 (ja)
WO (1) WO2008136069A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246652A (ja) * 2008-03-31 2009-10-22 Fujitsu Ltd 電源状態通知方法及び電源状態通知回路

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MX387949B (es) 2013-03-01 2025-03-19 The Procter & Gamble Company Star Dispositivo de trampa para insectos y metodos de uso.
US10219073B1 (en) * 2017-11-20 2019-02-26 Ford Global Technologies, Llc Vehicle audio system
TWI723924B (zh) * 2020-07-23 2021-04-01 聯陽半導體股份有限公司 訊號傳輸系統

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619412A (ja) * 1992-07-06 1994-01-28 Seiko Epson Corp 半導体集積回路、多出力ドライバ及び蛍光表示管モジュール
JPH0779151A (ja) * 1993-09-08 1995-03-20 Fujitsu Ltd 半導体装置
JP2000151383A (ja) 1998-11-12 2000-05-30 Kawasaki Steel Corp 出力バッファ回路
US20040041615A1 (en) 2002-09-02 2004-03-04 Takuo Mukai Level shift circuit
JP2004247846A (ja) * 2003-02-12 2004-09-02 Toshiba Corp 信号レベル変換回路
JP2004356779A (ja) * 2003-05-28 2004-12-16 Seiko Epson Corp 半導体集積回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3194636B2 (ja) * 1993-01-12 2001-07-30 三菱電機株式会社 レベル変換回路、レベル変換回路を内蔵したエミュレータ用マイクロコンピュータ、レベル変換回路を内蔵したピギーバックマイクロコンピュータ、レベル変換回路を内蔵したエミュレートシステム及びレベル変換回路を内蔵したlsiテストシステム
US5764094A (en) * 1995-06-02 1998-06-09 Matsushita Electric Industrial Co., Ltd. Level shift circuit for analog signal and signal waveform generator including the same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619412A (ja) * 1992-07-06 1994-01-28 Seiko Epson Corp 半導体集積回路、多出力ドライバ及び蛍光表示管モジュール
JPH0779151A (ja) * 1993-09-08 1995-03-20 Fujitsu Ltd 半導体装置
JP2000151383A (ja) 1998-11-12 2000-05-30 Kawasaki Steel Corp 出力バッファ回路
US20040041615A1 (en) 2002-09-02 2004-03-04 Takuo Mukai Level shift circuit
JP2004096563A (ja) * 2002-09-02 2004-03-25 Ricoh Co Ltd レベルシフト回路
JP2004247846A (ja) * 2003-02-12 2004-09-02 Toshiba Corp 信号レベル変換回路
JP2004356779A (ja) * 2003-05-28 2004-12-16 Seiko Epson Corp 半導体集積回路

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2141812A4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246652A (ja) * 2008-03-31 2009-10-22 Fujitsu Ltd 電源状態通知方法及び電源状態通知回路

Also Published As

Publication number Publication date
JPWO2008136069A1 (ja) 2010-07-29
EP2141812A1 (en) 2010-01-06
EP2141812A4 (en) 2013-01-23
US8102198B2 (en) 2012-01-24
JP4894919B2 (ja) 2012-03-14
US20100026360A1 (en) 2010-02-04

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