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WO2008126223A1 - Digital phase synchronizing circuit and digital phase synchronizing circuit control method - Google Patents

Digital phase synchronizing circuit and digital phase synchronizing circuit control method Download PDF

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Publication number
WO2008126223A1
WO2008126223A1 PCT/JP2007/056855 JP2007056855W WO2008126223A1 WO 2008126223 A1 WO2008126223 A1 WO 2008126223A1 JP 2007056855 W JP2007056855 W JP 2007056855W WO 2008126223 A1 WO2008126223 A1 WO 2008126223A1
Authority
WO
WIPO (PCT)
Prior art keywords
synchronizing circuit
digital phase
phase synchronizing
frequency
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/056855
Other languages
French (fr)
Japanese (ja)
Inventor
Koji Nakamuta
Yoshito Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to PCT/JP2007/056855 priority Critical patent/WO2008126223A1/en
Publication of WO2008126223A1 publication Critical patent/WO2008126223A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0994—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A digital phase synchronizing circuit (1) comprises an oscillator (42) that oscillates a frequency controlled output signal; a phase comparator part (2) that compares the phase of an externally inputted reference signal with the phase of a feedback signal obtained by looping an output signal; and an oscillator control part (3) that executes, based on a comparison result of the phase comparator part (2), a pull-in process for controlling the frequency of the output signal such that the phase difference between the feedback signal and the reference signal is constant. The oscillator control part (3) executes a frequency synchronization for controlling the output signal such that the frequency of the feedback signal gets closer to the frequency of the reference signal before starting the pull-in process.
PCT/JP2007/056855 2007-03-29 2007-03-29 Digital phase synchronizing circuit and digital phase synchronizing circuit control method Ceased WO2008126223A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056855 WO2008126223A1 (en) 2007-03-29 2007-03-29 Digital phase synchronizing circuit and digital phase synchronizing circuit control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056855 WO2008126223A1 (en) 2007-03-29 2007-03-29 Digital phase synchronizing circuit and digital phase synchronizing circuit control method

Publications (1)

Publication Number Publication Date
WO2008126223A1 true WO2008126223A1 (en) 2008-10-23

Family

ID=39863405

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/056855 Ceased WO2008126223A1 (en) 2007-03-29 2007-03-29 Digital phase synchronizing circuit and digital phase synchronizing circuit control method

Country Status (1)

Country Link
WO (1) WO2008126223A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62247624A (en) * 1986-04-07 1987-10-28 Mitsubishi Electric Corp phase locked loop circuit
JPS63190426A (en) * 1987-02-02 1988-08-08 Matsushita Electric Ind Co Ltd phase synchronized circuit
JP2002271193A (en) * 2001-03-06 2002-09-20 Fujitsu Ltd Phase locked oscillator and communication device
JP2003298424A (en) * 2002-04-05 2003-10-17 Matsushita Electric Ind Co Ltd Signal processing device and D / A converter
JP2007027809A (en) * 2005-07-12 2007-02-01 Fujitsu Ltd Digital PLL circuit and synchronization control method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62247624A (en) * 1986-04-07 1987-10-28 Mitsubishi Electric Corp phase locked loop circuit
JPS63190426A (en) * 1987-02-02 1988-08-08 Matsushita Electric Ind Co Ltd phase synchronized circuit
JP2002271193A (en) * 2001-03-06 2002-09-20 Fujitsu Ltd Phase locked oscillator and communication device
JP2003298424A (en) * 2002-04-05 2003-10-17 Matsushita Electric Ind Co Ltd Signal processing device and D / A converter
JP2007027809A (en) * 2005-07-12 2007-02-01 Fujitsu Ltd Digital PLL circuit and synchronization control method thereof

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