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WO2008114201A3 - Method for operating a data processing device, a data processing device and a data processing system - Google Patents

Method for operating a data processing device, a data processing device and a data processing system Download PDF

Info

Publication number
WO2008114201A3
WO2008114201A3 PCT/IB2008/050996 IB2008050996W WO2008114201A3 WO 2008114201 A3 WO2008114201 A3 WO 2008114201A3 IB 2008050996 W IB2008050996 W IB 2008050996W WO 2008114201 A3 WO2008114201 A3 WO 2008114201A3
Authority
WO
WIPO (PCT)
Prior art keywords
data processing
processing device
crystal oscillator
oscillator device
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2008/050996
Other languages
French (fr)
Other versions
WO2008114201A2 (en
Inventor
Ivon Franciscus Helwegen
Henricus Renatus Martinus Verberne
Edwin Gerardus Johannus Maria Bongers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of WO2008114201A2 publication Critical patent/WO2008114201A2/en
Publication of WO2008114201A3 publication Critical patent/WO2008114201A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Power Sources (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

In order to reduce a power consumption of a data processing device (10) for use in a networked data processing system, the crystal oscillator device (16) and corresponding clock signal generator circuit (14) are switched off, when the data processing device is idle. However, restart of the crystal oscillator device results in a relatively long start-up period, during which relatively much energy is consumed. In accordance with the present invention, during the idle state, the crystal oscillator device is alternatingly switched on and off at a predetermined frequency and with a predetermined duty cycle. Thus, it is possible to substantially shorten the start-up period and substantially reduce the average power consumption in the idle state.
PCT/IB2008/050996 2007-03-21 2008-03-17 Method for operating a data processing device, a data processing device and a data processing system Ceased WO2008114201A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP07104599.1 2007-03-21
EP07104599 2007-03-21

Publications (2)

Publication Number Publication Date
WO2008114201A2 WO2008114201A2 (en) 2008-09-25
WO2008114201A3 true WO2008114201A3 (en) 2008-11-20

Family

ID=39529408

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/050996 Ceased WO2008114201A2 (en) 2007-03-21 2008-03-17 Method for operating a data processing device, a data processing device and a data processing system

Country Status (1)

Country Link
WO (1) WO2008114201A2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0758768A2 (en) * 1995-08-11 1997-02-19 Rockwell International Corporation An apparatus and method of providing an extremely low-power self-awakening function to a processing unit of a communication system
FR2832565A1 (en) * 2001-11-20 2003-05-23 St Microelectronics Sa INTEGRATED CIRCUIT COMPRISING AN ACTIVE LOW POWER CONSUMPTION MODE
WO2004012067A2 (en) * 2002-07-29 2004-02-05 Enq Semiconductor Inc. Power down system and method for integrated circuits
US20040221187A1 (en) * 2003-02-06 2004-11-04 Stmicroelectronics S.A. Microprocessor comprising operating modes with low current consumption
EP1870794A2 (en) * 2006-06-21 2007-12-26 Denso Corporation Microcomputer with reset pin and electronic control unit with the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0758768A2 (en) * 1995-08-11 1997-02-19 Rockwell International Corporation An apparatus and method of providing an extremely low-power self-awakening function to a processing unit of a communication system
FR2832565A1 (en) * 2001-11-20 2003-05-23 St Microelectronics Sa INTEGRATED CIRCUIT COMPRISING AN ACTIVE LOW POWER CONSUMPTION MODE
WO2004012067A2 (en) * 2002-07-29 2004-02-05 Enq Semiconductor Inc. Power down system and method for integrated circuits
US20040221187A1 (en) * 2003-02-06 2004-11-04 Stmicroelectronics S.A. Microprocessor comprising operating modes with low current consumption
EP1870794A2 (en) * 2006-06-21 2007-12-26 Denso Corporation Microcomputer with reset pin and electronic control unit with the same

Also Published As

Publication number Publication date
WO2008114201A2 (en) 2008-09-25

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