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WO2008105070A1 - 適応等化回路 - Google Patents

適応等化回路 Download PDF

Info

Publication number
WO2008105070A1
WO2008105070A1 PCT/JP2007/053635 JP2007053635W WO2008105070A1 WO 2008105070 A1 WO2008105070 A1 WO 2008105070A1 JP 2007053635 W JP2007053635 W JP 2007053635W WO 2008105070 A1 WO2008105070 A1 WO 2008105070A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
output data
circuit
data signal
judging circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/053635
Other languages
English (en)
French (fr)
Inventor
Hisakatsu Yamaguchi
Shunichiro Masaki
Hideki Ishida
Kohtaroh Gotoh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to PCT/JP2007/053635 priority Critical patent/WO2008105070A1/ja
Priority to JP2009501073A priority patent/JP4859977B2/ja
Publication of WO2008105070A1 publication Critical patent/WO2008105070A1/ja
Priority to US12/543,109 priority patent/US8270462B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878—Line equalisers; line build-out devices
    • H04L25/03885—Line equalisers; line build-out devices adaptive
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising
    • H04B3/14—Control of transmission; Equalising characterised by the equalising network used
    • H04B3/143—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers
    • H04B3/145—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers variable equalisers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

　適応等化回路は、各ユニット時間毎に入力データ信号波形を等化係数に応じて補正して出力データ信号を生成する等化回路と、出力データ信号に同期したクロック信号が示すユニット時間の所定のタイミングで出力データ信号の信号レベルを判定するデータ判定回路と、クロック信号が示す所定のタイミングからユニット時間の１／２ずれたタイミングで出力データ信号の信号レベルを判定するバウンダリ判定回路と、第１の論理値の複数の連続したデータに続いて第２の論理値のデータが現れる所定のデータパターンを複数回検出し、第２の論理値のデータに対応するデータ判定回路の判定結果とバウンダリ判定回路の判定結果とが、互いに同一値になる割合と互いに異なる値になる割合とが略等しくなるように等化係数を調整する制御回路を含むことを特徴とする。
PCT/JP2007/053635 2007-02-27 2007-02-27 適応等化回路 Ceased WO2008105070A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/053635 WO2008105070A1 (ja) 2007-02-27 2007-02-27 適応等化回路
JP2009501073A JP4859977B2 (ja) 2007-02-27 2007-02-27 適応等化回路
US12/543,109 US8270462B2 (en) 2007-02-27 2009-08-18 Adaptive equalizer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/053635 WO2008105070A1 (ja) 2007-02-27 2007-02-27 適応等化回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/543,109 Continuation US8270462B2 (en) 2007-02-27 2009-08-18 Adaptive equalizer circuit

Publications (1)

Publication Number Publication Date
WO2008105070A1 true WO2008105070A1 (ja) 2008-09-04

Family

ID=39720916

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/053635 Ceased WO2008105070A1 (ja) 2007-02-27 2007-02-27 適応等化回路

Country Status (3)

Country Link
US (1) US8270462B2 (ja)
JP (1) JP4859977B2 (ja)
WO (1) WO2008105070A1 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014039292A (ja) * 2007-04-09 2014-02-27 Silicon Image Inc シリアル通信リンクのクロック・データ再生回路と使用する適応等化器
US8929567B2 (en) 2009-05-26 2015-01-06 Dolby Laboratories Licensing Corporation Equalization profiles for dynamic equalization of audio data
US8976979B2 (en) 2009-05-26 2015-03-10 Dolby Laboratories Licensing Corporation Audio signal dynamic equalization processing control
US11032642B1 (en) 2020-03-10 2021-06-08 Nuvoton Technology Corporation Combined frequency response and dynamic range correction for loudspeakers
US11317203B2 (en) 2020-08-04 2022-04-26 Nuvoton Technology Corporation System for preventing distortion of original input signal

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8432960B2 (en) * 2010-03-18 2013-04-30 Freescale Semiconductor, Inc. Digital adaptive channel equalizer
US8588288B2 (en) * 2010-11-19 2013-11-19 Maxim Integrated Products, Inc. Method and apparatus for controlling a continuous time linear equalizer
CN104040903B (zh) * 2011-08-19 2016-09-28 路梅戴尼科技公司 时域切换模拟数字转换器设备与方法
US12549417B2 (en) * 2024-04-26 2026-02-10 Infineon Technologies Americas Corp. Slicers and temperature offset cancelation circuits for decision feedback equalizers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158334A (ja) * 1984-08-30 1986-03-25 Oki Electric Ind Co Ltd 自動利得制御方式
JP2005303607A (ja) * 2004-04-09 2005-10-27 Fujitsu Ltd 等化回路を有する受信回路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100772850B1 (ko) * 1999-12-24 2007-11-02 코닌클리케 필립스 일렉트로닉스 엔.브이. 데이터 수신기에서의 소거 기반 순시 루프 제어
JP4516443B2 (ja) 2005-02-10 2010-08-04 富士通株式会社 適応等化回路
US7577193B2 (en) * 2005-06-28 2009-08-18 Intel Corporation Adaptive equalizer
US7593497B2 (en) * 2005-10-31 2009-09-22 Teradyne, Inc. Method and apparatus for adjustment of synchronous clock signals
US7920621B2 (en) * 2006-09-14 2011-04-05 Altera Corporation Digital adaptation circuitry and methods for programmable logic devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158334A (ja) * 1984-08-30 1986-03-25 Oki Electric Ind Co Ltd 自動利得制御方式
JP2005303607A (ja) * 2004-04-09 2005-10-27 Fujitsu Ltd 等化回路を有する受信回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014039292A (ja) * 2007-04-09 2014-02-27 Silicon Image Inc シリアル通信リンクのクロック・データ再生回路と使用する適応等化器
US8929567B2 (en) 2009-05-26 2015-01-06 Dolby Laboratories Licensing Corporation Equalization profiles for dynamic equalization of audio data
US8976979B2 (en) 2009-05-26 2015-03-10 Dolby Laboratories Licensing Corporation Audio signal dynamic equalization processing control
US11032642B1 (en) 2020-03-10 2021-06-08 Nuvoton Technology Corporation Combined frequency response and dynamic range correction for loudspeakers
US11317203B2 (en) 2020-08-04 2022-04-26 Nuvoton Technology Corporation System for preventing distortion of original input signal

Also Published As

Publication number Publication date
US8270462B2 (en) 2012-09-18
JP4859977B2 (ja) 2012-01-25
US20090310666A1 (en) 2009-12-17
JPWO2008105070A1 (ja) 2010-06-03

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