[go: up one dir, main page]

WO2008155831A1 - タイミング解析装置、タイミング解析プログラム及びタイミング解析方法 - Google Patents

タイミング解析装置、タイミング解析プログラム及びタイミング解析方法 Download PDF

Info

Publication number
WO2008155831A1
WO2008155831A1 PCT/JP2007/062391 JP2007062391W WO2008155831A1 WO 2008155831 A1 WO2008155831 A1 WO 2008155831A1 JP 2007062391 W JP2007062391 W JP 2007062391W WO 2008155831 A1 WO2008155831 A1 WO 2008155831A1
Authority
WO
WIPO (PCT)
Prior art keywords
performance distribution
path
integrated circuit
distribution
performance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/062391
Other languages
English (en)
French (fr)
Inventor
Noriyuki Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to PCT/JP2007/062391 priority Critical patent/WO2008155831A1/ja
Priority to JP2009520185A priority patent/JPWO2008155831A1/ja
Publication of WO2008155831A1 publication Critical patent/WO2008155831A1/ja
Priority to US12/654,038 priority patent/US20100095261A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/3312—Timing analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　集積回路内のパスの情報を、伝搬時間の大きいパスから順に取得する取得部と、パスの情報に基づいて該パスの性能の分布であるパス性能分布を算出するパス性能分布算出部と、最初に算出されたパス性能分布をチップの性能の分布である集積回路性能分布とし、以後、最後に算出された集積回路性能分布である第１集積回路性能分布とパス性能分布算出部により算出されたパス性能分布との統計的ｍａｘ演算を行って該演算の結果を第２集積回路性能分布とする集積回路性能分布算出部と、第１集積回路性能分布と第２集積回路性能分布の差を示すパラメータが所定の条件を満たすまで、取得部の処理、パス性能分布算出部の処理、集積回路性能分布算出部の処理を繰り返させる評価部とを備えた。
PCT/JP2007/062391 2007-06-20 2007-06-20 タイミング解析装置、タイミング解析プログラム及びタイミング解析方法 Ceased WO2008155831A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/062391 WO2008155831A1 (ja) 2007-06-20 2007-06-20 タイミング解析装置、タイミング解析プログラム及びタイミング解析方法
JP2009520185A JPWO2008155831A1 (ja) 2007-06-20 2007-06-20 タイミング解析装置、タイミング解析プログラム及びタイミング解析方法
US12/654,038 US20100095261A1 (en) 2007-06-20 2009-12-08 Timing analysis apparatus and timing analysis method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/062391 WO2008155831A1 (ja) 2007-06-20 2007-06-20 タイミング解析装置、タイミング解析プログラム及びタイミング解析方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/654,038 Continuation US20100095261A1 (en) 2007-06-20 2009-12-08 Timing analysis apparatus and timing analysis method

Publications (1)

Publication Number Publication Date
WO2008155831A1 true WO2008155831A1 (ja) 2008-12-24

Family

ID=40155997

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/062391 Ceased WO2008155831A1 (ja) 2007-06-20 2007-06-20 タイミング解析装置、タイミング解析プログラム及びタイミング解析方法

Country Status (3)

Country Link
US (1) US20100095261A1 (ja)
JP (1) JPWO2008155831A1 (ja)
WO (1) WO2008155831A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9405871B1 (en) * 2014-12-05 2016-08-02 Xilinx, Inc. Determination of path delays in circuit designs

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007087342A (ja) * 2005-09-26 2007-04-05 Fujitsu Ltd 遅延解析プログラム、該プログラムを記録した記録媒体、遅延解析装置、および遅延解析方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3364109B2 (ja) * 1997-04-18 2003-01-08 松下電器産業株式会社 集積回路装置の歩留まり推定方法
US7111260B2 (en) * 2003-09-18 2006-09-19 International Business Machines Corporation System and method for incremental statistical timing analysis of digital circuits
US7308381B2 (en) * 2005-08-31 2007-12-11 Matsushita Electric Industrial Co., Ltd. Timing verification method for semiconductor integrated circuit
JP2007183932A (ja) * 2005-12-09 2007-07-19 Fujitsu Ltd タイミング解析方法及びタイミング解析装置
US7689954B2 (en) * 2006-05-25 2010-03-30 Wisconsin Alumni Research Foundation Efficient statistical timing analysis of circuits
US7958474B2 (en) * 2008-06-26 2011-06-07 Oracle America, Inc. Highly threaded static timer
US7987440B2 (en) * 2009-01-12 2011-07-26 International Business Machines Corporation Method and system for efficient validation of clock skews during hierarchical static timing analysis
KR20100105187A (ko) * 2009-03-20 2010-09-29 포항공과대학교 산학협력단 집적 회로의 통계적 타이밍 최적화를 위한 방법

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007087342A (ja) * 2005-09-26 2007-04-05 Fujitsu Ltd 遅延解析プログラム、該プログラムを記録した記録媒体、遅延解析装置、および遅延解析方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
HONMA K. ET AL.: "Path-based Tokeiteki Chien Kaiseki ni Okeru Kaiseki Path-su to Seido ni Kansuru Kosatsu", INFORMATION PROCESSING SOCIETY OF JAPAN KENKYU HOKOKU, INFORMATION PROCESSING SOCIETY OF JAPAN, vol. 2006, no. 28, 17 March 2006 (2006-03-17), pages 61 - 66, XP003023943, Retrieved from the Internet <URL:http://www.bookpark.ne.jp/ipsj> *
KOMATSU H. ET AL.: "Tokeiteki Timing Kaiseki to Processor Sekkei eno Tekiyo", INFORMATION PROCESSING SOCIETY OF JAPAN SYMPOSIUM SERIES, INFORMATION PROCESSING SOCIETY OF JAPAN, vol. 2006, no. 7, 12 July 2006 (2006-07-12), pages 1 - 6, XP003023942 *

Also Published As

Publication number Publication date
JPWO2008155831A1 (ja) 2010-08-26
US20100095261A1 (en) 2010-04-15

Similar Documents

Publication Publication Date Title
CN102152172B (zh) 基于协整建模的刀具磨损监测方法
WO2008106369A3 (en) Method and system for evaluating statistical sensitivity credit in path-based hybrid multi-conrner static timing analysis
WO2005111874A3 (en) Integrated circuit layout design methodology with process variation bands
WO2007116226A3 (en) Blood glucose monitoring systems
RU2015117617A (ru) Способ и устройство оценки аудиопомехи
BR112015006962A2 (pt) técnica para estimação de métrica de desempenho de rf
EP2166659A3 (en) Method and apparatus to select a parameter/mode based on a measurement dureing an initialization period
WO2014100462A8 (en) Customized footwear, and method for designing and manufacturing same
WO2012012345A3 (en) Method for automated determination of an optimally parameterized scatterometry model
TW200618059A (en) Management method, management system, and program
MX340339B (es) Metodos de transferencia de calibracion para un instrumento de pruebas.
WO2011126848A3 (en) A method and circuit to generate race condition test data at multiple supply voltages
WO2005020297A3 (en) Technique for evaluating a fabrication of a semiconductor component and wafer
WO2012091843A3 (en) Systems and methods for evaluating range sensor calibration data
EP1582882A3 (en) Method of measuring duty cycle
WO2009072204A1 (ja) 電子化計量装置の寿命推定方法および装置
WO2010126687A3 (en) Efficient exhaustive path-based static timing analysis using a fast estimation technique
EP2063284A3 (en) Method and device for predicting GNSS satellite trajectory extension data used in mobile apparatus
WO2012006553A3 (en) Method and apparatus for simultaneous switching noise optimization
WO2014039794A3 (en) Compositions, apparatus and methods for monitoring biomarkers
TW200724949A (en) Test sequence optimization method and design tool
WO2011055930A3 (ko) 그래프 컷의 초기값을 설정하는 방법, 단말 장치, 및 컴퓨터 판독 가능한 기록 매체
FR2982684B1 (fr) Systeme et procede de conception de circuit numerique a capteur d&#39;activite
WO2008008424A8 (en) Method and apparatus for formation testing
WO2008155831A1 (ja) タイミング解析装置、タイミング解析プログラム及びタイミング解析方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07767230

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2009520185

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07767230

Country of ref document: EP

Kind code of ref document: A1