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WO2008155806A1 - バリア同期方法、装置、及びマルチコアプロセッサ - Google Patents

バリア同期方法、装置、及びマルチコアプロセッサ Download PDF

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Publication number
WO2008155806A1
WO2008155806A1 PCT/JP2007/000664 JP2007000664W WO2008155806A1 WO 2008155806 A1 WO2008155806 A1 WO 2008155806A1 JP 2007000664 W JP2007000664 W JP 2007000664W WO 2008155806 A1 WO2008155806 A1 WO 2008155806A1
Authority
WO
WIPO (PCT)
Prior art keywords
barrier synchronization
multicore processor
processor
processor cores
multicore
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/000664
Other languages
English (en)
French (fr)
Inventor
Hideyuki Unno
Masaki Ukai
Matthew Depetro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to PCT/JP2007/000664 priority Critical patent/WO2008155806A1/ja
Priority to JP2009520147A priority patent/JP5273045B2/ja
Priority to EP07790190.8A priority patent/EP2159694B1/en
Publication of WO2008155806A1 publication Critical patent/WO2008155806A1/ja
Priority to US12/638,746 priority patent/US7971029B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/522—Barrier synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)

Abstract

　複数のプロセッサコアを有するマルチコアプロセッサに、その複数のプロセッサコアのなかで同一の同期グループに属する２つ以上のマルチコアプロセッサをバリア同期させるためのバリア同期装置を実装し、そのマルチコアプロセッサが有する２つ以上のプロセッサコアのみが同一の同期グループに属している場合に、実装したバリア同期装置を用いてそれらのバリア同期を行わせる。
PCT/JP2007/000664 2007-06-20 2007-06-20 バリア同期方法、装置、及びマルチコアプロセッサ Ceased WO2008155806A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/000664 WO2008155806A1 (ja) 2007-06-20 2007-06-20 バリア同期方法、装置、及びマルチコアプロセッサ
JP2009520147A JP5273045B2 (ja) 2007-06-20 2007-06-20 バリア同期方法、装置、及びプロセッサ
EP07790190.8A EP2159694B1 (en) 2007-06-20 2007-06-20 Method and device for barrier synchronization, and multicore processor
US12/638,746 US7971029B2 (en) 2007-06-20 2009-12-15 Barrier synchronization method, device, and multi-core processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/000664 WO2008155806A1 (ja) 2007-06-20 2007-06-20 バリア同期方法、装置、及びマルチコアプロセッサ

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/638,746 Continuation US7971029B2 (en) 2007-06-20 2009-12-15 Barrier synchronization method, device, and multi-core processor

Publications (1)

Publication Number Publication Date
WO2008155806A1 true WO2008155806A1 (ja) 2008-12-24

Family

ID=40155971

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/000664 Ceased WO2008155806A1 (ja) 2007-06-20 2007-06-20 バリア同期方法、装置、及びマルチコアプロセッサ

Country Status (4)

Country Link
US (1) US7971029B2 (ja)
EP (1) EP2159694B1 (ja)
JP (1) JP5273045B2 (ja)
WO (1) WO2008155806A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011039666A (ja) * 2009-08-07 2011-02-24 Hitachi Ltd バリア同期方法及び計算機
WO2012127534A1 (ja) * 2011-03-23 2012-09-27 富士通株式会社 バリア同期方法、バリア同期装置及び演算処理装置
JP2014021820A (ja) * 2012-07-20 2014-02-03 Fujitsu Ltd 情報処理装置およびバリア同期方法
JP2017016250A (ja) * 2015-06-29 2017-01-19 日本電気株式会社 バリア同期装置、バリア同期方法及びプログラム
JP2017539001A (ja) * 2014-11-13 2017-12-28 エイアールエム リミテッド コンテキスト依存のバリア命令の実行
WO2025215802A1 (ja) * 2024-04-11 2025-10-16 Ｎｔｔ株式会社 休止状態制御装置、休止状態制御方法およびプログラム

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WO2008129786A1 (ja) * 2007-04-09 2008-10-30 Panasonic Corporation マルチプロセッサ制御装置、その制御方法および集積回路
JP5549574B2 (ja) * 2010-12-17 2014-07-16 富士通株式会社 並列計算機システム、同期装置、並列計算機システムの制御方法
DE102011084569B4 (de) * 2011-10-14 2019-02-21 Continental Automotive Gmbh Verfahren zum Betreiben eines informationstechnischen Systems und informationstechnisches System
US9092272B2 (en) 2011-12-08 2015-07-28 International Business Machines Corporation Preparing parallel tasks to use a synchronization register
FR3021433B1 (fr) * 2014-05-21 2016-06-24 Kalray Systeme de synchronisation inter-processeurs
US10042580B2 (en) 2015-11-05 2018-08-07 International Business Machines Corporation Speculatively performing memory move requests with respect to a barrier
US10346164B2 (en) 2015-11-05 2019-07-09 International Business Machines Corporation Memory move instruction sequence targeting an accelerator switchboard
US10241945B2 (en) 2015-11-05 2019-03-26 International Business Machines Corporation Memory move supporting speculative acquisition of source and destination data granules including copy-type and paste-type instructions
US9996298B2 (en) 2015-11-05 2018-06-12 International Business Machines Corporation Memory move instruction sequence enabling software control
US10152322B2 (en) 2015-11-05 2018-12-11 International Business Machines Corporation Memory move instruction sequence including a stream of copy-type and paste-type instructions
US10067713B2 (en) 2015-11-05 2018-09-04 International Business Machines Corporation Efficient enforcement of barriers with respect to memory move sequences
US10126952B2 (en) 2015-11-05 2018-11-13 International Business Machines Corporation Memory move instruction sequence targeting a memory-mapped device
US10140052B2 (en) 2015-11-05 2018-11-27 International Business Machines Corporation Memory access in a data processing system utilizing copy and paste instructions
US10318355B2 (en) * 2017-01-24 2019-06-11 Oracle International Corporation Distributed graph processing system featuring interactive remote control mechanism including task cancellation
US10310861B2 (en) * 2017-04-01 2019-06-04 Intel Corporation Mechanism for scheduling threads on a multiprocessor
US11353868B2 (en) 2017-04-24 2022-06-07 Intel Corporation Barriers and synchronization for machine learning at autonomous machines
US10509452B2 (en) * 2017-04-26 2019-12-17 Advanced Micro Devices, Inc. Hierarchical power distribution in large scale computing systems
US11461130B2 (en) 2020-05-26 2022-10-04 Oracle International Corporation Methodology for fast and seamless task cancelation and error handling in distributed processing of large graph data
GB2597078B (en) * 2020-07-14 2022-07-13 Graphcore Ltd Communication between host and accelerator over network
CN112052099B (zh) * 2020-09-03 2025-01-28 上海兆芯集成电路股份有限公司 微处理器及其处理核心的同步方法
WO2025015117A1 (en) * 2023-07-12 2025-01-16 Ascenium, Inc. Parallel architecture with compiler-scheduled compute slices

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JPH02144657A (ja) * 1988-11-26 1990-06-04 Hitachi Ltd 並列演算処理装置
JPH08187303A (ja) 1995-01-10 1996-07-23 Toyoda Gosei Co Ltd トレーニング装置
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JPH02144657A (ja) * 1988-11-26 1990-06-04 Hitachi Ltd 並列演算処理装置
JPH08187303A (ja) 1995-01-10 1996-07-23 Toyoda Gosei Co Ltd トレーニング装置
JPH096734A (ja) 1995-06-21 1997-01-10 Nec Corp バリア同期装置
JPH10240549A (ja) * 1997-02-24 1998-09-11 Hitachi Ltd 並列ジョブ多重スケジューリング方法及び装置
JP2005071109A (ja) 2003-08-25 2005-03-17 Hitachi Ltd マルチプロセッサシステムの同期方法
JP2005316679A (ja) * 2004-04-28 2005-11-10 Nec Corp 並列演算処理装置
US20060212868A1 (en) 2005-03-15 2006-09-21 Koichi Takayama Synchronization method and program for a parallel computer
JP2006259821A (ja) * 2005-03-15 2006-09-28 Hitachi Ltd 並列計算機の同期方法及びプログラム

Non-Patent Citations (1)

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Title
JIAN LI ET AL.: "The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors", HIGH PERFORMANCE COMPUTER ARCHITECTURE, 2004. HPCA-10. PROCEEDINGS. 10 TH INTERNATIONAL SYMPOSIUM ON MADRID, SPAIN, 14 February 2004 (2004-02-14), pages 14 - 23

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011039666A (ja) * 2009-08-07 2011-02-24 Hitachi Ltd バリア同期方法及び計算機
WO2012127534A1 (ja) * 2011-03-23 2012-09-27 富士通株式会社 バリア同期方法、バリア同期装置及び演算処理装置
JP2014021820A (ja) * 2012-07-20 2014-02-03 Fujitsu Ltd 情報処理装置およびバリア同期方法
US9336064B2 (en) 2012-07-20 2016-05-10 Fujitsu Limited Information processing device and barrier synchronization method
US9436520B2 (en) 2012-07-20 2016-09-06 Fujitsu Limited Information processing device and barrier synchronization method
JP2017539001A (ja) * 2014-11-13 2017-12-28 エイアールエム リミテッド コンテキスト依存のバリア命令の実行
US10503512B2 (en) 2014-11-13 2019-12-10 Arm Limited Context sensitive barriers with an implicit access ordering constraint for a victim context
JP2017016250A (ja) * 2015-06-29 2017-01-19 日本電気株式会社 バリア同期装置、バリア同期方法及びプログラム
WO2025215802A1 (ja) * 2024-04-11 2025-10-16 Ｎｔｔ株式会社 休止状態制御装置、休止状態制御方法およびプログラム

Also Published As

Publication number Publication date
JP5273045B2 (ja) 2013-08-28
US20100095090A1 (en) 2010-04-15
US7971029B2 (en) 2011-06-28
JPWO2008155806A1 (ja) 2010-08-26
EP2159694A1 (en) 2010-03-03
EP2159694B1 (en) 2019-03-27
EP2159694A4 (en) 2012-12-26

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