WO2008032904A1

WO2008032904A1 - Dielectric thin film and thin film transistor using the same

Info

Publication number: WO2008032904A1
Application number: PCT/KR2006/005358
Authority: WO
Inventors: Il-Doo Kim; Jae-Min Hong
Original assignee: Korea Institute of Science and Technology KIST
Current assignee: Korea Institute of Science and Technology KIST
Priority date: 2006-09-15
Filing date: 2006-12-08
Publication date: 2008-03-20
Anticipated expiration: 2009-03-15
Also published as: KR100799498B1

Abstract

A dielectric thin film having high dielectric constant, low leakage current feature, and high dielectric breakdown strength, and a thin film transistor using the same are provided. The dielectric thin film means a thin film in which Mg, Ni, Mn, and Fe are doped as an acceptor in Barium Strontium Titanate ((Ba l-x Sr x )TiO 3 (x=0.1 to 0.9))(BST). As the acceptor is doped in the BST, the features of the leakage current and the dielectric breakdown strength are improved, and optical transparency is secured.

Description

DIELECTRIC THIN FILM AND THIN FILM TRANSISTOR

USING THE SAME

Technical Field

[1] The present invention relates to a dielectric thin film and a thin film transistor using the same, and more particularly to a dielectric thin film having high dielectric constant, low leakage current feature, and high dielectric breakdown strength, and a thin film transistor using the same.

[2]

Background Art

[3] Generally known in the art, a silicon oxide (SiO having dielectric constant of 4) and a silicon nitride (SiN having dielectric constant of 7) have been used as a gate dielectric of poly-silicon or amorphous silicon thin film transistor. Although the silicon oxide or the silicon nitride is excellent in properties of leakage current and dielectric breakdown due to having high band gap structure, upon being applied to the gate dielectric, it requires high temperature deposition above 300⁰C so that there is a limit to deposit it on a polymer substrate such as a plastic substrate.

[4] Further, since the silicon oxide or the silicon nitride has lower dielectric constant, as compared to other oxide having high dielectric constant, it has lower capacitance under the same thickness condition, and when used as a gate dielectric, a problem is caused in that the driving voltage of a transistor is increased. Therefore, in order for low voltage driving of a transistor using an organic semiconductor like pentacene or a metal-oxide semiconductor like zinc oxide (ZnO), a gate dielectric having high dielectric constant has to be used so as to possibly obtain high capacitance.

[5] To obtain high capacitance, there is a method such that the gate dielectric is made thinned, or a material having high dielectric constant is used. However, the method using the thinned gate dielectric has a limit to direct application to a plastic substrate for the reasons of the formation of a pin-hole, irregular application feature and others. Thus, in order to maintain high capacitance even at sufficient thickness (above 150nm), it is preferable to use an insulating layer having high dielectric constant. Particularly, in order to fabricate a transistor on a plastic substrate having low glass transition temperature (70 to 100⁰C), it is important to select an insulating layer capable of being deposited at low temperature.

[6] (Ba Sr )TiO (x= 0.3 to 1) (hereinafter, referred to as BST) is known as repre- l-x x 3 sentative high dielectrics. The BST is a material that has been widely studied particularly as a memory device, such as a dynamic random access memory (DRAM), and a capacitor for RF tuning. Meanwhile, the BST should have a Perovskite structure in order to obtain having high dielectric constant (200 to 1500). To this end, high temperature deposition (above 500⁰C) and an annealing process are required. However, such a high temperature process has a limit to application to a device formed on a plastic substrate. Thus, it is important to form, even under a room temperature and low temperature process (below 200⁰C), an insulating layer having excellent dielectric properties (high dielectric constant and low dielectric loss), low leakage current and high dielectric breakdown properties, which is an essential technology for development of low- voltage driven transistor, particularly.

[7] A study for application of BST and (Ba, Zr)TiO (hereinafter, referred to as BZT) thin film, deposited at room temperature, to a transistor has been started from 1999 by IBM (Science, 283, 822, 1999). Particularly, a transistor driven at 5V has been fabricated using an organic semiconductor, pentacene. The BZT thin film (dielectric constant is 17.3) deposited at room temperature obtained low- voltage driving of 5V even at a thickness of 130nm due to having comparatively high dielectric constant, whereas the BST thin film deposited at room temperature experienced dielectric breakdown at an application voltage of about 0.5 MV/cm due to having high leakage current density. This is because there are many sources such as electrons or ions in the BST deposited at room temperature, and to reduce them, acceptor doping is required.

[8] While it has been reported that beside the BST, materials such as HfO 2 , Al 203 , TiO 2 are used as a gate dielectric through a room temperature and low temperature process, they have dielectric constant lower than the BST, and suffer from high leakage current at high voltage due to the existence of defects according to room temperature deposition.

[9]

Disclosure of Invention Technical Problem

[10] Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a dielectric thin film having high dielectric constant, low leakage current feature, and high dielectric breakdown strength, and a thin film transistor using the same.

[H]

Technical Solution

[12] The dielectric thin film according to the present invention means a thin film in which Mg, Ni, Mn, and Fe are doped as an acceptor in Barium Strontium Titanate ((Ba Sr )TiO (x=0.1 to 0.9)) (hereinafter, referred to as BST). l-x x 3

[13] The BST has a Perovskite structure, i.e., ABO (A ⁺B ⁺O ), and the ionic radii of Mg, Ni, Mn, and Fe are similar to an ionic radius of titanium so that the acceptor such as Mg, Ni, Mn, and Fe substitutes Ti in the BST of Perovskite structure. Like this, an acceptor is doped in the BST to minimize dielectric loss and leakage current and increase dielectric breakdown strength. The dielectric thin film according to the present invention will be described in detail in the following embodiments. The acceptor doped in the BST is preferably in the range from 0.5 to 50at%. Herein, the doped acceptor may be any one or two or more among Mg, Ni, Mn, and Fe.

[14] Meanwhile, the dielectric thin film according to the present invention aims for application to a gate dielectric of a thin film transistor, particularly application to a gate dielectric of a thin film transistor formed on a glass substrate or a polymer substrate such as poly-ethylene-terepthalate (PET). Since a glass substrate or polymer substrate has very low glass transition temperature, the process implementation on the glass substrate or the polymer substrate should be carried out under a temperature condition close to room temperature. Accordingly, the dielectric thin film according to the present invention has to be able to be deposited at room temperature or a temperature below 200⁰C, and to this end, the present invention proposes a method in which <an acceptor doped BST> is formed using a solid-state reaction, and a dielectric thin film is deposited on a glass substrate or a polymer substrate through a sputtering process using <the acceptor doped BST> as a target.

[15] The thin film transistor according to the present invention means a thin film transistor in which a dielectric thin film of the present invention is used as a gate dielectric. The dielectric thin film of the present invention has high dielectric constant, low leakage current and high dielectric breakdown strength, so that the transistor can be stably driven at low voltage. The features of the thin film transistor according to the present invention will be described in detail in the following embodiments.

[16]

Advantageous Effects

[17] According to the present invention, as the acceptor is doped in the BST, the electron density in the BST is lowered to considerably reduce leakage current density and greatly improve dielectric breakdown strength as well. On the basis of such features, when applying the dielectric thin film to the gate dielectric of the thin film transistor, the thin film transistor can be stably driven at low voltage.

[18] Moreover, nevertheless the acceptor is doped in the BST, optical transmittance can be still maintained so that the dielectric thin film is adaptable to a transparent device.

[19]

Brief Description of the Drawings

[20] FIG. 1 is a sectional view of the construction of a thin film transistor according to an embodiment of the present invention; [21] FIG. 2 is a graph showing the relation between a leakage current characteristic and an applied voltage in a dielectric thin film according to an embodiment of the present invention; [22] FIG. 3 is a graph showing the relation between dielectric properties and an applied voltage in a dielectric thin film according to an embodiment of the present invention; [23] FIG. 4 is a graph showing the light transmittance relative to a wavelength of a specimen fabricated according to the present invention; [24] FIGS. 5 and 6 are graphs each showing output and transfer characteristics of ZnO transistor (ZnO-TFT) fabricated using a 3% Mg-doped BST thin film deposited at room temperature on a poly-ethylene-terepthalate (PET) substrate as a gate dielectric according to an embodiment of the present invention; [25] FIG. 7 is a graph showing a transfer feature of ZnO transistor (ZnO-TFT) fabricated using a 3% Mg-doped BST thin film deposited at room temperature on a glass substrate as a gate dielectric according to an embodiment of the present invention; and [26] FIGS. 8 and 9 are graphs each showing output and transfer features of ZnO transistor (ZnO-TFT) fabricated using a 3% Mn-doped BST thin film deposited at room temperature on a glass substrate as a gate dielectric according to an embodiment of the present invention. [27]

Mode for the Invention [28] A dielectric thin film according to the present invention means a thin film in which

Mg, Ni, Mn, and Fe are doped as an acceptor in Barium Strontium Titanate ((Ba l-x Sr x

)TiO (x=0.1 to 0.9)) (hereinafter, referred to as BST). A method of forming a dielectric thin film according to the present invention means a method of forming a dielectric according to the present invention in thin film type on a substrate. According to an embodiment of the present invention, the formation method of the dielectric thin film may be a sputtering process, and the formation method will be hereinafter described regarding the sputtering process.

[29] First, a target for sputtering process is prepared. The target means a substance that an acceptor is contained in a BST. The target is fabricated by a solid-state reaction.

[30] Specifically, the powders of BaCO , SrCO , and TiO are prepared, and the respective powders are mixed together according to a composition ratio of BST (Ba l-x

Sr )TiO (x=0.1 to 0.9)). Herein, the BST has a composition of for example, (Ba Sr x 3 06 04

)TiO . Then, an acceptor is added to the mixture of the respective powders of BaCO , SrCO , and TiO by 0.5 to 50%, and the acceptor and the mixture are mixed by e.g., ball milling. Herein, the acceptor may be any one or combination of Mg, Ni, Mn, and Fe.

[31] In this state, the mixture of the powders of BaCO , SrCO , and TiO and the acceptor is processed with calcination under a temperature from 1000 to 1400⁰C, and then grinding. Next, the ground pulverized powders are pressed into a target shape having a desired size, and are sintered under a temperature from 1200 to 1600⁰C, thereby completing the fabrication of the target.

[32] In this state, a glass substrate or a polymer substrate such as poly- ethylene-terepthalate (PET) is loaded in a sputtering apparatus, and target particles are deposited on the glass substrate or the polymer substrate through sputtering the fabricated target at room temperature, thereby forming a dielectric thin film having a certain thickness on the substrate. Herein, the process condition of the sputtering apparatus may be RF power of IOOW and pressure of 50mTorr, and the thickness of the dielectric thin film formed on the substrate is preferably in a range from 50 to 500nm.

[33] The leakage current and dielectric characteristics of the dielectric thin film formed by the above method are as follows. FIG. 2 is a graph showing a leakage current feature relative to applied voltage of the dielectric thin film according to an embodiment of the invention, and FIG. 3 is a graph showing a dielectric feature relative to applied voltage of the dielectric thin film according to an embodiment of the invention.

[34] To obtain the experimental results of FIGS. 2 and 3, an experiment adopted a target capacitor having a metal-insulator-metal (MIM) structure in which the dielectric thin film of the present invention is interposed between the upper and lower electrodes. Herein, the area A of the upper and lower electrodes is 2.0 D id cm², and the capacitor has the sectional structure of upper electrode (Pt, lOOnm)/ dielectric thin film (200nm)/ lower electrode (Pt, lOOnm)/ Ti/ SiO / silicon substrate (single crystal Si). Further, as the dielectric thin film interposed between the upper and lower electrodes, BST doped with Mg by 3at% is used.

[35] As shown in FIG. 2, it could be seen that 3at% Mg doped BST had current density of below 5 D 10 A/cm at application voltage of 2MV/cm , and the BST without being doped with an acceptor experienced dielectric breakdown at application voltage of 0.4 MV/cm . That is, the acceptor doped BST has the excellent features of leakage current and dielectric breakdown strength relative to the BST without being doped with the acceptor. For reference, the features of leakage current and dielectric breakdown as shown in FIG. 2 were measured using HP 4145B semiconductor parameter analyzer.

[36] The reason of improvement in features of leakage current and dielectric breakdown as the BST is doped with the acceptor is based on the following theoretical grounds.

[37] When BST having a Perovskite structure of XYO (X²⁺Y⁴⁺O^2" ) is doped with an acceptor, the doped acceptor substitutes Ti in Y site. For example, when Mn is doped in band gap (2.9 to 3.0 eV) of BaTiO , Mn 4+ forms a deep Mn acceptor level at about 1.69 eV over a valence band, thereby trapping the electrons. In addition, the ionic radius (reff=0.061nm) of Ti ⁺ is similar to that (reff=0.053nm) of Mn ⁺ so that Mn easily substitutes the site of Ti in the BST. From this, Mn doped BST thin film formed at room temperature has a feature of low dielectric loss and excellent leakage current. In another example, Mg has lower valence than Mn, and has the single- valence state of 2 of Mg ⁺ while Mn has the multi- valence state of 2 to 4. In addition, the ionic radius (reff=0.072nm) of Mg ⁺ is similar to that (reff=0.061nm) of Ti ⁺ so that Mg can easily substitute the site of Ti in the BST. Thus, Mg enables the electron trapping more stably than Mn, thereby considerably reducing the leakage current density of the BST thin film.

[38] Referring to FIG. 3, the dielectric constant of the acceptor doped BST is 22, and that of the acceptor undoped BST is 28, so that as the acceptor is doped in the BST, the dielectric constant is slightly reduced. This is because Mg ⁺ substituting the site of Ti ⁺ (reff=0.061nm) has somewhat larger ionic radius (reff=0.072nm) and lower valence of 2 than Ti of 4 thus to form a relatively low dipole moment value, thereby slightly lowering the dielectric constant. Therefore, through the adjustment of the amount of Mg doped, one can strike a balance between the degree of reduction in dielectric constant and the degree of improvement in leakage current density. For reference, the dielectric property of FIG. 4 was measured using an HP4192 impedance analyzer.

[39] Meanwhile, in case of 3% Mn and Mg doped BST in MIM structure, it was observed that the leakage current density of 3% Mg doped BST took a value lower by the magnitude of one order at 5V region. In addition, the dielectric breakdown strength had a higher value at 3% Mg doped BST. The dielectric constant shown 24 and 22 for 3% Mn and Mg doped BST, respectively. As a result, in order to obtain low leakage current density while maximizing the dielectric constant, it could be seen that co- doping of Mg and Mn is possible. Upon co-doping, the BST containing two or more of Mg, Mn, Ni, and Fe in a certain ratio can be used as a target.

[40] Beside the features of dielectric property, leakage current and dielectric breakdown, light transmittance property is measured so as to seek applicability of the dielectric thin film of the invention to a transparent device (AMOLED, AMOLCD, etc.) FIG. 4 is a graph showing the light transmittance relative to a wavelength of a specimen fabricated according to an embodiment of the present invention.

[41] For the test of the light transmittance, an ITO/PET specimen, a ZnO/ITO/PET specimen, a 3% Mg-doped BST/ITO/PET specimen, and a ZnO/3% Mg-doped BST/ ITO/PET specimen were prepared. The thicknesses of ITO, 3% Mg-doped BST, and ZnO are 200, 200, and lOOnm, respectively. The reason of the preparation of 4 specimens is for calculating the individual contribution to optical loss in the whole structure of ZnO/3% Mg-doped BST/ITO/PET. The transmittance of FIG. 4 was measured using an optical spectrum analyzer (Perkin Elmer, UV/VIS/NIR Lamda 19).

[42] As shown in FIG. 4, the whole structure of ZnO/3% Mg-doped BST/ITO/PET exhibited an average optical transmittance shown 80% or more. This indicates that 3% Mg-doped BST thin film can be sufficiently utilized as a transparent device.

[43] Meanwhile, the present invention also proposes a thin film transistor using the dielectric thin film according to the present invention. The thin film transistor according to the present invention has the construction adopting the dielectric thin film of the present invention as a gate dielectric, and may be configured to have various structures and shapes. However, since the thin film transistor of the invention aims for realizing low- voltage driving using the dielectric thin film as the gate dielectric, it needs to check the low- voltage driving feature of the thin film transistor fabricated according to an embodiment of the invention. To this end, the thin film transistor was fabricated according to an embodiment of the invention, and output and transfer features of the thin film transistor were examined.

[44] The thin film transistor fabricated according to an embodiment of the present invention has the structure shown in FIG. 1. As set forth above, the thin film transistor of the invention has various structures and shapes so that it can be constructed as to have a bottom contact type or a top contact type. However, in order to examine the feature of the dielectric thin film, i.e., the acceptor-doped BST, as the gate dielectric, the top contact type transistor as shown in FIG. 1 was fabricated according to an embodiment.

[45] The thin film transistor of FIG. 1 has a structure in which a gate electrode 102 is provided on a certain portion of a substrate 101, a gate dielectric 103, i.e., the dielectric thin film of the invention, is deposited on the whole face of the substrate including the gate electrode 102, and a semiconductor layer 104 and source/drain electrodes 105 and 106 are sequentially deposited on the gate dielectric 103.

[46] In FIG. 1, although the substrate 101 may be a polymer substrate such as PET, a glass substrate or a silicon substrate, in the embodiment, the PET substrate and the glass substrate were used respectively to fabricate the thin film transistor. The thin film transistor fabricated on the PET substrate was applied to the tests of FIGS 5 and 5B, and the thin film transistor fabricated on the glass substrate was applied to the tests of FIGS. 7, 8 and 9. The thin film transistors formed on the PET substrate and the glass substrate were fabricated in the same size under the same process condition.

[47] Specifically, the gate electrode 102 was formed in thickness of lOOnm using a Cr target and a DC sputtering process. The semiconductor layer 104 was formed in thickness of 40nm using a n-type ZnO material through an RF sputtering process under the condition of room temperature, RF power of 115W, pressure of 50 mTorr, and Ar gas atmosphere of 20 seem. The source electrode 105 and the drain electrode 106 were formed to have a width of 2000D and a length of 50 to 150D using an evaporation process for aluminum. Meanwhile, the gate dielectric 102 was formed in thickness of 200nm using an RF sputtering process. In the tests of FIGS. 5 to 7, 3% Mg-doped BST was used, and in the tests of FIGS. 8 and 9, 3% Mn-doped BST was used. For reference, while as the semiconductor layer, a metal oxide semiconductor such as ZnO was used, an organic semiconductor such as pentacene can be applicable.

[48] The features of output and transfer of the thin film transistor fabricated by the above method are as follows. FIGS. 5 and 6 are graphs each showing output and transfer features of ZnO transistor (ZnO-TFT) fabricated using a 3% Mg-doped BST thin film deposited at room temperature on a poly-ethylene-terepthalate (PET) substrate as a gate dielectric according to an embodiment of the present invention, FIG. 7 is a graph showing a transfer feature of ZnO transistor (ZnO-TFT) fabricated using a 3% Mg- doped BST thin film deposited at room temperature on a glass substrate as a gate dielectric according to an embodiment of the present invention, and FIGS. 8 and 9 are graphs each showing output and transfer features of ZnO transistor (ZnO-TFT) fabricated using a 3% Mn-doped BST thin film deposited at room temperature on a glass substrate as a gate dielectric according to an embodiment of the present invention.

[49] First, FIG. 5 shows drain-source current (I ) as a function of drain-source voltage

(V ) at various gate voltages, and from which it can be known that high capacitance of the 3% Mg-doped BST thin film induces low driving voltage of 6V. In FIG. 6, a threshold voltage (Vth) is obtained from x-axis intercept in the graph of square root of I DS versus V GS . The obtained threshold voltag toe was 2.7V,' and field effect mobility J was

15.6 A/cm . In addition, the sub-threshold voltage measured was 443mV/dec. On- current and off-current were 1.86 D id A and 2.90 D id A, and the On/Off ratio thereof was 6.4 D lά

[50] Referring to the graph of FIG. 7, the ZnO-TFT showed the driving voltage of IV, the threshold voltage of 0.9V, and the saturation mobility of 50 cm /Vs or more, which exhibited higher mobility 50 times the amorphous-Si. Off-current at V of -IV was 1 D 10 A, and On/Off current ratio had relatively high value of 7.7 D 10 over the gate voltage of -IV and 3 V. In addition, measured sub-threshold voltage was 173 mV/dec. This indicates that the thin film transistor fabricated on the glass substrate, which is more excellent in surface feature than the plastic substrate, is greatly improved in its performance. For reference, the thin film transistor applied to the test of FIG. 7 was configured to have the gate dielectric of 150nm, by which the capacitance was improved by 25%. [51] Referring to FIGS. 8 and 9, even when using 3% Mn-doped BST as the gate dielectric, comparatively stable ZnO-TFT feature could be obtained. However, as shown in FIG. 9, the field effect mobility of about 1 is relatively low, and the threshold voltage is about 1.5V.

[52] Although preferred embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.

[53]

Industrial Applicability

[54] As set forth before, as the acceptor is doped in the BST, the electron density and therefore the leakage current density in the BST are reduced, and the dielectric breakdown strength is also considerably improved. Based on this feature, the thin film transistor can be stably driven at low voltage when adopting the dielectric thin film as the gate dielectric of the transistor.

[55] Furthermore, nevertheless the acceptor is doped in the BST, optical transparency can be secured so that the dielectric thin film is applicable to a transparent device.

[56]

Claims

[I] A dielectric thin film in which any one of Mg, Mn, Ni, and Fe is doped as an acceptor in Barium Strontium Titanate ((Ba l-x Sr x )TiO 3 , referred to as BST), wherein x in BST ranges from 0.1 to 0.9. [2] The dielectric thin film according to claim 1, wherein two or more of Mg, Mn,

Ni, and Fe are doped together in the BST. [3] The dielectric thin film according to claim 1, wherein the doped amount of the acceptor ranges from 0.5 to 50at%.

[4] A thin film transistor comprising a substrate, a gate dielectric, and a semiconductor layer, wherein the gate dielectric comprises the dielectric thin film according to claim 1. [5] The thin film transistor according to claim 4, wherein the gate dielectric is deposited on the substrate, and wherein the substrate is any one of a polymer substrate, a glass substrate, and a silicon substrate. [6] The thin film transistor according to claim 5, wherein the polymer substrate comprises a poly-ethylene-terepthalate (PET) substrate. [7] The thin film transistor according to claim 4, wherein the gate dielectric has a thickness of 50 to 500nm. [8] The thin film transistor according to claim 4, wherein the gate dielectric has a thickness of 200nm. [9] The thin film transistor according to claim 4, wherein the gate dielectric is deposited on the substrate through a sputtering process under a process temperature ranging from room temperature to 200⁰C. [10] The thin film transistor according to claim 9, wherein the gate dielectric is formed on the substrate by sputtering, as a target, Barium Strontium Titanate

(BST) doped with any one of Mg, Mn, Ni, and Fe as an acceptor.

[I I] The thin film transistor according to claim 9, wherein the gate dielectric is formed on the substrate by sputtering, as a target, Barium Strontium Titanate (BST) doped with two or more of Mg, Mn, Ni, and Fe as an acceptor.

[12] The thin film transistor according to claim 10 or 11, wherein the doped amount of the acceptor ranges from 0.5 to 50at%.

[13] The thin film transistor according to claim 4, wherein the semiconductor layer comprises an organic semiconductor or a metal oxide semiconductor.

[14] The thin film transistor according to claim 13, wherein the organic semiconductor comprises pentacene.

[15] The thin film transistor according to claim 13, wherein the metal oxide semiconductor comprises ZnO.