WO2008015450A1

WO2008015450A1 - Method of forming a passivation layer on a surface of a high-energy radiation detector substrate and a high-energy radiation substrate

Info

Publication number: WO2008015450A1
Application number: PCT/GB2007/002954
Authority: WO
Inventors: Russell Morgan
Original assignee: Radiation Watch Ltd
Current assignee: Radiation Watch Ltd
Priority date: 2006-08-03
Filing date: 2007-08-02
Publication date: 2008-02-07
Anticipated expiration: 2009-02-03
Also published as: GB0615452D0

Abstract

A method for forming an inter-pixel passivation layer over a surface of a high-energy radiation detector substrate supporting a multiplicity of conductive pixel pads is disclosed. The method comprises forming a layer of low resistivity material over the surface of the detector substrate and the multiplicity of conductive pixel pads, the low resistivity material being anodisble to grow a coherent oxide; anodising the low resistivity material over its volume thereby forming a coherent oxide layer; and etching the oxide layer to expose one or more of the conductive pixel pads.

Description

METHOD OF FORMING A PASSIVATION LAYER ON A SURFACE OF A HIGH-ENERGY RADIATION DETECTOR SUBSTRATE AND A HIGH-ENERGY RADIATION SUBSTRATE

Field

The present invention relates to a method for forming a passivation layer on a high-energy radiation detector substrate, and a high-energy radiation detector substrate having such a passivation layer formed on it. In particular, but not exclusively, the method relates to forming a passivation layer between conductive pixel pads of an array of conductive pixel pads formed on a surface of a high-energy radiation detector substrate.

Background

High-energy radiation detector substrates may be formed of slabs or tiles of single crystal polycrystalline wide band gap semiconductors. For example, slabs or tiles of Cadmium Telluride (CdTe) , Cadmium Zinc Telluride (CdZnTe) , Gallium Nitride (GaN) and Cadmium Selenide (CdSe) have been used to form the detector substrate of high-energy radiation detectors.

A surface of the semiconductor tile is treated to improve ohmic contact with the surface and is then patterned with an array of metallic pixel pads. After the pixel pads have been formed on the surface, a passivation layer is formed between respective pixel pads in order to improve the inter-pixel resistance [1] , and also to confine solder bumps that may be placed on individual pixel pads as part of a "bump bonding" process to a circuit substrate, for example.

The passivation layer generally comprises Aluminium Oxide or Aluminium Nitride and forming the passivation layer may involve a difficult and expensive reactive sputtering process. With known processes it may be difficult to maintain a stochimetric film quality and reliable thickness for the Aluminium Oxide or Aluminium Nitride during the reactive sputtering process. Variations in the process may result in an irregular film being deposited over the semiconductor tile and pixel pads, and variations in the deposited layer may make etching to the pixel metallisation difficult and unpredictable. Furthermore, targets which are used in sputtering systems using metals such as Aluminium and reactive gases such as nitrogen and oxygen require a number of cleaning steps and conditioning steps in order to reduce particle formation. This may make the reactive sputtering process difficult and time-consuming to use.

Embodiments in accordance with the present invention were devised with the foregoing in mind.

Summary

Viewed from a first aspect the present invention provides a method for forming a passivation layer on a surface of a high-energy radiation detector substrate, the method comprising forming a layer of a low resistivity material on a surface of the detector substrate, said low resistivity material being anodisable to grow a coherent oxide; and anodising the low resistivity material to grow (form) a coherent oxide layer.

In particular, an aspect the present invention provides a method for forming an inter-pixel passivation layer over a surface of a high-energy radiation detector substrate supporting a multiplicity of conductive pixel pads. The method comprises forming a layer of low resistivity material over the surface of the detector substrate and the multiplicity of conductive pixel pads. The low resistivity material is capable of being anodised to form a coherent oxide. The low resistivity material is anodised over its volume to grow (form) a coherent oxide layer, and the oxide layer is removed to expose one or more of the conductive pixel pads .

The low resistivity material may be one for which a coherent oxide layer may be readily grown, and in particular may be a metal such as Aluminium, Magnesium, Zinc or Tellurium, or similar thereto.

A coherent oxide layer may be viewed as a substantially continuous uniform low pin-hole density layer.

Viewed from another aspect there is provided a high- energy radiation detector substrate, comprising a plurality of conductive pixel pads formed on a surface thereof and inter-pixel passivation material formed of Aluminium Oxide, Magnesium Oxide, Zinc Oxide or a Tellurium Oxide.

Deposition of metals, in particular Aluminium deposition, is a relatively simple process compared to deposition processes for known passivation materials for high-energy radiation detectors, such as Aluminium Nitride, and may provide a flexible, lower cost and more consistent process than Aluminium Nitride or Aluminium Oxide deposition processes. Furthermore, the anodisation process is self-limiting. High inter- pixel pad resistance and good passivation properties may make the anodisation process an improved and lower cost process than processes using materials such as BCB (BenzoCycloButadiene) , Aluminium Nitride and Aluminium Oxide sputter deposition processes.

Additionally, reactive sputter deposition processes are prone to high temperature excursions which may damage the detector substrate, for example CdTe or CdZnTe substrates, whereas the anodisation process may be carried out at much lower temperatures such as room temperature, e.g. 20⁰C to 30⁰C, thereby reducing the likelihood of thermal damage occurring to substrates such as CdTe or CdZnTe .

Typically, prior to etching, a layer of photo- sensitive etch-resist material, e.g photo-resist, is formed over the oxide layer, and exposed through a mask preparatory to removing the etch-resist from regions over one or more of the conductive pixel pads.

Photo-sensitive etch-resistive material is then removed from regions over one or more of the conductive pixel pads .

In one embodiment the oxide layer over one or more of the conductive pixel pads is removed. Typically, this is done with an acid etch solution.

Additionally or optionally, when the low resistivity material is an amphoteric metal such as Aluminium, Magnesium, Zinc or Tellurium, removing the layer of photo-sensitive etch-resist material and the oxide layer is achieved using the same mechanism. This may be achieved by way of the developer used to develop the photo-sensitive etch-resist. Typically the developer is alkali, but since Aluminium Oxide, Magnesium Oxide, Zinc Oxide (Zincate) and Tellurium Dioxide are amphoteric the oxide can be dissolved by an alkali. Thus, one step in the process may be removed.

An amphoteric metal may be considered to be a metal of which any one of its oxides is amphoteric. For example, Tellurium Dioxide is amphoteric whilst Tellurium Oxide is not. Additionally or optionally, an amphoteric metal may be a metal which has a mid-range electro-negativity in the electro negativity series 4.0 to 0.7.

An amphoteric oxide may be defined as an oxide that is amphoteric, that is, it can act either as an acid or a base. In a strongly acidic environment, amphoteric oxides will act as bases; whereas in a strongly basic environment, amphoteric oxides will act as acids. Viewed from yet another aspect, the present invention provides a method for forming an inter-pixel passivation layer over a surface of a high-energy radiation detector substrate supporting a multiplicity of conductive pixel pads in which the method comprises forming a layer of low resistivity material over the surface of the detector substrate and the multiplicity of conductive pixel pads. The low resistivity material is one which is anodisable to grow a coherent oxide layer.

The layer of low resistivity material is etched to expose one or more of the conductive pixel pads, and the remaining low resistivity material is anodised to form a coherent oxide passivation layer between conductive pixel pads.

The low resistivity material may be one for which a coherent oxide layer may be readily grown, and in particular may be a metal such as Aluminium, Magnesium, Zinc or Tellurium, or similar thereto. A coherent oxide layer may be viewed as a substantially continuous uniform low pin-hole density layer.

Etching a metal such as Aluminium may be a quicker, more controllable and reproducible process than a process for etching Aluminium Oxide or Aluminium Nitride for example. Thus, the via through holes in the anodisation over the pixel pads may be more consistently sized compared to other methods, leading to more consistent charge collection characteristics when the detector substrate is in use.

Typically, prior to etching, the method further comprises forming a layer of photo-sensitive etch- resistive material, such as photo-resist over the low resistivity layer, exposing the photo-sensitive etch- resistive material through a mask preparatory to removing the etch-resistive material from regions over one or more of the conductive pixel pads, and removing photo-sensitive etch-resistive material from regions over one or more of the conductive pixel pads . The method further comprises removing the low resistivity layer over one or more of the conductive pixel pads, and anodising the remaining low resistivity layer to form a coherent oxide layer.

Suitably, the plurality of conductive pixel pads form a pixellated array of conductive pixel pads over the surface of the detector substrate.

The detector substrate may comprise Cadmium Telluride or Cadmium Zinc Telluride.

Viewed from another aspect the invention provides a high-energy radiation detector, comprising a high- energy radiation detector substrate formed in accordance with a method as described above, and a circuit substrate operatively coupled to the conductive pixel pads of the detector substrate for collecting charge corresponding to high-energy radiation incident on the detector substrate. List of Figures

Figure l(a)-(g) schematically illustrates the steps in a method for forming a passivation layer between pixels of a pixelated high-energy detector substrate;

Figure 2 is a schematic illustration of an anodisation arrangement for anodising a low resistivity layer in accordance with an embodiment of the present invention;

Figure 3 is a graphical illustration of current fall- off during anodisation in accordance with an embodiment of the present invention;

Figure 4(a)-(g) schematically illustrates the steps in a method for forming a passivation layer between pixels of a pixelated high-energy detector substrate in accordance with another embodiment of the invention;

Figure 5 is a schematic illustration of an anodisation arrangement for anodising a low resitivity layer in accordance with another embodiment of the present invention;

Figure 6 is a graphical illustration of current fall- off during anodising in accordance with another embodiment of the present invention;

Figure 7 is a schematic illustration of a detector substrate; and

Figure 8 is a schematic illustration of a high-energy radiation detector comprising a detector substrate formed in accordance with an embodiment of the present invention.

Detailed description

Embodiments in accordance with the present invention will now be described, by way of example only, and with reference to the figures of the drawings briefly described above. Figure 1 (a) : A Cadmium Zinc Telluride substrate 2 is patterned with conductive pixel pads 4 to form an array of conductive pixel pads. The conductive pixel pads 4 may be formed of any suitable metallic material for forming a good ohmic contact with Cadmium Zinc Telluride substrate 2, for example a solder wettable noble metal. Typically, the pixel pads are formed of gold, platinum upon which gold is formed, platinum upon which silver is formed, a triple layer comprising gold, platinum and silver or a triple layer comprising gold, nickel and gold again. The exact composition of the pixel pads 4 is not important to the present invention. Additionally, a bias electrode 5 is formed on a surface of the detector substrate opposing the pixellated surface.

Figure 1 (b) : A layer 6 of low resitivity material, which in the described embodiment is Aluminium, is deposited over the pixellated surface of detector substrate 2. The Aluminium layer 6 may be deposited by sputtering or evaporation using equipment such as may be supplied by AJA International, Inc of Massachusetts, USA. In the described embodiment, the Aluminium layer 6 is 2000A thick. It is well known to a person of ordinary skill ikn the art of sputter or vapour deposition that the thickness of the Aluminium layer 6 may be controlled by the length of time the detector substrate 2 undergoes the sputtering or evaporation process. Film thickness is also controllable buy sputter power and to some extent sputter pressure will have an effect. With evaporation at a fixed distance the rate of heating, i.e. current applied to the charge, has an effect on film thickness .

In accordance with a first embodiment of the invention a detector substrate is placed in an anodising cell 202, schematically illustrated in figure 2, in order to anodise the Aluminium layer 6. The anodising cell 202 is placed in a bath 204 of electrolyte anodising solution 200 consisting of small amounts of (NH₄) ₂BO₄ (ammonium borate), C₂H₄ (OH) 2 (glycol) and acetic (citric) acid and made to a pH of 6.5 [2].

The anodising cell 202 includes a small surface contact wire 208 around the edge of the cell 202 which makes contact with the Aluminium layer 6. The contact wire is connected to a cable 210 which is coupled to the positive terminal 212 of a direct current power supply unit 214. The Aluminium layer 6 is the anode.

The negative terminal 216 of the direct current power supply 214 is connected to a stainless steel electrode 218 via cable 220. The stainless steel electrode 218 forms the cathode for the anodisation cell 202.

To anodise the Aluminium layer power supply unit 214 is switched on and the voltage is slowly ramped up to 300V over 8 to 10 minutes. The voltage ramp is generally linear and is necessary in order to _ continue the anodisation process throughout the volume of the Aluminium layer 6. The Aluminium at the surface anodises first and a greater voltage is required to anodise the Aluminium deeper within the layer.

Figure 3 graphically illustrates how current through the layer 6 drops off exponentially due to dielectric build-up during the anodisation process until eventually the whole of layer 6 is anodised (oxidised) , and layer 6 becomes non-conductive and therefore no current (or minimal threshold current, e.g. 2nA) flows, indicated as time tx on figure 3. When the current reaches zero or the threshold current the process is stopped. At this point the Aluminium layer 6 has anodised to form Aluminium Oxide (AI₂O₃) and is now about 2700A thick from a starting thickness of 2000A.

The oxide growth thickness is proportional to the applied electric field and the ion current reacts to form an oxide layer at the Aluminium metal/oxide interface. Under high field conditions the ions which form the oxide have high mobility, and are driven by the field into the Aluminium where oxygen anions react with the Aluminium metal to form the Aluminium Oxide. At the oxide/electrolyte interface the Aluminium cations react with water in the anodisation solution. Hydrogen gas is evolved at the cathode of the anodisation cell 202. Oxidation of excess Tellurium at the Oxide/CdZnTe interface also occurs.

The reaction is as set out below: 2Al³⁺ + 3H₂O -> Al₂O₃ + 6H⁺

2Al + 3O^2~ -> Al₂O₃ + 6e^~

The thicker the Aluminium layer 6 the greater the voltage necessary to achieve full anodisation of the layer. Additionally, the current fall-off is less steep for thicker Aluminium layers 6 as illustrated in figure 3. For example, line 302 is indicative of a relatively thin Aluminium layer 6 of 500A for which a maximum voltage of 10-15 volts is suitable. Line 304 represents current fall-off for an Aluminium layer IOOOA for which a maximum voltage of 40-50 volts is suitable, and line 306 represents current fall-off for a 2000A thick Aluminium layer for which a maximum voltage of between 200-300 volts is suitable to complete anodisation of the Aluminium layer.

The anodised layer 6 forms a passivation layer indicated as reference numeral 8 in the drawings. The anodisation cell 202 is removed from bath 204 and the detector substrate 2 rinsed to remove the anodising solution, for example with Isopropyl Alcohol (IPA) , dried and removed from the anodisation cell 202.

Figure l(c) : The passivation layer 8 is coated with a positive tone photo-resist 10 such as AZ 1300 from Hoechst, for example by "spin-coating". The photo- resist 10 is then hard-baked in an oven or under a heat lamp at 110⁰C for 10 minutes.

Figure 1 (d) : A mask 12 is placed over the photoresist 10. The mask 12 obscures regions of the photo- resist 10 corresponding to inter-pixel contact pad spacing 14, and exposes photo-resist 15 corresponding to pixel contact pads 4.

Figure l(e) : The photo-resist 10 is exposed to an Ultra-Violet (UV) light, typically a 400-360nm Hg vapour arc source may be used, and the photo-resist developed. In the described embodiment the developer is TMAH (TetraMethyleAmmoniumHydroxide) , which is an alkali. The TMAH removes the regions 15 of the photoresist exposed to UV light by dissolving the photoresist, leaving the photo-resist over the inter-pixel contact pad spacing intact so that the aluminium oxide in the inter-pixel spacing is protected.

Figure 1 (f) : As Aluminium Oxide is amphoteric it may be dissolved using either an alkali or an acid. In one embodiment, the Aluminium Oxide over the pixel contact pads 4 is etched away using Hydrochloric Acid (HCL) to leave the pixel contact pads 4 exposed. In another embodiment, the developer TMAH is used to dissolve the Aluminium Oxide thereby combining the developing and etching steps illustrated in figures 1 (e) and l(f).

TMAH removes both the photoresist and the Aluminium Oxide but the resist removal is at a slower rate as it has been baked. The resist is also generally 6-7 times thicker than the Aluminium Oxide and so protects the Aluminium Oxide it covers, whilst the uncovered Aluminium Oxide is etched by the TMAH. Figure 1 (g) : Finally, the remaining photo-resist 10 is dissolved using Acetone and washed away using IPA and/or de-ionised water, leaving a detector substrate 2 with pixel contact pads 4 having a passivation Aluminium Oxide layer 8 in between them.

In an optional embodiment, the Aluminium layer 6 is not anodised until after it has been etched. The process for forming an inter pixel contact pad passivation layer in accordance with such an optional embodiment will now be described with reference to figure 4.

Figure 4 (a) : A Cadmium Zinc Telluride substrate 2 is patterned with conductive pixel pads 4 to form an array of conductive pixel pads . The conductive pixel pads 4 may be formed of any suitable metallic material for forming a good ohmic contact with Cadmium Zinc Telluride substrate 2, for example a solder wettable noble metal. Typically, the pixel pads are formed of gold, platinum upon which gold is formed, platinum upon which silver is formed, a triple layer comprising gold, platinum and silver or a triple layer comprising gold, nickel and gold again. The exact composition of the pixel pads 4 is not important to the present invention.

Figure 4 (b) : A layer 6 of low resitivity material, which in the described embodiment is Aluminium, is deposited over the pixellated surface of detector substrate 2. The Aluminium layer 6 may be deposited by sputtering or evaporation using equipment such as be supplied from AJA International, Inc of Massachusetts, USA. In the described embodiment, the Aluminium layer 6 is 2000A thick. The thickness of the Aluminium layer 6 may be controlled by the length of time the detector substrate 2 undergoes the sputtering or evaporation process.

Figure 4 (c) : The Aluminium layer 6 is coated with a positive tone photo-resist 10 such as AZ 1300 from Hoechst, for example by "spin-coating". The photoresist 10 then hard-baked in an oven or under a heat lamp at 110⁰C for 10 minutes. Figure 4 (d) : A mask 12 is placed over the photoresist 10. The mask 12 obscures regions of the photoresist 10 corresponding to inter-pixel contact pad spacing 14, and exposes photo-resist 16 corresponding to pixel contact pads 4.

Figure 4 (e) : The photo-resist 10 is exposed to an ϋltra-Violet (UV) light, typically a 400-360nm Hg vapour arc source may be used, and the photo-resist developed. In the described embodiment the developer is TMAH (TetraMethyleAmmoniumHydrOxide) . The developer dissolves the regions 15 of the photo-resist exposed to UV light The UV makes an acid in the resist which dissolves in the TMAH more rapidly than unexposed photo-resist, leaving the Aluminium layer 6 in the inter-pixel contact pad spacing protected.

Figure 4 (f) : The exposed Aluminium is wet etched using an Aluminium etch solution, for example (H3PO4/CH3COOH/HNO3) , to remove the Aluminium over each pixel contact pad 4. Aluminium etching is faster and more consistent than etching Aluminium Oxide. Figure 4 (g) : The photo-resist 10 is dissolved in Acetone and washed away. The Aluminium is now anodised to form an Aluminium Oxide (passivation) layer 8.

In accordance with the second embodiment of the invention the detector substrate is placed in an anodising cell 502, schematically illustrated in figure 5, in order to anodise the inter-pixel contact pad Aluminium layer 6. The anodising cell 502 is placed in a bath 504 of electrolyte anodising solution 500 consisting of small amounts of (NH₄) ₂BO₄ (ammonium borate), 0₂H₄(OH)₂ (glycol) and acetic (citric) acid and made to a pH of 6.5.

The anodising cell 502 includes a small surface contact wire 508 around the edge of the cell 502 which makes contact with the Aluminium layer 6. The contact wire is connected to a cable 510 which is coupled to the positive terminal 512 of a direct current power supply unit 514. The Aluminium layer 6 is the anode.

The negative terminal 516 of the direct current power supply 514 is connected to a stainless steel electrode 518 via cable 520. The stainless steel electrode 518 is the cathode for the anodisation cell 502.

Power supply unit 514 is switched on and the voltage is slowly ramped up to 300V over 8 to 10 minutes. The voltage ramp is generally linear and is necessary in order to continue the anodisation process throughout the volume of the Aluminium layer 6. The Aluminium at the surface anodises first and greater voltage is required to anodise the Aluminium deeper within the layer.

Figure 6 graphically illustrates how current through the layer 6 drops off exponentially due to dielectric build-up during the anodisation process until eventually the whole of layer 6 is anodised (oxidised) , and layer 6 becomes non-conductive and therefore no current (or minimal threshold current, e.g. 2nA) flows, indicated as time tx on figure 6. When the current reaches zero or the threshold current the process is stopped. At this point the Aluminium layer 6 has anodised to form Aluminium Oxide (AI₂O₃) layer 8, and is now about 2700A thick from a starting Aluminium layer 2000A thick.

Compared to the graph illustrated in figure 3 there is less current flowing through the Aluminium layer 6. This is because the there is less Aluminium than for the first embodiment as the Aluminium between pixels has been etched away. This makes current monitoring more difficult than in the first embodiment.

The growth process for both CdTe and CdZnTe crystals comprises a finishing process which involves polishing the crystal surface. The polishing leaves 100-200A deep surface defects which are etched away using Bromine Methonal (Br/MeOH) or Bromine Glycol (Br/C₂H₄ (OH) 2) • However, the etching process results in a Tellurium rich surface because the process depletes the surface of cadmium as it is a preferential etch.

Although a Tellurium rich surface makes for better ohmic contact as it is more metallic than CdTe or CdZnTe, it reduces inter-pixel resistance. By using an anodisation process as described above for both the first and second embodiments of the invention the Tellurium may be anodised in addition to the Aluminium. Thus, good ohmic contacts may be formed, whilst also having good inter-pixel resistance due to the anodisation of the surface region Tellurium. It may be easier to anodise Tellurium compared to Aluminium since Tellurium is less amphoteric than Aluminium Oxide .

A detector substrate 2 in accordance with an embodiment of the present invention is illustrated in figure 7 and has a semi-conductor crystal clad on one surface thereof with a plurality of conductive pixel contact pads 4 which may act as charge collection electrodes and on an opposing surface clad with a layer of conductive material 5 for forming a biasing electrode. The array of contact pads 4 forms a pixellated surface 7.

Each conductive pad 4 is electrically isolated from the other contact pads by an Aluminium Oxide passivation layer. The array of pads 4 forms an array of ionising radiation sense volumes 20. In the illustrated example an array of 50 x 50 sense volumes 20 is created from the array of conductive contact pads, each pad having dimensions 100 microns by 100 microns. Typically, the contact pads are square, but they could be any other suitable shape such as triangular, hexagonal or other polygonal shape or circular, for example.

A cross-section of a detector device 13 is illustrated in figure 8 comprising a detector substrate 2, as illustrated in figure 7, and semi-conductor circuit substrate 17 is illustrated in figure 2. In use a bias voltage, for example 30 volts (other bias levels may be used suitable for the detector substrate material in use) , is applied between the array 7 of conductive pads 4 and the conductive layer 5. For example, circuit substrate 17 and contact pad array 7 may have a reference potential of -15V whilst the conductive layer 6 may have a reference potential of 15V. As illustrated in figure 8 ionising radiation 22 incident on the detector 13 forms an electron-hole pair 18 in the detector substrate and the bias voltage induces positive and negative charges (holes e+ and electrons e-) at contact pads 4 in array 7 and conductive layer 7.

In the illustrated embodiment the electrically isolating space between contact pads 4 is filled with an Aluminium Oxide passivation material 26 to enhance the electrical separation and isolation of the contact pads 4 from each other.

The circuit substrate 17 supports an array of read-out circuits 16, there being a corresponding number of read-out circuits 16 on each circuit substrate to the number of sense volumes 17.

Each read-out circuit 16 includes a circuit contact 28 for electrically coupling the read-out circuitry 16 to the detector substrate 2. A conductive bond 24 couples the detector substrate 2 to circuit substrate 17 to form a hybrid detector 13.

In the illustrated embodiment, bonding of the detector substrate 2 to circuit substrate 17 is by way of bump- bonding. The bump-bonds 24 both mechanically and electrically couple the detector and circuit substrates together. The mechanical coupling of the bump-bonding is often augmented by the practice of "under filling" in such detectors e.g. a low viscosity insulating epoxy resin is introduced into the space between bumps. The bump-bonds 24 are made of a low temperature solder such as a tin-bismuth mixture, which is particularly suitable for use with the CdTe detector material used in the described embodiment, since CdTe (and CdZnTe) is sensitive to heating and can be damaged if subjected to high temperatures, for example over 200⁰C. The chemicals suitable for growing bumps which fulfil this low temperature criterion are generally available from industrial sources. The read-out substrate in the described embodiment supports CMOS circuitry and is configured as an ASIC. However, embodiments of the invention need not be limited to CMOS ASICs, but may use other substrate technologies including printing circuit board (PCB) technologies .

In view of the foregoing description it will be evident to a person skilled in the art that various modifications may be made within the scope of the invention. For example, the pixellated array of contact pads or electrodes need not be square or rectangular, but may be formed in another arrangement such as concentric circles, spirals or a hexagon for example.

Further, the detector substrate material need not be Cadmium Zinc Telluride, but may be Cadmium Telluride, Gallium Nitride or Cadmium Selenide, or any other semiconductor high-energy radiation sensitive material. Optionally, Zinc, Magnesium or Tellurium may be used instead of Aluminium as they too readily form a coherent Oxide. Materials other than Aluminium may be used to form the low resistivity layer, for example any material which is anodisable to grow a coherent oxide. A coherent oxide may be an oxide which is substantially continuous and uniform and has a low pin hole density. The density of pin holes should be low enough such that the oxide layer acts as a passivation layer and inhibits conduction between pixel contact pads . Examples of suitable metals also include Magnesium, Zinc and Tellurium and other similar metals.

Other amphoteric metals may be used other than those explicitly mentioned in the description. Additionally, low resistivity material other than metals may also be used in embodiments of the invention.

The Aluminium (or Magnesium, Zinc or Tellurium etc.) layer need not be 2000A thick, but may lie in a range between 500A and 3000A. Embodiments of the invention are not limited to the particular electrolyte solution described herein, but any suitable anodising electrolyte solution may be used.

The photo-resist may be negative tone such as SU8, and the mask 12 a negative mask.

Acids other than HCL may be used to etch Aluminium Oxide, for example Sulphuric Acid (H₂SO₄) or Formic Acid.

As used herein any reference to "one embodiment" or "an embodiment" means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment.

As used herein, the terms "comprises," "comprising," "includes," "including," "has," "having" or any other variation thereof, are intended to cover a nonexclusive inclusion. For example, a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Further, unless expressly stated to the contrary, "or" refers to an inclusive or and not to an exclusive or. For example, a condition A or B is satisfied by any one of the following: A is true (or present) and B is false (or not present) , A is false

(or not present) and B is true (or present) , and both A and B are true (or present) .

In addition, use of the "a" or "an" are employed to describe elements and components of the invention. This is done merely for convenience and to give a general sense of the invention. This description should be read to include one or at least one and the singular also includes the plural unless it is obvious that it is meant otherwise.

The scope of the present disclosure includes any novel feature or combination of features disclosed therein either explicitly or implicitly or any generalisation thereof irrespective of whether or not it relates to the claimed invention or mitigate against any or all of the problems addressed by the present invention. The applicant hereby gives notice that new claims may be formulated to such features during prosecution of this application or of any such further application derived therefrom. In particular, with reference to the appended claims, features from dependent claims may be combined with those of the independent claims and features from respective independent claims may be combined in any appropriate manner and not merely in specific combinations enumerated in the claims.

References

[1] "Passivation of CdZnTe Surfaces by Oxidation in Low Energy Atomic Oxygen", Chen et al, JVS&T A Jan 1999, volume 17 pp97-101. [2] "Anodic Films on Aluminium", G. E. Thompson and G. E. Wood, Vol. 23, Processes and Passive Films pp205-328, Academic Press, New York 1983.

Claims

Claims :

1. A method for forming an inter-pixel passivation layer over a surface of a high-energy radiation detector substrate supporting a multiplicity of conductive pixel pads, the method comprising:

forming a layer of low resistivity material over said surface of said detector substrate and said multiplicity of conductive pixel pads, said low resistivity material being anodisable to grow a coherent oxide;

anodising said low resistivity material thereby forming a coherent oxide layer over said surface of said detector substrate and said multiplicity of conductive pixel pads; and

etching said oxide layer to expose one or more of said conductive pixel pads.

2. A method according to claim 1, further comprising prior to said etching: forming a layer of photo-sensitive etch-resist material over said oxide layer; and

exposing said photo-sensitive etch-resistive material through a mask preparatory to removing said etch-resistive material from regions over said one or more of said conductive pixel pads.

3. A method according to claim 2, further comprising removing said layer of photo-sensitive etch-resistive material from a region over one or more of said conductive pixel pads with a developer.

4. A method according to claim 3, further comprising removing said oxide layer over said one or more of said conductive pixel pads.

5. A method according to any one of claims 1 to 3, wherein said low resistivity material is an amphoteric metal.

6. A method according to claim 5, wherein said oxide layer is removed by said developer.

7. A method for forming an inter-pixel passivation layer over a surface of a high-energy radiation detector substrate supporting a multiplicity of conductive pixel pads, the method comprising:

forming a layer of low resistivity material over said surface of said detector substrate and said multiplicity of conductive pixel pads;

etching said layer of low resistivity material to expose one or more of said conductive pixel pads; and

anodising those parts of said low resistivity layer remaining after removing said low resistivity layer from over said one or more of said conductive pixel pads to grow a coherent oxide.

8. A method according to claim 7, further comprising prior to said etching: forming a layer of photo-sensitive etch-resistive material over said low resistivity layer; and

9. A method according to claim 8, further comprising removing said layer of photo-sensitive etch-resistive material over said one or more of said conductive pixel pads .

10. A method according to claim 9, further comprising removing said low resistivity layer to expose said one or more of said conductive pixel pads.

11. A method according to any preceding claim, wherein said plurality of conductive pixel pads form a pixellated array of said conductive pixel pads over said surface of said detector.

12. A method for forming a passivation layer on a surface of a high-energy radiation detector substrate, the method comprising:

forming a layer of a low resistivity material on a surface of said detector substrate; and

anodising said low resistivity material over its volume thereby growing a coherent oxide layer.

13. A method according to any preceding claim wherein said detector substrate comprises Cadmium Telluride or Cadmium Zinc Telluride.

14. A method according to any preceding claim, wherein said low resistivity material comprises Aluminium, Zinc, Tellurium or Magnesium and said oxide is Aluminium Oxide, Zinc Oxide, a Tellurium Oxide or Magnesium Oxide respectively.

15. A high-energy radiation detector substrate, comprising a plurality of conductive pixel pads formed on a surface thereof, inter-pixel passivation material formed of a coherent oxide of a low resistivity material, and formed in accordance with a method in accordance with any preceding claim.

16. A high-energy radiation detector substrate according to claim 15, wherein said coherent oxide of a low resistivity material is a one of Aluminium Oxide, Zinc Oxide, a Tellurium Oxide or Magnesium Oxide .

17. A high-energy radiation detector substrate according to claim 14, 15 or 16, wherein said detector substrate comprises Cadmium Telluride or Cadmium Zinc Telluride.

18. A high-energy radiation detector, comprising a high-energy radiation detector substrate according to any one of claims 14 to claim 17, and a circuit substrate operatively coupled to said conductive pixel pads of said detector substrate for collecting charge corresponding to high-energy radiation incident on said detector substrate.

19. A method substantially as hereinbefore described with reference to Figures 1, 2, and 3, and Figures 4, 5 and 6 of the drawings.

20. A high-energy radiation detector substrate substantially as hereinbefore described with reference to Figures 1, 2 and 3, and Figures 4, 5 and 6 of the drawings .

21. A high-energy radiation detector substantially as hereinbefore described and with reference to Figures 7 and 8 of the drawings.