WO2008009262A2 - Modul mit flachem aufbau und verfahren zur bestückung - Google Patents
Modul mit flachem aufbau und verfahren zur bestückung Download PDFInfo
- Publication number
- WO2008009262A2 WO2008009262A2 PCT/DE2007/001155 DE2007001155W WO2008009262A2 WO 2008009262 A2 WO2008009262 A2 WO 2008009262A2 DE 2007001155 W DE2007001155 W DE 2007001155W WO 2008009262 A2 WO2008009262 A2 WO 2008009262A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- bonding
- module
- bonded
- module according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H10W74/137—
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- H10W70/69—
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- H10W20/40—
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- H10W70/685—
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- H10W72/01551—
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- H10W72/07141—
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- H10W72/073—
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- H10W72/075—
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- H10W72/07511—
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- H10W72/07521—
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- H10W72/07532—
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- H10W72/07533—
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- H10W72/07553—
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- H10W72/534—
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- H10W72/536—
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- H10W72/5363—
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- H10W72/5366—
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- H10W72/537—
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- H10W72/5434—
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- H10W72/5445—
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- H10W72/59—
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- H10W72/923—
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- H10W72/952—
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- H10W72/983—
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- H10W74/00—
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- H10W74/10—
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- H10W74/114—
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- H10W90/754—
Definitions
- Modules are used to integrate different components on a substrate. Usually, components are interconnected via the modules. An encapsulation of the entire module can replace individual component encapsulations.
- modules in the event of thermal cycling depends largely on the design and connection technology as well as the encapsulation of the module.
- the bond wires present particular weak points, as they may be present at e.g. Due to different thermal expansion tensile stresses tend to tear, the function of the entire module is destroyed or destroyed.
- One method of wire bonding is the so-called stand off stitch bonding (SSB) in which a so-called stud bump is first generated on a second bondpad.
- a stud bump is the end of a bond wire that has been deformed into a ball by fusion, which is bonded to the bond pad and at which the wire over the ball is torn off immediately after bonding.
- a conventional ball stitch is performed, whereby the bonding wire is bonded to a first bonding pad by means of its ball-shaped end and the other end of the bonding wire, designated as a wedge or stitch, is placed directly on the stud bump on the second bonding pad.
- the so-called “reverse ball stitch” method becomes a stud-bump on the Component chip and the ball applied to the substrate.
- the Stud Bump is used in the "Reverse Ball Stitch” bonding to the wedge at a distance from the second Bondpad réellebonden to protect damage to the chip surface through the wire-carrying capillary of the bonding machine, especially when the bonding wire is squeezed at the end.
- thermal stability of modules with wire-bonded component chips depends essentially on the length of the bonding wires and in particular on the height of the loops which form the bonding wires fastened at both ends, in particular if the bonding wires are still covered with a glob top or module become.
- Object of the present invention is to provide a module with wire-bonded component chips, which is resistant to thermal cycling.
- a module which has a component chip bonded on and contacted to the module substrate by bonding wires.
- the "reverse ball stitch" method already described is used, but the wire end of the bonding wire already bonded to the module substrate is bonded directly onto the bond pad of the component chip without a stud bump in between , the To lead bonding wire flat over the surface of the component chip without a large component chip protruding wire loop needs to be taken into account.
- the bonding wire is conventionally bonded with a ball to the connection surfaces present there.
- the bonding wire may have a round or even a rectangular cross-sectional area. In extreme cases, it is designed as a metal strip. This design is particularly flat feasible and has advantages, if over the bonding wire or the metal ribbon HF signals are to be performed. Because of the skin effect, RF signals have only a small "depth of immersion" in the metal strip A rectangular bonding wire allows a smaller overall height compared to a round bonding wire with the same cross-sectional area
- Bonding wire used metal ribbon can be bonded at both ends as a wedge (Stictch) and needed as a first bond no ball.
- Such a module can be covered with a glob top mass or an injection molding applied mold mass, which can be applied due to the lower loop height of the bonding wires in lower overall height than heretofore.
- This increases the stability of the proposed module in that over the more unstable of the two bond connections of a bonding wire, namely over the wedge bond connection over the upward-facing surface of the component chip now only a small glob top thickness is applied.
- the tensile and shear forces acting in the module due to different thermal expansion coefficients are a function of the glob top thickness applied over the corresponding vulnerable site, here the bondwire bond.
- both the less resilient bond better protected and the overall lower Glob top height also increases the stability of the more stable bonding wire connection directly on the substrate.
- a lower Glob Top cover also results in a lower module height.
- a stud bump may be applied over the wedge bond. This sits on the bonding wire end and on the bond pad and provides an additional attachment of the bonding wire end, which makes this bond more stable against tearing off the bonding wire or releasing the bond.
- the bonding device When wedging or stitch bonding, the bonding device, ie the wire-guiding capillary, must act on the bondpad with relatively high pressure.
- the bonding pad according to the invention can be particularly designed. While previously the bondpond and then the passivation is generated, which leads to a partial overlap of the passivation on the bondpad, now the bondpad is designed so that it overlaps the passivation on all sides and they can not be damaged by the wire-guiding capillary.
- a further reduction of the overall module height and in particular the required glob top height is achieved if the height of the components sitting on the substrate and in particular of the component chips is minimized.
- the stability is additionally improved due to the lower glob top thickness.
- the lower component chip height only has an advantageous effect on the module height if no SMD components are applied to the substrate. But even if additional SMD components are applied, a gain in stability is achieved with the advantageous proposed wire bond, which is independent of the applied Glob top thickness.
- Resistors can be integrated in the module. Since these often can not be generated within the multilayer substrate, for example, SMD resistors can be used for this purpose. However, it is possible, and for a small module height, to replace SMD resistors with printed resistors deposited directly on the substrate surface. For example, a resistance paste before the sintering of the substrate as an inner layer pressure or after sintering printed as outer layer pressure and both against corrosion and against the galvanic reinforcement or the Damage / decomposition in the electroplating be covered with a passivation layer, in particular with a glass layer. Such an open resistance layer has the further advantage that it can be subsequently trimmed, for example by means of a laser.
- An advantageous substrate material is a multilayer ceramic, in particular a LTCC (Low Temperature Cofired Ceramic), which comprises a plurality of dielectric ceramic layers, between which structured metallization levels are provided. Different metallization levels are connected via vias. By way of the metallization structures within the metallization levels and their connections via the plated-through holes, any interconnection patterns can be integrated in the substrate.
- LTCC Low Temperature Cofired Ceramic
- a substrate with bondable pads and a device chip with bond pads are first provided on its front side.
- the bond pads are designed such that the bondable surface protrudes above the surface of the passivation and preferably partially overlaps the passivation.
- the component chip is glued to the intended place on the substrate. It is possible to simultaneously use a corresponding "die-flag" to produce on the substrate an electrical backside connection of the chip. However, it is also possible to stick the chip in purely mechanically and to contact electrically only via bonding wires. This is done by bonding a bonding wire with the "ball” onto the pads on the substrate, then bending the bond wire into a flat loop so that it extends close to the surface of the device chip to the bond pad, directly to the surface of the bond pad on the outside pointing surface of the component chip is now the wedge (or stitch) set, in which the
- Wire end of the bonding wire is placed flat or parallel to the bond pads aligned and bonded.
- the bonding process may include an ultrasonically assisted thermal compression process or a so-called friction welding in which the pressure force, temperature and ultrasound interact and establish the bond.
- the bond pad projecting beyond the passivation on the upward-pointing surface of the chip contributes to the fact that during the bonding process no direct action of the bonding tool - a wire-carrying capillary - on the passivation on the component chip takes place. This avoids damage to the passivation.
- the wire By bonding the wire is torn off behind the wedge or squeezed through the capillary.
- a stud bump is then placed over the wedge bond by melting the end of another bond wire into a ball and placing it on the bond site. After bonding, the excess wire is torn off leaving only the stud bump, the bond wire bonded to the end of the wedge, and the underlying bond wire Bondpad contacted and thus increases the strength of the wedge bond connection.
- a number of wire bond connections corresponding to the number of contacts to be produced are produced according to the method just described. Subsequently, further possibly different component chips can be applied in the same or in flip-chip technology on the substrate, and optionally SMD components. It may make sense to produce the bonding wire connections for all the chips to be bonded on a substrate in a common method step.
- FIG. 1 shows a schematic cross-section of conventional wire bond connections on a module
- Figure 2 shows a module with inventive
- FIG. 3 shows the production of the new bonding connection in comparison to a known ball stitch method.
- FIG. 4 shows a wedge fastened with an additional studbump.
- FIG. 1 shows a schematic cross-section of an exemplary module with a glued-on component chip BC, which is connected to the substrate SU via conventional and therefore known bonding wire connections.
- bondable pads AF On the substrate are bondable pads AF, arranged on the back of the component chip BC bondable bond pads BP.
- both a standard ball stitch bonding according to the left bonding wire BDI and a reverse stand off stitch bonding (reverse bonding SSB) corresponding to the second bonding wire BD2 on the right side are shown.
- the bond wire end BS melted into a ball is first placed on the component chip or its bond pad and then pulled to the termination surface AF on the substrate SU, where a wedge bond WB is performed.
- SMD components SMD can be arranged on the substrate SU. These usually have a component height that exceeds that of a component chip. While a device chip applied as bare die can be realized in a standard thickness of, for example, 200 ⁇ m, an SMD component requires a device height of typically 500 ⁇ m.
- the module is also provided with a glob top cover GT, which is applied so thickly that the bonding wires BD are securely covered. This leads to a component height of at least d2, in the case of using SMD components to a component height d3, where d3 is larger d2.
- FIG. 2 shows a component chip BC contacted according to the invention.
- the device chip BC is glued to a substrate SU.
- a bonding wire BD is bonded with its ball BS on the pad AF directly on the substrate.
- the bonding wire is then drawn onto the upper side towards the bonding pads BP and bonded there directly to the bonding pad BP with a wedge connection WB. It turns out that the bonding wire can be guided in this way close to the component chip BC and leads only to a small projection over the component chip height.
- the total height of the component d4 ' measured from the substrate to the highest bonding wire loop, is only insignificantly higher than the thickness of the component chip BC.
- connection surfaces AF can be connected via plated-through holes DK with a metallization plane Ml hidden in the interior of the substrate. This can be connected via further plated-through holes to further metallization levels, metallization structures being produced in each metallization level a connection or for the realization of passive component structures are arranged. External contacts of the module can be arranged on the underside of the substrate SU.
- the design according to the invention results in a height-reduced component which is realized even with a glob top cover with a smaller thickness of the glob top cover can.
- a thinner glob top cover leads to lower shear forces at the interface to the component chip BC or to the substrate SU, which thus less load the bond connections and the chip when the thermal cycling stresses acting on the module.
- FIG. 3 compares a known bond pad on the chip top side of a component chip BC with an embodiment of a bond pad that is advantageous for the new bonding method.
- FIG. 3A shows the known bonding pad during the production of a bonding wire connection according to the reverse SSB method.
- the bonding pad has a base metallization GM and above a reinforcing layer VS, which is characterized in particular by its bondability, for example a gold surface.
- a passivation layer PS is applied to the chip surface and structured in such a way that a region of the bond pad is exposed. Usually, the edges of the passivation layer overlap the bonding pad.
- a Stud-Bump SB is then bonded onto which a wedge can subsequently be placed in the reverse SSB method.
- the bonding tool from the here only the bonding wire leading capillary K is shown, the bonding wire BD on the Stud Bump SB, it binds him there firmly and then tears or squeezes him off.
- FIG. 3B shows a novel embodiment of the bondpad, in which initially a base metallization for the bondpad is produced on the substrate surface SU. Subsequently, the passivation is generated and optionally structured. Only after the passivation PS has been produced is a reinforcing layer VS applied over the bonding pad, for example by galvanic growth of a corresponding metal layer. This causes the edges of the reinforcing layer to grow over the edges of the passivation layer and eventually even overlap. Overall, the reinforcing layer is applied at a height such that it protrudes above the upper edge of the passivation layer. This supernatant replaces the stud bump of the conventional reverse SSB method.
- Such a bonding pad surface raised above the surface of the passivation layer allows a problem-free direct bonding of a bonding wire end in the reverse ball-stitch method on the surface of the amplifier layer, without damaging the passivation layer PS with the capillary K.
- FIG. 4 shows, in a schematic cross-section, how such a wire-bonded wire end is additionally fastened with a stud-bump SB, which is bonded directly onto the bond pad BP above the torn-off wire end.
- the invention illustrated and explained only with reference to a few embodiments is not limited to the embodiments. Variation possibilities arise, in particular, in the type and number of components to be applied to the substrate. elements, which are applied as Bare Dies, for example. These may represent ICs or other active semiconductor devices.
- the bare Die can also be a piezoelectric chip.
- the device chip may have device structures on both surfaces and additionally within the chip. On the side to be stuck, it may have a base metallization or a ground contact.
- An inventive module with minimized module height dispenses with SMD components.
- the invention is not limited to modules without SMD components.
- the arranged on the substrate components and device chips can have different heights, accordingly, the Glob Top cover can be designed in such a stepped manner that all components are just just covered by Glob Top or MoId (by injection molding).
- the invention is also not limited to substrates from LTCC. Also possible are polymer substrates which, however, exhibited a thermal expansion behavior relative to the LTCC, which is less adapted to the expansion behavior of conventional device chips and in particular of semiconductors.
- An inventive module can also be realized without Glob top cover, in which case, however, a different type of cover is required for protecting the bonding wire connections, for example a cap or the like.
Landscapes
- Wire Bonding (AREA)
Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009519785A JP2009544159A (ja) | 2006-07-18 | 2007-06-29 | 平坦な構造を有するモジュールと構成部品の設置方法 |
| EP07785583A EP2041783A2 (de) | 2006-07-18 | 2007-06-29 | Modul mit flachem aufbau und verfahren zur bestückung |
| US12/352,436 US20090174054A1 (en) | 2006-07-18 | 2009-01-12 | Module with Flat Construction and Method for Placing Components |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102006033222.9 | 2006-07-18 | ||
| DE102006033222.9A DE102006033222B4 (de) | 2006-07-18 | 2006-07-18 | Modul mit flachem Aufbau und Verfahren zur Bestückung |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/352,436 Continuation US20090174054A1 (en) | 2006-07-18 | 2009-01-12 | Module with Flat Construction and Method for Placing Components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2008009262A2 true WO2008009262A2 (de) | 2008-01-24 |
| WO2008009262A3 WO2008009262A3 (de) | 2008-04-03 |
Family
ID=38434830
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/DE2007/001155 Ceased WO2008009262A2 (de) | 2006-07-18 | 2007-06-29 | Modul mit flachem aufbau und verfahren zur bestückung |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20090174054A1 (de) |
| EP (1) | EP2041783A2 (de) |
| JP (1) | JP2009544159A (de) |
| KR (1) | KR20090051740A (de) |
| CN (1) | CN101490832A (de) |
| DE (1) | DE102006033222B4 (de) |
| WO (1) | WO2008009262A2 (de) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877337A (zh) * | 2009-04-30 | 2010-11-03 | 日亚化学工业株式会社 | 半导体装置及其制造方法 |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100181675A1 (en) * | 2009-01-16 | 2010-07-22 | Infineon Technologies Ag | Semiconductor package with wedge bonded chip |
| JP2012205093A (ja) * | 2011-03-25 | 2012-10-22 | Nippon Dempa Kogyo Co Ltd | 発振器 |
| JP2013084848A (ja) * | 2011-10-12 | 2013-05-09 | Asahi Kasei Electronics Co Ltd | 半導体装置及びワイヤーボンディング方法 |
| CN103378043A (zh) * | 2012-04-25 | 2013-10-30 | 鸿富锦精密工业(深圳)有限公司 | 芯片组装结构及芯片组装方法 |
| CN103236421A (zh) * | 2013-04-23 | 2013-08-07 | 山东泰吉星电子科技有限公司 | 芯片pad点之间的铜线键合结构及其键合方法 |
| JP2018137342A (ja) | 2017-02-22 | 2018-08-30 | 株式会社村田製作所 | 半導体装置及びその製造方法 |
| DE102019215471B4 (de) * | 2019-10-09 | 2022-05-25 | Vitesco Technologies GmbH | Elektronisches Bauteil mit einer Kontaktieranordnung und Verfahren zur Herstellung eines elektronischen Bauteils |
| CN111933605A (zh) * | 2020-08-10 | 2020-11-13 | 紫光宏茂微电子(上海)有限公司 | 芯片焊接结构及焊接方法 |
| CN113192854A (zh) * | 2021-06-07 | 2021-07-30 | 季华实验室 | 一种低封装厚度的板级扇出型mosfet器件及其制作方法 |
| IT202200022440A1 (it) * | 2022-11-02 | 2024-05-02 | St Microelectronics Srl | Procedimento di fabbricazione per dispositivi a semiconduttore |
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| NL184184C (nl) * | 1981-03-20 | 1989-05-01 | Philips Nv | Werkwijze voor het aanbrengen van kontaktverhogingen op kontaktplaatsen van een electronische microketen. |
| JPS5944836A (ja) * | 1982-09-07 | 1984-03-13 | Sumitomo Metal Mining Co Ltd | ワイヤ−ボンデイング方法 |
| JPH0719964B2 (ja) * | 1990-08-08 | 1995-03-06 | 日本電気株式会社 | 銀系配線セラミック基板 |
| DK0569801T3 (da) * | 1992-05-12 | 1998-02-23 | Siemens Ag | Flerlags-printplade |
| US5291061A (en) * | 1993-04-06 | 1994-03-01 | Micron Semiconductor, Inc. | Multi-chip stacked devices |
| US5735030A (en) * | 1996-06-04 | 1998-04-07 | Texas Instruments Incorporated | Low loop wire bonding |
| US6333562B1 (en) * | 2000-07-13 | 2001-12-25 | Advanced Semiconductor Engineering, Inc. | Multichip module having stacked chip arrangement |
| JP4439090B2 (ja) * | 2000-07-26 | 2010-03-24 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置及びその製造方法 |
| US6441501B1 (en) * | 2000-09-30 | 2002-08-27 | Siliconware Precision Industries Co., Ltd. | Wire-bonded semiconductor device with improved wire arrangement scheme for minimizing abnormal wire sweep |
| US6564449B1 (en) * | 2000-11-07 | 2003-05-20 | Advanced Semiconductor Engineering, Inc. | Method of making wire connection in semiconductor device |
| TW465064B (en) * | 2000-12-22 | 2001-11-21 | Advanced Semiconductor Eng | Bonding process and the structure thereof |
| KR100401020B1 (ko) * | 2001-03-09 | 2003-10-08 | 앰코 테크놀로지 코리아 주식회사 | 반도체칩의 스택킹 구조 및 이를 이용한 반도체패키지 |
| KR20030018204A (ko) * | 2001-08-27 | 2003-03-06 | 삼성전자주식회사 | 스페이서를 갖는 멀티 칩 패키지 |
| US20030222338A1 (en) * | 2002-01-04 | 2003-12-04 | Sandisk Corporation | Reverse wire bonding techniques |
| KR20030075860A (ko) * | 2002-03-21 | 2003-09-26 | 삼성전자주식회사 | 반도체 칩 적층 구조 및 적층 방법 |
| US8531045B2 (en) * | 2002-09-19 | 2013-09-10 | Optitune Public Limited Company | Component packaging and assembly |
| KR100616435B1 (ko) * | 2002-11-28 | 2006-08-29 | 삼성전자주식회사 | 반도체 패키지 및 그를 적층한 적층 패키지 |
| WO2004105133A1 (en) * | 2003-05-26 | 2004-12-02 | Axalto Sa | Wire bonding on in-line connection pads |
| WO2004107422A2 (en) * | 2003-05-27 | 2004-12-09 | Ebara Corporation | Plating apparatus and plating method |
| US20050095835A1 (en) * | 2003-09-26 | 2005-05-05 | Tessera, Inc. | Structure and method of making capped chips having vertical interconnects |
| US20050154105A1 (en) * | 2004-01-09 | 2005-07-14 | Summers John D. | Compositions with polymers for advanced materials |
| US7597231B2 (en) * | 2006-04-10 | 2009-10-06 | Small Precision Tools Inc. | Wire bonding capillary tool having multiple outer steps |
-
2006
- 2006-07-18 DE DE102006033222.9A patent/DE102006033222B4/de not_active Expired - Fee Related
-
2007
- 2007-06-29 WO PCT/DE2007/001155 patent/WO2008009262A2/de not_active Ceased
- 2007-06-29 CN CNA2007800269887A patent/CN101490832A/zh active Pending
- 2007-06-29 KR KR1020097003246A patent/KR20090051740A/ko not_active Withdrawn
- 2007-06-29 JP JP2009519785A patent/JP2009544159A/ja not_active Withdrawn
- 2007-06-29 EP EP07785583A patent/EP2041783A2/de not_active Withdrawn
-
2009
- 2009-01-12 US US12/352,436 patent/US20090174054A1/en not_active Abandoned
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877337A (zh) * | 2009-04-30 | 2010-11-03 | 日亚化学工业株式会社 | 半导体装置及其制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2041783A2 (de) | 2009-04-01 |
| DE102006033222B4 (de) | 2014-04-30 |
| JP2009544159A (ja) | 2009-12-10 |
| KR20090051740A (ko) | 2009-05-22 |
| DE102006033222A1 (de) | 2008-01-24 |
| WO2008009262A3 (de) | 2008-04-03 |
| US20090174054A1 (en) | 2009-07-09 |
| CN101490832A (zh) | 2009-07-22 |
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