[go: up one dir, main page]

WO2008091910A2 - Composite wafers having bulk-quality semiconductor layers - Google Patents

Composite wafers having bulk-quality semiconductor layers Download PDF

Info

Publication number
WO2008091910A2
WO2008091910A2 PCT/US2008/051733 US2008051733W WO2008091910A2 WO 2008091910 A2 WO2008091910 A2 WO 2008091910A2 US 2008051733 W US2008051733 W US 2008051733W WO 2008091910 A2 WO2008091910 A2 WO 2008091910A2
Authority
WO
WIPO (PCT)
Prior art keywords
layer
semiconductor crystal
diamond
synthetic diamond
bulk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2008/051733
Other languages
French (fr)
Other versions
WO2008091910A3 (en
Inventor
Daniel Francis
Felix Ejeckam
John Wasserbauer
Firooz Faili
Dubravko Babic
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Group4 Labs Inc
Original Assignee
Group4 Labs Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Group4 Labs Inc filed Critical Group4 Labs Inc
Publication of WO2008091910A2 publication Critical patent/WO2008091910A2/en
Publication of WO2008091910A3 publication Critical patent/WO2008091910A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16Measuring radiation intensity
    • G01T1/24Measuring radiation intensity with semiconductor detectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02387Group 13/15 materials
    • H01L21/02389Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/02444Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02527Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H10P14/2908
    • H10P14/3206
    • H10P14/3211
    • H10P14/3238
    • H10P14/3248
    • H10P14/3406
    • H10P14/3451
    • H10P14/38
    • H10P90/1916
    • H10W10/181
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/021Manufacture or treatment of image sensors covered by group H10F39/12 of image sensors having active layers comprising only Group III-V materials, e.g. GaAs, AlGaAs or InP
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018Bonding of wafers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/30Self-sustaining carbon mass or layer with impregnant or other layer

Definitions

  • the present invention relates to the manufacture of bulk-quality semiconductor thin films on synthetic diamond by transferring mentioned semiconductor films from bulk single- crystal semiconductor wafer onto synthetic diamond substrate The transfer of said semiconductor layer may be repeated so that a multiplicity of diamond substrates with atomically attached semiconductor layers are manufactured from a single bulk semiconductor wafer More specifically, this invention is related to gallium mtnde semiconductor thin films and bulk-grown wafers
  • Gallium mtnde (GaN) films are typically grown using metal-organic chemical vapor deposition (MOCVD) process on one of several available substrates
  • MOCVD metal-organic chemical vapor deposition
  • sapphire hexagonal aluminum oxide
  • sapphire silicon
  • SiC silicon carbide
  • AlN aluminum mtnde Due to the lattic
  • Dislocation density measured in number of dislocations per unit area, is an essential property of single-crystal semiconductor surfaces for manufacturing of optical and electronic devices
  • a dislocation density lower than 1E6 cm-2 is considered low, while dislocation densities of 1E4 cm-2 are considered very low and are presently common in, for example, commercially available gallium arsenide wafers, but can be obtained in gallium mt ⁇ de as well
  • Other properties relevant to growth of epitaxial layers are macroscopic defect density, which is typically below 25 cm-2 and full-width half maximum (FWHM) of double-crystal X-ray rocking curves, which for high-quality gallium nit ⁇ de is below 100 arcsec Dislocation densities as low as 1E4 cm-2 can be
  • Thermal management in semiconductor devices and circuits is a c ⁇ tical design element in any manufacturable and cost-effective electronic and optoelectronic product This is more so the case with high power devices, such as, high-brightness light-emitting diodes, high-power lasers, output-stage elect ⁇ cal signal amplification in microwave devices, and power electronics
  • the goal of an efficient thermal design is to lower the operating temperature of such electronic or optoelectronic devices while maximizing performance (power and speed) and reliability
  • Gallium nitride material system has been used recently to fab ⁇ cate microwave transistors with high-electron mobility (necessary for high-speed operation), high breakdown voltage (necessary for high power), and relatively high thermal conductivity (greater than GaAs, InP)
  • Gallium mt ⁇ de devices have also been investigated for light-emitting diodes for solid-state illumination as well as for medical and environmental laser applications Because GaN devices offer high current density and high voltage operation, they exhibit larger total power losses
  • the present invention relates to a process for producing thin single-crystal semiconductor-material film of predetermined thickness atomically attached to synthetic diamond substrate in which said semiconductor film is detached or "peeled" from a host bulk-semiconductor substrate and remains attached to the new synthetic diamond substrate
  • the host bulk-semiconductor substrate is thinner by the amount approximately equal to the removed film thickness and after suitable surface cleaning and preparation is available to be re-used in the same process again, namely, another thin film of predetermined thickness can be removed from its surface
  • the invented process results in a composite substrate compnsing high-quality single-crystal semiconductor films atomically attached to highly thermally conductive and electrically insulating substrates at a per-substrate cost that is a fraction of the same semiconductor layers made in bulk form or built on a compatible bulk host wafer
  • the invented method can be applied to other crystals for which bulk wafers exist, but the bulk wafer cost is high or the wafer availability is limited
  • the dislocation density in bulk gallium mtnde wafers can reach as low as 1 0E4 cm-2 and is hence significantly lower than dislocation density exhibited by layers of gallium mtnde grown on present-day substrates like sapphire, silicon, and silicon carbide, where defect density can be as high as 1 0E9 cm-2
  • the low dislocation density is suitable and hence highly desired today, for the manufacture of high-performance semiconductor devices
  • traditional bulk growth such as is used for silicon crystal growth
  • the crystal is grown from a melt into a boule of single crystal This boule, which for silicon can weigh several tons, is then cut into wafers
  • the requirement of high vapor pressure of nitrogen at the melting temperature of gallium mtnde makes growth from a melt impractical and other methods have been investigated for this purpose
  • One method of growing bulk GaN is hydnde vapor phase epitaxy (HVPE) and it has been used to successfully demonstrate optical and elect ⁇ cal devices on such bulk gallium nit ⁇ de wafers
  • the growth of synthetic diamond includes a nucleation phase in which conditions on the surface of the substrate are adjusted to enhance the formation of diamond crystals on the surface
  • a nucleation phase in which conditions on the surface of the substrate are adjusted to enhance the formation of diamond crystals on the surface
  • a nucleation density greater than 1 0E7 nuclei/cm2 is desirable
  • Examples of deposited thin nucleatmg-layer matenals are amorphous silicon mtnde and amorphous silicon carbide Other amorphous or polycrystalline matenals may be used without the departing from the scope of the present invention Examples are silicon and other wide-gap semiconductor matenals
  • the separation of the thin film of predetermined thickness from the bulk of the gallium nitride substrate (or boule) is accomplished by creating a layer within the body of the gallium mt ⁇ de substrate at a predetermined depth away from the surface in which the crystal is weakened by damage induced by ion implantation
  • the damaged layer defines two regions in the o ⁇ ginal bulk crystal the first is the region in gallium nit ⁇ de between the top surface and the damaged layer (referred to as the "thin film"), while the second region is the remaining bulk of crystal below the damaged layer
  • Similar approach to damage is used in silicon-on-insulator manufacturing [12]
  • Reports of creating amorphous and porous gallium nit ⁇ de [4] imply that implantation of various species at very high dosages especially light atoms, such as hydrogen, are able to create bubbles and voids within the gallium nit ⁇ de crystal The presence of the bubbles which coalesce into larger voids as it becomes energetically favorable weakens the crystal When aided by
  • Atomic density of GaN is 9E10 cm-3
  • hydrogen can be redist ⁇ aded and/or lost if the wafer is exposed to
  • the surface of the gallium nitride is
  • the coating of GaN prevents the decomposition of the gallium nitnde
  • the GaN is
  • the forces pulling the thin film off the substrate and the maintaining of the film's mechanical integrity are provided by the adhesion of the synthetic diamond to the gallium nitride film via the intermediate nucleation layer.
  • the detachment may occur during the growth of the synthetic diamond.
  • the growth of the synthetic diamond layers is adapted to meet several constraints (a) The growth rate of the majo ⁇ ty of the diamond layers has to be high (greater than 1 ⁇ m/hr) to be practical, (b) The growth temperature has to prevent the premature detachment of the thin gallium nitride film.
  • Premature means that the film detaches before the diamond layer is sufficiently thick to maintain the film's mechanical integrity through the entire growth
  • the growth temperature has to be adjusted so as not to allow significant loss of hydrogen or other gasses from the implanted areas
  • the growth of diamond is may be split into more than one step
  • a thin initial layer of synthetic diamond is grown p ⁇ or to the implantation and then a stiffening layer and then a bulk layer of diamond are grown after the implantation.
  • the diamond growth is nucleated prior to the implantation under conditions that facilitate quality nucleation and initial rigidity of the diamond film.
  • the initial diamond layer can be as thin as several nanometers, but its stability improves with the thickness hence thicknesses of several micrometers are possible.
  • Diamond thickness of 150 nm was used to simulate the hydrogen implantation profile for this embodiment in Figure 5.
  • the conditions for growth of the diamond stiffener layer are adjusted so that the temperature does not impact the implanted species or the detachment of the gallium nit ⁇ de film This means keeping the temperature below 600°C and a low growth rate.
  • the thickness of the diamond stiffener layer is determined by the desired rigidity of the diamond layer p ⁇ or to raising the temperature for high growth rate step: the stiffener layer may be several micrometers thick.
  • the conditions for growing the bulk diamond layer are optimized for high growth rate and consequently higher temperature (above 600 0 C).
  • the majority of the diamond layer (the "bulk" of the new substrate) is grown during this stage
  • it is possible to change the CVD energy source namely, is possible to change the deposition process method between these three diamond layers.
  • microwave plasma is used at low temperature for the stiffener diamond layer, while hot filament is used for the initial and the bulk layers.
  • the stiffener and the bulk layers become one composite layer referred to as a bulk diamond layer
  • the synthetic diamond growth commences with the stiffener diamond layer after the implantation at a temperature and method that sustains the stability of the thin GaN film This means growing a low-temperature diamond ( ⁇ 600C) for at least some of the growth time, and then raising the temperature to a higher growth rate to grow the bulk diamond layer
  • a low-temperature diamond ⁇ 600C
  • microwave plasma is used at low temperature to growth the first one or more micrometers of the diamond (“stiffener diamond layer”) and then a different method and/or higher temperature is used to increase the growth rate du ⁇ ng the later stage (“bulk diamond layer")
  • Any of the diamond growth techniques descnbed above may be used to nucleate and growth the synthetic diamond without departing from the spi ⁇ t of the invention Du ⁇ ng the growth or the cool down stage of the diamond layers the diamond layers will de
  • the surface of the thin GaN film on diamond is now prepared for further processing as ultimately optical or electronic devices will be manufactured on it
  • the surface remains rough and contaminated and/or reconstructed with a high concentration of the implanted species after the detachment process
  • the root-mean-square roughness preferred for gallium mtnde crystal growth is below 0 5 nm
  • CMP chemical-mechanical polish
  • Implanted species are known to either create deep levels or passivate the shallow dopants in gallium mtnde and hence adversely impact the electronic and optical properties of the semiconductor films Similar effects arise from the presence of remaining damage to the crystal lattice caused by detachment or high-dose implant
  • the damaged mate ⁇ al around the GaN thin film broken-off surface of gallium mt ⁇ de is removed p ⁇ or to further processing This task is accomplished by a combination of chemical mechanical polish (CMP), ion milling, and heat treatment to out-
  • CMP chemical mechanical polish
  • the surface of the remaining substrate is rough and contaminated with implanted species in much the same manner as the previously descnbed thin film of gallium nit ⁇ de
  • the cleanup and smoothing processes are basically the same as descnbed above for the thin gallium nitride film
  • the requirement on the finished surface roughness is different This surface must be ready for the deposition of another nucleation layer and hence larger surface roughness is desired
  • a root-mean-square roughness of more than 1 run is preferred to provide greater adhesion to silicon nit ⁇ de or similar materials
  • the removal of excess implanted species is required in order to prevent adversely impacting the adhesion of the new nucleation layer
  • the remaining gallium nit ⁇ de substrate is inserted again into the process at the beginning
  • the presented process is applied to the creation of GaAs, InP, SiC, and other semiconductor thin films on synthetic diamond
  • Figure 1 Method for producing thin film of semiconductor film on a synthetic diamond substrate
  • Figure 2 Cleaning and smoothing of thin film of semiconductor film on a synthetic diamond substrate 1
  • Figure 3 Cleaning and surface preparation of remaining substrate for nucleation of
  • a bulk gallium mt ⁇ de wafer 101 is
  • the wafer 101 has a planar surface 102 and whose plane is either substantially
  • the surface 102 of the gallium mtnde substrate is prepared for
  • 29 102 is prepared by polishing
  • the preferred root-mean-square roughness of surface 102 is at
  • the surface preparation required in this step 110 is equivalent to the one described in the last steps of the recycled gallium nit ⁇ de wafer cleaning 300 through 320 (desc ⁇ bed later)
  • the back surface 103 of the wafer 101 may or may not be polished
  • a nucleation layer 111 is deposited on surface 102 of the wafer 101
  • the purpose of the nucleation layer is to facilitate the efficient nucleation and growth of CVD diamond in a later step
  • the selection of nucleating-layer mate ⁇ al and its thickness is based on its ability to serve as a nucleating layer for synthetic diamond growth, the quality of its adhesion to gallium nit ⁇ de, its thermal conductivity and expansion coefficients
  • the thickness of the nucleation layer 1 11 is determined by several requirements (a) Silicon nit ⁇ de and other mate ⁇ als that may be used for nucleation have thermal conductivities that are significantly lower that than that of synthetic diamond When the designer of the composite wafer structure desires devices with high thermal conductance, then the upper bound on the thickness of the nu
  • Region 620 represents first CVD diamond grown on surface 603 As the growth
  • step 150 the bulk diamond layer 151 is deposited at an elevated temperature
  • the thickness of completed bulk diamond layer ranges from several tens of
  • the resulting structure 153 is a composite structure which, du ⁇ ng the thermal
  • step 160 the separation of the structure 153 occurs This is illustrated in step 160
  • 21 contains a thin gallium mt ⁇ de film 166 attached to a diamond substrate and has a revealed
  • step 170 the composite wafer 165, in which a thin gallium nit ⁇ de layer is
  • top surface 162 is the gallium nit ⁇ de
  • step 180 the remaining gallium nit ⁇ de wafer 164 with top surface 163 and back
  • steps 300, 310, and 320 the remaining gallium mt ⁇ de wafer 164 is cleaned and polished again to be recycled
  • the surface 163 is rough and contaminated with a high concentration of the implanted species after the detachment process Majo ⁇ ty of the roughness, contamination, and damage at the broken-off surface of gallium mt ⁇ de must be removed prior to recycling the wafer
  • This task is performed by first d ⁇ ving out the remaining impurities by out-diffusion at an elevated temperature approaching 1000 0 C shown with cloud 301 in step 300, followed by chemical mechanical polish (CMP) shown with arrows 311 in step 310
  • CMP chemical mechanical polish
  • the surface 321 of the new gallium mt ⁇ de wafer must be ready for the deposition of another nucleation layer with high adhesion energy and hence some surface roughness is desired
  • the desired root-mean-square roughness of surface 321 is at least 10 nm This is sufficient to provide good adhesion to silicon mt ⁇ de or similar materials
  • the manufacturing steps include, but are not
  • the new epitaxial layers 222 are optical or electronic devices.
  • the new epitaxial layers 222 are formed by the new epitaxial layers 222 .
  • 6 grown layers 222 comprise a basis for a light-emitting diode or diodes.
  • the newly grown layers 222 comprise a basis for a variety of electronic and
  • optical devices such as, high-electron mobility transistors, heterojunction bipolar transistors,
  • 11 embodiment is different from the process disclosed in Figure 7a in that the implantation (step
  • step 140 the stiffener diamond layer (step 140) is deposited under conditions that ensure high
  • Figure 9 shows four embodiments of completed composite wafers in accordance with
  • Composite wafer 910 comprises a thin film of bulk-grown gallium nitride
  • the composite wafer may be
  • topmost layer 912 (gallium nit ⁇ de) may be processed to fab ⁇ cate optical or electronic
  • Composite wafer 920 comprises a thin film of bulk-grown gallium nit ⁇ de 922, a
  • the composite wafer may be mounted on another substrate without departing
  • Composite wafer 930 comprises an epitaxially grown semiconductor layered structure
  • the composite wafer may be mounted on another substrate without departing from
  • the topmost layer 931 may contain gallium nit ⁇ de, aluminum
  • 20 (revealed) surface of the layer 931 may be processed to fab ⁇ cate optical or electronic devices
  • Composite wafer 940 comp ⁇ ses an epitaxially grown semiconductor layered structure
  • the composite wafer may
  • topmost layered structure 941 may contain gallium nit ⁇ de, aluminum rutnde, indium nit ⁇ de,
  • 28 941 may be processed to fabncate optical or electronic devices

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Molecular Biology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

Method for producing composite wafers with thin high-quality semiconductor films atomically attached to synthetic diamond wafers is disclosed. Synthetic diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited on bulk semiconductor wafer which has been prepared to allow separation of the thin semiconductor film from the remaining bulk semiconductor wafer. The remaining semiconductor wafer is available for reuse. The synthetic diamond substrate serves as heat spreader and a mechanical substrate.

Description

COMPOSITE WAFERS HAVING BULK-QUALITY SEMICONDUCTOR LAYERS AND METHOD OF MANUFACTURING THEREOF
RELATED APPLICATIONS This application claims benefit of U S Provisional Patent Application Senal No 60/881,951 filed January 22, 2007
FIELD OF THE INVENTION
The present invention relates to the manufacture of bulk-quality semiconductor thin films on synthetic diamond by transferring mentioned semiconductor films from bulk single- crystal semiconductor wafer onto synthetic diamond substrate The transfer of said semiconductor layer may be repeated so that a multiplicity of diamond substrates with atomically attached semiconductor layers are manufactured from a single bulk semiconductor wafer More specifically, this invention is related to gallium mtnde semiconductor thin films and bulk-grown wafers
BACKGROUND OF THE INVENTION
Gallium mtnde (GaN) films are typically grown using metal-organic chemical vapor deposition (MOCVD) process on one of several available substrates The historically first and most common substrate mateπal used for growing GaN has been sapphire (hexagonal aluminum oxide) [11] Although many good gallium-mtπde electronic and optoelectronic devices have been grown on sapphire, this crystal is not lattice matched GaN, which results in grown films with relatively high dislocation density Furthermore, sapphire has low thermal conductivity with respect to GaN and many other substrates used for growth of GaN layers Consequently, a substantial improvement in device performance is expected with the development of gallium nitride on other substrates that are better lattice-matched substrates and have high thermal conductivity Other substrates commonly used that have better thermal conductivity than sapphire, but are still not lattice-matched to GaN are silicon (Si), silicon carbide (SiC), and aluminum mtnde (AlN) Due to the lattice mismatch the dislocation density of GaN films grown on above mentioned substrates is high - greater than 1 E9 cm-2 in some cases This is a significant disadvantage for the development of high-performance semiconductor devices that require dislocation densities less than 1E6 cm-2 to realize high mobility and/or low non-radiative recombination rates
Growth of low dislocation-density gallium nitride
Growth of GaN crystal on wafers that are not lattice-matched to GaN results in dislocations embedded in the film These dislocations terminate at the top surface of the grown structure where the electronic or optoelectronic devices are formed, thereby adversely affecting the performance of electronic and optical devices Dislocation density, measured in number of dislocations per unit area, is an essential property of single-crystal semiconductor surfaces for manufacturing of optical and electronic devices A dislocation density lower than 1E6 cm-2 is considered low, while dislocation densities of 1E4 cm-2 are considered very low and are presently common in, for example, commercially available gallium arsenide wafers, but can be obtained in gallium mtπde as well Other properties relevant to growth of epitaxial layers are macroscopic defect density, which is typically below 25 cm-2 and full-width half maximum (FWHM) of double-crystal X-ray rocking curves, which for high-quality gallium nitπde is below 100 arcsec Dislocation densities as low as 1E4 cm-2 can be obtained with GaN layers growing on bulk GaN wafers High quality electronic and optical devices can then be grown on top of such wafers using MOCVD [2] The disadvantage of bulk GaN wafers is their high cost [1] They are grown either in boules [16] (similar to silicon, however, the boules are significantly smaller than those used to grow silicon or gallium arsenide due to process limitations) or as thick epitaxial layers on sapphire substrates where the substrate is later removed Each wafer of bulk GaN today costs almost one hundred times more than the wafers conventionally used for GaN growth, for example, sapphire Each device coming from such a wafer hence carries a significant cost of mateπal (the bulk GaN wafer) most of which is actually not being used Only the top surface of the gallium nitπde wafer is used for growing active devices, the vast majoπty of the wafer volume is used as a earner and not for its electronic properties - it is thereby wasted It is clear that there is a need m the industry to provide layers of bulk-quality gallium nitπde with low dislocation density for growth of active devices, but at a cost that is comparable or lower than that of present conventional GaN substrates and preferably at a cost that is comparable to that of silicon Additionally, a process that would allow the use of thin films of bulk-grown GaN rather than wasting an entire wafer for a single layer of devices would be preferred
Thermal management
Thermal management in semiconductor devices and circuits is a cπtical design element in any manufacturable and cost-effective electronic and optoelectronic product This is more so the case with high power devices, such as, high-brightness light-emitting diodes, high-power lasers, output-stage electπcal signal amplification in microwave devices, and power electronics The goal of an efficient thermal design is to lower the operating temperature of such electronic or optoelectronic devices while maximizing performance (power and speed) and reliability Gallium nitride material system has been used recently to fabπcate microwave transistors with high-electron mobility (necessary for high-speed operation), high breakdown voltage (necessary for high power), and relatively high thermal conductivity (greater than GaAs, InP) Gallium mtπde devices have also been investigated for light-emitting diodes for solid-state illumination as well as for medical and environmental laser applications Because GaN devices offer high current density and high voltage operation, they exhibit larger total power losses due to parasitic resistances and the inefficiency inherent to the amplification process Although bulk GaN has low defect density, its applications in high power electronics and high-bnghtness light-emitting diodes is still limited by high temperature resulting from high power dissipation These devices still require better thermal properties than GaN can offer Gallium mtπde thermal conductivity (1 3-2 25 W/Kcm) is lower than that of silicon carbide (3 5 W/Kcm) In all of these applications, heat removal has conventionally been accomplished by placing the electronic device, optical device or integrated circuit on top of a heat sink [5] A heat sink is a substrate or device for the absorption or dissipation of unwanted heat (as from a process or an electronic device) Most often, the heat sinks are copper blocks attached to a water-cooling system, aluminum fins, or a micro-channel cooler Synthetic diamond heat sinks are being actively investigated because of diamond's supeπor thermal properties in respect to all other mateπals in nature [5] Conventional heat removal systems for transistors and light-emitting devices (based on bonding and attaching devices to heat sinks) are typically large in compaπson with the heat source in the electronic chip or individual device and as described next offer limited thermal performance improvement The efficiency of heat extraction from very small heat sources (such as a channel in a high-electron mobility transistor) critically depends on the ability to spread the heat flow to a larger area, because majority of the temperature drop occurs in the immediate proximity of three-dimensional heat source A heat spreader (or heat sink) of high thermal conductivity is most efficient when the distance between the heat source and the heat spreader is smaller than the lateral dimension of the heat source The heat sources in electronic devices are typically several micrometers wide, while the wafers on which these devices are grown are at least 100 um thick This means that when wafers with such devices are mounted on heat sinks, this abovementioned efficiency condition is generally not met One exception to this structure is the case when the devices are mounted upside down on heat sinks, but this approach increases the manufacturing process complexity and is used only in limited number of situations It is clear therefore that there is a need in the industry to provide means for high- efficient thermal management of high-power devices by providing means to integrate electronic devices with very highly conductive matenals, such as, synthetic diamond This invention discloses such devices and processes
SUMMARY OF THE INVENTION
The present invention relates to a process for producing thin single-crystal semiconductor-material film of predetermined thickness atomically attached to synthetic diamond substrate in which said semiconductor film is detached or "peeled" from a host bulk-semiconductor substrate and remains attached to the new synthetic diamond substrate As a result, the host bulk-semiconductor substrate is thinner by the amount approximately equal to the removed film thickness and after suitable surface cleaning and preparation is available to be re-used in the same process again, namely, another thin film of predetermined thickness can be removed from its surface The invented process results in a composite substrate compnsing high-quality single-crystal semiconductor films atomically attached to highly thermally conductive and electrically insulating substrates at a per-substrate cost that is a fraction of the same semiconductor layers made in bulk form or built on a compatible bulk host wafer The invented method can be applied to other crystals for which bulk wafers exist, but the bulk wafer cost is high or the wafer availability is limited The thickness of the thin single-crystal semiconductor mateπal films vanes from several nanometers to several micrometers Specifically, the invention relates to the production of thm films of bulk-quality gallium mtnde on synthetic diamond substrates wherein synthetic diamond is grown by chemical vapor deposition method The thin films of bulk-quality gallium mtnde may be "peeled" from commercially available bulk gallium mtnde wafers, but may also be "peeled" directly from bulk gallium mtnde boules to reduce kerf loss Additionally, the only way to take full advantage of a high-thermally conductive matenal as a heat spreader is to integrate this matenal just below the heat source by atomic bonding or attachment Two example ways in which the high thermal conductivity matenal can be integrated are by atomic bonding or attachment In other words, to use a highly thermally-conductive substrate that is positioned within a few nanometers to a few micrometer of the heat source In this invention, the distance between the heat source and the diamond heat spreader may be as low as several tens of nanometers, which is typically less than the size of the heat source This is the optimal approach to thermal management of semiconductor devices
Bulk gallium mtnde
The dislocation density in bulk gallium mtnde wafers can reach as low as 1 0E4 cm-2 and is hence significantly lower than dislocation density exhibited by layers of gallium mtnde grown on present-day substrates like sapphire, silicon, and silicon carbide, where defect density can be as high as 1 0E9 cm-2 The low dislocation density is suitable and hence highly desired today, for the manufacture of high-performance semiconductor devices In traditional bulk growth, such as is used for silicon crystal growth, the crystal is grown from a melt into a boule of single crystal This boule, which for silicon can weigh several tons, is then cut into wafers The requirement of high vapor pressure of nitrogen at the melting temperature of gallium mtnde makes growth from a melt impractical and other methods have been investigated for this purpose One method of growing bulk GaN is hydnde vapor phase epitaxy (HVPE) and it has been used to successfully demonstrate optical and electπcal devices on such bulk gallium nitπde wafers The present disadvantage of bulk GaN growth is that the boules are significantly smaller than those used to grow silicon or gallium arsenide due to process limitations Consequently, the number of wafers per boule is significantly smaller than for other semiconductors for which the boules are produced from melts Each wafer of bulk GaN today costs almost one hundred times more than the conventional substrates used for GaN growth or other III-V semiconductors, such as, gallium arsenide Hence, each electronic or optical device coming from such a wafer carries a significant cost of substrate mateπal (the bulk GaN wafer) It is further quite inefficient that most of the wafer is not being used to manufacture devices, it is used only as a support, i e , a substrate Namely, only the top surface of the gallium nitπde wafer is used for growing active devices, the vast majoπty of the wafer volume is used as a earner and not for its electronic properties - it is hence wasted The invented process comprises atomically attaching a synthetic diamond layer or layers to the surface of bulk GaN wafer that has been specially prepared by ion implantation and then "peeling" off a thin layer of bulk-quality GaN that is adjacent to the synthetic diamond layer(s) from the bulk GaN wafer The remaining bulk GaN substrate, after suitable cleaning and polishing, can be reused to peel another layer off the surface In this way almost all of the bulk-grown GaN in the substrate is being used for growth and creation of high- performance devices, resulting substantially lower cost per device wafer and substantially higher quality GaN films available for device manufacturing that conventional methods in which GaN is grown on lattice-mismatched substrates (eg sapphire and silicon)
Synthetic Diamond
There are vaπous methods manufacturing synthetic diamond The two most important are High Pressure High Temperature (HPHT) method, which creates bulk crystals, and chemical vapor deposition (CVD), which is generally used to create films [15] In the latter technology, employed in this invention, carbon plasma is created above a substrate resulting in carbon atoms depositing to form diamond The energy source for the deposition may involve microwave plasma, high-voltage arc, hot filament, or a combination of any listed methods The deposition uses a gas carbon source (most often methane) and hydrogen, occurs at a pressure of several thousand Pa, and an elevated substrate temperature exceeding 400°C Synthetic diamond deposited by chemical-vapor deposition for the purpose of this application may be polycrystalline This matenal has thermal conductivity similar to that of single crystal diamond In the CVD process a substrate on top of which synthetic diamond is to be deposited is placed in a vacuum chamber, where methane and hydrogen are introduced and activated using either microwave plasma, hot filament, or a high-voltage arc The deposition of diamond in chemical vapor deposition depends strongly on temperature The higher the temperature, the faster the growth At 5000C the growth rates of hot-filament CVD diamond range can be below 1000 ran per hour, while above 8000C the growth rate may reach several hundred micrometers per hour [15]
The growth of synthetic diamond includes a nucleation phase in which conditions on the surface of the substrate are adjusted to enhance the formation of diamond crystals on the surface There is a number of ways of nucleating diamond growth on a substrate scratching the surface with a fine diamond powder, biasing the substrate against the hot filament (used to in the CVD process), implanting the surface with a vaπety of species, or by depositing a thin film that adheres well to the host substrate and is known to efficiently nucleate diamond on top of the substrate A nucleation density greater than 1 0E7 nuclei/cm2 is desirable Examples of deposited thin nucleatmg-layer matenals are amorphous silicon mtnde and amorphous silicon carbide Other amorphous or polycrystalline matenals may be used without the departing from the scope of the present invention Examples are silicon and other wide-gap semiconductor matenals Rather than depositing the nucleation layer in a separate process step, the surface may be prepared for synthetic diamond nucleation by ending the growth of a wide-gap semiconductor layered structure with a layer specifically formed to nucleate synthetic diamond The choice of matenals is a wide-gap semiconductor, such as, aluminum mtnde or silicon carbide, that may be crystalline or polycrystalline An improper choice of nucleating film results in highly stressed films, large grain size and low nucleation density Surface roughness is an important parameter determining the adhesion of the nucleation layer and the nucleation process itself Polycrystalline synthetic-diamond layers are electncally insulating and highly thermally conductive, and hence such substrates are desired in the semiconductor industry as heat spreaders, heat sinks and substrates for the manufacture of high-speed and high-power electronic devices The high electrical resistivity of the synthetic diamond is advantageous for high-frequency devices because it provides a substrate with low conductive losses
Implantation of GaN
The separation of the thin film of predetermined thickness from the bulk of the gallium nitride substrate (or boule) is accomplished by creating a layer within the body of the gallium mtπde substrate at a predetermined depth away from the surface in which the crystal is weakened by damage induced by ion implantation The damaged layer defines two regions in the oπginal bulk crystal the first is the region in gallium nitπde between the top surface and the damaged layer (referred to as the "thin film"), while the second region is the remaining bulk of crystal below the damaged layer Similar approach to damage is used in silicon-on-insulator manufacturing [12] Reports of creating amorphous and porous gallium nitπde [4] imply that implantation of various species at very high dosages especially light atoms, such as hydrogen, are able to create bubbles and voids within the gallium nitπde crystal The presence of the bubbles which coalesce into larger voids as it becomes energetically favorable weakens the crystal When aided by temperature and external forces the thin film of material will detach from the bulk substrate along the weakened layer The detachment is aided by both the forces from within the crystal and from the outside The thickness of the detached (and transferred) thin gallium nitnde film is determined by the range of implanted species into gallium nitπde The depth of the peak implanted ion distribution determines the location of highest concentration of damage The crystal will break along the depth that is substantially determined by the peak concentration of the implanted species The desired thickness of the detached film can range from 10 nm to 1000 nm, and depending on the implanted species and energy The creation of porous GaN and GaN with gas bubbles is possible with high dose implantation of hydrogen and nitrogen [7] It is preferred that the atoms implanted are light atoms, i e , generally of the order of or lighter than the atoms forming the lattice (gallium and nitrogen) not to damage and/or erode the surface of gallium nitπde wafer The implanted species include hydrogen, other gas ions, and noble gases, such as, helium Implantation angle less than 10° relative to a pπncipal 1 crystal axis is preferred in order to limit surface damage [3] (most common axis in hexagonal
2 GaN is the c-axis) For hydrogen, for an example, the implantation of more than 1% atomic
3 hydrogen in the lattice results in the appearance of bubbles [4], and hence concentrations
4 higher than that are necessary to allow detachment Atomic density of GaN is 9E10 cm-3,
5 which means that hydrogen peak density will have to exceed 1E12 cm-3 Figure 5 shows an
6 example of a SRIM [9] calculation for a structure that includes silicon mtπde and diamond
7 layers on top of the gallium mtπde (descπbed later) implanted with 100 keV hydrogen atoms
8 It shows that such high level of hydrogen concentration is possible with implant dosage in the
9 neighborhood of 1E17 cm-3 and above In case of hydrogen implantation, the bubbles are
10 believed to result from hydrogen-passivated nitrogen terminated surfaces Figure 4 shows the
11 projected range and straggle for hydrogen in GaN, diamond, and silicon nitπde
12 Once implanted, hydrogen can be redistπbuted and/or lost if the wafer is exposed to
13 high temperature [6] for a prolonged peπod of time, and also may detach due to stress
14 induced by the gasses in bubbles Consideπng these limitations, it is necessary to manage the
15 thermal processing of implanted wafers
16 In one embodiment of the present invention, the surface of the gallium nitride is
17 coated pπor to the implantation and before the deposition of diamond layers The reasons are
18 the following The subsequent steps involve processes at elevated temperatures (in excess of
19 600°C) The decomposition of the GaN surface begins at temperatures above 6000C with
20 significant loss occurring around 9000C, and can be prevented by depositing a suitable
21 surface coating Also, the coating of GaN prevents the decomposition of the gallium nitnde
22 surface duπng long and high-dose implants [8] This is especially true if the implant is earned
23 out at an elevated substrate temperature Finally, the synthetic diamond deposition requires a
24 surface preparation to efficiently nucleate This is most easily realized by coating the surface
25 with a suitable amorphous matenal, such as, silicon nitπde In one embodiment, the GaN is
26 coated with at least one nucleating layer In another embodiment, the coating pπor to
27 implantation compπses a silicon mtπde layer followed by a synthetic diamond layer
28 The detachment of the thin gallium nitπde film requires a balance between forces
29 pulling the crystal apart and the forces pushing it apart The pushing is accomplished by the
30 expansion of voids and bubble at elevated temperature, while the pull is accomplished by
31 thermal and intnnsic stresses exerted by the synthetic diamond layer The breakage occurs
32 along the weakened layer with the bubble at the prescπbed depth in the bulk of gallium nitride. The forces pulling the thin film off the substrate and the maintaining of the film's mechanical integrity are provided by the adhesion of the synthetic diamond to the gallium nitride film via the intermediate nucleation layer. The detachment may occur during the growth of the synthetic diamond. The growth of the synthetic diamond layers is adapted to meet several constraints (a) The growth rate of the majoπty of the diamond layers has to be high (greater than 1 μm/hr) to be practical, (b) The growth temperature has to prevent the premature detachment of the thin gallium nitride film. Premature means that the film detaches before the diamond layer is sufficiently thick to maintain the film's mechanical integrity through the entire growth, (c) The growth temperature has to be adjusted so as not to allow significant loss of hydrogen or other gasses from the implanted areas For these reasons, the growth of diamond is may be split into more than one step In one embodiment, a thin initial layer of synthetic diamond is grown pπor to the implantation and then a stiffening layer and then a bulk layer of diamond are grown after the implantation. The diamond growth is nucleated prior to the implantation under conditions that facilitate quality nucleation and initial rigidity of the diamond film. The initial diamond layer can be as thin as several nanometers, but its stability improves with the thickness hence thicknesses of several micrometers are possible. Diamond thickness of 150 nm was used to simulate the hydrogen implantation profile for this embodiment in Figure 5. The conditions for growth of the diamond stiffener layer are adjusted so that the temperature does not impact the implanted species or the detachment of the gallium nitπde film This means keeping the temperature below 600°C and a low growth rate. The thickness of the diamond stiffener layer is determined by the desired rigidity of the diamond layer pπor to raising the temperature for high growth rate step: the stiffener layer may be several micrometers thick. The conditions for growing the bulk diamond layer are optimized for high growth rate and consequently higher temperature (above 6000C). The majority of the diamond layer (the "bulk" of the new substrate) is grown during this stage Without departing from the invention, it is possible to change the CVD energy source, namely, is possible to change the deposition process method between these three diamond layers. In one embodiment, microwave plasma is used at low temperature for the stiffener diamond layer, while hot filament is used for the initial and the bulk layers. In another embodiment, it is possible to maintain a single or a combination of methods and implement a gradual change of temperature from the stiffener diamond layer to the bulk diamond layers In embodiment, the stiffener and the bulk layers become one composite layer referred to as a bulk diamond layer In another embodiment, the synthetic diamond growth commences with the stiffener diamond layer after the implantation at a temperature and method that sustains the stability of the thin GaN film This means growing a low-temperature diamond (<600C) for at least some of the growth time, and then raising the temperature to a higher growth rate to grow the bulk diamond layer For example, microwave plasma is used at low temperature to growth the first one or more micrometers of the diamond ("stiffener diamond layer") and then a different method and/or higher temperature is used to increase the growth rate duπng the later stage ("bulk diamond layer") Any of the diamond growth techniques descnbed above may be used to nucleate and growth the synthetic diamond without departing from the spiπt of the invention Duπng the growth or the cool down stage of the diamond layers the diamond layers will detach the GaN thin film The two substrates are then separated and separately further processed The separation of the two structures occurs for several reasons (a) Diamond layers have a lower thermal expansion coefficient than gallium nitride wafer and hence duπng cooling the gallium nitride wafer contracts more than the diamond layers This stress breaks the wafer along the weaker damaged layer The temperature at which this happens is above SOO0C (b) Under the effect of the pressure of the gas within the voids and the coalescing of the void under pressure and temperature the semiconductor film detaches
Thin film processing
The surface of the thin GaN film on diamond is now prepared for further processing as ultimately optical or electronic devices will be manufactured on it The surface remains rough and contaminated and/or reconstructed with a high concentration of the implanted species after the detachment process The root-mean-square roughness preferred for gallium mtnde crystal growth is below 0 5 nm This level of smoothness is regularly achieved with chemical-mechanical polish (CMP) of the gallium mtnde surface Implanted species are known to either create deep levels or passivate the shallow dopants in gallium mtnde and hence adversely impact the electronic and optical properties of the semiconductor films Similar effects arise from the presence of remaining damage to the crystal lattice caused by detachment or high-dose implant To avoid implant related damage, roughness and contamination, the damaged mateπal around the GaN thin film broken-off surface of gallium mtπde is removed pπor to further processing This task is accomplished by a combination of chemical mechanical polish (CMP), ion milling, and heat treatment to out-diffuse the dopants The out-diffusion requires protection of the GaN surface with a layer of mtπde or similar inert amorphous film that will prevent surface decomposition while the species outgas Finally, the surface is subjected to an alternating sequence of oxidation and oxide removal steps, which results in a clear surface ready for epitaxial growth
Processing of the remaining substrate
The surface of the remaining substrate is rough and contaminated with implanted species in much the same manner as the previously descnbed thin film of gallium nitπde The cleanup and smoothing processes are basically the same as descnbed above for the thin gallium nitride film However, the requirement on the finished surface roughness is different This surface must be ready for the deposition of another nucleation layer and hence larger surface roughness is desired A root-mean-square roughness of more than 1 run is preferred to provide greater adhesion to silicon nitπde or similar materials The removal of excess implanted species is required in order to prevent adversely impacting the adhesion of the new nucleation layer Once cleaned and polished, the remaining gallium nitπde substrate is inserted again into the process at the beginning In other embodiments, the presented process is applied to the creation of GaAs, InP, SiC, and other semiconductor thin films on synthetic diamond
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 - Method for producing thin film of semiconductor film on a synthetic diamond substrate Figure 2 - Cleaning and smoothing of thin film of semiconductor film on a synthetic diamond substrate 1 Figure 3 - Cleaning and surface preparation of remaining substrate for nucleation of
2 diamond
3 Figure 4 Theoretical projected range and longitudinal straggle for hydrogen implanted into
4 silicon nitπde, gallium mtπde, and diamond
5 Figure 5 Theoretical hydrogen atom implant profile for 100 keV implant energy A dose of
6 1E17 cm-2 with this profile produces 1% atomic density of hydrogen in the
7 gallium mtπde
8 Figure 6 - Illustration of the size of CVD diamond grains duπng an interrupted growth As
9 the thickness of the diamond progresses the grains get larger, but they start
10 small when the growth is restarted
11 Figure 7 - Three embodiments (a-c) of the preferred method of the manufacture of thin bulk-
12 quality semiconductor films
13 Figure 8 - Use of composite wafers manufactured in accordance with the present invention in
14 standard semiconductor-device manufacturing processes
15 Figure 9 - Four embodiments of completed composite wafers in accordance with present
16 invention
17 DETAILED DESCRIPTION OF THE INVENTION
18
19 The preferred process according to this invention and vaπous embodiments compπse
20 of the following step descπbed below and illustrated in Figures 1 , 2 and 3 The process flow
21 is given in Figure 7a
22 The first embodiment of the preferred method is illustrated in Figure 7a and descnbed
23 more specifically in Figure 1 In step 100 of Figure 1, a bulk gallium mtπde wafer 101 is
24 provided The wafer 101 has a planar surface 102 and whose plane is either substantially
25 parallel or slightly inclined with respect to one of the pπncipal crystallographic planes of a
26 single-crystal semiconductor mateπal
27 In the next step 110, the surface 102 of the gallium mtnde substrate is prepared for
28 diamond nucleation by depositing a layer 1 1 1 This requires high adhesion Hence, surface
29 102 is prepared by polishing The preferred root-mean-square roughness of surface 102 is at
30 least 1 nm The surface preparation required in this step 110 is equivalent to the one described in the last steps of the recycled gallium nitπde wafer cleaning 300 through 320 (descπbed later) The back surface 103 of the wafer 101 may or may not be polished In step 110, a nucleation layer 111 is deposited on surface 102 of the wafer 101 The purpose of the nucleation layer is to facilitate the efficient nucleation and growth of CVD diamond in a later step The selection of nucleating-layer mateπal and its thickness is based on its ability to serve as a nucleating layer for synthetic diamond growth, the quality of its adhesion to gallium nitπde, its thermal conductivity and expansion coefficients The thickness of the nucleation layer 1 11 is determined by several requirements (a) Silicon nitπde and other mateπals that may be used for nucleation have thermal conductivities that are significantly lower that than that of synthetic diamond When the designer of the composite wafer structure desires devices with high thermal conductance, then the upper bound on the thickness of the nucleation layer is set by the allowed temperature drop under device operation (b) Due to the difference in thermal expansion coefficient and the intrinsic stress embedded duπng the film deposition, the nucleation layer must not be so thick as to fail under the strain and temperature cycling of subsequent processes (c) In a later process step hydrogen ions or other noble gas ions will be implanted through the nucleation layer and the stopping power of the nucleation layer has to be considered in the design Figure 4 shows the expected projected ranges and longitudinal straggle for hydrogen implanted into diamond, silicon nitπde and gallium nitπde calculated using commercial available Monte Carlo simulation program SRIM [9] It shows that silicon mtπde's stopping power is commensurate with GaN and hence the thickness of silicon nitπde should be subtracted from the desired depth of implant into the GaN bulk substrate For reasons (b) and (c), thinner films are preferred In one embodiment the nucleation layer is made out of amorphous silicon nitπde deposited using reactive sputteπng In another embodiment the nucleation layer is made out of one of the following mateπals thermally deposited silicon mtπde, amorphous silicon dioxide, polycrystalline silicon, and amorphous silicon deposited by reactive ion sputteπng, thermal evaporation, or electron beam deposition In another embodiment, the nucleation layer is a composite layered structure involving more than one mateπal mentioned above This embodiment is advantageous to separate the requirement for adhesion from the requirement for chemical-vapor deposited synthetic diamond In one such embodiment, the nucleation layer compπses a layer of amorphous silicon that adheres to GaN and a layer of silicon mtπde that promotes synthetic diamond Any method for thin film deposition that results in dense films that are thermally stable up to 1100°C may be used The film thickness ranges between 10 nm and 200 nm The top surface of the nucleation layer is denoted by 1 12 In step 120, an initial layer 121 of synthetic diamond is deposited by chemical vapor deposition on top of surface 1 12 In one embodiment, the initial layer is deposited using the hot filament technique at an elevated temperature close to 800°C The hot filament technique is used because it produces a higher quality adhesion and nucleation of the synthetic diamond film over a large area The thickness of the initial diamond layer 121 is determined by several requirements The lower limit on the thickness is determined by the ability of the initial diamond layer to adhere to the nucleation layer below and the film being able to maintain its mechanical integrity during the subsequent processes (strain and temperature cycling) Since in a later process step hydrogen ions or other gas ions will be implanted through the nucleation layer and this initial diamond layer, the stopping power of the layer combination must be considered in the design - this places the upped bound on the initial diamond layer and nucleation layer combination Figure 4 shows that diamond layers are expected to have smaller stopping power than either gallium nitride or silicon nitride and hence a thicker first diamond layer may be placed on top of the nucleation layer Thinner films are generally preferred The initial diamond film thickness is greater than 20 nm, typically, around 200 nm, but may be as thick as 1000 nm The top surface of the initial diamond layer is denoted with 122 In one embodiment, in-situ optical measurement of film roughness is used to stop the growth of the initial diamond layer at a suitable time to enable proper surface structure for the implantation in the next step In step 130, the structure from process step 120 is further processed by implanting ions 131 from the side of surface 122, through the initial diamond layer 121 and the nucleation layer 1 1 1 The implanted species are preferably hydrogen or hydrogen with a noble gas, such as, helium Other gases may be used The ions 131 create a layer of microscopic damage and voids 132 of finite thickness in the volume of wafer 101 at a depth close to the average penetration depth 133 The depth of implantation 133 defines the thickness of the resulting thin film 134 of GaN that will be left on the diamond substrate and the remaining substrate 135 The film thickness is defined by the implantation conditions and can vary from 10 nm to more than a micrometer for implantation energies from 10 to 100 keV To minimize the damage to the surface the implantation may be earned out at an elevated wafer 101 temperature above 1000C In the case of hydrogen, the peak implant ion atomic content within the gallium mtπde has to exceed 1% and approach 10% for the gallium mtπde layer (in a later step) to be able to detach In step 140, a stiffener diamond layer 141 is deposited onto surface 122 using chemical vapor deposition The surface 122 of the initial diamond layer lends itself to efficient nucleation as it is already made out of synthetic diamond The energy source and deposition conditions duπng the stiffener diamond layer are adjusted so that mechanical integrity of the gallium mtπde and the implant below are not altered duπng the growth of this layer (say, at temperatures below 6000C) In one embodiment the deposition of the stiffener diamond layer 141 uses microwave plasma In another embodiment the stiffener diamond layer 141 is deposited using hot filament as the energy source in CVD In one embodiment, the stiffener diamond layer 141 is deposited using hot filament as the energy source in CVD, while an in-situ filament temperature measurement is used to control diamond growth rate and film stress The interrupted growth of CVD diamond (namely, growth of the stiffener layer on top of the initial layer, and later, eventual growth of the bulk diamond layer on top of the stiffener diamond layer) leaves a signature that can be observed in a cross-sectional view of such a structure using cross-sectional transmission-electron microscope or similar tools known in the art The grain size of the CVD diamond changes with the growth time [13], [14] Upon nucleation the grain size is small, and then it grows The rule-of-thumb is that the grain size and the surface roughness of the diamond film is about 10% of the total film thickness When growth is interrupted, the grain size starts from small, again Therefore, growth interruption can be identified in the film cross-section as an abrupt change in the diamond grain size Figure 6 is an illustration of a cross-sectional view of a CVD diamond layers that underwent an interrupted growth A layered structure 600 was created by growing CVD diamond in the direction indicated with arrow 602 The large and small white areas 601 in Figure 6 represent diamond grains and their size in different areas of structure 600 The growth was interrupted when the diamond layer 630 reached the thickness indicated with the dashed line 603 The surface after the first growth will be referred to as surface 603 and its position indicated with the dashed line 603 Growth interruption composes turning off the energy source in the CVD process, turning of the source or carbon, or taking the wafer out of the chamber The growth 1 is subsequently continued on the surface 603 m the direction shown by arrow 604 The CVD
2 diamond is nucleated on the surface 603 with smaller gram size The grain size in the region
3 630 below surface 603 is larger than the grain size in the region 620 just above the surface
4 603 Region 620 represents first CVD diamond grown on surface 603 As the growth
5 proceeds in direction 604, the diamond grain size increases and eventually, in region 610,
6 becomes comparable to the gram size in region 630 and may continue to become larger is
7 growth is continued The illustration in Figure 6 and references [13] and [14] descπbe the
8 CVD diamond interrupted growth signature The typical grain size in the beginning of CVD
9 diamond growth is in the neighborhood of 10 nm, while before the interruption the grain size
10 may be more than several hundreds of nanometers Note that the Figure 6 illustration is not to
11 scale
12 In step 150, the bulk diamond layer 151 is deposited at an elevated temperature
13 (>600°C) The thickness of completed bulk diamond layer ranges from several tens of
14 micrometers to several hundred micrometers depending on the desired diamond substrate
15 thickness The resulting structure 153 is a composite structure which, duπng the thermal
16 treatment of diamond growth and subsequent cooling, separates into two parts The growth of
17 the bulk diamond layer on top of the stiffener layer has the signature of CVD diamond
18 interrupted growth m which the grain size changes as descπbed in step 150 and Figure 6
19 In step 160, the separation of the structure 153 occurs This is illustrated in step 160
20 with two arrows 161 The separation results in two parts (a) composite wafer 165 that
21 contains a thin gallium mtπde film 166 attached to a diamond substrate and has a revealed
22 gallium nitπde surface 162, and (b) remaining gallium mtπde substrate 164 with revealed
23 surface 163
24 In step 170, the composite wafer 165, in which a thin gallium nitπde layer is
25 atomically attached to a substrate composing of nucleation layer and at least one layer of
26 synthetic diamond, is ready for further processing The top surface 162 is the gallium nitπde
27 surface, while the bottom surface 152 is made out of synthetic diamond The composite wafer
28 165 is will be cleaned and prepared for further processing m steps 200 - 230
29 In step 180, the remaining gallium nitπde wafer 164 with top surface 163 and back
30 surface 103 is ready to be re-mserted into the process stage 110 after it has gone through
31 cleaning and surface preparation descπbed in process steps 300 though 330 In steps 300, 310, and 320, the remaining gallium mtπde wafer 164 is cleaned and polished again to be recycled The surface 163 is rough and contaminated with a high concentration of the implanted species after the detachment process Majoπty of the roughness, contamination, and damage at the broken-off surface of gallium mtπde must be removed prior to recycling the wafer This task is performed by first dπving out the remaining impurities by out-diffusion at an elevated temperature approaching 10000C shown with cloud 301 in step 300, followed by chemical mechanical polish (CMP) shown with arrows 311 in step 310 The surface 321 of the new gallium mtπde wafer must be ready for the deposition of another nucleation layer with high adhesion energy and hence some surface roughness is desired The desired root-mean-square roughness of surface 321 is at least 10 nm This is sufficient to provide good adhesion to silicon mtπde or similar materials The removal of excess implanted species in step 300 is required in order to avoid adversely impacting the adhesion of the new nucleation layer In step 200, the surface 162 of the thin GaN film 166 is now prepared for further processing to serve as a base for optical or electronic device The surface 162 is left rough and contaminated and/or reconstructed with a high concentration of the implanted species after the detachment process The roughness, contamination, and damage at the broken-off surface of gallium mtπde is removed prior to further processing using first by driving out any remaining dopants shown with the cloud 201 in step 200 In case of hydrogen implantation this may not be necessary if the separation has occurred already duπng the bulk diamond layer deposition In one embodiment, duπng the out-diffusion the GaN surface 213 is coated with a layer of silicon mtπde or similar inert amorphous film (not shown in step 200) that will prevent the surface decomposition while the species outgas The roughness and damage is removed in step 210 by chemical mechanical polish (CMP) indicated by the arrows 212 In one embodiment (not shown in step 210), to aid the removal of damage and dopants, the surface may be subjected to an alternating sequence of oxidation and oxide removal steps, and ion milling to clear the surface and prepare it for epitaxial growth In step 220, on the cleaned surface 213, new gallium mtπde or related compound semiconductor epitaxial layers 222 are grown using any of the methods known in the art, for example, metal-organic chemical- vapor deposition The ending surface of these new epitaxial layers is denoted with 221 1 Step 230 illustrates the manufacturing of electronic or optical devices out of newly
2 grown layers 222 and on top of surface 221. The manufacturing steps include, but are not
3 limited to etching, which produces walls 231 , deposition of metals 233, or other dielectrics to
4 define optical or electronic devices. In one embodiment, the new epitaxial layers 222
5 compπse a basis for a high-electron mobility transistor. In another embodiment, the newly
6 grown layers 222 comprise a basis for a light-emitting diode or diodes. In yet another
7 embodiment, the newly grown layers 222 comprise a basis for a variety of electronic and
8 optical devices, such as, high-electron mobility transistors, heterojunction bipolar transistors,
9 phototransistors, power-electronic devices (thyristors, tπacs), as are known in the art.
10 Another embodiment of the preferred method is illustrated in Figure 7b. This
11 embodiment is different from the process disclosed in Figure 7a in that the implantation (step
12 130) occurs immediately after the deposition of the nucleation layer (step 110) and this in this
13 case the stiffener diamond layer (step 140) is deposited under conditions that ensure high
14 adhesion and mechanical integrity of the implanted surface and the thin film of bulk gallium
15 nitride.
16 Another embodiment of the preferred method is illustrated in Figure 7c. This
17 embodiment is different from the process disclosed in Figure 7a in that the stiffener diamond
18 layer and the bulk diamond layer are deposited sequentially as a part of a single process in
19 which the conditions for diamond deposition are changing during the growth. This diamond
20 deposition step is collectively referred to as "bulk diamond" growth in Figure 7c.
21 The completed composite wafer with thin semiconductor film attached to synthetic
22 diamond is inserted into a standard semiconductor-device fabrication process. Within this
23 process, illustrated in Figure 9, new semiconductor films may be grown on top of the thin
24 semiconductor film followed by standard processes that are know in the art of electronic and
25 optoelectronic device manufacturing. The completed device remains mounted on the
26 synthetic diamond heat spreader and can be mounted for efficient cooling onto another heat
27 sink (made out of copper, synthetic diamond, or other suitable material) and directly into its
28 final location as a part of a larger system (in a package or mounted directly onto another chip
29 or mechanical harness).
30 Figure 9 shows four embodiments of completed composite wafers in accordance with
31 present invention Composite wafer 910 comprises a thin film of bulk-grown gallium nitride
32 912, a nucleating layer 913, initial diamond layer 914, stiffener diamond layer 915, and bulk 1 diamond layer 916 The interface 917 between initial diamond layer 914 and the stiffener
2 diamond layer 915 and the interface 918 between the stiffener diamond 914 and the bulk
3 diamond 916 are due to interrupted growth of diamond The composite wafer may be
4 mounted on another substrate without departing from the spiπt of the invention The surface
5 of topmost layer 912 (gallium nitπde) may be processed to fabπcate optical or electronic
6 devices
7 Composite wafer 920 comprises a thin film of bulk-grown gallium nitπde 922, a
8 nucleating layer 923, initial diamond layer 924, and bulk diamond layer 925 The interface
9 927 between initial diamond layer 914 and the bulk diamond 916 is due to interrupted growth
10 of diamond The composite wafer may be mounted on another substrate without departing
11 from the spiπt of the invention
12 Composite wafer 930 comprises an epitaxially grown semiconductor layered structure
13 931 , a thin film of bulk-grown gallium nitπde 932, a nucleating layer 933, initial diamond
14 layer 934, stiffener diamond layer 935, and bulk diamond layer 936 The interface 937
15 between initial diamond layer 934 and the stiffener diamond layer 935 and the interface 938
16 between the stiffener diamond 935 and the bulk diamond 936 are due to inteπupted growth of
17 diamond The composite wafer may be mounted on another substrate without departing from
18 the spiπt of the invention The topmost layer 931 may contain gallium nitπde, aluminum
19 nitπde, indium mtπde, or any combination of mentioned mtnde compound The top
20 (revealed) surface of the layer 931 may be processed to fabπcate optical or electronic devices
21 Composite wafer 940 compπses an epitaxially grown semiconductor layered structure
22 941, a thin film of bulk-grown gallium nitπde 942, a nucleating layer 943, initial diamond
23 layer 944, and bulk diamond layer 945 The interface 947 between initial diamond layer 944
24 and the bulk diamond 945 is due to interrupted growth of diamond The composite wafer may
25 be mounted on another substrate without departing from the spiπt of the invention The
26 topmost layered structure 941 may contain gallium nitπde, aluminum rutnde, indium nitπde,
27 or any combination of mentioned nitπde compounds The top (revealed) surface of the layer
28 941 may be processed to fabncate optical or electronic devices
29 It is apparent that the above embodiments may be altered in many ways without
30 departing from the scope of the invention It is understood that although the preferred method
31 is been disclosed as applied to gallium nitπde films and bulk gallium nitπde wafers, other
32 single-crystal semiconductors can be processed using the same invented approach without departing from the scope of the invention Further, various aspects of a particular embodiment may contain patentable subject matter without regard to other aspects of the same embodiment Additionally, various aspects of different embodiments can be combined together Also, those skilled in the art will understand that vaπations can be made in the number and arrangement of components illustrated in the above diagrams It is intended that the appended claims include such changes and modifications While certain representative embodiments and details have been shown for purposes of illustrating the invention, it will be apparent to those skilled in the art that various changes in the methods and apparatus disclosed herein may be made without departing from the scope of the invention which is defined in the appended claims What is claimed is

Claims

CLAIMS 1 A method for preparation of thin semiconductor film, wherein the process compπses providing a bulk semiconductor wafer with a first surface and second surface, disposing a nucleation layer on said first surface, said nucleation layer having a first surface and a second surface, said second surface of said nucleation layer being proximal to said bulk semiconductor wafer, disposing a first layer of synthetic diamond on top of said nucleation layer, said first layer of synthetic diamond having a first surface and a second surface, said second surface of said first layer of synthetic diamond being proximal to said bulk semiconductor wafer, implanting ions into said bulk semiconductor wafer through said nucleation layer and said first layer of synthetic diamond to create in the volume of said semiconductor wafer at a depth close to the average penetration depth of said ions, a layer of damage, said layer of damage defining a film region and a bulk region in said semiconductor wafer, said film region being disposed between said layer of damage and said nucleation layer, said bulk region disposed between said layer of damage and said second surface of said semiconductor wafer, depositing a second layer of synthetic diamond on said first layer of synthetic diamond, separating said film region from said bulk region of said semiconductor layer 2 Method claimed in claim 1 wherein said semiconductor is selected from a group containing gallium nitride, gallium arsenide, indium phosphide, and silicon carbide 3 Method claimed in claim 1 wherein said ions are selected from the group consisting of hydrogen molecule ions, protons, helium atoms, any noble gas 4 Method claimed in claim 1 further characteπzed by said ion implantation having a dose, said dose of ions implanted exceeding IEl 7 cm-2 5 A method of recycling semiconductor wafers compπsing of providing a semiconductor crystal, said semiconductor crystal having a surface, depositing a nucleation layer on said surface of said semiconductor crystal, depositing an initial layer of synthetic diamond on top of said nucleation layer, implanting ions into said semiconductor crystal through said nucleation layer and said initial layer of synthetic diamond, said ions creating a layer of damage in the body of said semiconductor crystal, said layer of damage defining a film region and a bulk region in said semiconductor crystal, depositing a stiffener layer of synthetic diamond on top of said initial layer of synthetic diamond, said stiffener layer of synthetic diamond, said initial layer of synthetic diamond, said nucleation layer, and said film region forming a composite wafer detaching said composite wafer from said bulk region of said semiconductor crystal, said bulk region of said semiconductor crystal having a revealed surface, polishing said revealed surface of said bulk region of said semiconductor crystal, repeating said method by inserting said bulk region of said semiconductor crystal as a semiconductor crystal in said step of providing a semiconductor crystal 6 Claim 5, wherein said semiconductor crystal is made out of gallium nitnde 7 Claim 5, wherein said semiconductor crystal is a boule made out of gallium mtπde 8 Claim 5, wherein said semiconductor crystal is a wafer made out of gallium mtπde 9 Claim 6, wherein said nucleation layer is made out of silicon nitride 10 Claim 5, wherein said initial layer of synthetic diamond is deposited under process temperature above 800°C 11 Claim 5, wherein said stiffener layer of diamond is deposited using hot filament chemical vapor deposition 12 Claim 5, wherein said nucleation layer is further characteπzed as having a thickness, said thickness not exceeding 130 nm 13 Claim 5, wherein said initial diamond layer is deposited using hot-filament chemical vapor deposition technique 14 Claim 13, wherein said initial diamond layer is further characterized as having a thickness and having a surface roughness, said thickness and said surface roughness determined using an in-situ optical reflectometer 15 A method of recycling semiconductor wafers composing of providing a semiconductor crystal, said semiconductor crystal having a surface, depositing a nucleation layer on said surface of said semiconductor crystal, depositing an initial layer of synthetic diamond on top of said nucleation layer, implanting ions into said semiconductor crystal through said nucleation layer and said initial layer of synthetic diamond, said ions creating a layer of damage in the body of said semiconductor crystal, said layer of damage defining a film region and a bulk region in said semiconductor crystal, depositing a stiffener layer of synthetic diamond on top of said initial layer of synthetic diamond, said stiffener layer of diamond deposited at a temperature lower than 6000C, disposing a bulk layer of synthetic diamond, said bulk layer of synthetic diamond, said stiffener layer of synthetic diamond, said initial layer of synthetic diamond, said nucleation layer, and said film region forming a composite wafer detaching said composite wafer from said bulk region of said semiconductor crystal, said bulk region of said semiconductor crystal having a revealed surface, polishing said revealed surface of said bulk region of said semiconductor crystal, repeating said method by inserting said bulk region of said semiconductor crystal as a semiconductor crystal in said step of providing a semiconductor crystal 16 Claim 15, wherein said semiconductor crystal is made out of gallium mtπde 17 Claim 15, wherein said semiconductor crystal is a boule made out of gallium nitride 18 Claim 15, wherein said semiconductor crystal is a wafer made out of gallium mtπde 19 Claims 16, wherein said nucleation layer is made out of silicon mtπde
20 A method of recycling semiconductor wafers comprising of providing a semiconductor crystal, said semiconductor crystal having a surface, depositing a nucleation layer on said surface of said semiconductor crystal, implanting ions into said semiconductor crystal through said nucleation layer and said initial layer of synthetic diamond, said ions creating a layer of damage in the body of said semiconductor crystal, said layer of damage defining a film region and a bulk region in said semiconductor crystal, depositing a stiffener layer of synthetic diamond on top of said initial layer of synthetic diamond, said stiffener layer of synthetic diamond, said initial layer of synthetic diamond, said nucleation layer, and said film region forming a composite wafer detaching said composite wafer from said bulk region of said semiconductor crystal, said bulk region of said semiconductor crystal having a revealed surface, polishing said revealed surface of said bulk region of said semiconductor crystal, repeating said method by inserting said bulk region of said semiconductor crystal as a semiconductor crystal in said step of providing a semiconductor crystal
21 Claim 20, wherein said semiconductor crystal is made out of gallium mtπde
22 Claim 20, wherein said semiconductor crystal is a boule made out of gallium mtπde
23 Claim 20, wherein said semiconductor crystal is a wafer made out of gallium mtπde
24 Claims 21 , wherein said nucleation layer is made out of silicon nitπde
25 Claim 20, wherein said initial layer of synthetic diamond is deposited under process temperature above 8000C
26 Claim 20, wherein said stiffener layer of diamond is deposited using hot filament chemical vapor deposition 27 Claim 20, wherein said nucleation layer is further characterized as having a thickness, said thickness not exceeding 130 nm 28 Claim 20, wherein said initial diamond layer is deposited using hot-filament chemical vapor deposition technique 29 Claim 28, wherein said initial diamond layer is further characteπzed as having a thickness and having a surface roughness, said thickness and said surface roughness determined using an in-situ optical reflectometer 30 Composite wafer comprising of a synthetic diamond substrate, a nucleation layer disposed on said top region of said synthetic diamond substrate, at least one gallium mtπde layer disposed on said nucleation layer, wherein said synthetic diamond substrate exhibits at least one growth interruption 31 Claim 30 wherein said nucleation layer is made out of silicon mtπde 32 Claim 30 wherein said at least one layer of gallium nitπde is further charactenzed with a dislocation density that is less than 1 0E6 per square centimeter 33 Claim 30 wherein said composite wafer further characteπzed as having at least one layered structure compπsing at least one layer or aluminum gallium nitπde 34 Composite wafer compπsing of a synthetic diamond substrate, said synthetic diamond substrate compπsing of at least a top region, a bottom region, and a transition region, said transition region disposed between said top region and said bottom region, said top region having a first diamond grain size, said transition region having a second diamond grain size, and said bottom region having a third diamond grain size, a nucleation layer disposed on said top region of said synthetic diamond substrate, a gallium nitπde layer disposed on said nucleation layer, said at gallium nitπde layer having a dislocation density less than 1E6 per square centimeter, wherein said second grain size is substantially smaller than said first diamond grain size, and said second grain size substantially smaller than said third diamond grain size 35 Claim 34 wherein said nucleation layer is made out of silicon nitπde 36 Claim 34 wherein said composite wafer further characterized as having at least one layered structure compπsing at least one layer of aluminum gallium mtnde
PCT/US2008/051733 2007-01-22 2008-01-22 Composite wafers having bulk-quality semiconductor layers Ceased WO2008091910A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US88195107P 2007-01-22 2007-01-22
US60/881,951 2007-01-22

Publications (2)

Publication Number Publication Date
WO2008091910A2 true WO2008091910A2 (en) 2008-07-31
WO2008091910A3 WO2008091910A3 (en) 2008-10-09

Family

ID=39645131

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/051733 Ceased WO2008091910A2 (en) 2007-01-22 2008-01-22 Composite wafers having bulk-quality semiconductor layers

Country Status (2)

Country Link
US (1) US7943485B2 (en)
WO (1) WO2008091910A2 (en)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100707166B1 (en) * 2005-10-12 2007-04-13 삼성코닝 주식회사 Method of manufacturing BANN substrate
US7943485B2 (en) * 2007-01-22 2011-05-17 Group4 Labs, Llc Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof
US8039301B2 (en) * 2007-12-07 2011-10-18 The United States Of America As Represented By The Secretary Of The Navy Gate after diamond transistor
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US8481411B2 (en) * 2009-06-10 2013-07-09 Seoul Opto Device Co., Ltd. Method of manufacturing a semiconductor substrate having a cavity
JP5647497B2 (en) * 2010-02-10 2014-12-24 ソウル バイオシス カンパニー リミテッドSeoul Viosys Co.,Ltd. Semiconductor substrate, manufacturing method thereof, semiconductor device and manufacturing method thereof
US8860183B2 (en) 2009-06-10 2014-10-14 Seoul Viosys Co., Ltd. Semiconductor substrate, semiconductor device, and manufacturing methods thereof
CN104795313B (en) 2009-08-26 2017-12-08 首尔伟傲世有限公司 Manufacture the method for semiconductor base and the method for manufacture light-emitting device
JP5570838B2 (en) * 2010-02-10 2014-08-13 ソウル バイオシス カンパニー リミテッド Semiconductor substrate, manufacturing method thereof, semiconductor device and manufacturing method thereof
FR2961948B1 (en) * 2010-06-23 2012-08-03 Soitec Silicon On Insulator PROCESS FOR TREATING A COMPOUND MATERIAL PART
US20120288698A1 (en) * 2011-03-23 2012-11-15 Advanced Diamond Technology, Inc Method of fabrication, device structure and submount comprising diamond on metal substrate for thermal dissipation
US8778783B2 (en) * 2011-05-20 2014-07-15 Applied Materials, Inc. Methods for improved growth of group III nitride buffer layers
US8853086B2 (en) 2011-05-20 2014-10-07 Applied Materials, Inc. Methods for pretreatment of group III-nitride depositions
US8980002B2 (en) 2011-05-20 2015-03-17 Applied Materials, Inc. Methods for improved growth of group III nitride semiconductor compounds
JP2012250907A (en) * 2011-06-02 2012-12-20 Samsung Corning Precision Materials Co Ltd Method for producing free-standing substrate
JP5903818B2 (en) * 2011-09-26 2016-04-13 富士通株式会社 Compound semiconductor device and manufacturing method thereof
JP5978548B2 (en) * 2012-02-29 2016-08-24 エレメント シックス テクノロジーズ ユーエス コーポレイション Method for manufacturing gallium nitride type wafer on diamond
CN104756245B (en) * 2012-10-26 2017-09-22 Rfhic公司 Semiconductor device with improved reliability and operating life and manufacturing method thereof
GB201319117D0 (en) * 2013-10-30 2013-12-11 Element Six Technologies Us Corp Semiconductor device structures comprising polycrystalline CVD Diamond with improved near-substrate thermal conductivity
US9601327B2 (en) 2014-08-15 2017-03-21 The Board Of Regents Of The University Of Oklahoma High-power electronic device packages and methods
GB201502954D0 (en) 2015-02-23 2015-04-08 Element Six Technologies Ltd Compound semiconductor device structures comprising polycrystalline CVD diamond
GB201502698D0 (en) * 2015-02-18 2015-04-01 Element Six Technologies Ltd Compound semiconductor device structures comprising polycrystalline CVD diamond
US10720374B2 (en) * 2016-02-04 2020-07-21 Mitsubishi Electric Corporation Semiconductor substrate
JP6407475B2 (en) * 2016-03-18 2018-10-17 三菱電機株式会社 Semiconductor device and method for producing semiconductor device
US10594298B2 (en) * 2017-06-19 2020-03-17 Rfhic Corporation Bulk acoustic wave filter
CN112400217B (en) * 2018-07-19 2024-08-13 东京毅力科创株式会社 Substrate processing system and substrate processing method
US11652146B2 (en) 2020-02-07 2023-05-16 Rfhic Corporation Method of forming a semiconductor wafer containing a gallium-nitride layer and two diamond layers
WO2022192666A1 (en) * 2021-03-12 2022-09-15 Akash Systems, Inc. Substrate features in thermally conductive materials
CN114525582B (en) * 2022-01-05 2023-08-04 西安电子科技大学 A kind of single crystal diamond and preparation method thereof
CN116904958A (en) * 2023-07-24 2023-10-20 浙江新瑞芯材科技有限公司 Production process of diamond semiconductor heat sink material
US20250140556A1 (en) * 2023-10-31 2025-05-01 Ii-Vi Advanced Materials, Llc Crystalline wafers and process for forming crystalline wafers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7407869B2 (en) * 2000-11-27 2008-08-05 S.O.I.Tec Silicon On Insulator Technologies Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material
FR2835096B1 (en) * 2002-01-22 2005-02-18 PROCESS FOR MANUFACTURING SELF-CARRIER SUBSTRATE OF SINGLE-CRYSTALLINE SEMICONDUCTOR MATERIAL
FR2817394B1 (en) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A SUBSTRATE, IN PARTICULAR FOR OPTICS, ELECTRONICS OR OPTOELECTRONICS AND SUBSTRATE OBTAINED THEREBY
US7538010B2 (en) * 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
FR2860248B1 (en) * 2003-09-26 2006-02-17 Centre Nat Rech Scient PROCESS FOR PRODUCING AUTOMATED SUBSTRATES OF ELEMENT III NITRIDES BY HETERO-EPITAXIA ON A SACRIFICIAL LAYER
US7713839B2 (en) * 2004-10-06 2010-05-11 Intel Corporation Diamond substrate formation for electronic assemblies
US7943485B2 (en) * 2007-01-22 2011-05-17 Group4 Labs, Llc Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof

Also Published As

Publication number Publication date
US7943485B2 (en) 2011-05-17
US20080296586A1 (en) 2008-12-04
WO2008091910A3 (en) 2008-10-09

Similar Documents

Publication Publication Date Title
US7943485B2 (en) Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof
US12469699B2 (en) Systems and methods for growth of silicon carbide over a layer comprising graphene and/or hexagonal boron nitride and related articles
US9650723B1 (en) Large area seed crystal for ammonothermal crystal growth and method of making
CN100399511C (en) Compound semiconductor substrate and manufacturing method thereof
US10796905B2 (en) Manufacture of group IIIA-nitride layers on semiconductor on insulator structures
US11791157B2 (en) Semiconductor on diamond substrate, precursor for use in preparing a semiconductor on diamond substrate, and methods for making the same
US20100105166A1 (en) Method for manufacturing semiconductor devices having gallium nitride epilayers on diamond substrates
KR20080002644A (en) BANN thin film bonded substrate and its manufacturing method, BANN semiconductor device and its manufacturing method
WO2010011842A2 (en) Bonded intermediate substrate and method of making same
JP2007534159A (en) Finely graded gallium nitride substrate for high quality homoepitaxy
JP7791179B2 (en) Method for producing a substrate for epitaxially growing a layer of a gallium-based III-N alloy - Patents.com
US20240128080A1 (en) Compound semiconductor layered structure and process for preparing the same
JP2023510554A (en) High quality group III metal nitride seed crystal and method for producing same
JP7791178B2 (en) Method for producing a substrate for epitaxially growing a layer of a gallium-based III-N alloy - Patents.com
CN116195046A (en) Method for producing substrates for epitaxial growth of gallium-based III-N alloy layers
US12342589B2 (en) Semiconductor substrate
TWI908845B (en) Process for fabricating a substrate for the epitaxial growth of a layer of a iii-n alloy based on gallium
JP2026502275A (en) semiconductor substrate
CN120390835A (en) Structures including high thermal conductivity boron arsenide layers and methods of making the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08728104

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08728104

Country of ref document: EP

Kind code of ref document: A2