WO2008053609A1 - Liquid crystal display and method for driving the same - Google Patents
Liquid crystal display and method for driving the same Download PDFInfo
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- WO2008053609A1 WO2008053609A1 PCT/JP2007/059828 JP2007059828W WO2008053609A1 WO 2008053609 A1 WO2008053609 A1 WO 2008053609A1 JP 2007059828 W JP2007059828 W JP 2007059828W WO 2008053609 A1 WO2008053609 A1 WO 2008053609A1
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- liquid crystal
- pixel
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- crystal display
- display device
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0224—Details of interlacing
Definitions
- Liquid crystal display device and driving method thereof Liquid crystal display device and driving method thereof
- the present invention relates to an active matrix liquid crystal display device and a driving method thereof.
- FIG. 6 is a diagram for explaining a main configuration of a conventional liquid crystal display device
- FIG. 7 is an equivalent circuit diagram showing a pixel configuration of the conventional liquid crystal display device.
- FIG. 6 in a conventional liquid crystal display device, five signal wirings S1 to S5 and four scanning wirings G1 to G4 are arranged on a TFT glass substrate so as to be orthogonal to each other. A plurality of pixels are provided in a matrix on the TFT glass substrate. Each pixel is provided with a TFT and a pixel electrode Pe.
- the source and gate of the TFT are connected to one of the signal wirings Sl to S 5 and one of the scanning wirings G1 to G4, respectively.
- a pixel electrode Pe is connected to the TFT drain.
- the scanning voltage applied to the scanning line G1 is set to a predetermined high level. Sometimes the TFT of that pixel is turned on.
- the signal voltage from the signal wiring S1 is applied to the pixel electrode Pe via the drain of the TFT. Thereafter, when the scanning voltage is set to a predetermined low level, the TFT of the pixel is turned off, and the charge of the pixel electrode Pe is maintained.
- the conventional liquid crystal display device is provided with a source driver 51 and a gate driver 52, and the source driver 51 and the gate driver 52 are n (n is an integer).
- Signal lines Sl to Sn and m (m is an integer) scanning lines Gl to Gm It may be configured to output a signal voltage and a scanning voltage, respectively.
- the pixel capacitor unit C3 including the liquid crystal capacitor C1 and the additional capacitor C2 is provided for each pixel, and when the charge of the pixel electrode Pe is maintained, The corresponding signal voltage is held by the pixel capacitor C3.
- a counter glass substrate disposed opposite to the TFT glass substrate and a whole surface of the counter glass substrate are covered with a liquid crystal layer sandwiched therebetween.
- a counter electrode facing the pixel electrode Pe (not shown), and a liquid crystal capacitance C1 is formed between the pixel electrode Pe and the counter electrode.
- the TFT glass substrate is provided with an additional capacitor wiring (not shown) below the pixel electrode Pe, and an additional capacitor C2 is formed between the pixel electrode Pe and the additional capacitor wiring. In each pixel, the signal voltage is held in the pixel capacitor C3.
- the gate driver 52 sequentially outputs scanning signals from the scanning wiring G1 to the scanning wiring Gm, for example, for one row (one horizontal line). ) Of the TFTs are simultaneously turned on, and the signal voltage is input from the signal wirings Sl,... As a result, a signal voltage is applied to each pixel electrode Pe, and the transmissivity of the liquid crystal layer changes according to the potential difference between the pixel electrode Pe and the counter electrode, thereby realizing gradation display according to the signal voltage. .
- the polarity of the signal voltage applied to the pixel electrode Pe from the signal wirings Sl,. For example, by reversing each frame (one horizontal period), a positive polarity voltage and a negative polarity voltage are alternately applied to the pixel electrode Pe, so-called AC driving is performed.
- the polarity here means the polarity of the voltage with respect to the counter electrode.
- FIG. 8 is a diagram illustrating an example of driving in the N frame in the conventional liquid crystal display device
- FIG. 9 is an example of driving in the (N + 1) frame in the conventional liquid crystal display device. It is a figure to do.
- the source driver 51 stores pixel data corresponding to a video signal that has also received controller power (not shown).
- controller power not shown
- the gate driver In 52 the scanning voltage applied to the corresponding scanning wirings Gl to Gm is set to the noise level, and the corresponding TFT is turned on.
- the source driver 51 applies the stored pixel data as a signal voltage to the corresponding signal wirings Sl to Sm.
- the source driver 51 reverses the signal voltage applied to the pixel via the signal wirings Sl to Sm for each horizontal line, and in each adjacent signal wiring Sl to Sm. Also, the signal voltage has a reverse polarity. For this reason, in the dot inversion drive, for example, as shown in FIG. 8, the polarity of the pixel is opposite to the polarity of the adjacent pixel in the horizontal direction and the vertical direction in the figure, and the pixel of + polarity and polarity is 1 Above on the frame display screen They are mixed alternately in the horizontal and vertical directions.
- the source driver 51 inverts the polarity of the signal voltage to each of the signal wirings Sl to Sm and outputs the inverted signal voltage. Therefore, as shown in Fig. 9, the polarity of each pixel is inverted from that of Fig. 8.
- a parasitic capacitance is generated between the pixel electrode Pe and the signal wiring.
- the voltage applied to the pixel changes due to the parasitic capacitance, In some cases, pixels could not emit light with the desired brightness.
- FIG. 10 (a) is a diagram for explaining the parasitic capacitance between the pixel electrode and the source line in the conventional liquid crystal display device
- FIG. 10 (b) is a diagram for explaining the voltage pull-in generated in the pixel.
- a parasitic capacitance Cgl is generated between the pixel electrode Pe and the signal wiring SN.
- a parasitic capacitance Cg2 is generated between the pixel electrode Pe and the signal wiring (SN + 1) of the adjacent pixel.
- parasitic capacitance exists also between the pixel electrode Pe and the scanning wiring provided in the vicinity.
- the voltage change ⁇ V ′ is defined as Csou, where Csou is the parasitic capacitance between the pixel electrode Pe and the signal wiring SN, (SN + 1), which is obtained by the sum of the parasitic capacitance Cgl and the parasitic capacitance Cg2.
- AV ' CsouX AV / ⁇ C, where ⁇ C is the sum of all parasitic capacitances in the pixel.
- FIG. 11 is a graph showing a specific example of voltage waveforms in each part of the conventional liquid crystal display device when the single color display is performed
- FIG. 12 is the graph when the conventional color image is displayed when all the colors of RGB are displayed. It is a graph which shows the specific example of the voltage waveform in each part of this liquid crystal display device.
- the four pixels adjacent to each other in the wiring direction of the scanning wiring with respect to the above four pixels have the same potential as the voltage applied to the counter electrode.
- Signal voltage is applied from the signal wiring. Therefore, in the conventional liquid crystal display device, when RGB pixels that respectively display red (R), green (G), and blue (B) are sequentially provided along the arrangement direction of the scanning wiring, for example, Only the R pixel emits light with a luminance corresponding to the signal voltage shown in FIG. 11 (a), and a red display is performed.
- the signal voltage increases or decreases according to the signal voltage shown in Fig. 11 (a).
- the voltage pull-in by the corresponding signal voltage is This occurs in the pixel voltage of the R pixel.
- the top stage The pixel voltage of the R pixel is lower than the signal voltage applied during the write period tl due to parasitic capacitance.
- the pixel voltage of the uppermost R pixel is increased by the parasitic capacitance so as to return to the signal voltage applied in the writing period tl. In this way, voltage pull-in due to parasitic capacitance occurs with respect to the pixel voltage of the uppermost R pixel, and the luminance at that pixel changes.
- the signal voltage is written in the signal voltage writing period (the period between the writing periods t3 and t4) for the pixels in the second to fourth stages.
- the pixel voltage of the uppermost R pixel is not changed between the writing periods t3 and t4.
- a red signal is displayed at a desired luminance while maintaining a constant signal voltage. For example, when a polar signal voltage is applied to the second stage R pixel, the second stage G pixel adjacent to the second stage R pixel is simultaneously This is because a + polarity signal voltage is applied, which almost cancels out the voltage pulling force with respect to the pixel voltage of the uppermost R pixel.
- the conventional liquid crystal display device in the case where any one of RGB single color display and white display are performed by dot inversion driving, FIG. 11 (c) and FIG. As shown in (c), the pixel voltages in the same pixel differed, resulting in a difference in luminance value. As a result, the conventional liquid crystal display device has a problem in that the display performance of the pixel is different between the monochrome display and the white display and the display performance is deteriorated.
- conventional liquid crystal display devices include, for example, Japanese Patent Application Laid-Open No. 10-213808 and Japanese Patent Application Laid-Open No. 2003-140625.
- a compensation wiring that suppresses the parasitic capacitance and compensates for a voltage change in the pixel. That is, in these conventional liquid crystal display devices, a parallel compensation wiring is provided for each signal wiring, and a compensation voltage having a polarity opposite to that of the signal voltage applied to the signal wiring is applied to the compensation wiring.
- the load on the signal wiring may be significantly increased.
- the conventional liquid crystal display device when performing the dot inversion driving or the line inversion driving, it is required to increase the + polarity and the polarity inversion frequency (that is, the driving frequency) as the number of pixels increases. As a result, the load on the signal wiring was significantly increased.
- the display surface of the liquid crystal display device is divided into a plurality of regions, top, bottom, left, and right Thus, dot inversion driving was performed for each divided area. For this reason, in the conventional liquid crystal display device, when the number of pixels is increased, luminance unevenness occurs at the boundary portion of the divided area or the boundary portion is visually recognized, thereby improving display performance. It was difficult.
- the compensation wiring is provided for each pixel.
- the compensation wiring is not connected to the pixel electrode. Therefore, in the conventional liquid crystal display device, when the number of pixels is increased, the power that does not directly contribute to the information display increases, and the load on the signal wiring increases, which increases the power consumption. There was a point.
- the present invention provides a liquid crystal display device capable of improving display performance and reducing power consumption even when the number of pixels is increased, and a driving method thereof.
- the purpose is to do.
- a liquid crystal display device includes a plurality of scanning wirings and a plurality of signal wirings arranged in a matrix, and intersections of the scanning wirings and the signal wirings.
- Switching element provided in the vicinity and connected to the switching element.
- a liquid crystal display device having a plurality of pixels arranged in a matrix and having a pixel electrode.
- the signal wiring is provided on both sides of the corresponding pixel so as to sandwich the pixel electrode in the wiring direction of the scanning wiring, and voltage signals having different polarities are applied to the signal wiring.
- the number of the pixel electrodes connected to the first signal wiring through the switching element, and the second The number of the pixel electrodes connected to the signal wiring via the switching element is set to the same number.
- the signal wiring includes first and second signal wirings that are provided on both sides of the pixel and to which voltage signals having different polarities are applied. Yes. Further, the number of pixel electrodes connected to the first and second signal wirings is set to the same number. As a result, unlike the above-described conventional example, even when the number of pixels is increased, when displaying one frame of information without dividing it into a plurality of regions, the same number of + polar pixels and polar pixels are used. be able to. As a result, unlike the conventional example, it is possible to prevent the occurrence of uneven brightness at the boundary between the divided areas and improve the display performance.
- the load on the signal wiring is increased even when the number of pixels is increased. It can be prevented from becoming large. As a result, it is possible to prevent the generation of electric power that does not directly contribute to the information display, thereby reducing power consumption.
- a parasitic capacitance generated between the pixel electrode and the first signal wiring, and between the pixel electrode and the second signal wiring is substantially the same.
- the voltage in the pixel, the voltage can be easily prevented from changing due to the difference between the two parasitic capacitances, and the display performance can be reliably improved.
- the pixel electrode in the plurality of pixels arranged between the first and second signal lines, is connected to the first and second signal lines. It may be connected alternately through elements.
- a plurality of pixels can be driven by the same driving as the dot inversion driving, and the display performance can be improved reliably.
- the pixels display red (R), green (G), and blue (B) arranged along the direction of the scanning wiring, respectively. May be included.
- the driving method of the liquid crystal display device of the present invention is any one of the above driving methods of the liquid crystal display device
- a voltage signal corresponding to information to be displayed is applied to one signal wiring of the first and second signal wirings, and to the other signal wiring of the first and second signal wirings, A voltage signal obtained by inverting the polarity of the voltage signal is applied simultaneously.
- the present invention it is possible to provide a liquid crystal display device capable of improving display performance and reducing power consumption even when the number of pixels is increased, and a driving method thereof. It becomes.
- FIG. 1 is a cross-sectional view showing a configuration of a main part of a liquid crystal display device according to an embodiment of the present invention.
- FIG. 2 is an equivalent circuit diagram showing a pixel configuration of the liquid crystal display device.
- FIG. 3 is a diagram for explaining an example of driving the liquid crystal display device in N frames.
- FIG. 4 is a diagram for explaining a driving example of the liquid crystal display device at the time of (N + 1) frame.
- FIG. 5 is a graph showing voltage waveforms at various parts during driving of the liquid crystal display device.
- FIG. 6 is a diagram illustrating a configuration of main parts of a conventional liquid crystal display device.
- FIG. 7 is an equivalent circuit diagram showing a pixel configuration of the conventional liquid crystal display device.
- FIG. 8 is a diagram for explaining an example of driving in N frames in the conventional liquid crystal display device.
- FIG. 9 is a diagram for explaining an example of driving at the time of (N + 1) frame in the conventional liquid crystal display device.
- FIG. 10 (a) is a diagram for explaining the parasitic capacitance between the pixel electrode and the source line in the conventional liquid crystal display device, and (b) is a diagram for explaining voltage pull-in generated in the pixel. is there.
- FIG. 11 is a graph showing a specific example of a voltage waveform in each part of the conventional liquid crystal display device when monochrome display is performed.
- FIG. 12 is a graph showing specific examples of voltage waveforms in the respective parts of the conventional liquid crystal display device when RGB full-color display is performed.
- FIG. 1 is a cross-sectional view showing a main part configuration of a liquid crystal display device according to an embodiment of the present invention
- FIG. 2 is an equivalent circuit diagram showing a pixel configuration of the liquid crystal display device.
- the liquid crystal display device 1 of the present embodiment includes a pair of transparent substrates 2a and 2b made of a transparent glass material or a synthetic resin material, and a liquid crystal layer 3 sandwiched between the transparent substrates 2a and 2b.
- the upper side of FIG. 1 is installed as the display surface side so that information such as characters and images can be displayed.
- the transparent substrate 2a constitutes an array substrate, and the transparent substrate 2a includes a thin film transistor (hereinafter referred to as “TFT”) 4 and a pixel electrode 5 as a switching element. Is provided. That is, the pixel electrode 5 is disposed on the liquid crystal layer 3 side of the transparent substrate 2a with the insulating film 6 interposed therebetween.
- the TFT 4 includes a gate 4g, a source 4s, and a drain 4d, and the drain 4d is connected to the pixel electrode 5.
- An insulating film 6 and semiconductor layers 7 and 8 are provided between the gate 4g, the source 4s, and the drain 4d.
- the transparent substrate 2b constitutes a CF (Color Filter) substrate.
- the transparent substrate 2b includes the counter electrode 9, red (R), green (G), and blue (B) colors.
- a color filter 10 is provided.
- TN mode liquid crystal is used for the liquid crystal layer 3, and light from a backlight device (not shown) provided on the lower side (non-display surface side) of the transparent substrate 2a is irradiated. It is becoming like that.
- the amount of light passing through the liquid crystal layer 3 is controlled by driving the liquid crystal layer 3 in units of pixels according to information to be displayed, and information is displayed on the display surface. Is done.
- the liquid crystal display device 1 includes a plurality of, for example, m (m is an integer) gate lines Gl to Gm, and a plurality of, for example, a plurality of, for example, a left side and a right side of the pixel P. It has 11 (n is an integer) source lines SlL to SnL and SlR to SnR. These gate lines G1 to Gm and the source lines SlL to SnL and SlR to SnR are provided so as to be orthogonal to each other and arranged in a matrix.
- the gate lines Gl to Gm constitute a scanning wiring and are connected to the gate driver 12.
- a gate voltage is sequentially applied from the gate driver 12 to the gate drivers Gl to Gm.
- the left and right source lines SlL to SnL and SlR to SnR constitute first and second signal lines, respectively, and are connected to the source driver 11.
- a source voltage (voltage signal) is applied to the source lines SlL to SnL and SlR to SnR from the source driver 11 in units of pixels.
- the source driver 11 and the gate driver 12 are connected to a controller (not shown) to which a video signal of information to be displayed is input from the outside.
- the source driver 11 and the gate driver 12 are The controller is configured to operate in response to an instruction signal. That is, the gate driver 12 is connected to the gate drivers Gl to Gm by applying a gate voltage to the gate drivers Gl to Gm according to the instruction signal of the controller.
- the connected TFT4 is turned on or off.
- the source driver 11 applies a source voltage corresponding to the video signal to the source lines SlL to SnL and SlR to SnR based on an instruction signal from the controller.
- the source driver 11 inverts the polarity of the source voltage for each of the left and right source lines SlL to SnL and SlR to SnR for each frame, and has the same magnitude.
- the source voltage is output.
- the plurality of pixels P are provided in a matrix.
- the pixel region of each of the plurality of pixels P is partitioned by two adjacent gate lines Gl to Gm and a pair of left and right source lines SlL to SnL and SlR to SnR.
- the pixel region of the pixel P in the first row X first column is partitioned by the gate lines Gl and G2 and the source lines S1L and SIR.
- red (R), green (G), and blue (B) arranged along the wiring direction of the gate lines Gl to Gm (the left-right direction in FIG. 2) are respectively applied to the plurality of pixels P. Contains RGB pixel P to be displayed.
- the pixel P has TFT4 provided near the intersection of the gate lines Gl to Gm and the source lines SlL to SnL or SlR to SnR and the pixel electrode 5 (Fig. 1) connected to the TFT4. is doing. Further, the pixel P is provided with a pixel capacitor part Pc including a liquid crystal capacitor CLc and an additional capacitor Cs, and the source voltage applied from the source lines SlL to SnL or SlR to SnR is supplied to the pixel capacitor part Pc. It comes to hold.
- the liquid crystal capacitor CLc is formed between the pixel electrode 5 and the counter electrode 9 (FIG. 1).
- the additional capacitor Cs is formed between the pixel electrode 5 and an additional capacitor wiring (not shown) installed on the lower side of the pixel electrode 5.
- an auxiliary electrode may be provided to constitute a pixel capacitor unit including an auxiliary capacitor formed between the pixel electrode 5 and the auxiliary electrode.
- a parasitic capacitance generated between the pixel electrode 5 and the corresponding source lines SlL to SnL and a source line SlR to SnR corresponding to the pixel electrode 5 are generated.
- the parasitic capacitances are substantially the same. That is, in the pixel P, in the corresponding pair of source lines SlL to SnL and SlR to SnR provided on both sides of the pixel P so as to sandwich the pixel electrode 5 in the wiring direction of the gate lines Gl to Gm, Corresponding The distance between the pair of source lines SlL to SnL and SlR to SnR is the same.
- the pixel electrode 5 in the center of the corresponding pair of source lines SlL to SnL and SlR to SnR, in the pixel P, the pair of source lines S1L to SnL and SlR corresponding to the pixel electrode 5 is provided. Parasitic capacitance generated between each of these and SnR is configured substantially the same.
- the pixels connected to the source lines SlL to SnL via TFT4 are set to the same number. That is, in the liquid crystal display device 1, in each of the n pixel columns, the number of pixels connected to the left source lines SlL to SnL and the number of pixels connected to the right source lines SlR to SnR are the same.
- FIG. 3 is a diagram for explaining an example of driving the liquid crystal display device in the N frame
- FIG. 4 is a diagram for explaining an example of driving the liquid crystal display device in the (N + 1) frame
- FIG. 5 is a graph showing voltage waveforms at various parts during driving of the liquid crystal display device.
- the source driver 11 when displaying information of N frames, the source driver 11 is indicated by (+) and (1) in FIG. Polar source voltages are applied to the source lines SlL to SnL and SlR to SnR. Specifically, for example, when a gate voltage that turns on TFT4 is applied to the gate line G1, the source driver 11 applies a + polarity source voltage corresponding to the video signal to the source line S1L. In addition, the source voltage of the same polarity and the same magnitude is simultaneously applied to the source line SIR by inverting the + polarity source voltage. These + polarity and polarity source voltages have the same magnitude as the applied voltage to the counter electrode 9 (FIG. 1).
- the source driver 11 is turned on when the gate voltage that turns on TFT4 is applied to the gate line G2. Is a unipolar source voltage corresponding to the video signal for the source line SIR. Is applied to the source line S1L, and the source voltage having the same polarity as the positive polarity is simultaneously applied to the source line S1L. Thereafter, the same voltage application is performed, and the liquid crystal display device 1 displays N frames of information.
- the source driver 11 uses a pair of source lines as shown in (+) and (1) in FIG.
- a source voltage having a polarity opposite to that of the N frame shown in Fig. 3 is applied.
- the source driver 11 applies a source voltage having a polarity corresponding to the video signal to the source line S1L.
- the source voltage of the above polarity is inverted to the source line SIR, that is, the source voltage of the same magnitude with + polarity is applied simultaneously
- the source driver 11 is turned on when the gate voltage that turns on the TFT4 is applied to the gate line G2.
- Applies a + polarity source voltage according to the video signal to the source line SIR, and inverts the + polarity source voltage to the source line S1L. are simultaneously applied. Thereafter, the same voltage is applied, and the liquid crystal display device 1 displays information of (N + 1) frames.
- the source driver 11 inverts the polarity of the source voltage for the pair of left and right source lines SlL to SnL and SlR to SnR for each frame. Output.
- each pixel P is driven by the same drive as the dot inversion drive.
- the parasitic capacitance generated between the pixel electrode 5 and each of the pair of source lines SlL to SnL and SlR to SnR is substantially the same. It is composed.
- voltage signals having opposite polarities and the same magnitude are applied to the source lines SlL to SnL and SlR to SnR.
- the source voltage shown in FIG. 5A is applied to the pixels P in the first row and the third row. Applied from source line Sn L. Further, the source voltage force S source line SnR shown in FIG. 5B is applied to the pixels P in the second and fourth rows.
- SnL source line
- the pixel voltage of the pixel P in the first row depends on the source voltage applied from the source line SnL. Increase or decrease.
- the source voltages shown in FIGS. 5 (a) and 5 (b) are simultaneously applied to the source lines SnL and SnR, respectively, in each of the four pixels P, the two parasitic capacitances are applied. The negative effects of are offset. As a result, in the pixel voltage of each pixel P, voltage pull-in is prevented. For example, the pixel voltage of pixel P in the first row is written as shown in Fig. 5 (c). In the period between the periods Tl and T2, that is, the writing period for the pixels ⁇ in the second to fourth rows, the applied source voltage can be held without increasing or decreasing. As a result, the pixels in the first row can be lit and displayed with a desired luminance.
- source voltages having opposite polarities are applied to the source lines SnL and SnR on both sides of each pixel P within one frame period. Therefore, it is possible to prevent the occurrence of voltage pulling due to parasitic capacitance regardless of the display image of information such as when displaying only one color of RGB or when displaying white. Therefore, it is possible to reliably prevent the display performance from deteriorating.
- both sides of the pixel P are provided on the source line (signal wiring) to which the source voltage (voltage signal) corresponding to the information to be displayed is applied.
- source line signal wiring
- left and right source lines SlL to SnL and SlR to SnR first and second signal wirings
- the number of pixel electrodes 5 connected to the source lines SlL to SnL and SlR to SnR is set to the same number.
- the liquid crystal display device 1 of the present embodiment When displaying information, it is possible to have the same number of positive and negative pixels. As a result, in the liquid crystal display device 1 of the present embodiment, it is possible to prevent the occurrence of luminance unevenness at the boundary portion of the divided area and the visual recognition of the boundary portion, and improve the display performance.
- the liquid crystal display device 1 of the present embodiment when one frame of information is displayed, the polarity of the source lines S1L to SnL and S1R to SnR is changed. There is no need to flip it.
- the liquid crystal display device 1 of the present embodiment unlike the conventional example, it is possible to prevent the load on the source lines SlL to SnL and SlR to SnR from increasing even when the number of pixels is increased. .
- the liquid crystal display device 1 of the present embodiment prevents the generation of power that does not directly contribute to information display. In combination with preventing the increase of the load of ⁇ SnR, the power consumption of the liquid crystal display device 1 can be reduced.
- liquid crystal display device 1 of the present embodiment since RGB pixels are included, RGB Even when performing all-color display or any single color display, a liquid crystal display device that has excellent display performance that prevents the occurrence of a luminance difference and is capable of labor-saving color display is configured. Can do.
- the liquid crystal display device of the present invention is not limited to this and is not limited to this. It can be applied to a liquid crystal display device of a type.
- the force described for the case of the TN mode liquid crystal layer is not limited to this.
- the present invention is not limited to this.
- the so-called longitudinal electric field controls the alignment of the liquid crystal molecules in the liquid crystal layer VA (
- the present invention can also be applied to a liquid crystal layer of a liquid crystal mode such as an IPS (In-Plane-Switching) mode in which the alignment of liquid crystal molecules is controlled by a liquid crystal mode such as a vertical-alignment mode or a lateral electric field.
- IPS In-Plane-Switching
- the switching element of the present invention is not limited to this, and other three terminals such as a field effect transistor or a thin film.
- a two-terminal switching element such as a diode can also be used.
- the parasitic capacitance generated between the pixel electrode and each of the first and second signal lines is configured to be substantially the same, and the first
- the voltage signals having the same polarity and opposite polarity are applied to the second signal wiring.
- the present invention applies two signals in which voltage signals having different polarities are applied to both sides of the pixel. If wiring is provided for each pixel and the number of pixel electrodes connected to each signal wiring through the switching element is set to the same number in a plurality of pixels arranged between the two signal wirings, It is not limited at all.
- the parasitic capacitance generated between the pixel electrode and each of the first and second signal wirings is obtained in advance by calculation, experiment, and the like. Voltage pull-in due to parasitic capacitance by appropriately changing the voltage applied to the corresponding signal wiring It is also possible to improve display performance by preventing adverse effects such as viewing.
- the voltage of the pixel changes due to the difference between the two parasitic capacitances. This is preferable in that it can be easily prevented and the display performance of the liquid crystal display device can be reliably improved.
- the first and second signal wirings are This is preferable in that a voltage signal can be easily applied. Furthermore, it is also preferable in that the configuration of a drive circuit (source driver) for applying a signal voltage to each signal wiring or a controller for instructing a signal voltage to be applied to this drive circuit can be simplified.
- the pixel electrodes are connected to the first and second signal wirings via the switching elements.
- the present invention is not limited to this.
- the configuration may be such that every two pixel electrodes are connected to the first or second signal wiring.
- a plurality of pixels can be driven by the same driving as the dot inversion driving, and the display performance can be surely improved. It is preferable in that it can be performed.
- the liquid crystal display device and the driving method thereof according to the present invention can improve display performance and reduce power consumption even when the number of pixels is increased. It is effective for a liquid crystal display device having a Z or high-definition display surface and a driving method thereof.
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Abstract
Description
明 細 書 Specification
液晶表示装置、及びその駆動方法 Liquid crystal display device and driving method thereof
技術分野 Technical field
[0001] 本発明は、アクティブマトリックス型の液晶表示装置、及びその駆動方法に関する。 The present invention relates to an active matrix liquid crystal display device and a driving method thereof.
背景技術 Background art
[0002] 近年、薄膜トランジスタ(TFT: Thin Film Transistor)等のスイッチング素子及び画 素電極を有する画素をマトリックス状に配置したアクティブマトリクッス型の液晶表示 装置が知られている。 In recent years, an active matrix type liquid crystal display device in which pixels having switching elements such as thin film transistors (TFTs) and pixel electrodes are arranged in a matrix is known.
[0003] ここで、図 6及び図 7を参照しながら、上記のようなアクティブマトリクッス型の従来の 液晶表示装置について説明する。図 6は従来の液晶表示装置の要部構成を説明す る図であり、図 7は上記従来の液晶表示装置の画素構成を示す等価回路図である。 Here, with reference to FIG. 6 and FIG. 7, a conventional liquid crystal display device of the above active matrix type will be described. FIG. 6 is a diagram for explaining a main configuration of a conventional liquid crystal display device, and FIG. 7 is an equivalent circuit diagram showing a pixel configuration of the conventional liquid crystal display device.
[0004] 図 6に例示するように、従来の液晶表示装置では、 5本の信号配線 S1〜S5と 4本 の走査配線 G1〜G4とが互いに直交するように、 TFTガラス基板上に配列されてお り、複数の画素が当該 TFTガラス基板上でマトリックス状に設けられている。また、各 画素には、 TFT及び画素電極 Peが設けられている。 [0004] As illustrated in FIG. 6, in a conventional liquid crystal display device, five signal wirings S1 to S5 and four scanning wirings G1 to G4 are arranged on a TFT glass substrate so as to be orthogonal to each other. A plurality of pixels are provided in a matrix on the TFT glass substrate. Each pixel is provided with a TFT and a pixel electrode Pe.
[0005] 詳細にいえば、各画素では、 TFTのソース及びゲートがいずれかの信号配線 Sl〜 S 5及びいずれかの走査配線 G1〜G4にそれぞれ接続されている。一方、 TFTのド レインには、画素電極 Peが接続されている。そして、この従来の液晶表示装置では、 例えば TFTのソース及びゲートが走査配線 G1及び信号配線 S1にそれぞれ接続さ れた画素において、走査配線 G1に印加された走査電圧が所定のハイレベルにされ たときに、その画素の TFTはオン状態とされる。 More specifically, in each pixel, the source and gate of the TFT are connected to one of the signal wirings Sl to S 5 and one of the scanning wirings G1 to G4, respectively. On the other hand, a pixel electrode Pe is connected to the TFT drain. In this conventional liquid crystal display device, for example, in a pixel in which the source and gate of the TFT are connected to the scanning line G1 and the signal line S1, respectively, the scanning voltage applied to the scanning line G1 is set to a predetermined high level. Sometimes the TFT of that pixel is turned on.
[0006] さらに、この画素では、信号配線 S1からの信号電圧が TFTのドレインを介して、画 素電極 Peに印加される。その後、上記走査電圧が所定のローレベルにされたときに 、その画素の TFTはオフ状態とされて、画素電極 Peの電荷が保たれる。 [0006] Further, in this pixel, the signal voltage from the signal wiring S1 is applied to the pixel electrode Pe via the drain of the TFT. Thereafter, when the scanning voltage is set to a predetermined low level, the TFT of the pixel is turned off, and the charge of the pixel electrode Pe is maintained.
[0007] また、図 7に示すように、従来の液晶表示装置には、ソースドライバ 51及びゲートド ライバ 52が設置されており、これらソースドライバ 51及びゲートドライバ 52は n本 (nは 整数)の信号配線 Sl〜Sn及び m本 (mは整数)の走査配線 Gl〜Gmに対して、信 号電圧及び走査電圧をそれぞれ出力するように構成されて ヽる。 [0007] As shown in FIG. 7, the conventional liquid crystal display device is provided with a source driver 51 and a gate driver 52, and the source driver 51 and the gate driver 52 are n (n is an integer). Signal lines Sl to Sn and m (m is an integer) scanning lines Gl to Gm It may be configured to output a signal voltage and a scanning voltage, respectively.
[0008] また、従来の液晶表示装置では、画素毎に液晶容量 C1と付加容量 C2とを含んだ 画素容量部 C3が設けられており、画素電極 Peの電荷が保たれたときにその電荷に 応じた上記信号電圧を画素容量部 C3にて保持するようになって 、る。 [0008] In addition, in the conventional liquid crystal display device, the pixel capacitor unit C3 including the liquid crystal capacitor C1 and the additional capacitor C2 is provided for each pixel, and when the charge of the pixel electrode Pe is maintained, The corresponding signal voltage is held by the pixel capacitor C3.
[0009] 詳細に 、えば、従来の液晶表示装置には、液晶層を狭持した状態で、上記 TFTガ ラス基板に対向して配置された対向ガラス基板と、対向ガラス基板の全面を覆うよう に設けられて、画素電極 Peに対向する対向電極とが設けられており(図示せず)、液 晶容量 C1が画素電極 Peと対向電極との間に形成されている。また、 TFTガラス基板 には、画素電極 Peの下方側に付加容量配線が設置されており(図示せず)、付加容 量 C2が画素電極 Peと付加容量配線との間に形成されている。そして、各画素では、 信号電圧が画素容量部 C3に保持される。 In detail, for example, in a conventional liquid crystal display device, a counter glass substrate disposed opposite to the TFT glass substrate and a whole surface of the counter glass substrate are covered with a liquid crystal layer sandwiched therebetween. And a counter electrode facing the pixel electrode Pe (not shown), and a liquid crystal capacitance C1 is formed between the pixel electrode Pe and the counter electrode. Further, the TFT glass substrate is provided with an additional capacitor wiring (not shown) below the pixel electrode Pe, and an additional capacitor C2 is formed between the pixel electrode Pe and the additional capacitor wiring. In each pixel, the signal voltage is held in the pixel capacitor C3.
[0010] 以上のように構成された従来の液晶表示装置では、ゲートドライバ 52は例えば走 查配線 G1から走査配線 Gmに対し、走査信号を順次出力することにより、 1行分(1 水平ライン分)の各 TFTのゲートが同時にオン状態となり、ソースドライバ 51によって 信号配線 Sl、 · ··、 Snから信号電圧が画素単位に入力される。この結果、信号電圧 が各画素電極 Peに印加され、この画素電極 Peと対向電極との電位差に応じて液晶 層の透過率が変化することにより、信号電圧に応じた階調表示が実現される。 [0010] In the conventional liquid crystal display device configured as described above, the gate driver 52 sequentially outputs scanning signals from the scanning wiring G1 to the scanning wiring Gm, for example, for one row (one horizontal line). ) Of the TFTs are simultaneously turned on, and the signal voltage is input from the signal wirings Sl,... As a result, a signal voltage is applied to each pixel electrode Pe, and the transmissivity of the liquid crystal layer changes according to the potential difference between the pixel electrode Pe and the counter electrode, thereby realizing gradation display according to the signal voltage. .
[0011] また、上記液晶層では、長時間にわたって直流電圧が印加され続けると、その保持 特性が劣化するため、信号配線 Sl、 · ··、 Snから画素電極 Peに印加される信号電圧 の極性を、例えばフレーム(1水平期間)毎に反転するなどして、画素電極 Peには正 極性の電圧と負極性の電圧とが交互に加えられる、いわゆる交流駆動が行われる。 尚、ここでいう極性とは、対向電極に対する電圧の極性を意味している。 [0011] In addition, in the liquid crystal layer, if a DC voltage is continuously applied over a long period of time, its holding characteristics deteriorate. Therefore, the polarity of the signal voltage applied to the pixel electrode Pe from the signal wirings Sl,. For example, by reversing each frame (one horizontal period), a positive polarity voltage and a negative polarity voltage are alternately applied to the pixel electrode Pe, so-called AC driving is performed. In addition, the polarity here means the polarity of the voltage with respect to the counter electrode.
[0012] し力しながら、上記のように、フレーム毎に極性を正または負に変化させる交流駆動 が行われると、 TFTの特性などに起因して上記液晶層で保持される電圧には非対称 性が発生する。このため、 1フレーム内で表示面の画素全体に対して、同一の極性で 電圧を印加すると、極性の正または負の微妙な電位差が生じる。この結果、表示面 上にフリツ力が現れて、表示性能の低下を招いた。 However, as described above, when AC driving is performed to change the polarity to positive or negative for each frame as described above, the voltage held in the liquid crystal layer is asymmetric due to TFT characteristics and the like. Sexuality occurs. For this reason, if a voltage with the same polarity is applied to all the pixels on the display surface within one frame, a slight potential difference between the positive and negative polarities occurs. As a result, flickering force appeared on the display surface, resulting in a decrease in display performance.
[0013] そこで、従来の液晶表示装置では、 1フレーム期間内において、 1水平ライン毎に 極性を変化させるライン反転駆動や 1画素毎に極性を変えるドット反転駆動を行うこと により、上記フリツ力の発生を軽減して、表示性能が低下するのを抑制することが知ら れている。また、ライン反転駆動及びドット反転駆動においては、ライン反転駆動に比 ベて、ドット反転駆動の方が液晶表示装置の表示性能を容易に向上できるため、表 示面での解像度が低い VGA (Video Graphics Array)などでは、ライン反転駆動も多 <存在した。 Therefore, in the conventional liquid crystal display device, every horizontal line within one frame period. It is known that by performing line inversion driving for changing the polarity and dot inversion driving for changing the polarity for each pixel, the generation of the above-mentioned flickering force is reduced and the display performance is prevented from deteriorating. In line inversion driving and dot inversion driving, the display performance of the liquid crystal display device can be improved more easily by dot inversion driving compared to line inversion driving. In the case of Graphics Array), there were many line inversion drives.
[0014] しかしながら、 SVGA (Super Video Graphics Array)、 XGA (Extended Graphics Ar ray)、あるいは SXGA (Super Extended Graphics Array)などの解像度の高い表示面 、あるいは大型の表示面を有する従来の液晶表示装置では、その駆動方法のほとん どがドット反転駆動を採用して 、る。 However, in a conventional liquid crystal display device having a high resolution display surface such as SVGA (Super Video Graphics Array), XGA (Extended Graphics Ar ray), or SXGA (Super Extended Graphics Array) or a large display surface, Most of the driving methods adopt dot inversion driving.
[0015] 以下、図 8及び図 9を参照して、従来の液晶表示装置における、上記ドット反転駆 動について具体的に説明する。図 8は上記従来の液晶表示装置における、 Nフレー ム時での駆動例を説明する図であり、図 9は上記従来の液晶表示装置における、(N + 1)フレーム時での駆動例を説明する図である。 Hereinafter, with reference to FIG. 8 and FIG. 9, the dot inversion driving in the conventional liquid crystal display device will be specifically described. FIG. 8 is a diagram illustrating an example of driving in the N frame in the conventional liquid crystal display device, and FIG. 9 is an example of driving in the (N + 1) frame in the conventional liquid crystal display device. It is a figure to do.
[0016] 図 8及び図 9に示すように、ドット反転駆動では、 1フレームの表示画面において、 [0016] As shown in FIG. 8 and FIG. 9, in the dot inversion drive, on the display screen of one frame,
+極性の画素(図に〃 +〃にて図示)と—極性の画素(図に〃—〃にて図示)とが交互に 存在するために、上記フリツ力の発生を軽減することができる。 Since the positive polarity pixels (shown as 図 + 〃 in the figure) and negative pixels (shown as 〃-〃 in the figure) are alternately present, the generation of the above-mentioned flicker force can be reduced.
[0017] すなわち、ドット反転駆動では、ソースドライバ 51は図示しないコントローラ力も送ら れてきた映像信号に応じた画素データを蓄え、 1水平ライン分の画素データがソース ドライバ 51に蓄えられると、ゲートドライバ 52は、対応する走査配線 Gl〜Gmに印加 する走査電圧をノヽィレベルにして、対応する TFTをオン状態にする。同時に、ソース ドライバ 51は、蓄えていた画素データを信号電圧として対応する信号配線 Sl〜Sm に印加する。 That is, in dot inversion driving, the source driver 51 stores pixel data corresponding to a video signal that has also received controller power (not shown). When pixel data for one horizontal line is stored in the source driver 51, the gate driver In 52, the scanning voltage applied to the corresponding scanning wirings Gl to Gm is set to the noise level, and the corresponding TFT is turned on. At the same time, the source driver 51 applies the stored pixel data as a signal voltage to the corresponding signal wirings Sl to Sm.
[0018] また、このドット反転駆動では、ソースドライバ 51は 1水平ライン毎に信号配線 Sl〜 Smを介して画素に印加する信号電圧を逆極性とし、かつ、隣接する信号配線 Sl〜 Sm毎においても、信号電圧を逆極性とする。このため、ドット反転駆動では、例えば 図 8に示すように画素の極性は、図の横方向及び縦方向で隣り合う画素の極性と互 いに反対とされて、 +極性及び 極性の画素が 1フレームの表示画面において上記 横方向及び縦方向の各々の方向で交互に混在する。 In this dot inversion drive, the source driver 51 reverses the signal voltage applied to the pixel via the signal wirings Sl to Sm for each horizontal line, and in each adjacent signal wiring Sl to Sm. Also, the signal voltage has a reverse polarity. For this reason, in the dot inversion drive, for example, as shown in FIG. 8, the polarity of the pixel is opposite to the polarity of the adjacent pixel in the horizontal direction and the vertical direction in the figure, and the pixel of + polarity and polarity is 1 Above on the frame display screen They are mixed alternately in the horizontal and vertical directions.
[0019] また、このドット反転駆動では、次のフレームを表示するときに、ソースドライバ 51は 各信号配線 Sl〜Smへの信号電圧の極性を反転させて出力する。それ故、図 9に示 すように、各画素の極性は図 8のものと反転されたものになる。 In the dot inversion driving, when displaying the next frame, the source driver 51 inverts the polarity of the signal voltage to each of the signal wirings Sl to Sm and outputs the inverted signal voltage. Therefore, as shown in Fig. 9, the polarity of each pixel is inverted from that of Fig. 8.
[0020] また、各画素においては、画素電極 Peと信号配線との間などに寄生容量が生じて おり、従来の液晶表示装置では、寄生容量に起因して画素への印加電圧が変化し、 所望の輝度で画素を発光できな 、ことがあった。 [0020] Further, in each pixel, a parasitic capacitance is generated between the pixel electrode Pe and the signal wiring. In the conventional liquid crystal display device, the voltage applied to the pixel changes due to the parasitic capacitance, In some cases, pixels could not emit light with the desired brightness.
[0021] 以下、図 10を用いて、寄生容量による表示性能の低下について具体的に説明す る。図 10 (a)は上記従来の液晶表示装置での画素電極とソースラインとの間の寄生 容量を説明する図であり、図 10 (b)は画素で発生する電圧引込みを説明する図であ る。 Hereinafter, the deterioration in display performance due to parasitic capacitance will be specifically described with reference to FIG. FIG. 10 (a) is a diagram for explaining the parasitic capacitance between the pixel electrode and the source line in the conventional liquid crystal display device, and FIG. 10 (b) is a diagram for explaining the voltage pull-in generated in the pixel. The
[0022] 図 10 (a)に例示するように、画素では、画素電極 Peと信号配線 SNとの間に寄生容 量 Cglが生じている。また、この画素では、画素電極 Peと隣接する画素の信号配線( SN+ 1)との間に寄生容量 Cg2が生じている。さらに、画素では、画素電極 Peと近傍 に設けられた上記走査配線との間などにも寄生容量が存在している。 As illustrated in FIG. 10A, in the pixel, a parasitic capacitance Cgl is generated between the pixel electrode Pe and the signal wiring SN. In this pixel, a parasitic capacitance Cg2 is generated between the pixel electrode Pe and the signal wiring (SN + 1) of the adjacent pixel. Further, in the pixel, parasitic capacitance exists also between the pixel electrode Pe and the scanning wiring provided in the vicinity.
[0023] それ故、図 10 (b)に示すように、画素において、信号配線 SNから画素電極 Peに対 し信号電圧 VSNが時点 SOから印加されたときに、画素電極 Peに印加された画素電 圧 VPは寄生容量と信号配線 (SN+ 1)に印加された信号電圧 VS (N+ 1)とに影響 されて変化する。すなわち、図に示すように、信号電圧 VSNの振幅を Δνとしたとき に、画素電圧 VPは一定の電圧で安定せずに Δν'だけ変化する。このように、画素 では、寄生容量のために、画素電圧 VPに電圧引込みが発生して、輝度が変化し表 示性能の低下を生じた。 Therefore, as shown in FIG. 10 (b), in the pixel, when the signal voltage VSN is applied from the signal wiring SN to the pixel electrode Pe from the time point SO, the pixel applied to the pixel electrode Pe The voltage VP changes depending on the parasitic capacitance and the signal voltage VS (N + 1) applied to the signal wiring (SN + 1). That is, as shown in the figure, when the amplitude of the signal voltage VSN is Δν, the pixel voltage VP changes by Δν ′ without being stabilized at a constant voltage. As described above, in the pixel, due to the parasitic capacitance, a voltage pull-in occurs in the pixel voltage VP, the luminance changes, and the display performance deteriorates.
[0024] 尚、この電圧変化分 Δ V'は、寄生容量 Cglと寄生容量 Cg2との和で求められる画 素電極 Peと信号配線 SN、(SN+ 1)との寄生容量を Csouとし、さらには画素に寄生 する全ての寄生容量の和を∑Cとしたときに、 AV' =CsouX AV÷∑Cで求められ る。 The voltage change ΔV ′ is defined as Csou, where Csou is the parasitic capacitance between the pixel electrode Pe and the signal wiring SN, (SN + 1), which is obtained by the sum of the parasitic capacitance Cgl and the parasitic capacitance Cg2. AV '= CsouX AV / ∑C, where ∑C is the sum of all parasitic capacitances in the pixel.
[0025] 続いて、図 11及び図 12も参照して、ドット反転駆動を行ったときに、従来の液晶表 示装置で発生する寄生容量に起因した表示性能の低下について具体的に説明する 。図 11は単色表示が行われたときでの上記従来の液晶表示装置の各部における電 圧波形の具体例を示すグラフであり、図 12は RGBの全色表示が行われたときでの 上記従来の液晶表示装置の各部における電圧波形の具体例を示すグラフである。 尚、以下の説明では、 4本の走査配線にそれぞれ接続された 4つの画素をドット反転 駆動する場合を例示して説明する。 Next, with reference to FIG. 11 and FIG. 12 as well, a specific description will be given of a decrease in display performance due to parasitic capacitance generated in a conventional liquid crystal display device when dot inversion driving is performed. . FIG. 11 is a graph showing a specific example of voltage waveforms in each part of the conventional liquid crystal display device when the single color display is performed, and FIG. 12 is the graph when the conventional color image is displayed when all the colors of RGB are displayed. It is a graph which shows the specific example of the voltage waveform in each part of this liquid crystal display device. In the following description, a case where four pixels respectively connected to four scanning wirings are driven by dot inversion will be described.
[0026] 図 11 (a)に示すように、上記 4つの画素では、図に点線にて示す上記対向電極へ の印加電圧に対し、 +極性及び 極性の信号電圧が信号配線から交互に印加され ている。 [0026] As shown in FIG. 11 (a), in the four pixels, a signal voltage of + polarity and polarity is alternately applied from the signal wiring with respect to the voltage applied to the counter electrode indicated by a dotted line in the drawing. ing.
[0027] また、図 11 (b)に示すように、上記 4つの画素に対して、走査配線の配線方向でそ れぞれ隣接する 4つの画素では、対向電極への印加電圧と同電位の信号電圧が信 号配線から印加されている。それ故、従来の液晶表示装置において、赤色 (R)、緑 色 (G)、及び青色 (B)をそれぞれ表示する RGBの画素が走査配線の配列方向に沿 つて順次設けられている場合、例えば Rの画素のみが図 11 (a)に示した信号電圧に 応じた輝度で発光して、赤色表示が行われる。 Further, as shown in FIG. 11 (b), the four pixels adjacent to each other in the wiring direction of the scanning wiring with respect to the above four pixels have the same potential as the voltage applied to the counter electrode. Signal voltage is applied from the signal wiring. Therefore, in the conventional liquid crystal display device, when RGB pixels that respectively display red (R), green (G), and blue (B) are sequentially provided along the arrangement direction of the scanning wiring, for example, Only the R pixel emits light with a luminance corresponding to the signal voltage shown in FIG. 11 (a), and a red display is performed.
[0028] このとき、例えば表示面の最上段の Rの画素では、その画素電圧は図 11 (c)に" tl "及び" t2"にてそれぞれ示す 1番目のフレーム及び 2番目のフレームでの信号電圧 の書込み期間において、図 11 (a)に示した信号電圧に応じて増減する。さらに、赤 色表示のときでは、書込み期間 tlと t2との間の期間、つまり 2〜4段目の画素に対す る信号電圧の書込み期間において、対応する信号電圧による電圧引込みが、最上 段の Rの画素の画素電圧に生じる。 [0028] At this time, for example, in the uppermost R pixel on the display surface, the pixel voltage in each of the first and second frames indicated by "tl" and "t2" in FIG. In the signal voltage writing period, the signal voltage increases or decreases according to the signal voltage shown in Fig. 11 (a). Further, in the case of red display, during the period between the writing period tl and t2, that is, the writing period of the signal voltage for the pixels in the second to fourth stages, the voltage pull-in by the corresponding signal voltage is This occurs in the pixel voltage of the R pixel.
[0029] 具体的には、図 11 (c)に示すように、書込み期間 tlと t2との間の期間において、例 えば 2段目の画素に 極性の信号電圧が印加されたとき、最上段の Rの画素の画素 電圧は寄生容量によって書込み期間 tlに印加された信号電圧よりも低減する。続い て、 3段目の画素に +極性の信号電圧が印加されたとき、最上段の Rの画素の画素 電圧は寄生容量によって書込み期間 tlに印加された信号電圧に戻るように増加す る。このように最上段の Rの画素の画素電圧に対し、寄生容量による電圧引込みが発 生して、当該画素での輝度が変化する。 Specifically, as shown in FIG. 11 (c), in the period between the write period tl and t2, for example, when a polar signal voltage is applied to the second stage pixel, the top stage The pixel voltage of the R pixel is lower than the signal voltage applied during the write period tl due to parasitic capacitance. Subsequently, when a + polarity signal voltage is applied to the third stage pixel, the pixel voltage of the uppermost R pixel is increased by the parasitic capacitance so as to return to the signal voltage applied in the writing period tl. In this way, voltage pull-in due to parasitic capacitance occurs with respect to the pixel voltage of the uppermost R pixel, and the luminance at that pixel changes.
[0030] 一方、従来の液晶表示装置において、例えば RGBの全ての画素を発光させて白 色表示を行わせるときでは、図 12 (a)及び (b)にそれぞれ示すように、上記 4つの画 素及びこれらの画素に隣接する 4つの画素では、極性が相異する信号電圧が印加さ れている。また、例えば最上段の Rの画素では、その画素電圧は図 12 (c)に" t3"及 び" t4"にてそれぞれ示す 1番目のフレーム及び 2番目のフレームでの信号電圧の書 込み期間において、図 12 (a)に示した信号電圧に応じて増減する。 [0030] On the other hand, in a conventional liquid crystal display device, for example, all RGB pixels emit light and white When color display is performed, as shown in FIGS. 12 (a) and 12 (b), signal voltages having different polarities are applied to the above four pixels and the four pixels adjacent to these pixels. It is. Also, for example, in the uppermost R pixel, the pixel voltage is the signal voltage writing period in the first and second frames indicated by “t3” and “t4” in FIG. In FIG. 12, it increases or decreases according to the signal voltage shown in FIG.
[0031] また、白色表示のときでは、上記赤色表示のときと異なり、 2〜4段目の画素に対す る信号電圧の書込み期間(書込み期間 t3と t4との間の期間)において、信号電圧に よる電圧引込みが最上段の Rの画素の画素電圧に発生せずに、図 12 (c)に示すよう に、最上段の Rの画素の画素電圧は、書込み期間 t3と t4との間で一定の信号電圧 で保たれて、所望の輝度での赤色表示が行われる。これは、例えば 2段目の Rの画 素に対して、 極性の信号電圧が印加されるときに、同時に当該 2段目の Rの画素 に隣接する 2段目の Gの画素に対して、 +極性の信号電圧が印加されており、これに よって最上段の Rの画素の画素電圧に対する電圧引込み力 ほぼ相殺されているか らである。 [0031] In addition, in the white display, unlike the red display, the signal voltage is written in the signal voltage writing period (the period between the writing periods t3 and t4) for the pixels in the second to fourth stages. Thus, as shown in Fig. 12 (c), the pixel voltage of the uppermost R pixel is not changed between the writing periods t3 and t4. A red signal is displayed at a desired luminance while maintaining a constant signal voltage. For example, when a polar signal voltage is applied to the second stage R pixel, the second stage G pixel adjacent to the second stage R pixel is simultaneously This is because a + polarity signal voltage is applied, which almost cancels out the voltage pulling force with respect to the pixel voltage of the uppermost R pixel.
[0032] 以上のように、従来の液晶表示装置では、ドット反転駆動により、 RGBのいずれか の単色表示を行わせる場合と、白色表示を行わせる場合とでは、図 11 (c)及び図 12 (c)に示したように、同一の画素における画素電圧が相異して、輝度の値に差が生じ た。この結果、従来の液晶表示装置では、単色表示のときと白色表示のときにおいて 、画素の表示輝度が異なって表示性能の低下を生じると!、う問題点があった。 [0032] As described above, in the conventional liquid crystal display device, in the case where any one of RGB single color display and white display are performed by dot inversion driving, FIG. 11 (c) and FIG. As shown in (c), the pixel voltages in the same pixel differed, resulting in a difference in luminance value. As a result, the conventional liquid crystal display device has a problem in that the display performance of the pixel is different between the monochrome display and the white display and the display performance is deteriorated.
[0033] 上記のような問題点を解決するために、従来の液晶表示装置には、例えば特開平 10— 213808号公報ある!/ヽ ίま特開 2003— 140625号公報【こ記載されて!ヽるように 、上記寄生容量を抑制して画素での電圧変化を補償する補償配線を設けることが提 案されている。すなわち、これらの従来の液晶表示装置では、全ての各信号配線に 対して、平行な補償配線を設け、信号配線に印加する信号電圧とは逆極性の補償 電圧を補償配線に印加していた。そして、これら従来の液晶表示装置では、寄生容 量による電圧変化を補償して、表示性能の低下を防止可能とされて ヽた。 [0033] In order to solve the above-described problems, conventional liquid crystal display devices include, for example, Japanese Patent Application Laid-Open No. 10-213808 and Japanese Patent Application Laid-Open No. 2003-140625. As can be seen, it has been proposed to provide a compensation wiring that suppresses the parasitic capacitance and compensates for a voltage change in the pixel. That is, in these conventional liquid crystal display devices, a parallel compensation wiring is provided for each signal wiring, and a compensation voltage having a polarity opposite to that of the signal voltage applied to the signal wiring is applied to the compensation wiring. In these conventional liquid crystal display devices, it has been possible to compensate for the voltage change due to the parasitic capacitance and prevent the display performance from being deteriorated.
発明の開示 Disclosure of the invention
発明が解決しょうとする課題 [0034] ところで、液晶表示装置では、表示面の大画面化や高精細化が要望されて!、る。 特に、デジタル放送が受信可能な液晶テレビ等のハイエンド製品では、大画面化及 び高精細化の双方を実現することが強く要望されており、表示面での画素数を増加 させることが要求されて!、る。 Problems to be solved by the invention By the way, in the liquid crystal display device, there is a demand for a large display screen and high definition! In particular, high-end products such as LCD TVs that can receive digital broadcasts are strongly required to achieve both large screens and high definition, and it is required to increase the number of pixels on the display surface. ! RU
[0035] ところが、上記のような従来の液晶表示装置では、画素数を増加させたときに、表 示性能を向上できな力つたり、消費電力が著しく増カロしたりするという問題点を生じる ことがあった。 However, in the conventional liquid crystal display device as described above, when the number of pixels is increased, there are problems that display performance cannot be improved and power consumption increases significantly. There was a thing.
[0036] 具体的にいえば、上記従来の液晶表示装置では、画素数を増加させたときに、信 号配線の負荷が著しく大きくなることがあった。つまり、従来の液晶表示装置におい て、上記ドット反転駆動やライン反転駆動を行わせるときには、画素数の増加に応じ て、 +極性及び 極性の反転周波数 (つまり、駆動周波数)を大きくすることが要求さ れて、信号配線の負荷を著しく増大させた。この結果、従来の液晶表示装置では、 画素数を増加させたときに、ドット反転駆動やライン反転駆動にて駆動させることが困 難となり、液晶表示装置の表示面を上下左右の複数領域に分割して、分割した領域 毎にドット反転駆動などを実施していた。このため、従来の液晶表示装置では、画素 数を増加させたときに、分割した領域の境目部分で輝度ムラが生じたり、当該境目部 分が視認されたりして、表示性能の向上を図るのが難しかった。 More specifically, in the conventional liquid crystal display device, when the number of pixels is increased, the load on the signal wiring may be significantly increased. In other words, in the conventional liquid crystal display device, when performing the dot inversion driving or the line inversion driving, it is required to increase the + polarity and the polarity inversion frequency (that is, the driving frequency) as the number of pixels increases. As a result, the load on the signal wiring was significantly increased. As a result, in conventional liquid crystal display devices, when the number of pixels is increased, it becomes difficult to drive with dot inversion drive or line inversion drive, and the display surface of the liquid crystal display device is divided into a plurality of regions, top, bottom, left, and right Thus, dot inversion driving was performed for each divided area. For this reason, in the conventional liquid crystal display device, when the number of pixels is increased, luminance unevenness occurs at the boundary portion of the divided area or the boundary portion is visually recognized, thereby improving display performance. It was difficult.
[0037] また、従来の液晶表示装置では、補償配線を画素単位に設置して 、たが、この補 償配線は画素電極に接続されていなカゝつた。それ故、従来の液晶表示装置では、画 素数を増加させたときに、情報表示に直接的に寄与しない電力が増えて、信号配線 の負荷が大きくなる点とも相まって、消費電力が増大するという問題点があった。 [0037] Further, in the conventional liquid crystal display device, the compensation wiring is provided for each pixel. However, the compensation wiring is not connected to the pixel electrode. Therefore, in the conventional liquid crystal display device, when the number of pixels is increased, the power that does not directly contribute to the information display increases, and the load on the signal wiring increases, which increases the power consumption. There was a point.
[0038] 上記の課題を鑑み、本発明は、画素数を増加させたときでも、表示性能を向上させ ることができ、消費電力を低減することができる液晶表示装置、及びその駆動方法を 提供することを目的とする。 In view of the above problems, the present invention provides a liquid crystal display device capable of improving display performance and reducing power consumption even when the number of pixels is increased, and a driving method thereof. The purpose is to do.
課題を解決するための手段 Means for solving the problem
[0039] 上記の目的を達成するために、本発明にかかる液晶表示装置は、マトリックス状に 配列された複数の走査配線及び複数の信号配線と、前記走査配線と前記信号配線 との交差部の近傍に設けられたスイッチング素子及び前記スイッチング素子に接続さ れた画素電極を有するとともに、マトリックス状に設けられた複数の画素とを備えた液 晶表示装置であって、 In order to achieve the above object, a liquid crystal display device according to the present invention includes a plurality of scanning wirings and a plurality of signal wirings arranged in a matrix, and intersections of the scanning wirings and the signal wirings. Switching element provided in the vicinity and connected to the switching element. A liquid crystal display device having a plurality of pixels arranged in a matrix and having a pixel electrode.
前記信号配線には、前記走査配線の配線方向で前記画素電極を挟むように対応 する画素の両側に設けられるとともに、互いに異なる極性の電圧信号が印加される第 The signal wiring is provided on both sides of the corresponding pixel so as to sandwich the pixel electrode in the wiring direction of the scanning wiring, and voltage signals having different polarities are applied to the signal wiring.
1及び第 2の信号配線が含まれ、かつ、 1 and second signal wiring are included, and
前記第 1及び第 2の信号配線の間に配置された複数の前記画素において、前記第 1の信号配線に対し、前記スイッチング素子を介して接続された前記画素電極の個 数と、前記第 2の信号配線に対し、前記スイッチング素子を介して接続された前記画 素電極の個数とが同数に設定されていることを特徴とするものである。 In the plurality of pixels arranged between the first and second signal wirings, the number of the pixel electrodes connected to the first signal wiring through the switching element, and the second The number of the pixel electrodes connected to the signal wiring via the switching element is set to the same number.
[0040] 上記のように構成された液晶表示装置では、画素の両側に設けられるとともに、互 いに異なる極性の電圧信号が印加される第 1及び第 2の信号配線が信号配線に含ま れている。また、第 1及び第 2の信号配線に接続される画素電極の個数が同数に設 定されている。これにより、上記従来例と異なり、画素数を増加させたときでも、複数 の領域に分割することなぐ 1フレームの情報表示を行うときに、 +極性の画素と 極 性の画素とを同数とすることができる。この結果、従来例と異なり、分割した領域の境 目部分での輝度ムラの発生などを防ぐことができ、表示性能を向上させることができ る。また、 1フレームの情報表示を行うときには、第 1及び第 2の信号配線の極性を反 転させる必要がないので、上記従来例と異なり、画素数を増加させたときでも、信号 配線の負荷が大きくなるのを防止することができる。し力も、情報表示に直接的に寄 与しない電力が生じるのを防ぐことができるので、消費電力を低減することが可能とな る。 In the liquid crystal display device configured as described above, the signal wiring includes first and second signal wirings that are provided on both sides of the pixel and to which voltage signals having different polarities are applied. Yes. Further, the number of pixel electrodes connected to the first and second signal wirings is set to the same number. As a result, unlike the above-described conventional example, even when the number of pixels is increased, when displaying one frame of information without dividing it into a plurality of regions, the same number of + polar pixels and polar pixels are used. be able to. As a result, unlike the conventional example, it is possible to prevent the occurrence of uneven brightness at the boundary between the divided areas and improve the display performance. In addition, when displaying one frame of information, it is not necessary to reverse the polarity of the first and second signal wirings. Unlike the conventional example, the load on the signal wiring is increased even when the number of pixels is increased. It can be prevented from becoming large. As a result, it is possible to prevent the generation of electric power that does not directly contribute to the information display, thereby reducing power consumption.
[0041] また、上記液晶表示装置では、前記画素において、前記画素電極と前記第 1の信 号配線との間に発生する寄生容量と、前記画素電極と前記第 2の信号配線との間に 発生する寄生容量とが、実質的に同一であることが好ましい。 In the liquid crystal display device, in the pixel, a parasitic capacitance generated between the pixel electrode and the first signal wiring, and between the pixel electrode and the second signal wiring. It is preferable that the generated parasitic capacitance is substantially the same.
[0042] この場合、画素では上記 2つの寄生容量の相異に起因して電圧が変化するのを容 易に防ぐことができ、表示性能を確実に向上させることができる。 In this case, in the pixel, the voltage can be easily prevented from changing due to the difference between the two parasitic capacitances, and the display performance can be reliably improved.
[0043] また、上記液晶表示装置において、前記第 1及び第 2の信号配線には、同じ大きさ の電圧信号が印加されることが好ま 、。 [0044] この場合、第 1及び第 2の各信号配線に対して、電圧信号を容易に印加させること ができる。 [0043] In the liquid crystal display device, it is preferable that voltage signals having the same magnitude are applied to the first and second signal lines. [0044] In this case, a voltage signal can be easily applied to each of the first and second signal wirings.
[0045] また、上記液晶表示装置において、前記第 1及び第 2の信号配線の間に配置され た複数の前記画素において、前記第 1及び第 2の信号配線に対し、前記画素電極は 前記スイッチング素子を介して交互に接続されてもょ ヽ。 [0045] In the liquid crystal display device, in the plurality of pixels arranged between the first and second signal lines, the pixel electrode is connected to the first and second signal lines. It may be connected alternately through elements.
[0046] この場合、複数の画素をドット反転駆動と同一の駆動にて駆動させることができ、表 示性能を確実に向上させることができる。 In this case, a plurality of pixels can be driven by the same driving as the dot inversion driving, and the display performance can be improved reliably.
[0047] また、上記液晶表示装置において、前記画素には、前記走査配線の配線方向に 沿って、配設された赤色 (R)、緑色 (G)、及び青色 (B)をそれぞれ表示する RGBの 画素が含まれてもよい。 [0047] In the liquid crystal display device, the pixels display red (R), green (G), and blue (B) arranged along the direction of the scanning wiring, respectively. May be included.
[0048] この場合、 RGBの全色表示及びいずれかの単色表示を行うときでも、輝度差が生 じるのを防止した優れた表示性能を有し、かつ、省力化されたカラー表示が可能な 液晶表示装置を構成することができる。 [0048] In this case, even when performing RGB all-color display or any single color display, it has excellent display performance that prevents luminance differences from occurring, and enables labor-saving color display A liquid crystal display device can be configured.
[0049] また、本発明の液晶表示装置の駆動方法は、上記 、ずれかの液晶表示装置の駆 動方法であって、 [0049] Further, the driving method of the liquid crystal display device of the present invention is any one of the above driving methods of the liquid crystal display device,
前記第 1及び第 2の信号配線の一方の信号配線に対して、表示すべき情報に応じ た電圧信号を印加するとともに、前記第 1及び第 2の信号配線の他方の信号配線に 対して、前記電圧信号の極性を反転した電圧信号を同時に印加することを特徴とす るものである。 A voltage signal corresponding to information to be displayed is applied to one signal wiring of the first and second signal wirings, and to the other signal wiring of the first and second signal wirings, A voltage signal obtained by inverting the polarity of the voltage signal is applied simultaneously.
[0050] 上記のように構成された液晶表示装置の駆動方法では、画素数を増加させたとき でも、信号配線の負荷が大きくなるのを防止することができるので、表示性能を向上 させつつ、消費電力の低減を行うことが可能となる。 [0050] In the driving method of the liquid crystal display device configured as described above, even when the number of pixels is increased, it is possible to prevent an increase in the load on the signal wiring, thereby improving display performance. It becomes possible to reduce power consumption.
発明の効果 The invention's effect
[0051] 本発明によれば、画素数を増カロさせたときでも、表示性能を向上させることができ、 消費電力を低減することができる液晶表示装置、及びその駆動方法を提供すること が可能となる。 [0051] According to the present invention, it is possible to provide a liquid crystal display device capable of improving display performance and reducing power consumption even when the number of pixels is increased, and a driving method thereof. It becomes.
図面の簡単な説明 Brief Description of Drawings
[0052] [図 1]本発明の一実施形態に力かる液晶表示装置の要部構成を示す断面図である。 [図 2]上記液晶表示装置の画素構成を示す等価回路図である。 FIG. 1 is a cross-sectional view showing a configuration of a main part of a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is an equivalent circuit diagram showing a pixel configuration of the liquid crystal display device.
[図 3]Nフレーム時での上記液晶表示装置の駆動例を説明する図である。 FIG. 3 is a diagram for explaining an example of driving the liquid crystal display device in N frames.
[図 4] (N+ 1)フレーム時での上記液晶表示装置の駆動例を説明する図である。 FIG. 4 is a diagram for explaining a driving example of the liquid crystal display device at the time of (N + 1) frame.
[図 5]上記液晶表示装置の駆動時での各部における電圧波形を示すグラフである。 FIG. 5 is a graph showing voltage waveforms at various parts during driving of the liquid crystal display device.
[図 6]従来の液晶表示装置の要部構成を説明する図である。 FIG. 6 is a diagram illustrating a configuration of main parts of a conventional liquid crystal display device.
[図 7]上記従来の液晶表示装置の画素構成を示す等価回路図である。 FIG. 7 is an equivalent circuit diagram showing a pixel configuration of the conventional liquid crystal display device.
[図 8]上記従来の液晶表示装置における、 Nフレーム時での駆動例を説明する図で ある。 FIG. 8 is a diagram for explaining an example of driving in N frames in the conventional liquid crystal display device.
[図 9]上記従来の液晶表示装置における、 (N+ 1)フレーム時での駆動例を説明す る図である。 FIG. 9 is a diagram for explaining an example of driving at the time of (N + 1) frame in the conventional liquid crystal display device.
[図 10] (a)は上記従来の液晶表示装置での画素電極とソースラインとの間の寄生容 量を説明する図であり、 (b)は画素で発生する電圧引込みを説明する図である。 [FIG. 10] (a) is a diagram for explaining the parasitic capacitance between the pixel electrode and the source line in the conventional liquid crystal display device, and (b) is a diagram for explaining voltage pull-in generated in the pixel. is there.
[図 11]単色表示が行われたときでの上記従来の液晶表示装置の各部における電圧 波形の具体例を示すグラフである。 FIG. 11 is a graph showing a specific example of a voltage waveform in each part of the conventional liquid crystal display device when monochrome display is performed.
[図 12]RGBの全色表示が行われたときでの上記従来の液晶表示装置の各部におけ る電圧波形の具体例を示すグラフである。 FIG. 12 is a graph showing specific examples of voltage waveforms in the respective parts of the conventional liquid crystal display device when RGB full-color display is performed.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
[0053] 以下、本発明の液晶表示装置、及びその駆動方法を示す好ましい実施形態につ いて、図面を参照しながら説明する。なお、以下の説明では、本発明を透過型の液 晶表示装置に適用した場合を例示して説明する。 Hereinafter, preferred embodiments showing a liquid crystal display device of the present invention and a driving method thereof will be described with reference to the drawings. In the following description, the case where the present invention is applied to a transmissive liquid crystal display device will be described as an example.
[0054] 図 1は本発明の一実施形態にかかる液晶表示装置の要部構成を示す断面図であ り、図 2は上記液晶表示装置の画素構成を示す等価回路図である。図 1において、 本実施形態の液晶表示装置 1は、透明なガラス材あるいは合成樹脂材によって構成 された一対の透明基板 2a、 2bと、これら透明基板 2a、 2bに狭持された液晶層 3を備 えており、液晶表示装置 1では、図 1の上側が表示面側として設置されて、文字や画 像等の情報を表示するようになって 、る。 FIG. 1 is a cross-sectional view showing a main part configuration of a liquid crystal display device according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram showing a pixel configuration of the liquid crystal display device. In FIG. 1, the liquid crystal display device 1 of the present embodiment includes a pair of transparent substrates 2a and 2b made of a transparent glass material or a synthetic resin material, and a liquid crystal layer 3 sandwiched between the transparent substrates 2a and 2b. In the liquid crystal display device 1, the upper side of FIG. 1 is installed as the display surface side so that information such as characters and images can be displayed.
[0055] 透明基板 2aは、アレイ基板を構成するものであり、透明基板 2aには、スイッチング 素子としての薄膜トランジスタ(以下、〃TFT〃という。)4及び画素電極 5が画素単位に 設けられている。つまり、透明基板 2aの液晶層 3側には、絶縁膜 6を介して画素電極 5が設置されている。また、 TFT4は、ゲート 4g、ソース 4s、及びドレイン 4dを具備し ており、ドレイン 4dが画素電極 5に接続されている。また、ゲート 4gとソース 4s及びド レイン 4dとの間には、絶縁膜 6及び半導体層 7、 8が設けられている。 The transparent substrate 2a constitutes an array substrate, and the transparent substrate 2a includes a thin film transistor (hereinafter referred to as “TFT”) 4 and a pixel electrode 5 as a switching element. Is provided. That is, the pixel electrode 5 is disposed on the liquid crystal layer 3 side of the transparent substrate 2a with the insulating film 6 interposed therebetween. The TFT 4 includes a gate 4g, a source 4s, and a drain 4d, and the drain 4d is connected to the pixel electrode 5. An insulating film 6 and semiconductor layers 7 and 8 are provided between the gate 4g, the source 4s, and the drain 4d.
[0056] 透明基板 2bは、 CF (Color Filter)基板を構成するものであり、透明基板 2bには、 対向電極 9と、赤色 (R)、緑色 (G)、及び青色 (B)の各色のカラーフィルタ 10とが設 けられている。 [0056] The transparent substrate 2b constitutes a CF (Color Filter) substrate. The transparent substrate 2b includes the counter electrode 9, red (R), green (G), and blue (B) colors. A color filter 10 is provided.
[0057] 液晶層 3には、例えば TNモードの液晶が使用されており、透明基板 2aの下側(非 表示面側)に設けられたバックライト装置(図示せず)力もの光が照射されるようになつ ている。そして、液晶表示装置 1では、液晶層 3が表示すべき情報に応じて、画素単 位に駆動されることにより、当該液晶層 3を通過する光量が制御されて、表示面に情 報が表示される。 [0057] For example, TN mode liquid crystal is used for the liquid crystal layer 3, and light from a backlight device (not shown) provided on the lower side (non-display surface side) of the transparent substrate 2a is irradiated. It is becoming like that. In the liquid crystal display device 1, the amount of light passing through the liquid crystal layer 3 is controlled by driving the liquid crystal layer 3 in units of pixels according to information to be displayed, and information is displayed on the display surface. Is done.
[0058] また、液晶表示装置 1は、図 2に示すように、複数、例えば m本 (mは整数)のゲート ライン Gl〜Gmと、画素 Pの左側及び右側にそれぞれ設けられた複数、例えば 11本( nは整数)のソースライン SlL〜SnL及び SlR〜SnRとを備えている。これらゲートラ イン G 1〜Gmとソースライン S lL〜SnL及び S lR〜SnRとは、互!、に直交するように 設けられており、マトリックス状に配列されている。 Further, as shown in FIG. 2, the liquid crystal display device 1 includes a plurality of, for example, m (m is an integer) gate lines Gl to Gm, and a plurality of, for example, a plurality of, for example, a left side and a right side of the pixel P. It has 11 (n is an integer) source lines SlL to SnL and SlR to SnR. These gate lines G1 to Gm and the source lines SlL to SnL and SlR to SnR are provided so as to be orthogonal to each other and arranged in a matrix.
[0059] また、ゲートライン Gl〜Gmは、走査配線を構成しており、ゲートドライバ 12に接続 されている。そして、ゲートドライバ Gl〜Gmには、ゲート電圧がゲートドライバ 12から 順次印加されるようになっている。また、左側及び右側のソースライン SlL〜SnL及 び SlR〜SnRは、それぞれ第 1及び第 2の信号配線を構成しており、ソースドライバ 11に接続されている。そして、ソースライン SlL〜SnL及び SlR〜SnRには、ソース 電圧 (電圧信号)がソースドライバ 11から画素単位に印加されるようになって!/ヽる。 In addition, the gate lines Gl to Gm constitute a scanning wiring and are connected to the gate driver 12. A gate voltage is sequentially applied from the gate driver 12 to the gate drivers Gl to Gm. The left and right source lines SlL to SnL and SlR to SnR constitute first and second signal lines, respectively, and are connected to the source driver 11. A source voltage (voltage signal) is applied to the source lines SlL to SnL and SlR to SnR from the source driver 11 in units of pixels.
[0060] ソースドライバ 11及びゲートドライバ 12には、表示すべき情報の映像信号が外部か ら入力されるコントローラ(図示せず)が接続されており、これらのソースドライバ 11及 びゲートドライバ 12は、コントローラ力もの指示信号に応じて動作するように構成され ている。つまり、ゲートドライバ 12は、コントローラ力もの指示信号に従って、ゲート電 圧をゲートドライバ Gl〜Gmに印加することにより、当該ゲートドライバ Gl〜Gmに接 続された TFT4をオン状態またはオフ状態とするようになって 、る。 [0060] The source driver 11 and the gate driver 12 are connected to a controller (not shown) to which a video signal of information to be displayed is input from the outside. The source driver 11 and the gate driver 12 are The controller is configured to operate in response to an instruction signal. That is, the gate driver 12 is connected to the gate drivers Gl to Gm by applying a gate voltage to the gate drivers Gl to Gm according to the instruction signal of the controller. The connected TFT4 is turned on or off.
[0061] また、ソースドライバ 11は、コントローラからの指示信号に基づいて、上記映像信号 に応じたソース電圧をソースライン SlL〜SnL及び SlR〜SnRに印加する。また、こ のソースドライバ 11は、後に詳述するように、フレーム毎に左側及び右側の一対のソ ースライン SlL〜SnL及び SlR〜SnRに対して、ソース電圧の極性を反転して、同 じ大きさのソース電圧を出力するようになって 、る。 Further, the source driver 11 applies a source voltage corresponding to the video signal to the source lines SlL to SnL and SlR to SnR based on an instruction signal from the controller. In addition, as will be described later in detail, the source driver 11 inverts the polarity of the source voltage for each of the left and right source lines SlL to SnL and SlR to SnR for each frame, and has the same magnitude. The source voltage is output.
[0062] また、液晶表示装置 1では、複数の上記画素 Pはマトリックス状に設けられている。 In the liquid crystal display device 1, the plurality of pixels P are provided in a matrix.
また、複数の各画素 Pの画素領域は、隣接する 2本のゲートライン Gl〜Gmと、左側 及び右側の一対のソースライン S lL〜SnL及び S lR〜SnRとで区画されて!、る。具 体的にいえば、例えば 1行目 X 1列目の画素 Pの画素領域は、ゲートライン Gl、 G2 及びソースライン S1L、 SIRによって区画されている。さらに、複数の画素 Pには、ゲ 一トライン Gl〜Gmの配線方向(図 2の左右方向)に沿って、配設された赤色 (R)、 緑色 (G)、及び青色 (B)をそれぞれ表示する RGBの画素 Pが含まれて ヽる。 The pixel region of each of the plurality of pixels P is partitioned by two adjacent gate lines Gl to Gm and a pair of left and right source lines SlL to SnL and SlR to SnR. Specifically, for example, the pixel region of the pixel P in the first row X first column is partitioned by the gate lines Gl and G2 and the source lines S1L and SIR. Furthermore, red (R), green (G), and blue (B) arranged along the wiring direction of the gate lines Gl to Gm (the left-right direction in FIG. 2) are respectively applied to the plurality of pixels P. Contains RGB pixel P to be displayed.
[0063] また、画素 Pは、ゲートライン Gl〜Gmとソースライン SlL〜SnLまたは SlR〜SnR との交差部の近傍に設けられた TFT4及び TFT4に接続された画素電極 5 (図 1)を 有している。さらに、画素 Pには、液晶容量 CLcと付加容量 Csとを含んだ画素容量部 Pcが設けられており、ソースライン SlL〜SnLまたは SlR〜SnRから印加されたソー ス電圧を画素容量部 Pcにて保持するようになって ヽる。 [0063] Further, the pixel P has TFT4 provided near the intersection of the gate lines Gl to Gm and the source lines SlL to SnL or SlR to SnR and the pixel electrode 5 (Fig. 1) connected to the TFT4. is doing. Further, the pixel P is provided with a pixel capacitor part Pc including a liquid crystal capacitor CLc and an additional capacitor Cs, and the source voltage applied from the source lines SlL to SnL or SlR to SnR is supplied to the pixel capacitor part Pc. It comes to hold.
[0064] 液晶容量 CLcは、画素電極 5と対向電極 9 (図 1)との間に形成されている。また、付 加容量 Csは、画素電極 5とこの画素電極 5の下方側に設置された付加容量配線(図 示せず)との間に形成されている。なお、この説明以外に、例えば補助電極を設けて 、画素電極 5と補助電極との間に形成される補助容量を含んだ画素容量部を構成し てもよい。 The liquid crystal capacitor CLc is formed between the pixel electrode 5 and the counter electrode 9 (FIG. 1). The additional capacitor Cs is formed between the pixel electrode 5 and an additional capacitor wiring (not shown) installed on the lower side of the pixel electrode 5. In addition to this description, for example, an auxiliary electrode may be provided to constitute a pixel capacitor unit including an auxiliary capacitor formed between the pixel electrode 5 and the auxiliary electrode.
[0065] また、複数の各画素 Pでは、画素電極 5と対応するソースライン SlL〜SnLとの間に 発生する寄生容量と、画素電極 5と対応するソースライン SlR〜SnRとの間に発生す る寄生容量とが、実質的に同一に構成されている。すなわち、画素 Pでは、ゲートライ ン Gl〜Gmの配線方向で画素電極 5を挟むように、当該画素 Pの両側に設けた対応 する一対のソースライン SlL〜SnL及び SlR〜SnRにおいて、画素電極 5と対応す る一対のソースライン SlL〜SnL及び SlR〜SnRとの各離間距離を同一にしている 。このように画素電極 5を対応する一対のソースライン S lL〜SnL及び S lR〜SnRの 中心部に設けることにより、画素 Pでは、画素電極 5と対応する一対のソースライン S1 L〜SnL及び SlR〜SnRとの各間に発生する寄生容量を、実質的に同一に構成し ている。 [0065] Further, in each of the plurality of pixels P, a parasitic capacitance generated between the pixel electrode 5 and the corresponding source lines SlL to SnL and a source line SlR to SnR corresponding to the pixel electrode 5 are generated. The parasitic capacitances are substantially the same. That is, in the pixel P, in the corresponding pair of source lines SlL to SnL and SlR to SnR provided on both sides of the pixel P so as to sandwich the pixel electrode 5 in the wiring direction of the gate lines Gl to Gm, Corresponding The distance between the pair of source lines SlL to SnL and SlR to SnR is the same. Thus, by providing the pixel electrode 5 in the center of the corresponding pair of source lines SlL to SnL and SlR to SnR, in the pixel P, the pair of source lines S1L to SnL and SlR corresponding to the pixel electrode 5 is provided. Parasitic capacitance generated between each of these and SnR is configured substantially the same.
[0066] また、液晶表示装置 1では、一対のソースライン SlL〜SnL及び SlR〜SnRの間 に配置された複数の画素 Pにおいて、ソースライン SlL〜SnLに対し、 TFT4を介し て接続された画素電極 5の個数と、ソースライン SlR〜SnRに対し、 TFT4を介して 接続された画素電極 5の個数とが同数に設定されている。すなわち、液晶表示装置 1 では、 n列の各画素列において、左側のソースライン SlL〜SnLに接続された画素 数と、右側のソースライン S lR〜SnRに接続された画素数とが同数とされて 、る。 [0066] Further, in the liquid crystal display device 1, in the plurality of pixels P arranged between the pair of source lines SlL to SnL and SlR to SnR, the pixels connected to the source lines SlL to SnL via TFT4 The number of electrodes 5 and the number of pixel electrodes 5 connected to the source lines SlR to SnR via TFT 4 are set to the same number. That is, in the liquid crystal display device 1, in each of the n pixel columns, the number of pixels connected to the left source lines SlL to SnL and the number of pixels connected to the right source lines SlR to SnR are the same. And
[0067] 以下、上記のように構成された本実施形態の液晶表示装置 1の動作について、図 3 〜図 5も参照して具体的に説明する。 Hereinafter, the operation of the liquid crystal display device 1 of the present embodiment configured as described above will be specifically described with reference to FIGS. 3 to 5 as well.
[0068] 図 3は Nフレーム時での上記液晶表示装置の駆動例を説明する図であり、図 4は( N+ 1)フレーム時での上記液晶表示装置の駆動例を説明する図である。図 5は、上 記液晶表示装置の駆動時での各部における電圧波形を示すグラフである。 FIG. 3 is a diagram for explaining an example of driving the liquid crystal display device in the N frame, and FIG. 4 is a diagram for explaining an example of driving the liquid crystal display device in the (N + 1) frame. FIG. 5 is a graph showing voltage waveforms at various parts during driving of the liquid crystal display device.
[0069] 図 3に示すように、本実施形態の液晶表示装置 1では、例えば Nフレームの情報表 示を行うときに、ソースドライバ 11は、同図に(+ )及び(一)にて示す極性のソース電 圧をソースライン SlL〜SnL及び SlR〜SnRに印加している。具体的には、例えば ゲートライン G1に対して TFT4をオン状態とするゲート電圧が印加されると、ソースド ライバ 11は、ソースライン S1Lに対して、映像信号に応じた +極性のソース電圧を印 加するとともに、ソースライン SIRに対して、上記 +極性のソース電圧を反転した、つ まり一極性で同じ大きさのソース電圧を同時に印加している。尚、これらの +極性及 び 極性のソース電圧は、対向電極 9 (図 1)への印加電圧に対して同じ大きさの電 圧である。 As shown in FIG. 3, in the liquid crystal display device 1 of the present embodiment, for example, when displaying information of N frames, the source driver 11 is indicated by (+) and (1) in FIG. Polar source voltages are applied to the source lines SlL to SnL and SlR to SnR. Specifically, for example, when a gate voltage that turns on TFT4 is applied to the gate line G1, the source driver 11 applies a + polarity source voltage corresponding to the video signal to the source line S1L. In addition, the source voltage of the same polarity and the same magnitude is simultaneously applied to the source line SIR by inverting the + polarity source voltage. These + polarity and polarity source voltages have the same magnitude as the applied voltage to the counter electrode 9 (FIG. 1).
[0070] 続いて、ゲートライン G1に対して TFT4をオフ状態とするゲート電圧が印加された 後、ゲートライン G2に対して TFT4をオン状態とするゲート電圧が印加されると、ソー スドライバ 11は、ソースライン SIRに対して、映像信号に応じた一極性のソース電圧 を印加するとともに、ソースライン S1Lに対して、上記一極性のソース電圧を反転した 、つまり +極性で同じ大きさのソース電圧を同時に印加している。以降、同様な電圧 印加が行われ、液晶表示装置 1では、 Nフレームの情報表示が実施される。 [0070] Subsequently, after the gate voltage that turns off TFT4 is applied to the gate line G1, the source driver 11 is turned on when the gate voltage that turns on TFT4 is applied to the gate line G2. Is a unipolar source voltage corresponding to the video signal for the source line SIR. Is applied to the source line S1L, and the source voltage having the same polarity as the positive polarity is simultaneously applied to the source line S1L. Thereafter, the same voltage application is performed, and the liquid crystal display device 1 displays N frames of information.
[0071] また、この Nフレームの情報表示では、マトリックス状の各画素 Pでは、以下の表 1に て示される極性となる。 [0071] Further, in the information display of N frames, the polarities shown in Table 1 below are obtained for each pixel P in the matrix form.
[0072] [表 1] [0072] [Table 1]
[0073] 次に、図 4に示すように、(N+ 1)フレームの情報表示を行うとき、ソースドライバ 11 は、同図に(+ )及び(一)にて示すように、一対のソースライン SlL〜SnL及び SIR 〜SnRに対して、図 3に示した Nフレームの場合と逆極性のソース電圧を印加してい る。具体的には、例えばゲートライン G1に対して TFT4をオン状態とするゲート電圧 が印加されると、ソースドライバ 11は、ソースライン S1Lに対して、映像信号に応じた 極性のソース電圧を印加するとともに、ソースライン SIRに対して、上記 極性のソ ース電圧を反転した、つまり +極性で同じ大きさのソース電圧を同時に印加している Next, as shown in FIG. 4, when (N + 1) frame information is displayed, the source driver 11 uses a pair of source lines as shown in (+) and (1) in FIG. For SlL to SnL and SIR to SnR, a source voltage having a polarity opposite to that of the N frame shown in Fig. 3 is applied. Specifically, for example, when a gate voltage that turns on the TFT 4 is applied to the gate line G1, the source driver 11 applies a source voltage having a polarity corresponding to the video signal to the source line S1L. In addition, the source voltage of the above polarity is inverted to the source line SIR, that is, the source voltage of the same magnitude with + polarity is applied simultaneously
[0074] 続いて、ゲートライン G1に対して TFT4をオフ状態とするゲート電圧が印加された 後、ゲートライン G2に対して TFT4をオン状態とするゲート電圧が印加されると、ソー スドライバ 11は、ソースライン SIRに対して、映像信号に応じた +極性のソース電圧 を印加するとともに、ソースライン S1Lに対して、上記 +極性のソース電圧を反転した 、つまり 極性で同じ大きさのソース電圧を同時に印加している。以降、同様な電圧 印加が行われ、液晶表示装置 1では、(N+ 1)フレームの情報表示が実施される。 [0074] Subsequently, after the gate voltage that turns off the TFT4 is applied to the gate line G1, the source driver 11 is turned on when the gate voltage that turns on the TFT4 is applied to the gate line G2. Applies a + polarity source voltage according to the video signal to the source line SIR, and inverts the + polarity source voltage to the source line S1L. Are simultaneously applied. Thereafter, the same voltage is applied, and the liquid crystal display device 1 displays information of (N + 1) frames.
[0075] また、この(N+ 1)フレームの情報表示では、マトリックス状の各画素 Pでは、以下の 表 2にて示される極性となる。 Further, in the information display of this (N + 1) frame, the polarity shown in Table 2 below is obtained for each pixel P in the matrix form.
[0076] [表 2] 1列目 2列目 3列目 n列目 [0076] [Table 2] 1st row 2nd row 3rd row nth row
1行目 ― + ― + 1st line ― + ― +
2行目 + ― + 一2nd line +-+ 1
3行目 ― + ― +3rd line ― + ― +
: : m行目 + ― + ― :: M-th line + ― + ―
[0077] 以上のように、本実施形態の液晶表示装置 1では、ソースドライバ 11はフレーム毎 に左側及び右側の一対のソースライン S lL〜SnL及び S lR〜SnRに対するソース 電圧の極性を反転して出力して ヽる。 As described above, in the liquid crystal display device 1 of the present embodiment, the source driver 11 inverts the polarity of the source voltage for the pair of left and right source lines SlL to SnL and SlR to SnR for each frame. Output.
[0078] また、表 1及び表 2より明らかなように、本実施形態の液晶表示装置 1では、各画素 Pはドット反転駆動と同一の駆動にて駆動されている。 Further, as apparent from Tables 1 and 2, in the liquid crystal display device 1 of the present embodiment, each pixel P is driven by the same drive as the dot inversion drive.
[0079] また、本実施形態の液晶表示装置 1の画素 Pでは、画素電極 5と一対のソースライ ン S lL〜SnL及び S lR〜SnRとの各間に発生する寄生容量を実質的に同一に構 成している。さらに、ソースライン SlL〜SnL及び SlR〜SnRに対して、互いに逆極 性で同じ大きさの電圧信号を印加している。これにより、本実施形態の液晶表示装置 1では、情報の表示画像に関わらず、寄生容量に起因する電圧引込みの発生を防ぐ ことがでさる。 Further, in the pixel P of the liquid crystal display device 1 of the present embodiment, the parasitic capacitance generated between the pixel electrode 5 and each of the pair of source lines SlL to SnL and SlR to SnR is substantially the same. It is composed. In addition, voltage signals having opposite polarities and the same magnitude are applied to the source lines SlL to SnL and SlR to SnR. Thereby, in the liquid crystal display device 1 of the present embodiment, it is possible to prevent the occurrence of voltage pull-in caused by the parasitic capacitance regardless of the display image of information.
[0080] 具体的にいえば、例えばソースライン SnL及び SnRの間に設けられた 4つの画素 P において、 1行目と 3行目の画素 Pには、図 5 (a)に示すソース電圧がソースライン Sn Lから印加されている。また、 2行目と 4行目の画素 Pには、図 5 (b)に示すソース電圧 力 Sソースライン SnRから印加されている。これにより、例えば 1行目の画素 Pでは、図 5 (c)に〃 T1"及び "T2"にてそれぞれ示す 1番目及び 2番目のフレームでの書込み期 間において、 +極性及び 極性のソース電圧が接続されたソースライン SnLから印 加されており、同図 5 (c)に示すように、 1行目の画素 Pの画素電圧は、ソースライン S nLから印加されたソース電圧に応じて、増減して 、る。 Specifically, for example, in the four pixels P provided between the source lines SnL and SnR, the source voltage shown in FIG. 5A is applied to the pixels P in the first row and the third row. Applied from source line Sn L. Further, the source voltage force S source line SnR shown in FIG. 5B is applied to the pixels P in the second and fourth rows. Thus, for example, in the pixel P in the first row, + polarity and polarity source voltages in the writing period in the first and second frames indicated by 〃T1 ”and“ T2 ”in FIG. Is applied from the connected source line SnL, and as shown in FIG. 5 (c), the pixel voltage of the pixel P in the first row depends on the source voltage applied from the source line SnL. Increase or decrease.
[0081] また、図 5 (a)及び (b)に示したソース電圧は、それぞれソースライン SnL及び SnR に対して同時に印加されているので、上記 4つの各画素 Pでは、上記 2つの寄生容量 による悪影響が相殺される。この結果、各画素 Pの画素電圧では、電圧引込みの発 生が防がれる。例えば 1行目の画素 Pの画素電圧は、図 5 (c)に示すように、書込み 期間 Tlと T2との間の期間、つまり 2行目〜4行目の画素 Ρに対する書込み期間にお いて、増減することなぐ印加されたソース電圧を保持することができる。これにより、 1 行目の画素 Ρは、所望の輝度にて発光表示することができる。 In addition, since the source voltages shown in FIGS. 5 (a) and 5 (b) are simultaneously applied to the source lines SnL and SnR, respectively, in each of the four pixels P, the two parasitic capacitances are applied. The negative effects of are offset. As a result, in the pixel voltage of each pixel P, voltage pull-in is prevented. For example, the pixel voltage of pixel P in the first row is written as shown in Fig. 5 (c). In the period between the periods Tl and T2, that is, the writing period for the pixels Ρ in the second to fourth rows, the applied source voltage can be held without increasing or decreasing. As a result, the pixels in the first row can be lit and displayed with a desired luminance.
[0082] さらに、図 5 (a)及び (b)に示したように、各画素 Pの両側のソースライン SnL及び S nRには、 1フレーム期間内において、互いに逆極性のソース電圧が印加されている ので、 RGBの ヽずれかの単色表示を行わせる場合や白色表示を行わせる場合など の情報の表示画像に関わらず、寄生容量に起因する電圧引込みの発生を防ぐこと ができる。したがって、表示性能が低下するのを確実に防ぐことができる。 Furthermore, as shown in FIGS. 5 (a) and 5 (b), source voltages having opposite polarities are applied to the source lines SnL and SnR on both sides of each pixel P within one frame period. Therefore, it is possible to prevent the occurrence of voltage pulling due to parasitic capacitance regardless of the display image of information such as when displaying only one color of RGB or when displaying white. Therefore, it is possible to reliably prevent the display performance from deteriorating.
[0083] 以上のように構成された本実施形態の液晶表示装置 1では、表示すべき情報に応 じたソース電圧 (電圧信号)が印加されるソースライン (信号配線)において、画素 Pの 両側に設けられるとともに、互いに異なる極性の電圧信号が印加される左側及び右 側のソースライン SlL〜SnL及び SlR〜SnR (第 1及び第 2の信号配線)が含まれて いる。また、各ソースライン SlL〜SnL及び SlR〜SnRに接続される画素電極 5の個 数が同数に設定されている。これにより、本実施形態の液晶表示装置 1では、補償配 線を設置した上記従来例と異なり、画素数を増カロさせたときでも、表示面を複数の領 域に分割することなぐ 1フレームの情報表示を行うときに、 +極性の画素と 極性の 画素とを同数とすることができる。この結果、本実施形態の液晶表示装置 1では、分 割した領域の境目部分での輝度ムラの発生や境目部分が視認されるのを防ぐことが でき、表示性能を向上させることができる。 In the liquid crystal display device 1 of the present embodiment configured as described above, both sides of the pixel P are provided on the source line (signal wiring) to which the source voltage (voltage signal) corresponding to the information to be displayed is applied. And left and right source lines SlL to SnL and SlR to SnR (first and second signal wirings) to which voltage signals having different polarities are applied. In addition, the number of pixel electrodes 5 connected to the source lines SlL to SnL and SlR to SnR is set to the same number. As a result, in the liquid crystal display device 1 of the present embodiment, unlike the conventional example in which the compensation wiring is installed, even when the number of pixels is increased, the display surface is not divided into a plurality of areas. When displaying information, it is possible to have the same number of positive and negative pixels. As a result, in the liquid crystal display device 1 of the present embodiment, it is possible to prevent the occurrence of luminance unevenness at the boundary portion of the divided area and the visual recognition of the boundary portion, and improve the display performance.
[0084] また、本実施形態の液晶表示装置 1では、図 3または図 4に示したように、 1フレーム の情報表示を行うときに、ソースライン S lL〜SnL及び S lR〜SnRの極性を反転さ せる必要がない。この結果、本実施形態の液晶表示装置 1では、上記従来例と異な り、画素数を増加させたときでも、ソースライン SlL〜SnL及び SlR〜SnRの負荷が 大きくなるのを防止することができる。さらに、本実施形態の液晶表示装置 1では、上 記従来例と異なり、情報表示に直接的に寄与しない電力が生じるのを防止しているこ と力ら、ソースライン S lL〜SnL及び S lR〜SnRの負荷の増大を防止して!/、る点とも 相まって、液晶表示装置 1の消費電力を低減することが可能となる。 Further, in the liquid crystal display device 1 of the present embodiment, as shown in FIG. 3 or FIG. 4, when one frame of information is displayed, the polarity of the source lines S1L to SnL and S1R to SnR is changed. There is no need to flip it. As a result, in the liquid crystal display device 1 of the present embodiment, unlike the conventional example, it is possible to prevent the load on the source lines SlL to SnL and SlR to SnR from increasing even when the number of pixels is increased. . Furthermore, unlike the above-described conventional example, the liquid crystal display device 1 of the present embodiment prevents the generation of power that does not directly contribute to information display. In combination with preventing the increase of the load of ~ SnR, the power consumption of the liquid crystal display device 1 can be reduced.
[0085] また、本実施形態の液晶表示装置 1では、 RGBの画素が含まれているので、 RGB の全色表示及びいずれかの単色表示を行うときでも、輝度差が生じるのを防止した 優れた表示性能を有し、かつ、省力化されたカラー表示が可能な液晶表示装置を構 成することができる。 [0085] Further, in the liquid crystal display device 1 of the present embodiment, since RGB pixels are included, RGB Even when performing all-color display or any single color display, a liquid crystal display device that has excellent display performance that prevents the occurrence of a luminance difference and is capable of labor-saving color display is configured. Can do.
[0086] 尚、上記の実施形態はすべて例示であって制限的なものではない。本発明の技術 的範囲は特許請求の範囲によって規定され、そこに記載された構成と均等の範囲内 のすベての変更も本発明の技術的範囲に含まれる。 [0086] It should be noted that the above embodiments are all illustrative and not restrictive. The technical scope of the present invention is defined by the claims, and all modifications within the scope equivalent to the configurations described therein are also included in the technical scope of the present invention.
[0087] 例えば、上記の説明では、本発明を透過型の液晶表示装置に適用した場合につ いて説明したが、本発明の液晶表示装置はこれに限定されるものではなぐ半透過 型あるいは反射型の液晶表示装置に適用することができる。 [0087] For example, in the above description, the case where the present invention is applied to a transmissive liquid crystal display device has been described. However, the liquid crystal display device of the present invention is not limited to this and is not limited to this. It can be applied to a liquid crystal display device of a type.
[0088] また、上記の説明では、 TNモードの液晶層を場合について説明した力 本発明は これに限定されるものではなぐいわゆる縦電界によって液晶層内の液晶分子の配 列を制御する VA (Vertical -Alignment)モードなどの液晶モードや横電界によって 液晶分子の配列を制御する IPS (In -Plane -Switching)モードなどの液晶モードの 液晶層にも本発明を適用することができる。 [0088] In the above description, the force described for the case of the TN mode liquid crystal layer is not limited to this. The present invention is not limited to this. The so-called longitudinal electric field controls the alignment of the liquid crystal molecules in the liquid crystal layer VA ( The present invention can also be applied to a liquid crystal layer of a liquid crystal mode such as an IPS (In-Plane-Switching) mode in which the alignment of liquid crystal molecules is controlled by a liquid crystal mode such as a vertical-alignment mode or a lateral electric field.
[0089] また、上記の説明では、スイッチング素子に薄膜トランジスタを使用した場合につい て説明したが、本発明のスイッチング素子はこれに限定されるものではなぐ電界効 果トランジスなどの他の 3端子あるいは薄膜ダイオードなどの 2端子のスイッチング素 子を使用することもできる。 In the above description, the case where a thin film transistor is used as the switching element has been described. However, the switching element of the present invention is not limited to this, and other three terminals such as a field effect transistor or a thin film. A two-terminal switching element such as a diode can also be used.
[0090] また、上記の説明では、複数の各画素において、画素電極と第 1及び第 2の信号配 線との各間に発生する寄生容量を、実質的に同一に構成するとともに、第 1及び第 2 の信号配線に対して、互いに逆極性で同じ大きさの電圧信号を印加する場合につい て説明したが、本発明は画素の両側に互いに異なる極性の電圧信号が印加される 2 つの信号配線を画素毎に設けるとともに、当該 2つの信号配線間に配置された複数 の画素において、スイッチング素子を介して各信号配線に接続される画素電極の個 数を同数に設定したものであれば、何等限定されない。 In the above description, in each of the plurality of pixels, the parasitic capacitance generated between the pixel electrode and each of the first and second signal lines is configured to be substantially the same, and the first In the above description, the voltage signals having the same polarity and opposite polarity are applied to the second signal wiring. However, the present invention applies two signals in which voltage signals having different polarities are applied to both sides of the pixel. If wiring is provided for each pixel and the number of pixel electrodes connected to each signal wiring through the switching element is set to the same number in a plurality of pixels arranged between the two signal wirings, It is not limited at all.
[0091] 具体的には、画素電極と第 1及び第 2の信号配線との各間に発生する寄生容量に ついて、演算や実験などにより予め求めるとともに、求めた各寄生容量を用いて、対 応する信号配線への印加電圧を適宜変更することにより、寄生容量による電圧引込 みなどの悪影響が発生するのを防止して、表示性能を向上させることもできる。 [0091] Specifically, the parasitic capacitance generated between the pixel electrode and each of the first and second signal wirings is obtained in advance by calculation, experiment, and the like. Voltage pull-in due to parasitic capacitance by appropriately changing the voltage applied to the corresponding signal wiring It is also possible to improve display performance by preventing adverse effects such as viewing.
[0092] 但し、上記のように、画素の両側の上記 2つの寄生容量を実質的に同一に構成す る場合の方が、 2つの寄生容量の相異に起因して、画素の電圧が変化するのを容易 に防ぐことができ、液晶表示装置の表示性能を確実に向上させることができる点で好 ましい。 However, as described above, when the two parasitic capacitances on both sides of the pixel are configured to be substantially the same, the voltage of the pixel changes due to the difference between the two parasitic capacitances. This is preferable in that it can be easily prevented and the display performance of the liquid crystal display device can be reliably improved.
[0093] また、上記のように、第 1及び第 2の信号配線に対して、同じ大きさの電圧信号を印 加する場合の方が、第 1及び第 2の各信号配線に対して、電圧信号を容易に印加さ せることができる点で好ましい。さらには、例えば各信号配線に信号電圧を印加する 駆動回路 (ソースドライバ)またはこの駆動回路に印加する信号電圧を指示するコント ローラなどの構成を簡単ィ匕できる点でも好ま 、。 [0093] As described above, when the same voltage signal is applied to the first and second signal wirings, the first and second signal wirings are This is preferable in that a voltage signal can be easily applied. Furthermore, it is also preferable in that the configuration of a drive circuit (source driver) for applying a signal voltage to each signal wiring or a controller for instructing a signal voltage to be applied to this drive circuit can be simplified.
[0094] また、上記の説明では、第 1及び第 2の信号配線の間に配置された複数の画素に おいて、第 1及び第 2の信号配線に対し、スイッチング素子を介して画素電極を交互 に接続した場合について説明した力 本発明はこれに限定されるものではなぐ例え ば 2つの画素電極毎に第 1または第 2の信号配線に接続する構成でもよい。 [0094] In the above description, in the plurality of pixels arranged between the first and second signal wirings, the pixel electrodes are connected to the first and second signal wirings via the switching elements. For example, the present invention is not limited to this. For example, the configuration may be such that every two pixel electrodes are connected to the first or second signal wiring.
[0095] 但し、上記のように、画素電極を交互に接続する場合の方が、複数の画素をドット 反転駆動と同一の駆動にて駆動させることができ、表示性能を確実に向上させること ができる点で好ましい。 However, as described above, when the pixel electrodes are alternately connected, a plurality of pixels can be driven by the same driving as the dot inversion driving, and the display performance can be surely improved. It is preferable in that it can be performed.
産業上の利用可能性 Industrial applicability
[0096] 本発明に力かる液晶表示装置、及びその駆動方法は、画素数を増加させたときで も、表示性能を向上させることができ、消費電力を低減することができるので、大画面 及び Zまたは高精細な表示面を備えた液晶表示装置、及びその駆動方法に対して 有効である。 [0096] The liquid crystal display device and the driving method thereof according to the present invention can improve display performance and reduce power consumption even when the number of pixels is increased. It is effective for a liquid crystal display device having a Z or high-definition display surface and a driving method thereof.
Claims
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| WO2014087781A1 (en) * | 2012-12-07 | 2014-06-12 | 堺ディスプレイプロダクト株式会社 | Liquid crystal display device and method for driving said liquid crystal display device |
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| JPH08305322A (en) * | 1995-05-10 | 1996-11-22 | Sharp Corp | Display device |
| JP2006106062A (en) * | 2004-09-30 | 2006-04-20 | Sharp Corp | Active matrix type liquid crystal display device and liquid crystal display panel used therefor |
| JP2007156483A (en) * | 2005-12-06 | 2007-06-21 | Samsung Electronics Co Ltd | Liquid crystal display |
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| JPH08305322A (en) * | 1995-05-10 | 1996-11-22 | Sharp Corp | Display device |
| JP2006106062A (en) * | 2004-09-30 | 2006-04-20 | Sharp Corp | Active matrix type liquid crystal display device and liquid crystal display panel used therefor |
| JP2007156483A (en) * | 2005-12-06 | 2007-06-21 | Samsung Electronics Co Ltd | Liquid crystal display |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2014087781A1 (en) * | 2012-12-07 | 2014-06-12 | 堺ディスプレイプロダクト株式会社 | Liquid crystal display device and method for driving said liquid crystal display device |
| CN104395952A (en) * | 2012-12-07 | 2015-03-04 | 堺显示器制品株式会社 | Liquid crystal display device and method for driving said liquid crystal display device |
| US9564095B2 (en) | 2012-12-07 | 2017-02-07 | Sakai Display Products Corporation | Liquid crystal display device and method for driving the liquid crystal display device whereby shadowing can be prevented |
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