[go: up one dir, main page]

WO2008041974A3 - Microcontroller unit (mcu) with suspend mode - Google Patents

Microcontroller unit (mcu) with suspend mode Download PDF

Info

Publication number
WO2008041974A3
WO2008041974A3 PCT/US2006/038301 US2006038301W WO2008041974A3 WO 2008041974 A3 WO2008041974 A3 WO 2008041974A3 US 2006038301 W US2006038301 W US 2006038301W WO 2008041974 A3 WO2008041974 A3 WO 2008041974A3
Authority
WO
WIPO (PCT)
Prior art keywords
clock signal
microcontroller unit
external clock
circuitry
suspend mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2006/038301
Other languages
French (fr)
Other versions
WO2008041974A2 (en
Inventor
Kafai Leung
Tao Yonghong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to PCT/US2006/038301 priority Critical patent/WO2008041974A2/en
Priority to US11/694,619 priority patent/US7536570B2/en
Publication of WO2008041974A2 publication Critical patent/WO2008041974A2/en
Anticipated expiration legal-status Critical
Publication of WO2008041974A3 publication Critical patent/WO2008041974A3/en
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3237Power saving characterised by the action undertaken by disabling clock generation or distribution
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3243Power saving in microcontroller unit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

A microcontroller unit having a suspend mode of operation includes a processing circuit for receiving digital information and processing said received digital information. Timing circuitry generates timing signals to the processing circuit responsive to signals received from a clock circuit which generates both an internal clock signal and an external clock signal. Circuitry for controlling the selective application of a synchronized external clock signal and the external clock signal to the timing circuitry. The circuitry applies the synchronized external clock signal to the timing circuitry in at least an active mode of operation of the microcontroller unit responsive to at least one first control signal and applies the external clock signal to the timing circuitry in at least a suspend mode of operation of the microcontroller unit responsive to at least one suspend control signal.
PCT/US2006/038301 2006-10-02 2006-10-02 Microcontroller unit (mcu) with suspend mode Ceased WO2008041974A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/US2006/038301 WO2008041974A2 (en) 2006-10-02 2006-10-02 Microcontroller unit (mcu) with suspend mode
US11/694,619 US7536570B2 (en) 2006-10-02 2007-03-30 Microcontroller unit (MCU) with suspend mode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2006/038301 WO2008041974A2 (en) 2006-10-02 2006-10-02 Microcontroller unit (mcu) with suspend mode

Publications (2)

Publication Number Publication Date
WO2008041974A2 WO2008041974A2 (en) 2008-04-10
WO2008041974A3 true WO2008041974A3 (en) 2009-04-30

Family

ID=39268925

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/038301 Ceased WO2008041974A2 (en) 2006-10-02 2006-10-02 Microcontroller unit (mcu) with suspend mode

Country Status (1)

Country Link
WO (1) WO2008041974A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105391431A (en) * 2014-08-29 2016-03-09 特克特朗尼克公司 synchronization for multiple arbitrary waveform generators

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115021727B (en) * 2022-06-30 2025-07-18 琻捷电子科技(江苏)股份有限公司 Clock signal monitoring circuit and method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6687843B2 (en) * 1999-11-30 2004-02-03 Hyundai Electronics Industries Co., Ltd. Rambus DRAM with clock control circuitry that reduces power consumption
US7057967B2 (en) * 2001-12-26 2006-06-06 Brian Johnson Multi-mode synchronous memory device and methods of operating and testing same
US7194644B2 (en) * 2003-02-06 2007-03-20 Stmicroelectronics S.A. System and method for operating a microprocessor in a low power mode by providing a wakeup clock to the microprocessor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6687843B2 (en) * 1999-11-30 2004-02-03 Hyundai Electronics Industries Co., Ltd. Rambus DRAM with clock control circuitry that reduces power consumption
US7057967B2 (en) * 2001-12-26 2006-06-06 Brian Johnson Multi-mode synchronous memory device and methods of operating and testing same
US7194644B2 (en) * 2003-02-06 2007-03-20 Stmicroelectronics S.A. System and method for operating a microprocessor in a low power mode by providing a wakeup clock to the microprocessor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105391431A (en) * 2014-08-29 2016-03-09 特克特朗尼克公司 synchronization for multiple arbitrary waveform generators

Also Published As

Publication number Publication date
WO2008041974A2 (en) 2008-04-10

Similar Documents

Publication Publication Date Title
WO2009055103A3 (en) Low-power source-synchronous signaling
WO2008079910A3 (en) Strobe acquisition and tracking
WO2006031697A3 (en) Memory systems with variable delays for write data signals
WO2010117618A3 (en) Debug signaling in a multiple processor data processing system
WO2008059390A3 (en) Utilizing wake-up signals for synchronizing multiradio timing
WO2007011439A3 (en) Processor controlled interface
TW200723223A (en) Techniques to switch between video display modes
EP1509822A4 (en) Synchronizing clock enablement in an electronic device
TW200739581A (en) Delay locked operation in semiconductor memory device
TW200735114A (en) Shift register circuit and display drive device
WO2005119693A3 (en) Configurable ready/busy control
WO2007038033A3 (en) Method and apparatus for late timing transition detection
WO2008027066A3 (en) Clock and data recovery
DE50303625D1 (en) ASYNCHRONOON CIRCUIT FOR A GLOBAL ASYNCHRONOUS, LOCAL SYNCHRONOUS (GALS) CIRCUIT
WO2008114446A1 (en) Clock signal selecting circuit
WO2005041142A3 (en) A location system for associating a first signal with a second signal
WO2009140037A3 (en) Thermal management of graphics processing units
BRPI0712764A8 (en) glitch-free clock signal multiplexer circuit and method of operation
WO2007100529A3 (en) Spread-spectrum clocking
WO2008094968A3 (en) Clock circuitry for ddr-sdram memory controller
WO2008027645A3 (en) Double data rate system
TW200735011A (en) Display system capable of automatic de-skewing and method of driving the same
TW200706974A (en) Display and timing controller
TW200641758A (en) Driving method for display device
TW200637147A (en) Data latch circuit of semiconductor device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 06815942

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 06815942

Country of ref document: EP

Kind code of ref document: A2