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WO2007038340A3 - Technique stroboscopique d'horodatage d'un signal numerique - Google Patents

Technique stroboscopique d'horodatage d'un signal numerique Download PDF

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Publication number
WO2007038340A3
WO2007038340A3 PCT/US2006/037100 US2006037100W WO2007038340A3 WO 2007038340 A3 WO2007038340 A3 WO 2007038340A3 US 2006037100 W US2006037100 W US 2006037100W WO 2007038340 A3 WO2007038340 A3 WO 2007038340A3
Authority
WO
WIPO (PCT)
Prior art keywords
time
clock signal
digital signal
data signal
time stamping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2006/037100
Other languages
English (en)
Other versions
WO2007038340A2 (fr
Inventor
Ronald A Sartschev
Ernest P Walker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradyne Inc
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/234,542 external-priority patent/US7856578B2/en
Priority claimed from US11/234,599 external-priority patent/US7573957B2/en
Priority claimed from US11/234,814 external-priority patent/US7574632B2/en
Application filed by Teradyne Inc filed Critical Teradyne Inc
Priority to KR1020087006592A priority Critical patent/KR101239743B1/ko
Priority to JP2008532445A priority patent/JP5254795B2/ja
Priority to EP06804068A priority patent/EP1927204A2/fr
Priority to CN2006800350723A priority patent/CN101273559B/zh
Publication of WO2007038340A2 publication Critical patent/WO2007038340A2/fr
Publication of WO2007038340A3 publication Critical patent/WO2007038340A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
    • G01R31/31726—Synchronization, e.g. of test, clock or strobe signals; Signals in different clock domains; Generation of Vernier signals; Comparison and adjustment of the signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56004—Pattern generation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56012—Timing aspects, clock generation, synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

L'invention concerne un système et un appareil qui génère un horodateur pour identifier et enregistrer l'heure d'un événement, par exemple une limite reçue dans un signal de données ou un signal d'horloge. Un ensemble d'impulsions stroboscopiques peut être créé par acheminement d'un signal d'horloge externe pour des éléments de retard avec des valeurs de retard augmentant progressivement. Un signal de données ou un dispositif en signal d'horloge d'essai peut être appliqué à l'entrée de chaque verrou d'un ensemble de verrous synchronisés par les impulsions stroboscopiques. L'ensemble de verrous peut ainsi capturer une série d'échantillons du signal de données ou du signal d'horloge. La série d'échantillons peut être codée en tant que temps limite dans un cycle d'horloge. Un compteur de cycle d'horloge peut être ajouté au temps limite pour générer l'horodateur.
PCT/US2006/037100 2005-09-23 2006-09-22 Technique stroboscopique d'horodatage d'un signal numerique Ceased WO2007038340A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020087006592A KR101239743B1 (ko) 2005-09-23 2006-09-22 디지털 신호를 타임 스탬핑하기 위한 스트로브 기술
JP2008532445A JP5254795B2 (ja) 2005-09-23 2006-09-22 デジタル信号にタイムスタンプを付与するためのストローブ技法
EP06804068A EP1927204A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique d'horodatage d'un signal numerique
CN2006800350723A CN101273559B (zh) 2005-09-23 2006-09-22 用于对数字信号进行时间标记的选通技术

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US11/234,814 2005-09-23
US11/234,542 US7856578B2 (en) 2005-09-23 2005-09-23 Strobe technique for test of digital signal timing
US11/234,542 2005-09-23
US11/234,599 2005-09-23
US11/234,599 US7573957B2 (en) 2005-09-23 2005-09-23 Strobe technique for recovering a clock in a digital signal
US11/234,814 US7574632B2 (en) 2005-09-23 2005-09-23 Strobe technique for time stamping a digital signal

Publications (2)

Publication Number Publication Date
WO2007038340A2 WO2007038340A2 (fr) 2007-04-05
WO2007038340A3 true WO2007038340A3 (fr) 2007-11-22

Family

ID=37900290

Family Applications (3)

Application Number Title Priority Date Filing Date
PCT/US2006/037100 Ceased WO2007038340A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique d'horodatage d'un signal numerique
PCT/US2006/036912 Ceased WO2007038233A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique d'essai de synchronisation de signaux numeriques
PCT/US2006/037099 Ceased WO2007038339A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique pour recuperer une horloge dans un signal numerique

Family Applications After (2)

Application Number Title Priority Date Filing Date
PCT/US2006/036912 Ceased WO2007038233A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique d'essai de synchronisation de signaux numeriques
PCT/US2006/037099 Ceased WO2007038339A2 (fr) 2005-09-23 2006-09-22 Technique stroboscopique pour recuperer une horloge dans un signal numerique

Country Status (4)

Country Link
EP (3) EP1927210A2 (fr)
JP (3) JP4907663B2 (fr)
KR (3) KR101239743B1 (fr)
WO (3) WO2007038340A2 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7573957B2 (en) 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for recovering a clock in a digital signal
US7574632B2 (en) 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for time stamping a digital signal
US7856578B2 (en) 2005-09-23 2010-12-21 Teradyne, Inc. Strobe technique for test of digital signal timing
CN102356594B (zh) * 2009-04-30 2015-03-25 爱德万测试株式会社 时钟生成装置、测试装置及时钟生成方法
JP5211239B2 (ja) * 2009-05-11 2013-06-12 株式会社アドバンテスト 受信装置、試験装置、受信方法および試験方法
WO2011033589A1 (fr) * 2009-09-18 2011-03-24 株式会社アドバンテスト Appareil d'essai et procédé d'essai
US8554514B2 (en) 2009-09-18 2013-10-08 Advantest Corporation Test apparatus and test method
WO2014108742A1 (fr) * 2013-01-09 2014-07-17 Freescale Semiconductor, Inc. Procédé et appareil pour échantillonner un signal
US9279857B2 (en) 2013-11-19 2016-03-08 Teradyne, Inc. Automated test system with edge steering
KR101738005B1 (ko) 2016-06-10 2017-05-19 (주)제이케이아이 논리 분석기
US10733345B1 (en) * 2018-08-23 2020-08-04 Cadence Design Systems, Inc. Method and system for generating a validation test

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6173207B1 (en) * 1997-09-22 2001-01-09 Agilent Technologies, Inc. Real-time control system with non-deterministic communication
US6204710B1 (en) * 1998-06-22 2001-03-20 Xilinx, Inc. Precision trim circuit for delay lines

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997740A (en) * 1975-05-30 1976-12-14 Bell Telephone Laboratories, Incorporated Pulse train analyzer
US4989202A (en) * 1988-10-14 1991-01-29 Harris Corporation ISDN testing device and method
US5084669A (en) * 1990-03-08 1992-01-28 Telefonaktiebolaget L M Ericsson Direct phase digitization
DE69324507T2 (de) * 1992-01-16 1999-10-07 Hamamatsu Photonics K.K., Hamamatsu Anordnung zur Messung des zeitlichen Zusammenhangs zwischen zwei oder mehr Signalen
JP2682334B2 (ja) * 1992-05-29 1997-11-26 日本電気株式会社 画像信号の符号化伝送方法
US5446650A (en) * 1993-10-12 1995-08-29 Tektronix, Inc. Logic signal extraction
US5526286A (en) * 1994-02-16 1996-06-11 Tektronix, Inc. Oversampled logic analyzer
US6285722B1 (en) * 1997-12-05 2001-09-04 Telcordia Technologies, Inc. Method and apparatus for variable bit rate clock recovery
US6198700B1 (en) * 1999-06-04 2001-03-06 Level One Communications, Inc. Method and apparatus for retiming test signals
JP4495308B2 (ja) * 2000-06-14 2010-07-07 株式会社アドバンテスト 半導体デバイス試験方法・半導体デバイス試験装置
JP2002196053A (ja) * 2000-12-25 2002-07-10 Ando Electric Co Ltd Ｉｃ測定装置
US7233164B2 (en) * 2003-12-17 2007-06-19 Rambus Inc. Offset cancellation in a multi-level signaling system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6173207B1 (en) * 1997-09-22 2001-01-09 Agilent Technologies, Inc. Real-time control system with non-deterministic communication
US6204710B1 (en) * 1998-06-22 2001-03-20 Xilinx, Inc. Precision trim circuit for delay lines

Also Published As

Publication number Publication date
EP1927210A2 (fr) 2008-06-04
JP2009510403A (ja) 2009-03-12
EP1927204A2 (fr) 2008-06-04
WO2007038233A2 (fr) 2007-04-05
KR20080045714A (ko) 2008-05-23
WO2007038339A3 (fr) 2007-12-06
EP1927203A2 (fr) 2008-06-04
WO2007038233A3 (fr) 2008-10-30
JP5254795B2 (ja) 2013-08-07
JP4907663B2 (ja) 2012-04-04
WO2007038339A2 (fr) 2007-04-05
KR20080047403A (ko) 2008-05-28
JP2009510842A (ja) 2009-03-12
JP2009509174A (ja) 2009-03-05
KR20080048487A (ko) 2008-06-02
JP5254794B2 (ja) 2013-08-07
KR101237878B1 (ko) 2013-02-27
KR101236769B1 (ko) 2013-02-25
KR101239743B1 (ko) 2013-03-06
WO2007038340A2 (fr) 2007-04-05

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