WO2007007386A1 - Simox基板の製造方法及び該方法により得られるsimox基板 - Google Patents
Simox基板の製造方法及び該方法により得られるsimox基板 Download PDFInfo
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- WO2007007386A1 WO2007007386A1 PCT/JP2005/012734 JP2005012734W WO2007007386A1 WO 2007007386 A1 WO2007007386 A1 WO 2007007386A1 JP 2005012734 W JP2005012734 W JP 2005012734W WO 2007007386 A1 WO2007007386 A1 WO 2007007386A1
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- H10P30/209—
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- H10P14/20—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
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- H10P36/00—
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- H10P36/07—
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- H10P90/1908—
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- H10W10/181—
Definitions
- the present invention relates to an SOI (Silicon-On-Silicon) in which a single crystal silicon layer (hereinafter referred to as SOI layer) is formed on a silicon single crystal body through a buried oxide layer (Buried Oxide).
- SOI layer single crystal silicon layer
- Buried Oxide Buried Oxide
- -Insulator a single crystal silicon layer
- the present invention relates to a method of manufacturing a SIMOX substrate by SIMOX (S-marked aration by Implanted Oxygen) technology and a SIMOX substrate obtained by the method. More specifically, the present invention relates to a method of manufacturing a SIMOX substrate capable of efficiently capturing heavy metal contamination in the device process inside the substrate, and a SIMOX substrate obtained by the method.
- SOI substrates can (1) reduce the parasitic capacitance between the element and the substrate, thus enabling high-speed device operation, (2) excellent radiation withstand voltage, and (3) easy dielectric separation. Therefore, it has very excellent features such as high integration, and (4) improved latch-up resistance.
- One method is a laminating method in which an active wafer to be thinned and a supporting wafer are laminated, and the other method is a method in which oxygen ions are implanted from the wafer surface and an area of a predetermined depth from the wafer surface.
- This is a SIMOX method that forms a loaded oxide layer.
- the SIMOX method is expected to be an effective method in the future due to the small number of manufacturing processes.
- a high-temperature heat treatment process force is also formed in which a buried oxide layer is formed inside the substrate by performing a high-temperature heat treatment on the substrate into which oxygen ions are implanted in an oxidizing atmosphere.
- a silicon single crystal substrate is maintained at a temperature of 500 ° C. to 650 ° C., and oxygen atom ions or oxygen molecule ions of about 10 17 to 10 18 / cm 2 are brought to a predetermined depth from the substrate surface. inject.
- the silicon substrate into which oxygen ions were implanted was put into a heat treatment furnace maintained at a temperature of 500 ° C to 700 ° C, and the temperature was gradually raised so as not to generate a slip, and about 1300 ° C to 1390 ° C. Heat treatment is performed at a temperature of about 10 hours. This high temperature heat Oxygen ions implanted into the substrate by the treatment react with silicon and are carried inside the substrate to form an oxide layer.
- gettering technology for removing metal from the substrate surface that has a direct adverse effect on device characteristics includes a method of distorting the back surface of the substrate by sandblasting, and a polycrystalline silicon film on the back surface of the substrate.
- There are external gettering methods such as a method of depositing silicon and a method of injecting high-concentration phosphorus into the backside of the substrate, but the strain field of crystal defects caused by oxygen precipitates deposited inside the silicon substrate is used.
- the internal gettering method (Intrinsic Gettering), which is excellent in mass production, is partly used for mass production as a clean gettering method.
- SIMOX substrates require high-temperature heat treatment at around 1300 ° C after oxygen ion implantation in order to form a loaded oxide layer inside the substrate.
- oxygen ion implantation it was difficult to form oxygen precipitates as an internal gettering sink.
- a method of manufacturing a semiconductor substrate is proposed in which a heat treatment is carried out by increasing the temperature stepwise or continuously from a low temperature to a high temperature after performing a heat treatment for 12 hours to form a loaded oxide layer (for example, (See Patent Document 1).
- a stepwise heat treatment method is started from 500 ° C, and gradually increased from 50 to 100 ° C, and the final temperature is increased to 850 ° C.
- SIMOX has a structure in which a buried oxide layer is not partially formed and has a structure in which gettering means due to crystal defects or crystal distortion is provided on the back surface of a silicon single crystal substrate or a silicon single crystal substrate.
- Substrate and manufacturing method thereof are proposed (For example, see Patent Document 2).
- the loaded oxide layer is formed in the vicinity of the surface layer in pieces, and the oxygen precipitation nuclei are formed in the range of 500 to 900 ° C heat treatment conditions for gettering, and the density is 10 5.
- / cm 3 in the range of 10 9 ZCM 3, 1000 to a second heat treatment: are the mounting serial and may be the precipitation nuclei are grown precipitates in the range of 1150 ° C.
- Patent Document 1 JP-A-7-193072 (Claims:! To 3)
- Patent Document 2 JP-A-5-82525 (Claims 1, 2, 4 and 5, paragraphs [0019] to [0023])
- Non-patent document 1 _1 16 ( ⁇ 0 (: 11 ⁇ 2111.30, 142,2059, (1995)
- Non-Patent Document 1 As a feature when manufacturing a SIMOX substrate, a defect assembly layer having a thickness of about 200 nm is inevitably formed immediately below the loading oxide layer, and this defect assembly layer has a gettering effect force S.
- Non-Patent Document 1 when heavy metal contamination occurs suddenly in the SIMOX substrate manufacturing process, oxygen precipitation on the SIMOX substrate described in Patent Document 1 and Patent Document 2 described above When a sufficient gettering effect cannot be obtained with a material, it is considered that heavy metals are also trapped in the defect aggregation layer immediately below the buried oxide layer.
- An object of the present invention is to provide a SIMOX substrate manufacturing method and a SIMOX substrate obtained by the method capable of reducing the heavy metal capture concentration of the defect assembly layer and capturing the heavy metal efficiently in the Balta layer. There is.
- the invention according to claim 1 includes a step of implanting oxygen ions into the silicon wafer 11, and the wafer 11 is made of oxygen and an inert gas.
- a first heat treatment is performed at 1300 to 1390 ° C. to form a buried oxide layer 12 in a predetermined depth region from the wafer 11 surface, and on the wafer surface on the buried oxide layer 12. This is an improvement of the SIMOX substrate manufacturing method including the step of forming the SOI layer 13.
- silicon wafer 11 before oxygen ion implantation has an oxygen concentration of 8 X 10 17 to 1.8 X 10 18 atoms / cm 3 (former ASTM), and buried oxide layer 12 extends over the entire surface of the wafer.
- the first heat-treated wafer is formed in the atmosphere of oxygen, nitrogen, argon, hydrogen or a mixed gas thereof at a temperature of 400 to 900 ° C. for 1 to 96 hours to form a buried oxide layer 12 immediately below.
- To 96 hours by performing a third heat treatment to grow oxygen precipitate nuclei 14b formed in the Balta layer 14 into oxygen precipitates 14c.
- the Balta layer 14 below the defect assembly layer 14a has a gettering source made of oxygen precipitates 14c, and the density of the oxygen precipitates 14c is 1 ⁇ 10 8 to 1 ⁇ 10 12 It is possible to obtain a SIMOX substrate that is / cm 3 and the size of the oxygen precipitate 14c is 50 nm or more.
- the invention according to claim 2 is the invention according to claim 1, wherein the second heat treatment is performed in a partial range or all ranges from 400 ° C to 90 ° C. By raising the temperature at a rate of ° C / min:! ⁇ 96 hours, the third heat treatment is 900 ° C force and 0.:! ⁇ 20 in part or all of 1250 ° C By raising the temperature at a rate of ° C / min: a production process carried out within the range of! To 96 hours.
- the invention according to claim 3 includes the step of implanting oxygen ions into the silicon wafer 11, and the first heat at 1300 to 1390 ° C in a mixed gas atmosphere of oxygen and inert gas. And forming a buried oxide layer 12 in a region of a predetermined depth from the surface of the wafer 11 and forming an SOI layer 13 on the surface of the wafer 18 on the buried oxide layer 12. This is an improvement of the manufacturing method.
- silicon wafer 11 before oxygen ion implantation has an oxygen concentration of 8 X 10 17 to 1.8 X 10 18 atoms / cm 3 (former ASTM), and buried oxide layer 12 extends over the entire surface of the wafer.
- the partially formed and first heat-treated wafer is held at 1050 to: 1350 ° C:! To 900 seconds, and then subjected to a rapid thermal treatment in which the temperature is lowered at a temperature lowering rate of 10 ° C / second or more.
- the invention according to claim 4 is the invention according to claim 3, wherein the wafer subjected to the second heat treatment in an atmosphere of oxygen, nitrogen, argon, hydrogen, or a mixed gas thereof is higher than the second heat treatment temperature by 900 to :
- the manufacturing method further includes the step of growing the oxygen precipitation nuclei 14b formed in the Balta layer 14 into the oxygen precipitates 14c by performing the third heat treatment at 1250 ° C. for 1 to 96 hours.
- the invention according to claim 5 is the invention according to claim 3, wherein the second heat treatment is performed in a partial range or all range from 500 ° C to 100 ° C. The temperature is increased at a rate of:! To 96 hours.
- the invention according to claim 6 is the invention according to claim 4, wherein the third heat treatment is performed at a speed of 0.:! To 20 ° CZ in a partial range or all range of 900 ° C to 1250 ° C.
- the production method is carried out within a range of! To 96 hours.
- the invention according to claim 7 is any one of claims 1 to 6, as shown in FIG. Force A SIMOX substrate manufactured from the method described in item 1, wherein the oxide layer 12 is formed in a region at a predetermined depth from the wafer surface, and the SOI layer is formed on the wafer surface on the buried oxide layer.
- Layer 13 a defect assembly layer 14 a formed immediately below the supported oxide layer 12, and a butter layer 14 below the support oxide layer 12, and oxygen precipitates in the Balta layer 14 below the defect assembly layer 14 a.
- SIMOX characterized in that it has a gettering source consisting of the material 14c, the density of the oxygen precipitates 14c is 1 X 10 8 to 1 X 10 12 pieces Zcm 3 and the size of the oxygen precipitates 14c is 50 nm or more It is a substrate.
- the Balta layer 14 below the defect assembly layer 14a has a gettering source made of oxygen precipitates 14c, and the density of the oxygen precipitates 14c is 1 ⁇ 10 8 to 1 ⁇ 10 12 Since the size of the oxygen precipitate 14c is 50 nm or more because it is a stronger gettering source than the defect assembly layer 14a, most of the heavy metal contaminants conventionally captured in the defect assembly layer 14a It is possible to obtain gettering force S on the oxygen precipitates 14c of the Balta layer 14 without trapping them in the defect assembly layer.
- the SIMOX substrate of the present invention has a gettering source made of oxygen precipitates in the Balta layer below the defect assembly layer, and the density of oxygen precipitates is 1 X 10 8 to 1 X 10 12 Zcm 3 Since the size of the oxygen precipitate is 50 nm or more, it becomes a stronger gettering source than the defect assembly layer, so that the heavy metal capture concentration of the defect assembly layer can be reduced, and heavy metal is added inside the Balta layer. It can be captured efficiently.
- FIG. 1 is a process diagram showing a first method for producing a SIMOX substrate of the present invention.
- FIG. 2 is a process diagram showing a second method for producing a SIMOX substrate of the present invention.
- the present invention provides a SIMOX substrate in which oxygen ions are implanted into a silicon wafer and then heat-treated to form a loading oxide layer in a predetermined depth from the wafer surface, and an SOI layer is formed on the wafer surface. It is about.
- the SIMOX substrate manufacturing method according to the present invention heat-treats the wafer 11 after the oxygen ions are implanted in three stages, and then forms oxide films ib and 11c formed on the wafer 11 surface. It is to be removed. Each of these steps is shown below.
- a silicon wafer 11 is prepared and oxygen ions are injected into the wafer 11.
- the prepared silicon wafer 11 before oxygen ion implantation is prepared to have an oxygen concentration of 8 ⁇ 10 17 to 1.8 ⁇ 10 18 atoms Zcm 3 (former ASTM).
- the silicon wafer to be prepared may be Epitachial Sueha or Annie Rueha
- oxygen ions are implanted into the prepared silicon wafer 11.
- the implantation of oxygen ions is performed by the same means as conventionally used.
- oxygen ions are implanted into the region 11a having a predetermined depth of the wafer 11 so that the SOI layer 13 in the finally obtained SIMOX substrate has a thickness of 10 to 200 nm, preferably 20 to 100 nm. Is done. If the thickness of the SOI layer 13 is less than 10 nm, it is difficult to control the thickness of the SOI layer 13, and if the thickness of the SOI layer 13 exceeds 200 nm, it is difficult to increase the acceleration voltage of the oxygen ion implanter. .
- the wafer 11 into which oxygen ions have been implanted is subjected to a first heat treatment at a temperature of 1300 to: 1390 ° C. in a mixed gas atmosphere of oxygen and inert gas.
- a mixed gas atmosphere of oxygen and inert gas examples thereof include argon gas and nitrogen gas. Therefore, the gas atmosphere of the first heat treatment is preferably a mixed gas of oxygen and argon or a mixed gas of oxygen and nitrogen.
- the heat treatment time of the first heat treatment is:! -20 hours, preferably 10-20 hours.
- oxide films ib and 11c are formed on the front surface and the back surface of the wafer 11, and a loading oxide layer 12 is formed over the entire surface of the wafer 11 in a region 11a having a predetermined depth from the front surface of the wafer 11. . Further, an SOI layer 13 is formed between the front side oxide film ib and the buried oxide layer 12. In addition, a defect assembly layer 14a is inevitably formed immediately below the loading oxide layer 12.
- the first heat-treated wafer 11 is left with the oxide films l ib and 11c or with the oxide films ib and 11c removed, with oxygen, nitrogen, argon, hydrogen Alternatively, the second heat treatment is performed in the mixed gas atmosphere. It is preferable to perform the second heat treatment with the oxide films ib and 11c left, particularly in a non-oxidizing gas atmosphere because the thickness of the SOI layer 13 does not decrease and variation does not occur.
- the reason for this is that when the second heat treatment is performed first in an oxidizing gas atmosphere, the oxide film ib, 11c grows further, and silicon on the wafer surface is consumed, and second, the atmosphere of hydrogen or argon gas This is because the SOI layer 13 is etched when the second heat treatment is performed. On the other hand, when the thickness of the SOI layer 13 is relatively large, the SOI layer 13 having a predetermined thickness can be obtained even if the thickness of the SOI layer 13 is reduced, so that the oxide films l ib and 11c are removed. It's okay to perform the second heat treatment.
- the gas atmosphere of the second heat treatment is preferably nitrogen gas, argon gas, nitrogen with addition of a trace amount of oxygen, or argon gas.
- the second heat treatment condition is performed at a temperature of 400 to 900 ° C for 1 to 96 hours.
- the reason why the second heat treatment temperature is set within the range of 400 to 900 ° C is that if the temperature is lower than the lower limit, the nucleation temperature is too low and a long heat treatment is required, and if the upper limit is exceeded, oxygen precipitation nucleation occurs. Because there is not.
- the second heat treatment time is specified within the range of 1 to 96 hours because if it is less than the lower limit, the time for forming oxygen precipitation nuclei is too short, and if the upper limit is exceeded, the productivity is poor. This is to cause a problem.
- This second heat treatment is at a temperature of 500 to 800 ° C and 4 to 35 hours.
- the second heat treatment is performed at a rate of 0.:! To 5.0 ° C / min in a partial range or all range of 400 ° C to 900 ° C, preferably 0.1 to: 1.0 ° C / By raising the temperature in minutes:! To 96 hours, preferably 4 to 35 hours.
- oxygen precipitation nuclei 14b are formed in the Balta layer 14 below the defect assembly layer 14a formed immediately below the loading oxide layer 12.
- the second heat-treated wood 11 is subjected to a third heat treatment.
- This third heat treatment is performed in an atmosphere of oxygen, nitrogen, argon, hydrogen or a mixed gas thereof at 900 to 1250 ° C., which is higher than the second heat treatment temperature, for 1 to 96 hours.
- the gas atmosphere of the third heat treatment is preferably nitrogen gas, argon gas, nitrogen containing a trace amount of oxygen, or argon gas.
- the third heat treatment temperature was set within the range of 900 to 1250 ° C because the oxygen precipitation nuclei were dissolved and damaged when the temperature exceeded the upper limit, at which the growth of oxygen precipitation nuclei was difficult to occur. This is because it occurs.
- the reason for setting the third heat treatment time within the range of 1 to 96 hours is that if the upper limit value is exceeded when the growth of oxygen precipitates is not sufficient if the lower limit value is not reached, productivity deterioration will occur.
- the third heat treatment is preferably performed at 1000 to 1200 ° C for 8 to 24 hours. Furthermore, the third heat treatment should be performed at a rate of 0.:! To 20 ° C / min, preferably 1 to 5 ° C / min in a partial range or all ranges from 900 ° C to 1250 ° C. Depending on the case, it may be carried out in the range of 1 to 96 hours, preferably 8 to 24 hours.
- the oxygen precipitation nuclei 14b formed in the Balta layer 14 can be grown into the oxygen precipitates 14c.
- the oxide film 1 lb, 11c on the front and back surfaces of the wafer 11 subjected to the third heat treatment is removed with hydrofluoric acid or the like.
- the carrier oxide layer 12 formed at a predetermined depth from the wafer surface, the SO I layer 13 formed on the wafer surface on the buried oxide layer, and the carrier oxide layer 12 are formed immediately below.
- the defect aggregation layer 14a and the burr layer 14 below the loading oxide layer 12 have a gettering source consisting of oxygen precipitates 14c in the burr layer 14 below the defect accumulation layer 14a.
- SIMOX characterized in that the density of 14c is 1 X 10 8 to 1 X 10 pieces / cm 3 and the size of the oxygen precipitate 14c is 50 nm or more A substrate is obtained.
- the Balta layer 14 below the defect assembly layer 14a has oxygen precipitates 14c having a density of 1 ⁇ 10 8 to 1 ⁇ 10 12 Zcm 3 and a size of 50 nm or more, Sudden heavy metal contamination in the device process can be efficiently captured by this oxide precipitate 14c. Further, since this oxide precipitate 14c is a stronger gettering source than the defect assembly layer 14a, heavy metal contaminants that have been trapped in the defect assembly layer 14a in the past must be gettered to the oxygen precipitate 14c in the Balta layer 14. Can do.
- the concentration of heavy metal trapped in the defect assembly layer 14a is 5 X 10 9 It can be reduced to a level of less than / cm 2. Needless to say, it can also be applied to a SIMOX substrate in which a buried oxide layer is partially formed.
- the present invention provides a SIMOX substrate in which oxygen ions are implanted into a silicon wafer and then heat-treated to form a loading oxide layer in a predetermined depth from the wafer surface, and an SOI layer is formed on the wafer surface. It is about.
- the SIMOX substrate manufacturing method according to the present invention heat-treats the wafer 11 after oxygen ion implantation in three or four stages, and then forms an oxide film l ib formed on the wafer 11 surface. , 11c is removed. Each of these steps is shown below.
- a silicon wafer 11 is prepared and oxygen ions are injected into the wafer 11.
- the prepared silicon wafer 11 before oxygen ion implantation is prepared to have an oxygen concentration of 8 ⁇ 10 17 to 1.8 ⁇ 10 18 atoms Zcm 3 (former ASTM).
- the silicon wafer to be prepared may be Epitachial Sueha or Annie Rueha
- oxygen ions are implanted into the prepared silicon wafer 11.
- the implantation of oxygen ions is performed by the same means as conventionally used.
- the wafer 11 has a surface force with a predetermined depth of 11a so that the thickness of the SOI layer 13 in the finally obtained SIMOX substrate is 10 to 200 nm, preferably 20 to 100 nm. Ions are implanted. If the thickness of the SOI layer 13 is less than 10 nm, it is difficult to control the thickness of the SOI layer 13, and if the thickness of the SOI layer 13 exceeds 200 nm, it is difficult to increase the acceleration voltage of the oxygen ion implanter. .
- a mask or the like is partially formed at a desired position on the surface of the silicon wafer 11, and then oxygen ions are implanted into the silicon wafer 11, so that the mask is not formed. Oxygen ions are implanted inside, and oxygen ions are not implanted inside the wafer below the area where the mask is formed. Therefore, by performing the first heat treatment that follows, it is only carried below the area where the mask is not formed. An oxide layer 12 is partially formed.
- the wafer 11 into which oxygen ions have been implanted is subjected to a first heat treatment in a mixed gas atmosphere of oxygen and inert gas at a temperature of 1300 to: 1390 ° C.
- the inert gas include argon gas and nitrogen gas. Therefore, the gas atmosphere of the first heat treatment is preferably a mixed gas of oxygen and argon or a mixed gas of oxygen and nitrogen.
- the heat treatment time of the first heat treatment is:! -20 hours, preferably 10-20 hours.
- oxide films ib and 11c are formed on the front surface and the back surface of wafer 11, and a loaded oxide layer 12 is formed over the entire surface of the wafer 11 in a region 11a having a predetermined depth from the front surface of wafer 11. .
- the loading oxide layer 12 is partially formed.
- an SOI layer 13 is formed between the front-side oxide film l ib and the buried oxide layer 12.
- a defect assembly layer 14a is inevitably formed immediately below the buried oxide layer 12.
- the first heat-treated wafer is held at 1050 ° C to: 1350 ° C for 1 second to 900 seconds, and then the temperature is lowered at a temperature lowering rate of 10 ° C / second or more.
- the gas atmosphere for this rapid heat treatment is preferably an argon gas or ammonia-containing gas atmosphere.
- the rapid thermal processing conditions are 1050 ° C to: 1350 ° C and held for 1 second to 900 seconds.
- the rapid heat treatment temperature is specified within the range of 1050 ° C to 1350 ° C because the oxygen precipitation is below the lower limit. If the amount of voids sufficient to promote the formation of nuclei cannot be injected into the wafer, and if the upper limit is exceeded, slip dislocation will occur in the wafer 8 during heat treatment, which will hinder device fabrication. This is because it is not preferable.
- a preferable heat treatment temperature is 1100 to: 1300 ° C.
- the holding time is set to 1 second to 900 seconds, if it is less than the lower limit, the time required to reach the desired heat treatment temperature differs in the wafer plane and in the depth direction, which may cause variations in quality. This is because of concern.
- the upper limit was specified because slip reduction and productivity were taken into consideration.
- a preferred holding time is 10 to 60 seconds.
- the temperature is decreased at a temperature decrease rate of 10 ° C / second or more after predetermined holding.
- the reason for setting the temperature drop rate to 10 ° C / sec or more is that if it is less than the lower limit, the effect of suppressing the disappearance of vacancies cannot be obtained.
- the reason why we did not set an upper limit was that if it exceeded 10 ° C / s, the effect would hardly change.
- the cooling rate can be controlled to 10 to 100 ° CZ seconds in consideration of productivity. desirable.
- a more preferable temperature drop rate is 15 to 50 ° CZ seconds.
- This rapid heat treatment ensures in-plane uniformity of the oxygen precipitate density distribution in the wafer surface, and improves the reliability of oxygen precipitate growth even with low-concentration silicon wafers. If this rapid heat treatment is not performed, there is a possibility that the oxygen precipitate density distribution in the wafer eight face cannot be made uniform even if the subsequent process is performed.
- the rapidly heat-treated wafer 11 is left with the oxide films l ib and 11c, or with the oxide films l ib and 11c removed, with oxygen, nitrogen, argon, hydrogen or Alternatively, the second heat treatment is performed in the mixed gas atmosphere. It is preferable to perform the second heat treatment with the oxide films ib and 11c left, particularly in a non-oxidizing gas atmosphere because the thickness of the SOI layer 13 does not decrease and does not vary. The reason for this is that when the second heat treatment is first performed in an oxidizing gas atmosphere, the oxide film ib, 11c grows further, and silicon on the wafer surface is consumed.
- the second heat treatment may be performed.
- the gas atmosphere of the second heat treatment is preferably nitrogen gas, argon gas, nitrogen with addition of a trace amount of oxygen, or argon gas.
- the second heat treatment condition is performed at a temperature of 500 to 1000 ° C:! To 96 hours.
- the second heat treatment temperature is specified within the range of 500 to 1000 ° C. If the temperature is below the lower limit, the nucleation temperature is too low and a long-time heat treatment is required. This is because no occurs.
- the second heat treatment time is defined within the range of 1 to 96 hours because if it is less than the lower limit, the time for forming oxygen precipitation nuclei is too short. This is because it occurs.
- the second heat treatment is more preferably performed at a temperature of 500 to 800 ° C. for 4 to 35 hours. The second heat treatment is performed at a rate of 0.:!
- the second heat-treated wafer 11 is subjected to a third heat treatment.
- This third The heat treatment is performed in an atmosphere of oxygen, nitrogen, argon, hydrogen or a mixed gas thereof at 900 to 1250 ° C., which is higher than the second heat treatment temperature, for 1 to 96 hours.
- the gas atmosphere of this third heat treatment is preferably nitrogen gas, argon gas or nitrogen or argon gas with a trace amount of oxygen.
- the third heat treatment temperature is specified in the range of 900 to 1250 ° C because the oxygen precipitate nuclei are dissolved and damaged when the temperature exceeds the upper limit, at which the growth of oxygen precipitate nuclei is difficult to occur sufficiently below the lower limit. It is for producing.
- the reason for setting the third heat treatment time within the range of 1 to 96 hours is that if the upper limit value is exceeded when the growth of oxygen precipitates is not sufficient if the lower limit value is not reached, productivity deterioration will occur.
- the third heat treatment is preferably performed at 1000 to 1200 ° C for 8 to 24 hours. Furthermore, the third heat treatment should be performed at a rate of 0.:! To 20 ° C / min, preferably 1 to 5 ° C / min in a partial range or all ranges from 900 ° C to 1250 ° C. Depending on the case, it may be carried out in the range of 1 to 96 hours, preferably 8 to 24 hours.
- the oxygen precipitation nuclei 14b formed in the Balta layer 14 can be grown into the oxygen precipitates 14c.
- the oxide films 11b and 11c on the front and back surfaces of the wafer 11 that have been subjected to the third heat treatment are removed with hydrofluoric acid or the like.
- the buried oxide layer 12 formed in a region at a predetermined depth from the wafer surface, the SOI layer 13 formed on the wafer surface on the carrier oxide layer, and the directly below the carrier oxide layer 12 are formed. It has a defect assembly layer 14a and a butter layer 14 below the loading oxide layer 12, and has a gettering source consisting of oxygen precipitates 14c in the butter layer 14 below the defect assembly layer 14a.
- a SIMOX substrate having a density of 1 ⁇ 10 8 to 1 ⁇ 10 12 Zcm 3 and a size of the oxygen precipitate 14c of 50 nm or more is obtained.
- the Balta layer 14 below the defect assembly layer 14a has oxygen precipitates 14c having a density of 1 ⁇ 10 8 to 1 ⁇ 10 12 Zcm 3 and a size of 50 nm or more, Sudden heavy metal contamination in the device process can be efficiently captured by this oxide precipitate 14c. Further, since this oxide precipitate 14c is a stronger gettering source than the defect assembly layer 14a, heavy metal contaminants that have been trapped in the defect assembly layer 14a in the past must be gettered to the oxygen precipitate 14c in the Balta layer 14. Can do.
- the heavy metal concentration is from 1 X 10 "to
- the concentration of heavy metals trapped in the defect assembly layer 14a can be reduced to a level of 5 X 10 9 / cm 2 or less.
- Fig. 1 (b) wafer 11 was placed in a heat treatment furnace and maintained at a constant temperature of 1350 ° C for 4 hours in an Ar gas atmosphere with an oxygen partial pressure of 0.5%.
- a first heat treatment was performed in which the oxygen partial pressure was increased to 70% and held for another 4 hours.
- the first heat-treated wafer is continuously raised from 500 ° C to 850 ° C at 1.0 ° CZ in a 1% oxygen atmosphere with the surface oxide film lib, 11c left.
- a second heat treatment was performed by holding at 850 ° C. for 1 hour. As shown in FIG.
- Example 1 After the second heat-treated wafer 11 was heated to 1100 ° C at a temperature increase rate of 5.0 ° C / min at 850 ° C force in 1% oxygen atmosphere, A third heat treatment was carried out at 110 ° C. for 8 hours. Thereafter, the third heat-treated wafer was cooled to 700 ° C. at a rate of 3.0 ° C./min. The oxide film lib, 11c on the front and back surfaces of the wafer after heat treatment was removed with HF solution to obtain a SIMOX substrate. This SIMOX substrate was referred to as Example 1.
- the oxygen concentration grown by CZ method is 4X10 18 atoms / cm 3 (old ASTM), the nitrogen concentration is 4.0X10 14 atoms / cm 3 (old ASTM), and the specific resistance is 10 ⁇
- a CZ silicon wafer cut to a predetermined thickness from a cm silicon ingot was prepared.
- this wafer was heated to a temperature of 550 ° C., and in this state, oxygen ions were implanted into a predetermined region of the silicon wafer (for example, a region of about 0.4 ⁇ m from the substrate surface) under the following conditions.
- woofer 11 was placed in a heat treatment furnace and maintained at a constant temperature of 1350 ° C for 4 hours in an Ar gas atmosphere with an oxygen partial pressure of 0.5%, and then the furnace was continued. A first heat treatment was performed in which the oxygen partial pressure in the atmosphere was increased to 70% and held for another 4 hours. As shown in Fig. 1 (c), the first heat-treated wafer is kept at 0 ° C from 700 ° C to 700 ° C in a 1% oxygen (argon base) atmosphere with the oxide films ib and 11c on the surface remaining.
- a second heat treatment was performed at 700 ° C for 1 hour.
- the second heat-treated wafer 11 was heated from 700 ° C to 1000 ° C at a rate of 5.0 ° C / min in a 1% oxygen atmosphere.
- a third heat treatment was performed for 16 hours at 1000 ° C. After that, the third heat-treated wafer was cooled to 700 ° C at a rate of 3.0 ° C / min.
- the oxide film ib, 11c on the wafer front and back surfaces after the heat treatment was removed with HF solution to obtain a SIMOX substrate.
- This SIMOX substrate was designated as Example 2.
- a SIMOX substrate was obtained in the same manner as in Example 2 except that the second heat treatment was held at 700 ° C for 4 hours. This SIMOX substrate was designated as Example 3.
- a SIMOX substrate was obtained in the same manner as in Example 2 except that the second heat treatment was held at 700 ° C for 8 hours. This SIMOX substrate was designated as Example 4.
- the oxygen concentration grown by the CZ method is 1.4 X 10 18 atoms / cm 3 (old ASTM), the carbon concentration is 2.02 X 10 16 atoms / cm 3 (old ASTM)
- specific resistance 10 ⁇ • CZ silicon wafers cut from a cm silicon ingot to a specified thickness were prepared.
- a 3 ⁇ m thick silicon epitaxial film was deposited on the surface of the CZ silicon wafer.
- this wafer was heated to a temperature of 550 ° C., and in this state, oxygen ions were implanted into a predetermined region of the silicon wafer (for example, a region of about 0.4 ⁇ m from the substrate surface) under the following conditions.
- woofer 11 was placed in a heat treatment furnace and maintained at a constant temperature of 1350 ° C for 4 hours in an Ar gas atmosphere with an oxygen partial pressure of 0.5%, and then the furnace was continued. A first heat treatment was performed in which the oxygen partial pressure in the atmosphere was increased to 70% and held for another 4 hours. As shown in FIG. 1 (c), the first heat-treated wafer was subjected to a second heat treatment that was held at 700 ° C. for 8 hours in a nitrogen atmosphere with the oxide films ib and 11c on the surface remaining.
- the second heat-treated wafer 11 was heated from 700 ° C to 1000 ° C at a rate of 5.0 ° C / min in a nitrogen atmosphere as shown in Fig. L (d), and then 1000 ° C.
- a third heat treatment was performed for 16 hours at C. After that, the third heat-treated wafer was cooled to 700 ° C at a rate of 3.0 ° C / min.
- the oxide film ib, 11c on the wafer front and back surfaces after the heat treatment was removed with HF solution to obtain a SIMOX substrate. This SIMOX substrate was designated as Example 5.
- a SIMOX substrate was obtained in the same manner as in Example 1 except that the second heat treatment and the third heat treatment were not performed. This SIMOX substrate was designated as Comparative Example 1.
- Example 2 the same procedure as in Example 1 was performed except that the heat treatment was started at 500 ° C and continuously heated at 1.0 ° C / min until the final temperature reached 850 ° C. A SIMOX substrate was obtained. This SIMOX substrate was designated as Comparative Example 2.
- Table 1 shows the results of the nickel concentration contained in each layer of the Examples:! To 5 and the SIMOX substrates of Comparative Examples 1 and 2.
- the surface concentration of the SOI layer, the buried oxide layer, and the defect assembly layer is about 5. OX lO ⁇ atoms / cm 2 . Nickel was observed. On the other hand, the Nikkenore concentration in the Balta layer was below the detection limit value. In contrast, in the SIMOX substrates of Examples 1 to 5, the Nikkenore concentration was below the detection limit value in the SI layer, the buried oxide layer, and the defect assembly layer. Also, the nickel concentration in the Balta layer was 2.6 6 10 "to 4. SX loHatoms / cm 3 , indicating that heavy metal impurities were reliably gettered by the oxygen precipitates formed in the Balta layer. It was.
- SIMOX substrates in! To 5 and Comparative Examples 1 and 2 were cleaved in two. Both the cleaved substrates were selectively etched with a Wright etchant. First, one substrate was observed with an optical microscope, and oxygen precipitates at a surface cleavage surface depth of 2 zm were measured to determine the density.
- the density of oxygen precipitates in the SIMOX substrates of Comparative Examples 1 and 2 was 5 ⁇ 10 7 pieces / cm 2 or less.
- the oxygen precipitate density in the SIMOX substrate of Examples:! To 5 was in the range of 1 ⁇ 10 8 to 1 ⁇ 10 12 pieces / cm 3 .
- a DZ layer (denuded zone) in which no oxygen precipitates exist was present in the region from immediately under the buried oxide layer to 10 am.
- Comparative Example 1 and 2 SIMOX substrates had oxygen precipitate size of 50 nm or less
- Example:! ⁇ 5 SIMOX substrates were found that most of the oxygen precipitate size was 50 nm or more .
- a predetermined thickness is cut out from a silicon ingot having an oxygen concentration of 1.0 X 10 18 atoms / cm 3 (former ASTM) and a specific resistance of 20 ⁇ ⁇ cm grown by the CZ method.
- CZ silicon wafer was prepared.
- this wafer was heated to a temperature of 550 ° C., and in this state, oxygen ions were implanted into a predetermined region of the silicon wafer 8 (for example, a region about 0. 0 from the substrate surface) under the following conditions. .
- Fig. 2 (b) wafer 11 was placed in a vertical heat treatment furnace and kept at a constant temperature of 1350 ° C for 4 hours in an Ar gas atmosphere with an oxygen partial pressure of 0.5%. Continue to reduce the oxygen partial pressure in the furnace atmosphere The first heat treatment was increased to 70% and held for another 4 hours. As shown in Fig. 2 (c), the first heat-treated wafer was heated to 1150 ° C at a temperature rising rate of 50 ° CZ seconds in an ammonia-containing gas atmosphere, and then held for 120 seconds. Rapid heat treatment was performed to lower the temperature to 400 ° C at a temperature decrease rate of 50 ° C / sec. As shown in Fig.
- this rapidly heat-treated wafer 11 is placed in a horizontal batch furnace with the surface oxide films ib and 11c left, and is kept at a constant temperature of 800 ° C in an argon atmosphere.
- the second heat treatment was performed for 48 hours.
- the oxide films on the front and back surfaces were removed with HF solution to obtain a SIMOX substrate.
- This SIMOX substrate was designated as Example 6.
- the SIMOX substrate in Examples 1 and 6 was cleaved in two.
- the cleaved substrate was selectively etched with a Wright etchant.
- oxygen precipitates at a depth of 3 / m from the surface of the substrate cleavage plane were measured to determine the density.
- the oxygen precipitate density in the SIMOX substrate of Example 1 was 1 ⁇ 10 4 pieces / cm 2 or less.
- the oxygen precipitate density in the SIMOX substrate of Example 6 was in the range of 8 ⁇ 10 4 pieces / cm 3 .
- each SIMOX substrate 10 of Example 6 and Comparative Example 1 After removing the surface oxide films ib, 11c of each SIMOX substrate 10 of Example 6 and Comparative Example 1, the SOI layer 13, the buried oxide layer 12, and the defect collection layer 14a immediately below the buried oxide layer of each SIMOX substrate are covered with a hook.
- Each solution was dissolved and collected with an aqueous oxynitric acid solution, and ICP-MS measurement was performed on the collected solution to measure the concentration of Nikkenore contained in the solution.
- the Balta layer 14 of Example 6 and Comparative Example 1 was separately dissolved into a Balta layer excluding 1 ⁇ m from the back surface and a 1 ⁇ m region from the back surface, respectively, and dissolved completely.
- oxygen precipitates are formed in the Balta layer below the defect assembly layer.
- Gettering source with a density of 1 X 10 8 to 1 X 10 12 Zcm 3 and a size of oxygen precipitates of 50 nm or more. Therefore, the heavy metal capture concentration in the defect assembly layer can be reduced, and heavy metal can be efficiently captured in the Balta layer.
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Abstract
Description
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Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2005/012734 WO2007007386A1 (ja) | 2005-07-11 | 2005-07-11 | Simox基板の製造方法及び該方法により得られるsimox基板 |
| US11/988,609 US20080251879A1 (en) | 2005-07-11 | 2005-07-11 | Method for Manufacturing Simox Substrate and Simox Substrate Obtained by this Method |
| CNA2005800510516A CN101223641A (zh) | 2005-07-11 | 2005-07-11 | Simox基板的制造方法以及由该方法得到的simox基板 |
| EP05765515A EP1906450A4 (en) | 2005-07-11 | 2005-07-11 | PROCESS FOR MANUFACTURING A SIMOX SUBSTRATE AND SIMOX SUBSTRATE MANUFACTURED BY THE PROCESS |
| KR1020087003281A KR100965510B1 (ko) | 2005-07-11 | 2005-07-11 | Simox 기판의 제조 방법 및 그 방법에 의해 얻어지는 simox 기판 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2005/012734 WO2007007386A1 (ja) | 2005-07-11 | 2005-07-11 | Simox基板の製造方法及び該方法により得られるsimox基板 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2007007386A1 true WO2007007386A1 (ja) | 2007-01-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| PCT/JP2005/012734 Ceased WO2007007386A1 (ja) | 2005-07-11 | 2005-07-11 | Simox基板の製造方法及び該方法により得られるsimox基板 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20080251879A1 (ja) |
| EP (1) | EP1906450A4 (ja) |
| KR (1) | KR100965510B1 (ja) |
| CN (1) | CN101223641A (ja) |
| WO (1) | WO2007007386A1 (ja) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4706199B2 (ja) * | 2004-07-20 | 2011-06-22 | 株式会社Sumco | Simox基板の製造方法 |
| DE102008027521B4 (de) * | 2008-06-10 | 2017-07-27 | Infineon Technologies Austria Ag | Verfahren zum Herstellen einer Halbleiterschicht |
| KR101512393B1 (ko) * | 2010-12-27 | 2015-04-16 | 상하이 심구 테크놀로지 주식회사 | 게터링 프로세스를 적용한 절연 매입층을 가진 반도체 기판의 제조방법 |
| JP6704781B2 (ja) * | 2016-04-27 | 2020-06-03 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハ |
| US10651281B1 (en) * | 2018-12-03 | 2020-05-12 | Globalfoundries Inc. | Substrates with self-aligned buried dielectric and polycrystalline layers |
| CN115188825B (zh) * | 2022-07-04 | 2024-01-30 | 弘大芯源(深圳)半导体有限公司 | 一种制造抗辐射金属氧化物半导体场效应器件及其制造方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04276627A (ja) * | 1991-03-05 | 1992-10-01 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH1167781A (ja) * | 1997-08-08 | 1999-03-09 | Sumitomo Metal Ind Ltd | シリコン半導体基板の熱処理方法 |
| JP2005175390A (ja) * | 2003-12-15 | 2005-06-30 | Sumitomo Mitsubishi Silicon Corp | Simox基板及びその製造方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5286658A (en) * | 1991-03-05 | 1994-02-15 | Fujitsu Limited | Process for producing semiconductor device |
| US6743495B2 (en) * | 2001-03-30 | 2004-06-01 | Memc Electronic Materials, Inc. | Thermal annealing process for producing silicon wafers with improved surface characteristics |
| WO2003001583A2 (en) * | 2001-06-22 | 2003-01-03 | Memc Electronic Materials, Inc. | Process for producing silicon on insulator structure having intrinsic gettering by ion implantation |
| US6784072B2 (en) * | 2002-07-22 | 2004-08-31 | International Business Machines Corporation | Control of buried oxide in SIMOX |
| CN101228613A (zh) * | 2005-07-22 | 2008-07-23 | 胜高股份有限公司 | Simox晶片的制造方法及用该方法制造的simox晶片 |
| JP2007208023A (ja) * | 2006-02-02 | 2007-08-16 | Sumco Corp | Simoxウェーハの製造方法 |
| JP2007227424A (ja) * | 2006-02-21 | 2007-09-06 | Sumco Corp | Simoxウェーハの製造方法 |
| JP5061489B2 (ja) * | 2006-04-05 | 2012-10-31 | 株式会社Sumco | Simoxウェーハの製造方法 |
-
2005
- 2005-07-11 CN CNA2005800510516A patent/CN101223641A/zh active Pending
- 2005-07-11 US US11/988,609 patent/US20080251879A1/en not_active Abandoned
- 2005-07-11 KR KR1020087003281A patent/KR100965510B1/ko not_active Expired - Fee Related
- 2005-07-11 EP EP05765515A patent/EP1906450A4/en not_active Withdrawn
- 2005-07-11 WO PCT/JP2005/012734 patent/WO2007007386A1/ja not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04276627A (ja) * | 1991-03-05 | 1992-10-01 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH1167781A (ja) * | 1997-08-08 | 1999-03-09 | Sumitomo Metal Ind Ltd | シリコン半導体基板の熱処理方法 |
| JP2005175390A (ja) * | 2003-12-15 | 2005-06-30 | Sumitomo Mitsubishi Silicon Corp | Simox基板及びその製造方法 |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP1906450A4 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20080037015A (ko) | 2008-04-29 |
| KR100965510B1 (ko) | 2010-06-24 |
| EP1906450A1 (en) | 2008-04-02 |
| US20080251879A1 (en) | 2008-10-16 |
| EP1906450A4 (en) | 2011-07-27 |
| CN101223641A (zh) | 2008-07-16 |
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