WO2007067013A8 - Cmos image sensor using vertical scan - Google Patents
Cmos image sensor using vertical scan Download PDFInfo
- Publication number
- WO2007067013A8 WO2007067013A8 PCT/KR2006/005354 KR2006005354W WO2007067013A8 WO 2007067013 A8 WO2007067013 A8 WO 2007067013A8 KR 2006005354 W KR2006005354 W KR 2006005354W WO 2007067013 A8 WO2007067013 A8 WO 2007067013A8
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signals
- image sensor
- cmos image
- pixel array
- vertical scan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
A CMOS image sensor using vertical scan is disclosed. The present invention is related to a CMOS image sensor, including a pixel array that includes one or more unit pixels that converts inputted optical signals into electrical signals and outputs image data by combining the unit pixels into m columns and n rows - wherein m and n are natural numbers and m is smaller than n -, a timing control circuit that generates control signals that control timing, a column decoder that selects a column of the pixel array according to the control signals, a row decoder that selects a row of the pixel array according to the control signals, a signal reading circuit that reads electric signals of each unit pixel on the columns selected by the column decoder, and an A/D converter that converts the electric signals read by the signal reading circuit into output signals through an analog/digital conversion. The image distortion of a moving object can be reduced.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2005-0120534 | 2005-12-09 | ||
| KR1020050120534A KR100759869B1 (en) | 2005-12-09 | 2005-12-09 | Vertical Scan Type CMOS Image Sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2007067013A1 WO2007067013A1 (en) | 2007-06-14 |
| WO2007067013A8 true WO2007067013A8 (en) | 2014-03-13 |
Family
ID=38123103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/KR2006/005354 Ceased WO2007067013A1 (en) | 2005-12-09 | 2006-12-08 | Capteur d'image cmos utilisant un balayage vertical |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR100759869B1 (en) |
| WO (1) | WO2007067013A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101027306B1 (en) * | 2009-12-14 | 2011-04-06 | 이명술 | Handy scanner device and its control method |
| KR101019164B1 (en) * | 2010-10-15 | 2011-03-03 | 주식회사 루제익테크놀러지 | X-ray image sensor and its reading method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002320235A (en) * | 2001-04-19 | 2002-10-31 | Fujitsu Ltd | A CMOS image sensor that generates a reduced image signal while suppressing a decrease in spatial resolution |
| US20030049925A1 (en) * | 2001-09-10 | 2003-03-13 | Layman Paul Arthur | High-density inter-die interconnect structure |
| US7154075B2 (en) * | 2003-11-13 | 2006-12-26 | Micron Technology, Inc. | Method and apparatus for pixel signal binning and interpolation in column circuits of a sensor circuit |
-
2005
- 2005-12-09 KR KR1020050120534A patent/KR100759869B1/en not_active Expired - Fee Related
-
2006
- 2006-12-08 WO PCT/KR2006/005354 patent/WO2007067013A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| WO2007067013A1 (en) | 2007-06-14 |
| KR100759869B1 (en) | 2007-09-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| NENP | Non-entry into the national phase |
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| 122 | Ep: pct application non-entry in european phase |
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